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https://github.com/holub/mame
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New machines added as NOT_WORKING
--------------------------------- Yamaha DX-7 Digital Programmable Algorithm Synthesizer [David Viens, R. Belmont]
This commit is contained in:
arbee
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@ -44589,6 +44589,9 @@ yiear2 // GX407 (c) 1985
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@source:yamaha/yman1x.cpp
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an1x //
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@source:yamaha/ymdx7.cpp
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dx7 // 1983 DX-7
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@source:yamaha/ymdx9.cpp
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dx9 //
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@ -1263,6 +1263,7 @@ yamaha/fb01.cpp
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yamaha/tg100.cpp
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yamaha/yman1x.cpp
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yamaha/ymdx100.cpp
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yamaha/ymdx7.cpp
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yamaha/ymdx9.cpp
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yamaha/ymdx11.cpp
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yamaha/ymmu100.cpp
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334
src/mame/yamaha/ymdx7.cpp
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334
src/mame/yamaha/ymdx7.cpp
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@ -0,0 +1,334 @@
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// license:BSD-3-Clause
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// copyright-holders:David Viens, R. Belmont
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/***************************************************************************
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ymdx7.cpp: Preliminary driver for Yamaha DX7
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Copyright 2011-2022 David Viens
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Main CPU is a HD63B03RP
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Sub CPU is a HD6805S1P-A33 (ROM on chip)
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The FM sound system is done by two discrete chips:
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OPS(YM2128) and EGS(YM2129)
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///////////////// ////////////////////////////////////////////////////////
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Main CPU PCB fixed pins:
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PIN02: XTAL : NC
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PIN03: EXTAL: 4.713250MHz (internally divided by 4 to get 1.178312MHz)
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PIN04: !NMI : 1 (4.7K pull-up)
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PIN05: !IRQ : 1 (4.7K pull-up) but... linked to Sub CPU
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PIN07: !STBY : 1 (4.7K pull-up)
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/////////////////////////////////////////////////////////////////////////
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RAM access is done through logic on the PCB when
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bit 6 of port 5 (RAME) is low.
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PORT1:direction 0 (all bits read only!)
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P10 to P17 : 8bits that are mapped to Sub CPU's shared Address/Data line
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PORT2 direction 0x11 (XXX10001)
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P20 : write to TC4053's X (pin14) (SUB CPU BUSY)
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P21 : read from TC4053's Y (pin15) (SUB CPU handshake)
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P22 : read from TC4053's Z (pin 4) (250KHz Clock)
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P23 : read from MIDI IN
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P24 : write to MIDI OUT
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****************************************************************************/
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#include "emu.h"
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#include "cpu/m6800/m6801.h"
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#include "cpu/m6805/m68705.h"
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#include "machine/adc0808.h"
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#include "machine/i8255.h"
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#include "machine/nvram.h"
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#include "video/hd44780.h"
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#include "emupal.h"
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#include "screen.h"
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constexpr auto DX7CLOCK = 9'426'500;
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constexpr auto LCD_E = 0x02;
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constexpr auto LCD_RW = 0x04;
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constexpr auto LCD_RS = 0x01;
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#define LOG_GENERAL (1U << 0)
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#define LOG_OPS (1U << 1)
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#define LOG_EGS (1U << 2)
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// #define VERBOSE (LOG_GENERAL)
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#define LOG_OUTPUT_FUNC osd_printf_info
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#include "logmacro.h"
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class yamaha_dx7_state : public driver_device
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{
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public:
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yamaha_dx7_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_subcpu(*this, "subcpu")
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, m_lcdc(*this, "hd44780")
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, m_adc(*this, "adc")
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, m_ppi(*this, "i8255")
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{
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}
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void dx7(machine_config &config);
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protected:
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virtual void machine_start() override;
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private:
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HD44780_PIXEL_UPDATE(lcd_pixel_update);
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void palette_init(palette_device &palette);
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void dx7_led_w (offs_t offset, u8 data)
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{
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// TODO: LEDs
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}
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u8 dx7_p1_r(offs_t offset);
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u8 dx7_p2_r(offs_t offset);
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void dx7_p2_w(offs_t offset, u8 data);
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void dx7_acept_w(offs_t offset, u8 data);
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void dx7_ops_w(offs_t offset, u8 data)
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{
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LOGMASKED(LOG_OPS, "OPS W: %02X=%02X\n", offset, data);
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};
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void dx7_egs_w(offs_t offset, u8 data)
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{
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LOGMASKED(LOG_EGS, "EGS W: %02X=%02X\n", offset, data);
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};
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void dx7_dac_w (offs_t offset, u8 data) {}; // TODO: DAC control
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void main_map(address_map &map);
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void sub_map (address_map &map);
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required_device<hd6303r_cpu_device> m_maincpu;
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required_device<hd6805s1_device> m_subcpu;
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required_device<hd44780_device> m_lcdc;
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required_device<adc0808_device> m_adc;
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required_device<i8255_device> m_ppi;
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int m_clk;
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u8 m_PORT1;
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u8 m_PORT2;
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u8 m_irq0;
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u8 m_portA, m_portB;
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int m_acept;
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u8 ppi_porta_r();
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u8 ppi_portb_r();
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u8 ppi_portc_r();
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void ppi_porta_w(u8 data);
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void ppi_portb_w(u8 data);
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};
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void yamaha_dx7_state::machine_start()
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{
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m_irq0 = 1;
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m_clk = 0;
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m_PORT1 = m_PORT2 = 0;
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m_acept = 0;
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}
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void yamaha_dx7_state::dx7_acept_w(offs_t address, u8 data)
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{
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m_acept++;
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LOGMASKED(LOG_GENERAL, "ACEPT reg:0x%x = 0x%x \n", address, data);
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m_irq0 = 1;
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m_maincpu->set_input_line(M6800_IRQ_LINE, CLEAR_LINE);
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}
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u8 yamaha_dx7_state::dx7_p1_r(offs_t)
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{
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LOGMASKED(LOG_GENERAL, "reading PORT1\n");
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return m_PORT1;
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}
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u8 yamaha_dx7_state::dx7_p2_r(offs_t)
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{
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LOGMASKED(LOG_GENERAL, "reading PORT2\n");
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u8 temp = 0; //P0 is WRITE! does the CPU re-reads its OWN data? can it?
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if(m_irq0)
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{
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temp = temp | 0x02; // P21 is connected to !IRQ line
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}
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if(m_clk)
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{
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temp = temp | 0x04; // P22 is connected to 250Khz clock
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}
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// TODO: MIDI INPUT
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return temp;
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}
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void yamaha_dx7_state::dx7_p2_w(offs_t offset, u8 data)
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{
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LOGMASKED(LOG_GENERAL, "W PORT2 0x%x\n", data);
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m_PORT2 = data;
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}
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u8 yamaha_dx7_state::ppi_porta_r()
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{
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return 0;
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}
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u8 yamaha_dx7_state::ppi_portb_r()
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{
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return 0;
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}
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u8 yamaha_dx7_state::ppi_portc_r()
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{
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// Sustain and Portamento (active LOW) bits 0 & 1
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// LCD busy in bit 7
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u8 retval = 3;
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if (m_portB & LCD_RW)
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{
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retval |= (m_lcdc->read(0) & 0x80);
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}
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return retval;
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}
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void yamaha_dx7_state::ppi_porta_w(u8 data)
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{
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m_portA = data;
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}
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void yamaha_dx7_state::ppi_portb_w(u8 data)
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{
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// only write on the rising edge of E
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if (!(m_portB & LCD_E) && (data & LCD_E) && !(data & LCD_RW))
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{
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m_lcdc->write(data & LCD_RS, m_portA);
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}
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m_portB = data;
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}
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HD44780_PIXEL_UPDATE(yamaha_dx7_state::lcd_pixel_update)
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{
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if (x < 5 && y < 8 && line < 2 && pos < 16)
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{
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bitmap.pix(line * 8 + y, pos * 6 + x) = state;
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}
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}
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void yamaha_dx7_state::palette_init(palette_device &palette)
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{
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palette.set_pen_color(0, rgb_t(131, 136, 139));
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palette.set_pen_color(1, rgb_t( 92, 83, 88));
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}
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void yamaha_dx7_state::main_map(address_map &map)
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{
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//decoded from IC23 74LS138 using A11 to A15 (2kb blocks)
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//Y0 (0x0000) NC
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//Y1 (0x0800) NC
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//Y2 (0x1000) RAM1
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//Y3 (0x1800) RAM2
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//Y4 (0x2000) RAM3
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//Y5 (0x2800) (another 74LS138), see below
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//Y6 (0x3000) EGS
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//Y7 (0x3800) NC
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map(0x0000, 0x001f).m(m_maincpu, FUNC(m6801_cpu_device::m6801_io));
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map(0x0080, 0x00ff).ram(); /* HR6303R built in RAM */
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map(0x1000, 0x17ff).ram().share("ram1");/* 2kb RAM1 IC19 M5M118P (Voice Memory part1) */
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map(0x1800, 0x1fff).ram().share("ram2");/* 2kb RAM2 IC20 M5M118P (Voice Memory part2) */
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map(0x2000, 0x27ff).ram().share("ram3");/* 2kb RAM3 IC21 M5M118P (Working Area) */
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// the 0x2800 to 0x2fff range is then resplit by IC24(another 74LS138)
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// A3 A2 A1 A0
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// 0 0 0 X: Y0 : IC12 8255 (LCD,porta/sustain)
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// 0 0 1 X: Y1 : IC12 8255 (LCD,porta/sustain)
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// 0 1 0 X: Y2 : OPS
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// 0 1 1 X: Y3 : NC
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// 1 0 0 X: Y4 : NC
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// 1 0 1 X: Y5 : DAC
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// 1 1 0 X: Y6 : ACEPT (IC5)
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// 1 1 1 X: Y7 : LED DRIVERs
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map(0x2800, 0x2803).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0x2804, 0x2805).w(FUNC(yamaha_dx7_state::dx7_ops_w));
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map(0x280a, 0x280b).w(FUNC(yamaha_dx7_state::dx7_dac_w));
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map(0x280c, 0x280d).w(FUNC(yamaha_dx7_state::dx7_acept_w));
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map(0x280e, 0x280f).w(FUNC(yamaha_dx7_state::dx7_led_w));
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//EGS (YM2129)
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map(0x3000, 0x37ff).w(FUNC(yamaha_dx7_state::dx7_egs_w));
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//map(0x4000, 0x4fff).rom().region("cartridge", 0); //or RAM!
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map(0xc000, 0xffff).rom().region("program", 0);
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}
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void yamaha_dx7_state::sub_map(address_map &map)
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{
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map(0x0000, 0x07ff).rom().region("subcpu", 0);
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}
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static INPUT_PORTS_START(dx7)
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INPUT_PORTS_END
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void yamaha_dx7_state::dx7(machine_config &config)
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{
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HD6303R(config, m_maincpu, DX7CLOCK/2); // HD63B03RP
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m_maincpu->set_addrmap(AS_PROGRAM, &yamaha_dx7_state::main_map);
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m_maincpu->in_p1_cb().set(FUNC(yamaha_dx7_state::dx7_p1_r));
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m_maincpu->in_p2_cb().set(FUNC(yamaha_dx7_state::dx7_p2_r));
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m_maincpu->out_p2_cb().set(FUNC(yamaha_dx7_state::dx7_p2_w));
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HD6805S1(config, m_subcpu, 4_MHz_XTAL); // HD6805S1P-A33
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m_subcpu->set_addrmap(AS_PROGRAM, &yamaha_dx7_state::sub_map);
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NVRAM(config, "ram1", nvram_device::DEFAULT_ALL_0); /* 2kb RAM1 IC19 M5M118P (Voice Memory part1) */
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NVRAM(config, "ram2", nvram_device::DEFAULT_ALL_0); /* 2kb RAM2 IC20 M5M118P (Voice Memory part2) */
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NVRAM(config, "ram3", nvram_device::DEFAULT_ALL_0); /* 2kb RAM3 IC21 M5M118P (Working Area) */
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I8255(config, m_ppi);
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m_ppi->in_pa_callback().set(FUNC(yamaha_dx7_state::ppi_porta_r));
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m_ppi->in_pb_callback().set(FUNC(yamaha_dx7_state::ppi_portb_r));
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m_ppi->in_pc_callback().set(FUNC(yamaha_dx7_state::ppi_portc_r));
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m_ppi->out_pa_callback().set(FUNC(yamaha_dx7_state::ppi_porta_w));
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m_ppi->out_pb_callback().set(FUNC(yamaha_dx7_state::ppi_portb_w));
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M58990(config, m_adc, 8_MHz_XTAL / 16); // M58990P-1; divider not verified (actually clocked by P26 output of sub CPU)
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD));
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screen.set_color(rgb_t::green());
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screen.set_refresh_hz(60);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
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screen.set_screen_update("hd44780", FUNC(hd44780_device::screen_update));
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screen.set_size(6*16, 8*2);
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screen.set_visarea_full();
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screen.set_palette("palette");
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PALETTE(config, "palette", FUNC(yamaha_dx7_state::palette_init), 2);
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HD44780(config, m_lcdc, 0);
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m_lcdc->set_lcd_size(2, 16);
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m_lcdc->set_pixel_update_cb(FUNC(yamaha_dx7_state::lcd_pixel_update));
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}
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// From service manual there are two rom revisions mentioned:
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// one that's split into two 2764's:
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// iG 10570(0) uPD 2764-2 ROM1 DX7~#2600
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// iG 10575(0) uPD 2764-2 ROM2 DX7~#2600
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// and a single 27128:
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// iG 11461(0) HN 613128PC86 ROM DX7#2661~
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// ig11464, ig11467, and ig11468 are known to exist also.
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// ig11464 is dumped but contains no version string.
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ROM_START(dx7)
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ROM_REGION(0x4000, "program", 0)
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ROM_DEFAULT_BIOS("v1.8")
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ROM_SYSTEM_BIOS(0, "v1.8", "DX-7 v1.8 24-Oct-85 IG11469")
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ROMX_LOAD( "ig11469.ic14", 0x0000, 0x4000, CRC(6cbb0865) SHA1(715dbb8e96a4df2a7f096b368334a7654860bb26), ROM_BIOS(0))
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ROM_SYSTEM_BIOS(1, "ig11464", "DX-7 v1.? IG11464")
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ROMX_LOAD( "ig11464.ic14", 0xc000, 0x4000, CRC(126c5a98) SHA1(ce4df31878dda9ec27b31c7bc172f16419264b90), ROM_BIOS(1))
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ROM_SYSTEM_BIOS(1, "ig11461", "DX-7 v1.? IG11461")
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ROMX_LOAD( "ig11461.ic14", 0xc000, 0x4000, CRC(fb50c62b) SHA1(21c4995d65d0ae6f4868ac89bf7a4ae81dc3bd31), ROM_BIOS(2))
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ROM_REGION(0x0800, "subcpu", 0)
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ROM_LOAD("hd6805s1p-a33.ic13", 0x0000, 0x800, CRC(ac1d84b3) SHA1(ee0ebb118dd0d282d7c195d3b246a0094b2cb6ad))
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ROM_END
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SYST(1983, dx7, 0, 0, dx7, dx7, yamaha_dx7_state, empty_init, "Yamaha", "DX-7 Digital Programmable Algorithm Synthesizer", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
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