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correct some spacing (nw)

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This commit is contained in:
hap 2017-01-04 18:51:16 +01:00
parent 78ef96336e
commit 69940149fd
24 changed files with 105 additions and 104 deletions
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34
src/devices/cpu/amis2000/amis2000.h
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@ -100,28 +100,28 @@ protected:
uint8_t m_bu_bits;
uint16_t m_bu_mask;
uint8_t m_callstack_bits; // number of program counter bits held in callstack
uint8_t m_callstack_bits; // number of program counter bits held in callstack
uint16_t m_callstack_mask;
uint8_t m_callstack_depth; // callstack levels: 3 on 2000/2150, 5 on 2200/2400
uint16_t m_callstack[5]; // max 5
uint8_t m_callstack_depth; // callstack levels: 3 on 2000/2150, 5 on 2200/2400
uint16_t m_callstack[5]; // max 5
int m_icount;
uint16_t m_pc; // 13-bit program counter
uint8_t m_ppr; // prepared page register (PP 1)
uint8_t m_pbr; // prepared bank register (PP 2)
uint16_t m_pc; // 13-bit program counter
uint8_t m_ppr; // prepared page register (PP 1)
uint8_t m_pbr; // prepared bank register (PP 2)
bool m_skip; // skip next opcode, including PP prefixes
uint8_t m_op;
uint8_t m_prev_op; // previous opcode, needed for PP, LAI, LB*
uint8_t m_f; // generic flags: 2 on 2000/2150, 6 on 2200/2400
uint8_t m_carry; // carry flag
uint8_t m_bl; // 4-bit ram index x
uint8_t m_bu; // 2/3-bit ram index y
uint8_t m_acc; // 4-bit accumulator
uint8_t m_e; // 4-bit generic register
uint8_t m_ki_mask; // 4-bit k/i-pins select latch
uint8_t m_d; // 8-bit d-pins latch
uint8_t m_prev_op; // previous opcode, needed for PP, LAI, LB*
uint8_t m_f; // generic flags: 2 on 2000/2150, 6 on 2200/2400
uint8_t m_carry; // carry flag
uint8_t m_bl; // 4-bit ram index x
uint8_t m_bu; // 2/3-bit ram index y
uint8_t m_acc; // 4-bit accumulator
uint8_t m_e; // 4-bit generic register
uint8_t m_ki_mask; // 4-bit k/i-pins select latch
uint8_t m_d; // 8-bit d-pins latch
bool m_d_active; // d-pins available for direct i/o(floating), or outputting d-latch
uint8_t m_d_polarity; // invert d-latch output
uint16_t m_a; // 13-bit a-pins latch (master strobe latch)
uint8_t m_d_polarity; // invert d-latch output
uint16_t m_a; // 13-bit a-pins latch (master strobe latch)
// i/o handlers
const uint8_t *m_7seg_table;

8
src/devices/cpu/e0c6200/e0c6200.h
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@ -54,10 +54,10 @@ protected:
uint16_t m_op;
uint16_t m_prev_op;
uint8_t m_irq_vector; // low 4 bits for new programcounter after interrupt
int m_irq_id; // for standard_irq_callback(id)
bool m_possible_irq; // indicates interrupts need to be re-checked
bool m_halt; // cpu halt state
bool m_sleep; // cpu sleep state
int m_irq_id; // for standard_irq_callback(id)
bool m_possible_irq; // indicates interrupts need to be re-checked
bool m_halt; // cpu halt state
bool m_sleep; // cpu sleep state
int m_icount;
uint16_t m_pc; // 13-bit programcounter: 1-bit bank, 4-bit page, 8-bit 'step'

2
src/devices/cpu/e0c6200/e0c6s46.cpp
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@ -49,7 +49,7 @@ e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, d
: e0c6200_cpu_device(mconfig, E0C6S46, "E0C6S46", tag, owner, clock, ADDRESS_MAP_NAME(e0c6s46_program), ADDRESS_MAP_NAME(e0c6s46_data), "e0c6s46", __FILE__)
, m_vram1(*this, "vram1")
, m_vram2(*this, "vram2"), m_osc(0), m_svd(0), m_lcd_control(0), m_lcd_contrast(0)
, m_pixel_update_handler(nullptr)
, m_pixel_update_handler(nullptr)
, m_write_r0(*this), m_write_r1(*this), m_write_r2(*this), m_write_r3(*this), m_write_r4(*this)
, m_read_p0(*this), m_read_p1(*this), m_read_p2(*this), m_read_p3(*this)
, m_write_p0(*this), m_write_p1(*this), m_write_p2(*this), m_write_p3(*this), m_r_dir(0), m_p_dir(0), m_p_pullup(0), m_dfk0(0), m_256_src_pulse(0), m_core_256_handle(nullptr),

10
src/devices/cpu/hmcs40/hmcs40.h
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@ -182,22 +182,22 @@ protected:
address_space *m_program;
address_space *m_data;
int m_pcwidth; // Program Counter bit-width
int m_pcwidth; // Program Counter bit-width
int m_prgwidth;
int m_datawidth;
int m_pcmask;
int m_prgmask;
int m_datamask;
int m_family; // MCU family (42-47)
int m_family; // MCU family (42-47)
uint16_t m_polarity; // i/o polarity (pmos vs cmos)
int m_stack_levels; // number of callstack levels
int m_stack_levels; // number of callstack levels
uint16_t m_stack[4]; // max 4
uint16_t m_op; // current opcode
uint16_t m_prev_op;
uint8_t m_i; // 4-bit immediate opcode param
int m_eint_line; // which input_line caused an interrupt
int m_eint_line; // which input_line caused an interrupt
emu_timer *m_timer;
int m_halt; // internal HLT state
int m_halt; // internal HLT state
attotime m_timer_halted_remain;
int m_icount;

60
src/devices/cpu/melps4/melps4.h
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@ -177,32 +177,32 @@ protected:
int m_d_pins; // number of D port pins and bitmask: 11 on '40,'41,'42,'44, 8 on '43, 12 on '45,'46, 16 on '47
int m_d_mask; // "
uint8_t m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
uint8_t m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
uint8_t m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
uint16_t m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47
uint16_t m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47
uint8_t m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
uint8_t m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
uint8_t m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
uint8_t m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
uint16_t m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47
uint16_t m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47
uint8_t m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
// internal state, misc regs
uint16_t m_pc; // program counter (11 or 10-bit)
uint16_t m_pc; // program counter (11 or 10-bit)
uint16_t m_prev_pc;
uint16_t m_stack[12]; // callstack (SK0-SKx, same size as PC)
uint16_t m_stack[12]; // callstack (SK0-SKx, same size as PC)
uint16_t m_op;
uint16_t m_prev_op;
uint8_t m_bitmask; // opcode bit argument
uint8_t m_bitmask; // opcode bit argument
uint16_t m_port_d; // last written port data
uint8_t m_port_s; // "
uint8_t m_port_f; // "
uint8_t m_port_t; // "
uint16_t m_port_d; // last written port data
uint8_t m_port_s; // "
uint8_t m_port_f; // "
uint8_t m_port_t; // "
bool m_sm, m_sms; // subroutine mode flag + irq stack
bool m_ba_flag; // temp flag indicates BA opcode was executed
uint8_t m_sp_param; // temp register holding SP opcode parameter
uint8_t m_cps; // DP,CY or DP',CY' selected
uint8_t m_sp_param; // temp register holding SP opcode parameter
uint8_t m_cps; // DP,CY or DP',CY' selected
bool m_skip; // skip next opcode
uint8_t m_inte; // interrupt enable flag
uint8_t m_inte; // interrupt enable flag
int m_intp; // external interrupt polarity ('40 to '44)
bool m_irqflag[3]; // irq flags: exf, 1f, 2f (external, timer 1, timer 2)
int m_int_state; // INT pin state
@ -210,24 +210,24 @@ protected:
bool m_prohibit_irq; // interrupt is prohibited during certain opcodes
bool m_possible_irq; // indicate that irq needs to be rechecked
uint8_t m_tmr_count[2]; // timer active count
uint8_t m_tmr_reload; // timer(2) auto reload
uint8_t m_tmr_count[2]; // timer active count
uint8_t m_tmr_reload; // timer(2) auto reload
bool m_tmr_irq_enabled[2];
// work registers (unless specified, each is 4-bit)
uint8_t m_a; // accumulator
uint8_t m_b; // generic
uint8_t m_e; // 8-bit register, hold data for S output
uint8_t m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer)
uint8_t m_x, m_x2; // RAM index X, X', 2-bit
uint8_t m_z, m_z2; // RAM index Z, Z', 1-bit, optional
uint8_t m_cy, m_cy2; // carry flag(s)
uint8_t m_a; // accumulator
uint8_t m_b; // generic
uint8_t m_e; // 8-bit register, hold data for S output
uint8_t m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer)
uint8_t m_x, m_x2; // RAM index X, X', 2-bit
uint8_t m_z, m_z2; // RAM index Z, Z', 1-bit, optional
uint8_t m_cy, m_cy2; // carry flag(s)
uint8_t m_h; // A/D converter H or generic
uint8_t m_l; // A/D converter L or generic
uint8_t m_c; // A/D converter counter
uint8_t m_v; // timer control V
uint8_t m_w; // timer control W
uint8_t m_h; // A/D converter H or generic
uint8_t m_l; // A/D converter L or generic
uint8_t m_c; // A/D converter counter
uint8_t m_v; // timer control V
uint8_t m_w; // timer control W
// i/o handlers
devcb_read16 m_read_k;

2
src/devices/cpu/tms1000/tms0270.h
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@ -54,7 +54,7 @@ private:
uint8_t m_chipsel;
uint8_t m_ctl_out;
uint8_t m_ctl_dir;
int m_pdc;
int m_pdc;
uint8_t m_o_latch_low;
uint8_t m_o_latch;

2
src/devices/cpu/tms1000/tms0970.cpp
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@ -119,7 +119,7 @@ void tms0970_cpu_device::device_reset()
uint32_t mmask = m_mpla->read(msel);
mmask ^= 0x09fe; // invert active-negative
// _____ _____ _____ _____ ______ _____ ______ _____ _____
// _____ _____ _____ _____ ______ _____ ______ _____ _____
const uint32_t md[15] = { M_CKM, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_CIN, M_AUTA, M_AUTY, M_STO };
for (int bit = 0; bit < 15; bit++)

2
src/devices/cpu/tms1000/tms0980.cpp
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@ -122,7 +122,7 @@ uint32_t tms0980_cpu_device::decode_micro(uint8_t sel)
// M_RSTR is specific to TMS02x0/TMS1980, it redirects to F_RSTR
// M_UNK1 is specific to TMS0270, unknown/unused yet and apparently not connected on every TMS0270
// _______ ______ _____ _____ _____ _____ ______ _____ ______ _____ _____
// _______ ______ _____ _____ _____ _____ ______ _____ ______ _____ _____
const uint32_t md[22] = { M_NDMTP, M_DMTP, M_AUTY, M_AUTA, M_CKM, M_SSE, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_SSS, M_CME, M_CIN, M_STO, M_RSTR, M_UNK1 };
for (int bit = 0; bit < 22 && bit < m_mpla->outputs(); bit++)

2
src/devices/cpu/tms1000/tms1000.cpp
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@ -114,7 +114,7 @@ void tms1000_cpu_device::device_reset()
for (int op = 0; op < 0x100; op++)
{
// _____ _____ ______ _____ ______ _____ _____ _____ _____
// _____ _____ ______ _____ ______ _____ _____ _____ _____
const uint32_t md[16] = { M_STSL, M_AUTY, M_AUTA, M_CIN, M_C8, M_NE, M_CKN, M_15TN, M_MTN, M_NATN, M_ATN, M_MTP, M_YTP, M_CKP, M_CKM, M_STO };
uint16_t mask = m_mpla->read(op);
mask ^= 0x3fc8; // invert active-negative

6
src/devices/cpu/tms1000/tms1k_base.h
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@ -261,14 +261,14 @@ protected:
uint8_t m_ram_in;
uint8_t m_dam_in;
int m_ram_out; // signed!
int m_ram_out; // signed!
uint8_t m_ram_address;
uint16_t m_rom_address;
uint16_t m_opcode;
uint32_t m_fixed;
uint32_t m_micro;
int m_subcycle;
int m_icount;
int m_subcycle;
int m_icount;
uint8_t m_o_index;
uint8_t m_o_pins; // how many O pins

2
src/devices/cpu/tms1000/tp0320.cpp
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@ -74,7 +74,7 @@ uint32_t tp0320_cpu_device::decode_micro(uint8_t sel)
uint32_t mask = m_mpla->read(sel);
mask ^= 0x0bff0; // invert active-negative
// _____ _______ ______ _____ _____ ______ _____ _____ ______ _____ _____
// _____ _______ ______ _____ _____ ______ _____ _____ ______ _____ _____
const uint32_t md[22] = { M_AUTA, M_AUTY, M_SSS, M_STO, M_YTP, M_NDMTP, M_DMTP, M_MTP, M_CKP, M_15TN, M_CKN, M_MTN, M_NATN, M_ATN, M_CME, M_CIN, M_SSE, M_CKM, M_NE, M_C8, M_SETR, M_RSTR };
for (int bit = 0; bit < 22 && bit < m_mpla->outputs(); bit++)

8
src/devices/cpu/ucom4/ucom4.h
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@ -169,15 +169,15 @@ protected:
int m_datawidth;
int m_prgmask;
int m_datamask;
int m_family; // MCU family (43/44/45)
int m_stack_levels; // number of callstack levels
int m_family; // MCU family (43/44/45)
int m_stack_levels; // number of callstack levels
uint16_t m_stack[3]; // max 3
uint8_t m_port_out[0x10]; // last value written to output port
uint8_t m_op;
uint8_t m_prev_op; // previous opcode
uint8_t m_arg; // opcode argument for 2-byte opcodes
uint8_t m_bitmask; // opcode bit argument
bool m_skip; // skip next opcode
bool m_skip; // skip next opcode
int m_icount;
emu_timer *m_timer;
@ -192,7 +192,7 @@ protected:
uint8_t m_timer_f; // timer out flag
uint8_t m_int_f; // interrupt flag
uint8_t m_inte_f; // interrupt enable flag
int m_int_line; // interrupt pin state
int m_int_line; // interrupt pin state
// i/o handlers
devcb_read8 m_read_a;

6
src/devices/machine/tms6100.h
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@ -131,9 +131,9 @@ protected:
uint8_t m_data; // ADD/DATA pins output
int m_m0;
int m_m1;
int m_cs; // chipselect pin
int m_clk; // CLK pin
int m_rck; // RCK pin (mask/gate to CLK?)
int m_cs; // chipselect pin
int m_clk; // CLK pin
int m_rck; // RCK pin (mask/gate to CLK?)
};

12
src/mame/drivers/hh_cop400.cpp
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@ -19,7 +19,7 @@
#include "bship82.lh" // clickable
#include "ctstein.lh" // clickable
#include "einvaderc.lh" // test-layout(but still playable)
#include "funjacks.lh"
#include "funjacks.lh" // clickable
#include "funrlgl.lh"
#include "h2hbaskb.lh"
#include "lightfgt.lh" // clickable
@ -48,16 +48,16 @@ public:
uint8_t m_l; // MCU port L write data
uint8_t m_g; // MCU port G write data
uint8_t m_d; // MCU port D write data
int m_so; // MCU SO line state
int m_sk; // MCU SK line state
int m_so; // MCU SO line state
int m_sk; // MCU SK line state
uint16_t m_inp_mux; // multiplexed inputs mask
uint16_t read_inputs(int columns);
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
uint32_t m_display_state[0x20]; // display matrix rows data (last bit is used for always-on)
uint16_t m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments

6
src/mame/drivers/hh_hmcs40.cpp
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@ -133,9 +133,9 @@ public:
DECLARE_INPUT_CHANGED_MEMBER(single_interrupt_line);
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 47 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 47 for now)
uint32_t m_grid; // VFD current row data
uint64_t m_plate; // VFD current column data

6
src/mame/drivers/hh_melps4.cpp
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@ -40,9 +40,9 @@ public:
DECLARE_INPUT_CHANGED_MEMBER(reset_button);
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
uint32_t m_grid; // VFD current row data
uint32_t m_plate; // VFD current column data

6
src/mame/drivers/hh_pic16.cpp
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@ -54,9 +54,9 @@ public:
uint8_t m_c; // MCU port C data
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
uint32_t m_display_state[0x20]; // display matrix rows data (last bit is used for always-on)
uint16_t m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments

2
src/mame/drivers/hh_sm510.cpp
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@ -34,7 +34,7 @@ public:
optional_device<speaker_sound_device> m_speaker;
// misc common
uint16_t m_inp_mux; // multiplexed inputs mask
uint16_t m_inp_mux; // multiplexed inputs mask
int m_inp_lines; // number of input mux columns
uint8_t m_lcd_output_cache[0x100];

3
src/mame/drivers/hh_tms1k.cpp
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@ -21,10 +21,11 @@
*MP0057 TMS1000 1978, APH Student Speech+ (same ROM contents as TSI Speech+?)
@MP0158 TMS1000 1979, Entex Soccer (6003)
@MP0163 TMS1000 1979, A-One LSI Match Number/LJN Electronic Concentration
*MP0168 TMS1000 1979, Conic Basketball/Tandy Sports Arena
*MP0168 TMS1000 1979, Conic Multisport/Tandy Sports Arena
@MP0170 TMS1000 1979, Conic Football
*MP0230 TMS1000 1980, Entex Blast It (6015)
@MP0271 TMS1000 1982, Tandy Radio Shack Monkey See
*MP0907 TMS1000 1979, Conic/Cardinal Basketball
@MP0914 TMS1000 1979, Entex Baseball 1
@MP0915 TMS1000 1979, Bandai System Control Car: Cheetah/The Incredible Brain Buggy
@MP0919 TMS1000 1979, Tiger Copy Cat (model 7-520)

6
src/mame/drivers/novag6502.cpp
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@ -62,9 +62,9 @@ public:
uint16_t read_inputs(int columns);
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
uint32_t m_display_state[0x20]; // display matrix rows data (last bit is used for always-on)
uint16_t m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments

6
src/mame/includes/fidelz80.h
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@ -50,9 +50,9 @@ public:
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(scc_cartridge);
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
uint32_t m_display_state[0x20]; // display matrix rows data (last bit is used for always-on)
uint16_t m_display_segmask[0x20]; // if not 0, display matrix row is a digit, mask indicates connected segments

6
src/mame/includes/hh_tms1k.h
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@ -51,9 +51,9 @@ public:
virtual DECLARE_WRITE_LINE_MEMBER(auto_power_off);
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
uint32_t m_grid; // VFD/LED current row data
uint32_t m_plate; // VFD/LED current column data

6
src/mame/includes/hh_ucom4.h
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@ -45,9 +45,9 @@ public:
DECLARE_INPUT_CHANGED_MEMBER(single_interrupt_line);
// display common
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
int m_display_wait; // led/lamp off-delay in microseconds (default 33ms)
int m_display_maxy; // display matrix number of rows
int m_display_maxx; // display matrix number of columns (max 31 for now)
uint32_t m_grid; // VFD current row data
uint32_t m_plate; // VFD current column data

6
src/mame/machine/alpha8201.h
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@ -39,9 +39,9 @@ private:
// internal state
int m_bus; // shared RAM bus direction
uint16_t m_mcu_address; // MCU side RAM address
uint16_t m_mcu_d; // MCU D output data
uint8_t m_mcu_r[4]; // MCU R0-R3 output data
uint16_t m_mcu_address; // MCU side RAM address
uint16_t m_mcu_d; // MCU D output data
uint8_t m_mcu_r[4]; // MCU R0-R3 output data
std::unique_ptr<uint8_t[]> m_shared_ram; // 1KB RAM
void mcu_update_address();