mirror of
https://github.com/holub/mame
synced 2025-06-05 04:16:28 +03:00
Improve MCS-96 (i8x9x) disassembly
- Properly decode names of directly addressed SFRs. This involves a major refactoring of the instruction execution/description unit to keep track of operand sizes and write-only destinations (since 8X9X maps numerous write-only SFRs to the same addresses as read-only SFRs). - Correct operand size for immediate modes of ADDCB and SUBCB and indexed mode of MULB. - Correct destination register for execution of the indexed mode of 2-argument ANDB. - Correct assembler syntax of JBC and JBS (the bit specifier follows the register).
This commit is contained in:
AJR
parent
d6e77a5df0
commit
69b071a533
@ -15,5 +15,72 @@ i8x9x_disassembler::i8x9x_disassembler() : mcs96_disassembler(disasm_entries)
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{
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}
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std::string i8x9x_disassembler::regname8(uint8_t reg, bool is_dest) const
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{
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switch(reg) {
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case 0x02:
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return is_dest ? "ad_command" : "ad_result_lo";
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case 0x03:
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return is_dest ? "hsi_mode" : "ad_result_hi";
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case 0x06:
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return is_dest ? "hso_command" : "hsi_status";
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case 0x07:
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return "sbuf";
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case 0x0a:
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if (is_dest)
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return "watchdog";
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break;
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case 0x0e:
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return is_dest ? "baud_rate" : "port0";
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case 0x0f:
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return "port1";
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case 0x10:
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return "port2";
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case 0x11:
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return is_dest ? "sp_con" : "sp_stat";
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case 0x15:
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return is_dest ? "ioc0" : "ios0";
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case 0x16:
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return is_dest ? "ioc1" : "ios1";
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case 0x17:
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if (is_dest)
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return "pwm_control";
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break;
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}
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return mcs96_disassembler::regname8(reg, is_dest);
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}
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std::string i8x9x_disassembler::regname16(uint8_t reg, bool is_dest) const
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{
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switch(reg) {
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case 0x04:
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return is_dest ? "hso_time" : "hsi_time";
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case 0x0a:
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if (!is_dest)
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return "timer1";
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break;
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case 0x0c:
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if (!is_dest)
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return "timer2";
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break;
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}
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return mcs96_disassembler::regname16(reg, is_dest);
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}
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#include "cpu/mcs96/i8x9xd.hxx"
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@ -19,6 +19,10 @@ public:
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i8x9x_disassembler();
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virtual ~i8x9x_disassembler() = default;
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protected:
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virtual std::string regname8(uint8_t reg, bool is_dest) const override;
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virtual std::string regname16(uint8_t reg, bool is_dest) const override;
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private:
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static const disasm_entry disasm_entries[0x100];
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};
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@ -26,13 +26,13 @@ protected:
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#define O(o) void o ## _196_full(); void o ## _196_partial()
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O(bmov_direct_2);
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O(bmovi_direct_2);
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O(cmpl_direct_2);
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O(djnzw_rrel8);
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O(bmov_direct_2w);
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O(bmovi_direct_2w);
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O(cmpl_direct_2w);
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O(djnzw_wrrel8);
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O(idlpd_none);
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O(pop_indexed_1);
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O(pop_indirect_1);
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O(pop_indexed_1w);
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O(pop_indirect_1w);
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O(popa_none);
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O(pusha_none);
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@ -123,34 +123,34 @@ protected:
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#define O(o) void o ## _full(); void o ## _partial()
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O(add_direct_2); O(add_direct_3); O(add_immed_2w); O(add_immed_3w); O(add_indexed_2); O(add_indexed_3); O(add_indirect_2); O(add_indirect_3);
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O(addb_direct_2); O(addb_direct_3); O(addb_immed_2b); O(addb_immed_3b); O(addb_indexed_2); O(addb_indexed_3); O(addb_indirect_2); O(addb_indirect_3);
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O(addc_direct_2); O(addc_immed_2w); O(addc_indexed_2); O(addc_indirect_2);
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O(addcb_direct_2); O(addcb_immed_2w); O(addcb_indexed_2); O(addcb_indirect_2);
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O(and_direct_2); O(and_direct_3); O(and_immed_2w); O(and_immed_3w); O(and_indexed_2); O(and_indexed_3); O(and_indirect_2); O(and_indirect_3);
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O(andb_direct_2); O(andb_direct_3); O(andb_immed_2b); O(andb_immed_3b); O(andb_indexed_2); O(andb_indexed_3); O(andb_indirect_2); O(andb_indirect_3);
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O(add_direct_2w); O(add_direct_3w); O(add_immed_2w); O(add_immed_3w); O(add_indexed_2w); O(add_indexed_3w); O(add_indirect_2w); O(add_indirect_3w);
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O(addb_direct_2b); O(addb_direct_3b); O(addb_immed_2b); O(addb_immed_3b); O(addb_indexed_2b); O(addb_indexed_3b); O(addb_indirect_2b); O(addb_indirect_3b);
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O(addc_direct_2w); O(addc_immed_2w); O(addc_indexed_2w); O(addc_indirect_2w);
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O(addcb_direct_2b); O(addcb_immed_2b); O(addcb_indexed_2b); O(addcb_indirect_2b);
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O(and_direct_2w); O(and_direct_3w); O(and_immed_2w); O(and_immed_3w); O(and_indexed_2w); O(and_indexed_3w); O(and_indirect_2w); O(and_indirect_3w);
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O(andb_direct_2b); O(andb_direct_3b); O(andb_immed_2b); O(andb_immed_3b); O(andb_indexed_2b); O(andb_indexed_3b); O(andb_indirect_2b); O(andb_indirect_3b);
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O(br_indirect_1n);
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O(clr_direct_1);
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O(clrb_direct_1);
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O(clr_direct_1w);
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O(clrb_direct_1b);
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O(clrc_none);
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O(clrvt_none);
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O(cmp_direct_2); O(cmp_immed_2w); O(cmp_indexed_2); O(cmp_indirect_2);
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O(cmpb_direct_2); O(cmpb_immed_2b); O(cmpb_indexed_2); O(cmpb_indirect_2);
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O(dec_direct_1);
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O(decb_direct_1);
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O(cmp_direct_2w); O(cmp_immed_2w); O(cmp_indexed_2w); O(cmp_indirect_2w);
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O(cmpb_direct_2b); O(cmpb_immed_2b); O(cmpb_indexed_2b); O(cmpb_indirect_2b);
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O(dec_direct_1w);
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O(decb_direct_1b);
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O(di_none);
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O(div_direct_2); O(div_immed_2w); O(div_indexed_2); O(div_indirect_2);
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O(divb_direct_2); O(divb_immed_2b); O(divb_indexed_2); O(divb_indirect_2);
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O(divu_direct_2); O(divu_immed_2w); O(divu_indexed_2); O(divu_indirect_2);
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O(divub_direct_2); O(divub_immed_2b); O(divub_indexed_2); O(divub_indirect_2);
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O(div_direct_2w); O(div_immed_2w); O(div_indexed_2w); O(div_indirect_2w);
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O(divb_direct_2e); O(divb_immed_2e); O(divb_indexed_2w); O(divb_indirect_2w);
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O(divu_direct_2w); O(divu_immed_2w); O(divu_indexed_2w); O(divu_indirect_2w);
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O(divub_direct_2e); O(divub_immed_2e); O(divub_indexed_2w); O(divub_indirect_2w);
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O(djnz_rrel8);
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O(djnzw_rrel8);
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O(djnzw_wrrel8);
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O(ei_none);
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O(ext_direct_1);
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O(extb_direct_1);
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O(ext_direct_1w);
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O(extb_direct_1b);
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O(idlpd_none);
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O(inc_direct_1);
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O(incb_direct_1);
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O(inc_direct_1w);
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O(incb_direct_1b);
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O(jbc_brrel8);
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O(jbs_brrel8);
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O(jc_rel8);
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@ -170,53 +170,53 @@ protected:
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O(jv_rel8);
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O(jvt_rel8);
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O(lcall_rel16);
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O(ld_direct_2); O(ld_immed_2w); O(ld_indexed_2); O(ld_indirect_2);
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O(ldb_direct_2); O(ldb_immed_2b); O(ldb_indexed_2); O(ldb_indirect_2);
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O(ldbse_direct_2); O(ldbse_immed_2b); O(ldbse_indexed_2); O(ldbse_indirect_2);
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O(ldbze_direct_2); O(ldbze_immed_2b); O(ldbze_indexed_2); O(ldbze_indirect_2);
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O(ld_direct_2w); O(ld_immed_2w); O(ld_indexed_2w); O(ld_indirect_2w);
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O(ldb_direct_2b); O(ldb_immed_2b); O(ldb_indexed_2b); O(ldb_indirect_2b);
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O(ldbse_direct_2e); O(ldbse_immed_2e); O(ldbse_indexed_2w); O(ldbse_indirect_2w);
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O(ldbze_direct_2e); O(ldbze_immed_2e); O(ldbze_indexed_2w); O(ldbze_indirect_2w);
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O(ljmp_rel16);
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O(mul_direct_2); O(mul_direct_3); O(mul_immed_2w); O(mul_immed_3w); O(mul_indexed_2); O(mul_indexed_3); O(mul_indirect_2); O(mul_indirect_3);
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O(mulb_direct_2); O(mulb_direct_3); O(mulb_immed_2b); O(mulb_immed_3b); O(mulb_indexed_2); O(mulb_indexed_3); O(mulb_indirect_2); O(mulb_indirect_3);
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O(mulu_direct_2); O(mulu_direct_3); O(mulu_immed_2w); O(mulu_immed_3w); O(mulu_indexed_2); O(mulu_indexed_3); O(mulu_indirect_2); O(mulu_indirect_3);
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O(mulub_direct_2); O(mulub_direct_3); O(mulub_immed_2b); O(mulub_immed_3b); O(mulub_indexed_2); O(mulub_indexed_3); O(mulub_indirect_2); O(mulub_indirect_3);
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O(neg_direct_1);
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O(negb_direct_1);
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O(mul_direct_2w); O(mul_direct_3w); O(mul_immed_2w); O(mul_immed_3w); O(mul_indexed_2w); O(mul_indexed_3w); O(mul_indirect_2w); O(mul_indirect_3w);
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O(mulb_direct_2b); O(mulb_direct_3e); O(mulb_immed_2b); O(mulb_immed_3e); O(mulb_indexed_2b); O(mulb_indexed_3e); O(mulb_indirect_2b); O(mulb_indirect_3e);
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O(mulu_direct_2w); O(mulu_direct_3w); O(mulu_immed_2w); O(mulu_immed_3w); O(mulu_indexed_2w); O(mulu_indexed_3w); O(mulu_indirect_2w); O(mulu_indirect_3w);
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O(mulub_direct_2b); O(mulub_direct_3e); O(mulub_immed_2b); O(mulub_immed_3e); O(mulub_indexed_2b); O(mulub_indexed_3e); O(mulub_indirect_2b); O(mulub_indirect_3e);
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O(neg_direct_1w);
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O(negb_direct_1b);
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O(nop_none);
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O(norml_direct_2);
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O(not_direct_1);
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O(notb_direct_1);
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O(or_direct_2); O(or_immed_2w); O(or_indexed_2); O(or_indirect_2);
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O(orb_direct_2); O(orb_immed_2b); O(orb_indexed_2); O(orb_indirect_2);
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O(pop_direct_1); O(pop_indexed_1); O(pop_indirect_1);
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O(norml_direct_2e);
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O(not_direct_1w);
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O(notb_direct_1b);
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O(or_direct_2w); O(or_immed_2w); O(or_indexed_2w); O(or_indirect_2w);
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O(orb_direct_2b); O(orb_immed_2b); O(orb_indexed_2b); O(orb_indirect_2b);
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O(pop_direct_1w); O(pop_indexed_1w); O(pop_indirect_1w);
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O(popf_none);
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O(push_direct_1); O(push_immed_1w); O(push_indexed_1); O(push_indirect_1);
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O(push_direct_1w); O(push_immed_1w); O(push_indexed_1w); O(push_indirect_1w);
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O(pushf_none);
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O(ret_none);
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O(rst_none);
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O(scall_rel11);
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O(setc_none);
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O(shl_immed_or_reg_2b);
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O(shl_immed_or_reg_2w);
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O(shlb_immed_or_reg_2b);
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O(shll_immed_or_reg_2b);
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O(shr_immed_or_reg_2b);
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O(shra_immed_or_reg_2b);
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O(shll_immed_or_reg_2w);
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O(shr_immed_or_reg_2w);
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O(shra_immed_or_reg_2w);
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O(shrab_immed_or_reg_2b);
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O(shral_immed_or_reg_2b);
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O(shral_immed_or_reg_2w);
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O(shrb_immed_or_reg_2b);
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O(shrl_immed_or_reg_2b);
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O(shrl_immed_or_reg_2w);
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O(sjmp_rel11);
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O(skip_immed_1b);
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O(st_direct_2); O(st_indexed_2); O(st_indirect_2);
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O(stb_direct_2); O(stb_indexed_2); O(stb_indirect_2);
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O(sub_direct_2); O(sub_direct_3); O(sub_immed_2w); O(sub_immed_3w); O(sub_indexed_2); O(sub_indexed_3); O(sub_indirect_2); O(sub_indirect_3);
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O(subb_direct_2); O(subb_direct_3); O(subb_immed_2b); O(subb_immed_3b); O(subb_indexed_2); O(subb_indexed_3); O(subb_indirect_2); O(subb_indirect_3);
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O(subc_direct_2); O(subc_immed_2w); O(subc_indexed_2); O(subc_indirect_2);
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O(subcb_direct_2); O(subcb_immed_2w); O(subcb_indexed_2); O(subcb_indirect_2);
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O(st_direct_2w); O(st_indexed_2w); O(st_indirect_2w);
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O(stb_direct_2b); O(stb_indexed_2b); O(stb_indirect_2b);
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O(sub_direct_2w); O(sub_direct_3w); O(sub_immed_2w); O(sub_immed_3w); O(sub_indexed_2w); O(sub_indexed_3w); O(sub_indirect_2w); O(sub_indirect_3w);
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O(subb_direct_2b); O(subb_direct_3b); O(subb_immed_2b); O(subb_immed_3b); O(subb_indexed_2b); O(subb_indexed_3b); O(subb_indirect_2b); O(subb_indirect_3b);
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O(subc_direct_2w); O(subc_immed_2w); O(subc_indexed_2w); O(subc_indirect_2w);
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O(subcb_direct_2b); O(subcb_immed_2b); O(subcb_indexed_2b); O(subcb_indirect_2b);
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O(trap_none);
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O(xch_direct_2);
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O(xchb_direct_2);
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O(xor_direct_2); O(xor_immed_2w); O(xor_indexed_2); O(xor_indirect_2);
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O(xorb_direct_2); O(xorb_immed_2b); O(xorb_indexed_2); O(xorb_indirect_2);
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O(xch_direct_2w);
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O(xchb_direct_2b);
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O(xor_direct_2w); O(xor_immed_2w); O(xor_indexed_2w); O(xor_indirect_2w);
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O(xorb_direct_2b); O(xorb_immed_2b); O(xorb_indexed_2b); O(xorb_indirect_2b);
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O(fetch);
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O(fetch_noirq);
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@ -20,16 +20,67 @@ u32 mcs96_disassembler::opcode_alignment() const
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return 1;
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}
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std::string mcs96_disassembler::regname(uint8_t reg)
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std::string mcs96_disassembler::regname8(uint8_t reg, bool is_dest) const
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{
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switch(reg) {
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case 0x00:
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return "r0";
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case 0x08:
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return "int_mask";
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case 0x09:
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return "int_pending";
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case 0x1c:
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return "al";
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case 0x1d:
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return "ah";
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case 0x1e:
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return "dl";
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case 0x1f:
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return "dh";
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case 0x20:
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return "bl";
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case 0x21:
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return "bh";
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case 0x22:
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return "cl";
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case 0x23:
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return "ch";
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default:
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return util::string_format("%02x", reg);
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}
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}
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std::string mcs96_disassembler::regname16(uint8_t reg, bool is_dest) const
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{
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switch(reg) {
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case 0x00:
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return "r0";
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case 0x18:
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return "sp";
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break;
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case 0x19:
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return "sph";
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break;
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case 0x1c:
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return "ax";
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case 0x1e:
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return "dx";
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case 0x20:
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return "bx";
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case 0x22:
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return "cx";
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default:
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return util::string_format("%02x", reg);
|
||||
@ -37,6 +88,30 @@ std::string mcs96_disassembler::regname(uint8_t reg)
|
||||
}
|
||||
}
|
||||
|
||||
std::string mcs96_disassembler::regname_indirect(uint8_t reg) const
|
||||
{
|
||||
if(BIT(reg, 0))
|
||||
return util::string_format("[%s]+", regname16(reg & 0xfe, false));
|
||||
else
|
||||
return util::string_format("[%s]", regname16(reg, false));
|
||||
|
||||
}
|
||||
|
||||
std::string mcs96_disassembler::regname_indexed(uint8_t reg, int8_t delta) const
|
||||
{
|
||||
if(reg == 0x00) {
|
||||
if(delta < 0)
|
||||
return util::string_format("%04x", uint8_t(delta) | 0xff00);
|
||||
else
|
||||
return util::string_format("%02x", delta);
|
||||
} else {
|
||||
if(delta < 0)
|
||||
return util::string_format("-%02x[%s]", -delta, regname16(reg, false));
|
||||
else
|
||||
return util::string_format("%02x[%s]", delta, regname16(reg, false));
|
||||
}
|
||||
}
|
||||
|
||||
offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
|
||||
{
|
||||
bool prefix_fe = false;
|
||||
@ -60,14 +135,10 @@ offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
|
||||
flags |= 2;
|
||||
break;
|
||||
|
||||
case DASM_rel8: {
|
||||
int delta = opcodes.r8(pc+1);
|
||||
if(delta & 0x80)
|
||||
delta -= 0x100;
|
||||
util::stream_format(stream, " %04x", (pc+2+delta) & 0xffff);
|
||||
case DASM_rel8:
|
||||
util::stream_format(stream, " %04x", (pc+2+int8_t(opcodes.r8(pc+1))) & 0xffff);
|
||||
flags |= 2;
|
||||
break;
|
||||
}
|
||||
|
||||
case DASM_rel11: {
|
||||
int delta = ((opcodes.r8(pc) << 8) | opcodes.r8(pc+1)) & 0x7ff;
|
||||
@ -78,43 +149,63 @@ offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
|
||||
break;
|
||||
}
|
||||
|
||||
case DASM_rel16: {
|
||||
int delta = opcodes.r8(pc+1) | (opcodes.r8(pc+2) << 8);
|
||||
util::stream_format(stream, " %04x", (pc+3+delta) & 0xffff);
|
||||
case DASM_rel16:
|
||||
util::stream_format(stream, " %04x", (pc+3+opcodes.r16(pc+1)) & 0xffff);
|
||||
flags |= 3;
|
||||
break;
|
||||
}
|
||||
|
||||
case DASM_rrel8: {
|
||||
int delta = opcodes.r8(pc+2);
|
||||
if(delta & 0x80)
|
||||
delta -= 0x100;
|
||||
util::stream_format(stream, " %s, %04x", regname(opcodes.r8(pc+1)), (pc+3+delta) & 0xffff);
|
||||
case DASM_rrel8:
|
||||
util::stream_format(stream, " %s, %04x", regname8(opcodes.r8(pc+1), true), (pc+3+int8_t(opcodes.r8(pc+2))) & 0xffff);
|
||||
flags |= 3;
|
||||
break;
|
||||
}
|
||||
|
||||
case DASM_brrel8: {
|
||||
int delta = opcodes.r8(pc+2);
|
||||
if(delta & 0x80)
|
||||
delta -= 0x100;
|
||||
util::stream_format(stream, " %d, %s, %04x", opcodes.r8(pc) & 7, regname(opcodes.r8(pc+1)), (pc+3+delta) & 0xffff);
|
||||
case DASM_brrel8:
|
||||
util::stream_format(stream, " %s, %d, %04x", regname8(opcodes.r8(pc+1), false), opcodes.r8(pc) & 7, (pc+3+int8_t(opcodes.r8(pc+2))) & 0xffff);
|
||||
flags |= 3;
|
||||
break;
|
||||
}
|
||||
|
||||
case DASM_direct_1:
|
||||
util::stream_format(stream, " %s", regname(opcodes.r8(pc+1)));
|
||||
case DASM_wrrel8:
|
||||
util::stream_format(stream, " %s, %04x", regname16(opcodes.r8(pc+1), true), (pc+3+int8_t(opcodes.r8(pc+2))) & 0xffff);
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_direct_1b:
|
||||
util::stream_format(stream, " %s", regname8(opcodes.r8(pc+1), true));
|
||||
flags |= 2;
|
||||
break;
|
||||
|
||||
case DASM_direct_2:
|
||||
util::stream_format(stream, " %s, %s", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)));
|
||||
case DASM_direct_1w:
|
||||
util::stream_format(stream, " %s", regname16(opcodes.r8(pc+1), opcodes.r8(pc) == 0x01 || opcodes.r8(pc) == 0xcc));
|
||||
flags |= 2;
|
||||
break;
|
||||
|
||||
case DASM_direct_2b:
|
||||
util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+2), opcodes.r8(pc) == 0xb0), regname8(opcodes.r8(pc+1), opcodes.r8(pc) == 0xc4));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_direct_3:
|
||||
util::stream_format(stream, " %s, %s, %s", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)));
|
||||
case DASM_direct_2e:
|
||||
util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), (opcodes.r8(pc) & 0xef) == 0xac), regname8(opcodes.r8(pc+1), opcodes.r8(pc) == 0x0f));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_direct_2w:
|
||||
util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), opcodes.r8(pc) == 0xa0), regname16(opcodes.r8(pc+1), opcodes.r8(pc) == 0xc0));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_direct_3b:
|
||||
util::stream_format(stream, " %s, %s, %s", regname8(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_direct_3e:
|
||||
util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_direct_3w:
|
||||
util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname16(opcodes.r8(pc+2), false), regname16(opcodes.r8(pc+1), false));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
@ -124,147 +215,169 @@ offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
|
||||
break;
|
||||
|
||||
case DASM_immed_2b:
|
||||
util::stream_format(stream, " %s, #%02x", regname(opcodes.r8(pc+2)), opcodes.r8(pc+1));
|
||||
util::stream_format(stream, " %s, #%02x", regname8(opcodes.r8(pc+2), opcodes.r8(pc) == 0xb1), opcodes.r8(pc+1));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_immed_2e:
|
||||
util::stream_format(stream, " %s, #%02x", regname16(opcodes.r8(pc+2), (opcodes.r8(pc) & 0xef) == 0xad), opcodes.r8(pc+1));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_immed_or_reg_2b:
|
||||
if(opcodes.r8(pc+1) >= 0x10)
|
||||
util::stream_format(stream, " %s, %s", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)));
|
||||
util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false));
|
||||
else
|
||||
util::stream_format(stream, " %s, #%02x", regname(opcodes.r8(pc+2)), opcodes.r8(pc+1));
|
||||
util::stream_format(stream, " %s, #%02x", regname8(opcodes.r8(pc+2), false), opcodes.r8(pc+1));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_immed_3b:
|
||||
util::stream_format(stream, " %s, %s, #%02x", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), opcodes.r8(pc+1));
|
||||
util::stream_format(stream, " %s, %s, #%02x", regname8(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), opcodes.r8(pc+1));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_immed_3e:
|
||||
util::stream_format(stream, " %s, %s, #%02x", regname16(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), opcodes.r8(pc+1));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_immed_1w:
|
||||
util::stream_format(stream, " #%02x%02x", opcodes.r8(pc+2), opcodes.r8(pc+1));
|
||||
util::stream_format(stream, " #%04x", opcodes.r16(pc+1));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_immed_2w:
|
||||
util::stream_format(stream, " %s, #%02x%02x", regname(opcodes.r8(pc+3)), opcodes.r8(pc+2), opcodes.r8(pc+1));
|
||||
util::stream_format(stream, " %s, #%04x", regname16(opcodes.r8(pc+3), opcodes.r8(pc) == 0xa1), opcodes.r16(pc+1));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_immed_or_reg_2w:
|
||||
if(opcodes.r8(pc+1) >= 0x10)
|
||||
util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false));
|
||||
else
|
||||
util::stream_format(stream, " %s, #%02x", regname16(opcodes.r8(pc+2), false), opcodes.r8(pc+1));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_immed_3w:
|
||||
util::stream_format(stream, " %s, %s, #%02x%02x", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), opcodes.r8(pc+2), opcodes.r8(pc+1));
|
||||
util::stream_format(stream, " %s, %s, #%04x", regname16(opcodes.r8(pc+4), true), regname16(opcodes.r8(pc+3), false), opcodes.r16(pc+1));
|
||||
flags |= 5;
|
||||
break;
|
||||
|
||||
case DASM_indirect_1n:
|
||||
util::stream_format(stream, " [%s]", regname(opcodes.r8(pc+1)));
|
||||
util::stream_format(stream, " [%s]", regname16(opcodes.r8(pc+1), false));
|
||||
flags |= 2;
|
||||
break;
|
||||
|
||||
case DASM_indirect_1:
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
util::stream_format(stream, " [%s]+", regname(opcodes.r8(pc+1)-1));
|
||||
flags |= 2;
|
||||
} else {
|
||||
util::stream_format(stream, " [%s]", regname(opcodes.r8(pc+1)));
|
||||
flags |= 2;
|
||||
}
|
||||
case DASM_indirect_1w:
|
||||
util::stream_format(stream, " %s", regname_indirect(opcodes.r8(pc+1)));
|
||||
flags |= 2;
|
||||
break;
|
||||
|
||||
case DASM_indirect_2:
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
util::stream_format(stream, " %s, [%s]+", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)-1));
|
||||
flags |= 3;
|
||||
} else {
|
||||
util::stream_format(stream, " %s, [%s]", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)));
|
||||
flags |= 3;
|
||||
}
|
||||
case DASM_indirect_2b:
|
||||
util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+2), opcodes.r8(pc) == 0xb2), regname_indirect(opcodes.r8(pc+1)));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_indirect_3:
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
util::stream_format(stream, " %s, %s, [%s]+", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)-1));
|
||||
flags |= 4;
|
||||
} else {
|
||||
util::stream_format(stream, " %s, %s, [%s]", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)));
|
||||
flags |= 4;
|
||||
}
|
||||
case DASM_indirect_2w:
|
||||
util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), opcodes.r8(pc) == 0xa2), regname_indirect(opcodes.r8(pc+1)));
|
||||
flags |= 3;
|
||||
break;
|
||||
|
||||
case DASM_indexed_1:
|
||||
case DASM_indirect_3b:
|
||||
util::stream_format(stream, " %s, %s, %s", regname8(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname_indirect(opcodes.r8(pc+1)));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_indirect_3e:
|
||||
util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname_indirect(opcodes.r8(pc+1)));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_indirect_3w:
|
||||
util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname16(opcodes.r8(pc+2), false), regname_indirect(opcodes.r8(pc+1)));
|
||||
flags |= 4;
|
||||
break;
|
||||
|
||||
case DASM_indexed_1w:
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
if(opcodes.r8(pc+1) == 0x01)
|
||||
util::stream_format(stream, " %02x%02x", opcodes.r8(pc+3), opcodes.r8(pc+2));
|
||||
util::stream_format(stream, " %04x", opcodes.r16(pc+2));
|
||||
else
|
||||
util::stream_format(stream, " %02x%02x[%s]", opcodes.r8(pc+3), opcodes.r8(pc+2), regname(opcodes.r8(pc+1)-1));
|
||||
util::stream_format(stream, " %04x[%s]", opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false));
|
||||
flags |= 4;
|
||||
} else {
|
||||
int delta = opcodes.r8(pc+2);
|
||||
if(delta & 0x80)
|
||||
delta -= 0x100;
|
||||
if(opcodes.r8(pc+1) == 0x00) {
|
||||
if(delta < 0)
|
||||
util::stream_format(stream, " %04x", delta & 0xffff);
|
||||
else
|
||||
util::stream_format(stream, " %02x", delta);
|
||||
} else {
|
||||
if(delta < 0)
|
||||
util::stream_format(stream, " -%02x[%s]", -delta, regname(opcodes.r8(pc+1)));
|
||||
else
|
||||
util::stream_format(stream, " %02x[%s]", delta, regname(opcodes.r8(pc+1)));
|
||||
}
|
||||
util::stream_format(stream, "%s", regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2)));
|
||||
flags |= 3;
|
||||
}
|
||||
break;
|
||||
|
||||
case DASM_indexed_2:
|
||||
case DASM_indexed_2b: {
|
||||
bool is_dest = opcodes.r8(pc) == 0xb3;
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
if(opcodes.r8(pc+1) == 0x01)
|
||||
util::stream_format(stream, " %s, %02x%02x", regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2));
|
||||
util::stream_format(stream, " %s, %04x", regname8(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2));
|
||||
else
|
||||
util::stream_format(stream, " %s, %02x%02x[%s]", regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2), regname(opcodes.r8(pc+1)-1));
|
||||
util::stream_format(stream, " %s, %04x[%s]", regname8(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false));
|
||||
flags |= 5;
|
||||
} else {
|
||||
int delta = opcodes.r8(pc+2);
|
||||
if(delta & 0x80)
|
||||
delta -= 0x100;
|
||||
if(opcodes.r8(pc+1) == 0x00) {
|
||||
if(delta < 0)
|
||||
util::stream_format(stream, " %s, %04x", regname(opcodes.r8(pc+3)), delta & 0xffff);
|
||||
else
|
||||
util::stream_format(stream, " %s, %02x", regname(opcodes.r8(pc+3)), delta);
|
||||
} else {
|
||||
if(delta < 0)
|
||||
util::stream_format(stream, " %s, -%02x[%s]", regname(opcodes.r8(pc+3)), -delta, regname(opcodes.r8(pc+1)));
|
||||
else
|
||||
util::stream_format(stream, " %s, %02x[%s]", regname(opcodes.r8(pc+3)), delta, regname(opcodes.r8(pc+1)));
|
||||
}
|
||||
util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+3), is_dest), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2)));
|
||||
flags |= 4;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DASM_indexed_3:
|
||||
case DASM_indexed_2w: {
|
||||
bool is_dest = opcodes.r8(pc) == 0xa3 || (opcodes.r8(pc) & 0xef) == 0xaf;
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
if(opcodes.r8(pc+1) == 0x01)
|
||||
util::stream_format(stream, " %s, %s, %02x%02x", regname(opcodes.r8(pc+5)), regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2));
|
||||
util::stream_format(stream, " %s, %04x", regname16(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2));
|
||||
else
|
||||
util::stream_format(stream, " %s, %s, %02x%02x[%s]", regname(opcodes.r8(pc+5)), regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2), regname(opcodes.r8(pc+1)-1));
|
||||
util::stream_format(stream, " %s, %04x[%s]", regname16(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false));
|
||||
flags |= 5;
|
||||
} else {
|
||||
util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+3), is_dest), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2)));
|
||||
flags |= 4;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DASM_indexed_3b:
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
if(opcodes.r8(pc+1) == 0x01)
|
||||
util::stream_format(stream, " %s, %s, %04x", regname8(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2));
|
||||
else
|
||||
util::stream_format(stream, " %s, %s, %04x[%s]", regname8(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false));
|
||||
flags |= 6;
|
||||
} else {
|
||||
int delta = opcodes.r8(pc+2);
|
||||
if(delta & 0x80)
|
||||
delta -= 0x100;
|
||||
if(opcodes.r8(pc+1) == 0x00) {
|
||||
if(delta < 0)
|
||||
util::stream_format(stream, " %s, %s, %04x", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), delta & 0xffff);
|
||||
else
|
||||
util::stream_format(stream, " %s, %s, %02x", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), delta);
|
||||
} else {
|
||||
if(delta < 0)
|
||||
util::stream_format(stream, " %s, %s, -%02x[%s]", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), -delta, regname(opcodes.r8(pc+1)));
|
||||
else
|
||||
util::stream_format(stream, " %s, %s, %02x[%s]", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), delta, regname(opcodes.r8(pc+1)));
|
||||
}
|
||||
util::stream_format(stream, " %s, %s, %s", regname8(opcodes.r8(pc+4), true), regname8(opcodes.r8(pc+3), false), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2)));
|
||||
flags |= 5;
|
||||
}
|
||||
break;
|
||||
|
||||
case DASM_indexed_3e:
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
if(opcodes.r8(pc+1) == 0x01)
|
||||
util::stream_format(stream, " %s, %s, %04x", regname16(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2));
|
||||
else
|
||||
util::stream_format(stream, " %s, %s, %04x[%s]", regname16(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false));
|
||||
flags |= 6;
|
||||
} else {
|
||||
util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+4), true), regname8(opcodes.r8(pc+3), false), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2)));
|
||||
flags |= 5;
|
||||
}
|
||||
break;
|
||||
|
||||
case DASM_indexed_3w:
|
||||
if(opcodes.r8(pc+1) & 0x01) {
|
||||
if(opcodes.r8(pc+1) == 0x01)
|
||||
util::stream_format(stream, " %s, %s, %04x", regname16(opcodes.r8(pc+5), true), regname16(opcodes.r8(pc+4), false), opcodes.r16(pc+2));
|
||||
else
|
||||
util::stream_format(stream, " %s, %s, %04x[%s]", regname16(opcodes.r8(pc+5), true), regname16(opcodes.r8(pc+4), false), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false));
|
||||
flags |= 6;
|
||||
} else {
|
||||
util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+4), true), regname16(opcodes.r8(pc+3), false), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2)));
|
||||
flags |= 5;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -35,30 +35,48 @@ protected:
|
||||
DASM_rel8, /* Relative, 8 bits */
|
||||
DASM_rel11, /* Relative, 11 bits */
|
||||
DASM_rel16, /* Relative, 16 bits */
|
||||
DASM_rrel8, /* Register + relative, 8 bits */
|
||||
DASM_rrel8, /* Register (8-bit) + relative, 8 bits */
|
||||
DASM_brrel8, /* Bit test + register + relative, 8 bits */
|
||||
DASM_direct_1, /* Register-direct references, 1 operator */
|
||||
DASM_direct_2, /* Register-direct references, 2 operators */
|
||||
DASM_direct_3, /* Register-direct references, 3 operators */
|
||||
DASM_immed_1b, /* Immediate references to byte, 1 operator */
|
||||
DASM_immed_2b, /* Immediate references to byte, 2 operators */
|
||||
DASM_immed_or_reg_2b, /* Immediate references to byte or register, 2 operators */
|
||||
DASM_immed_3b, /* Immediate references to byte, 3 operators */
|
||||
DASM_immed_1w, /* Immediate references to word, 1 operator */
|
||||
DASM_immed_2w, /* Immediate references to word, 2 operators */
|
||||
DASM_immed_3w, /* Immediate references to word, 3 operators */
|
||||
DASM_wrrel8, /* Register (16-bit) + relative, 8 bits */
|
||||
DASM_direct_1b, /* Register-direct references, 1 operator, 8 bits */
|
||||
DASM_direct_2b, /* Register-direct references, 2 operators, 8 bits */
|
||||
DASM_direct_2e, /* Register-direct references, 2 operators, 8 bits extended to 16 */
|
||||
DASM_direct_3b, /* Register-direct references, 3 operators, 8 bits */
|
||||
DASM_direct_3e, /* Register-direct references, 3 operators, 8 bits extended to 16 */
|
||||
DASM_direct_1w, /* Register-direct references, 1 operator, 16 bits */
|
||||
DASM_direct_2w, /* Register-direct references, 2 operators, 16 bits */
|
||||
DASM_direct_3w, /* Register-direct references, 3 operators, 16 bits */
|
||||
DASM_immed_1b, /* Immediate references to byte, 1 operator, 8 bits */
|
||||
DASM_immed_2b, /* Immediate references to byte, 2 operators, 8 bits */
|
||||
DASM_immed_2e, /* Immediate references to byte, 2 operators, 8 bits extended to 16 */
|
||||
DASM_immed_or_reg_2b, /* Immediate references to byte or register, 2 operators, 8 bits */
|
||||
DASM_immed_3b, /* Immediate references to byte, 3 operators, 8 bits */
|
||||
DASM_immed_3e, /* Immediate references to byte, 3 operators, 8 bits extended to 16 */
|
||||
DASM_immed_1w, /* Immediate references to word, 1 operator, 16 bits */
|
||||
DASM_immed_2w, /* Immediate references to word, 2 operators, 16 bits */
|
||||
DASM_immed_or_reg_2w, /* Immediate references to byte or register, 2 operators, 16 bits */
|
||||
DASM_immed_3w, /* Immediate references to word, 3 operators, 16 bits */
|
||||
DASM_indirect_1n, /* Indirect normal, 1 operator */
|
||||
DASM_indirect_1, /* Indirect, normal or auto-incrementing, 1 operator */
|
||||
DASM_indirect_2, /* Indirect, normal or auto-incrementing, 2 operators */
|
||||
DASM_indirect_3, /* Indirect, normal or auto-incrementing, 3 operators */
|
||||
DASM_indexed_1, /* Indexed, short or long, 1 operator */
|
||||
DASM_indexed_2, /* Indexed, short or long, 2 operators */
|
||||
DASM_indexed_3 /* Indexed, short or long, 3 operators */
|
||||
DASM_indirect_1w, /* Indirect, normal or auto-incrementing, 1 operator, 16 bits */
|
||||
DASM_indirect_2b, /* Indirect, normal or auto-incrementing, 2 operators, 8 bits */
|
||||
DASM_indirect_2w, /* Indirect, normal or auto-incrementing, 2 operators, 16 bits */
|
||||
DASM_indirect_3b, /* Indirect, normal or auto-incrementing, 3 operators, 8 bits */
|
||||
DASM_indirect_3e, /* Indirect, normal or auto-incrementing, 3 operators, 8 bits extended to 16 */
|
||||
DASM_indirect_3w, /* Indirect, normal or auto-incrementing, 3 operators, 16 bits */
|
||||
DASM_indexed_1w, /* Indexed, short or long, 1 operator, 16 bits */
|
||||
DASM_indexed_2b, /* Indexed, short or long, 2 operators, 8 bits */
|
||||
DASM_indexed_2w, /* Indexed, short or long, 2 operators, 16 bits */
|
||||
DASM_indexed_3b, /* Indexed, short or long, 3 operators, 8 bits */
|
||||
DASM_indexed_3e, /* Indexed, short or long, 3 operators, 8 bits extended to 16 */
|
||||
DASM_indexed_3w /* Indexed, short or long, 3 operators, 16 bits */
|
||||
};
|
||||
|
||||
const disasm_entry *m_entries;
|
||||
|
||||
static std::string regname(uint8_t reg);
|
||||
virtual std::string regname8(uint8_t reg, bool is_dest) const;
|
||||
virtual std::string regname16(uint8_t reg, bool is_dest) const;
|
||||
std::string regname_indirect(uint8_t reg) const;
|
||||
std::string regname_indexed(uint8_t reg, int8_t delta) const;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user