vertigo: Use ADC0808 device

This commit is contained in:
Dirk Best 2018-04-02 12:00:32 +02:00
parent 3fc25775f1
commit 69bdb2d308
3 changed files with 16 additions and 30 deletions

View File

@ -41,7 +41,7 @@ void vertigo_state::vertigo_map(address_map &map)
map(0x000008, 0x001fff).ram().mirror(0x010000);
map(0x002000, 0x003fff).ram().share("vectorram");
map(0x004000, 0x00400f).r(this, FUNC(vertigo_state::vertigo_io_convert)).mirror(0x001000);
map(0x004010, 0x00401f).r(this, FUNC(vertigo_state::vertigo_io_adc)).mirror(0x001000);
map(0x004010, 0x00401f).r(m_adc, FUNC(adc0808_device::data_r)).mirror(0x001000);
map(0x004020, 0x00402f).r(this, FUNC(vertigo_state::vertigo_coin_r)).mirror(0x001000);
map(0x004030, 0x00403f).portr("GIO").mirror(0x001000);
map(0x004040, 0x00404f).r(this, FUNC(vertigo_state::vertigo_sio_r)).mirror(0x001000);
@ -131,6 +131,12 @@ MACHINE_CONFIG_START(vertigo_state::vertigo)
MCFG_CPU_PROGRAM_MAP(vertigo_map)
MCFG_CPU_PERIODIC_INT_DRIVER(vertigo_state, vertigo_interrupt, 60)
MCFG_DEVICE_ADD("adc", ADC0808, 500000) // unknown clock
MCFG_ADC0808_EOC_FF_CB(WRITELINE(vertigo_state, adc_eoc_w))
MCFG_ADC0808_IN0_CB(IOPORT("P1X"))
MCFG_ADC0808_IN1_CB(IOPORT("P1Y"))
MCFG_ADC0808_IN2_CB(IOPORT("PADDLE"))
exidy440_audio(config);
MCFG_DEVICE_ADD("pit", PIT8254, 0)

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@ -12,6 +12,7 @@
#include "audio/exidy440.h"
#include "machine/74148.h"
#include "machine/adc0808.h"
#include "video/vector.h"
/*************************************
@ -33,14 +34,15 @@ public:
m_custom(*this, "custom"),
m_ttl74148(*this, "74148"),
m_vector(*this, "vector"),
m_adc(*this, "adc"),
m_vectorram(*this, "vectorram")
{ }
void vertigo(machine_config &config);
protected:
DECLARE_WRITE_LINE_MEMBER(adc_eoc_w);
DECLARE_READ16_MEMBER(vertigo_io_convert);
DECLARE_READ16_MEMBER(vertigo_io_adc);
DECLARE_READ16_MEMBER(vertigo_coin_r);
DECLARE_WRITE16_MEMBER(vertigo_wsot_w);
DECLARE_WRITE16_MEMBER(vertigo_audio_w);
@ -134,10 +136,10 @@ private:
required_device<exidy440_sound_device> m_custom;
required_device<ttl74148_device> m_ttl74148;
required_device<vector_device> m_vector;
required_device<adc0808_device> m_adc;
required_shared_ptr<uint16_t> m_vectorram;
attotime m_irq4_time;
uint8_t m_irq_state;
uint8_t m_adc_result;
vproc m_vs;
am2901 m_bsp;
vector_generator m_vgen;

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@ -10,19 +10,6 @@
#include "includes/vertigo.h"
/*************************************
*
* Statics
*
*************************************/
/* Timestamp of last INTL4 change. The vector CPU runs for
the delta between this and now.
*/
/* State of the priority encoder output */
/* Result of the last ADC channel sampled */
/*************************************
*
@ -75,24 +62,16 @@ WRITE_LINE_MEMBER(vertigo_state::v_irq3_w)
*
*************************************/
READ16_MEMBER(vertigo_state::vertigo_io_convert)
WRITE_LINE_MEMBER( vertigo_state::adc_eoc_w )
{
static const char *const adcnames[] = { "P1X", "P1Y", "PADDLE" };
if (offset > 2)
m_adc_result = 0;
else
m_adc_result = ioport(adcnames[offset])->read();
update_irq_encoder(INPUT_LINE_IRQ2, ASSERT_LINE);
return 0;
update_irq_encoder(INPUT_LINE_IRQ2, state ? ASSERT_LINE : CLEAR_LINE);
}
READ16_MEMBER(vertigo_state::vertigo_io_adc)
READ16_MEMBER(vertigo_state::vertigo_io_convert)
{
update_irq_encoder(INPUT_LINE_IRQ2, CLEAR_LINE);
return m_adc_result;
m_adc->address_offset_start_w(space, offset, 0);
return 0;
}
@ -163,7 +142,6 @@ READ16_MEMBER(vertigo_state::vertigo_sio_r)
void vertigo_state::machine_start()
{
save_item(NAME(m_irq_state));
save_item(NAME(m_adc_result));
save_item(NAME(m_irq4_time));
vertigo_vproc_init();