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Audio device additions: [Atari Ace]

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- exidy440/m72/segasnd are converted to legacy devices.
- cage/dcs/williams variables are restructured internally to
resemble a device, simplifying a future device conversion.  Some
AM_BASE macros are eliminated as well.
- taito_en has minor changes to eliminate an AM_BASE macro.
This commit is contained in:
Scott Stone 2011-04-09 18:38:50 +00:00
parent e488397757
commit 69c7fb048c
40 changed files with 1265 additions and 958 deletions
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266
src/mame/audio/cage.c
View File

@ -33,31 +33,35 @@
*
*************************************/
static cpu_device *cage_cpu;
static attotime cage_cpu_h1_clock_period;
static UINT8 cpu_to_cage_ready;
static UINT8 cage_to_cpu_ready;
typedef struct
{
cpu_device *cpu;
attotime cpu_h1_clock_period;
static void (*cage_irqhandler)(running_machine &, int);
UINT8 cpu_to_cage_ready;
UINT8 cage_to_cpu_ready;
static attotime serial_period_per_word;
void (*irqhandler)(running_machine &, int);
static UINT8 dma_enabled;
static UINT8 dma_timer_enabled;
static timer_device *dma_timer;
attotime serial_period_per_word;
static UINT8 cage_timer_enabled[2];
static timer_device *timer[2];
UINT8 dma_enabled;
UINT8 dma_timer_enabled;
timer_device *dma_timer;
static UINT32 *tms32031_io_regs;
UINT8 timer_enabled[2];
timer_device *timer[2];
UINT32 tms32031_io_regs[0x100];
UINT16 from_main;
UINT16 control;
static UINT16 cage_from_main;
static UINT16 cage_control;
UINT32 *speedup_ram;
dmadac_sound_device *dmadac[DAC_BUFFER_CHANNELS];
} cage_t;
static UINT32 *speedup_ram;
static dmadac_sound_device *dmadac[DAC_BUFFER_CHANNELS];
static cage_t cage;
@ -155,54 +159,57 @@ static WRITE32_HANDLER( speedup_w );
void cage_init(running_machine &machine, offs_t speedup)
{
cage_t *state = &cage;
attotime cage_cpu_clock_period;
int chan;
cage_irqhandler = NULL;
state->irqhandler = NULL;
memory_set_bankptr(machine, "bank10", machine.region("cageboot")->base());
memory_set_bankptr(machine, "bank11", machine.region("cage")->base());
cage_cpu = machine.device<cpu_device>("cage");
cage_cpu_clock_period = attotime::from_hz(cage_cpu->clock());
cage_cpu_h1_clock_period = cage_cpu_clock_period * 2;
state->cpu = machine.device<cpu_device>("cage");
cage_cpu_clock_period = attotime::from_hz(state->cpu->clock());
state->cpu_h1_clock_period = cage_cpu_clock_period * 2;
dma_timer = machine.device<timer_device>("cage_dma_timer");
timer[0] = machine.device<timer_device>("cage_timer0");
timer[1] = machine.device<timer_device>("cage_timer1");
state->dma_timer = machine.device<timer_device>("cage_dma_timer");
state->timer[0] = machine.device<timer_device>("cage_timer0");
state->timer[1] = machine.device<timer_device>("cage_timer1");
if (speedup)
speedup_ram = cage_cpu->memory().space(AS_PROGRAM)->install_legacy_write_handler(speedup, speedup, FUNC(speedup_w));
state->speedup_ram = state->cpu->memory().space(AS_PROGRAM)->install_legacy_write_handler(speedup, speedup, FUNC(speedup_w));
for (chan = 0; chan < DAC_BUFFER_CHANNELS; chan++)
{
char buffer[10];
sprintf(buffer, "dac%d", chan + 1);
dmadac[chan] = machine.device<dmadac_sound_device>(buffer);
state->dmadac[chan] = machine.device<dmadac_sound_device>(buffer);
}
state_save_register_global(machine, cpu_to_cage_ready);
state_save_register_global(machine, cage_to_cpu_ready);
state_save_register_global(machine, serial_period_per_word);
state_save_register_global(machine, dma_enabled);
state_save_register_global(machine, dma_timer_enabled);
state_save_register_global_array(machine, cage_timer_enabled);
state_save_register_global(machine, cage_from_main);
state_save_register_global(machine, cage_control);
state_save_register_global(machine, cage.cpu_to_cage_ready);
state_save_register_global(machine, cage.cage_to_cpu_ready);
state_save_register_global(machine, cage.serial_period_per_word);
state_save_register_global(machine, cage.dma_enabled);
state_save_register_global(machine, cage.dma_timer_enabled);
state_save_register_global_array(machine, cage.timer_enabled);
state_save_register_global(machine, cage.from_main);
state_save_register_global(machine, cage.control);
}
void cage_set_irq_handler(void (*irqhandler)(running_machine &, int))
{
cage_irqhandler = irqhandler;
cage_t *state = &cage;
state->irqhandler = irqhandler;
}
void cage_reset_w(int state)
void cage_reset_w(address_space *space, int state)
{
cage_t *sndstate = &cage;
if (state)
cage_control_w(cage_cpu->machine(), 0);
device_set_input_line(cage_cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cage_control_w(space->machine(), 0);
device_set_input_line(sndstate->cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -215,13 +222,16 @@ void cage_reset_w(int state)
static TIMER_DEVICE_CALLBACK( dma_timer_callback )
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
/* if we weren't enabled, don't do anything, just shut ourself off */
if (!dma_enabled)
if (!state->dma_enabled)
{
if (dma_timer_enabled)
if (state->dma_timer_enabled)
{
timer.adjust(attotime::never);
dma_timer_enabled = 0;
state->dma_timer_enabled = 0;
}
return;
}
@ -231,18 +241,21 @@ static TIMER_DEVICE_CALLBACK( dma_timer_callback )
tms32031_io_regs[DMA_SOURCE_ADDR] = param;
/* set the interrupt */
device_set_input_line(cage_cpu, TMS3203X_DINT, ASSERT_LINE);
dma_enabled = 0;
device_set_input_line(state->cpu, TMS3203X_DINT, ASSERT_LINE);
state->dma_enabled = 0;
}
static void update_dma_state(address_space *space)
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
/* determine the new enabled state */
int enabled = ((tms32031_io_regs[DMA_GLOBAL_CTL] & 3) == 3) && (tms32031_io_regs[DMA_TRANSFER_COUNT] != 0);
/* see if we turned on */
if (enabled && !dma_enabled)
if (enabled && !state->dma_enabled)
{
INT16 sound_data[STACK_SOUND_BUFSIZE];
UINT32 addr, inc;
@ -262,29 +275,29 @@ static void update_dma_state(address_space *space)
sound_data[i % STACK_SOUND_BUFSIZE] = space->read_dword(addr * 4);
addr += inc;
if (i % STACK_SOUND_BUFSIZE == STACK_SOUND_BUFSIZE - 1)
dmadac_transfer(&dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
}
if (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE != 0)
dmadac_transfer(&dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data);
dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data);
/* compute the time of the interrupt and set the timer */
if (!dma_timer_enabled)
if (!state->dma_timer_enabled)
{
attotime period = serial_period_per_word * tms32031_io_regs[DMA_TRANSFER_COUNT];
dma_timer->adjust(period, addr, period);
dma_timer_enabled = 1;
attotime period = state->serial_period_per_word * tms32031_io_regs[DMA_TRANSFER_COUNT];
state->dma_timer->adjust(period, addr, period);
state->dma_timer_enabled = 1;
}
}
/* see if we turned off */
else if (!enabled && dma_enabled)
else if (!enabled && state->dma_enabled)
{
dma_timer->reset();
dma_timer_enabled = 0;
state->dma_timer->reset();
state->dma_timer_enabled = 0;
}
/* set the new state */
dma_enabled = enabled;
state->dma_enabled = enabled;
}
@ -297,41 +310,45 @@ static void update_dma_state(address_space *space)
static TIMER_DEVICE_CALLBACK( cage_timer_callback )
{
cage_t *state = &cage;
int which = param;
/* set the interrupt */
device_set_input_line(cage_cpu, TMS3203X_TINT0 + which, ASSERT_LINE);
cage_timer_enabled[which] = 0;
device_set_input_line(state->cpu, TMS3203X_TINT0 + which, ASSERT_LINE);
state->timer_enabled[which] = 0;
update_timer(which);
}
static void update_timer(int which)
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
/* determine the new enabled state */
int base = 0x10 * which;
int enabled = ((tms32031_io_regs[base + TIMER0_GLOBAL_CTL] & 0xc0) == 0xc0);
/* see if we turned on */
if (enabled && !cage_timer_enabled[which])
if (enabled && !state->timer_enabled[which])
{
attotime period = cage_cpu_h1_clock_period * (2 * tms32031_io_regs[base + TIMER0_PERIOD]);
attotime period = state->cpu_h1_clock_period * (2 * tms32031_io_regs[base + TIMER0_PERIOD]);
/* make sure our assumptions are correct */
if (tms32031_io_regs[base + TIMER0_GLOBAL_CTL] != 0x2c1)
logerror("CAGE TIMER%d: unexpected timer config %08X!\n", which, tms32031_io_regs[base + TIMER0_GLOBAL_CTL]);
timer[which]->adjust(period, which);
state->timer[which]->adjust(period, which);
}
/* see if we turned off */
else if (!enabled && cage_timer_enabled[which])
else if (!enabled && state->timer_enabled[which])
{
timer[which]->adjust(attotime::never, which);
state->timer[which]->adjust(attotime::never, which);
}
/* set the new state */
cage_timer_enabled[which] = enabled;
state->timer_enabled[which] = enabled;
}
@ -344,11 +361,13 @@ static void update_timer(int which)
static void update_serial(running_machine &machine)
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
attotime serial_clock_period, bit_clock_period;
UINT32 freq;
/* we start out at half the H1 frequency (or 2x the H1 period) */
serial_clock_period = cage_cpu_h1_clock_period * 2;
serial_clock_period = state->cpu_h1_clock_period * 2;
/* if we're in clock mode, muliply by another factor of 2 */
if (tms32031_io_regs[SPORT_GLOBAL_CTL] & 4)
@ -358,14 +377,14 @@ static void update_serial(running_machine &machine)
bit_clock_period = serial_clock_period * (tms32031_io_regs[SPORT_TIMER_PERIOD] & 0xffff);
/* and times the number of bits per sample */
serial_period_per_word = bit_clock_period * (8 * (((tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1));
state->serial_period_per_word = bit_clock_period * (8 * (((tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1));
/* compute the step value to stretch this to the sample_rate */
freq = ATTOSECONDS_TO_HZ(serial_period_per_word.attoseconds) / DAC_BUFFER_CHANNELS;
freq = ATTOSECONDS_TO_HZ(state->serial_period_per_word.attoseconds) / DAC_BUFFER_CHANNELS;
if (freq > 0 && freq < 100000)
{
dmadac_set_frequency(&dmadac[0], DAC_BUFFER_CHANNELS, freq);
dmadac_enable(&dmadac[0], DAC_BUFFER_CHANNELS, 1);
dmadac_set_frequency(&state->dmadac[0], DAC_BUFFER_CHANNELS, freq);
dmadac_enable(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1);
}
}
@ -379,12 +398,14 @@ static void update_serial(running_machine &machine)
static READ32_HANDLER( tms32031_io_r )
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT16 result = tms32031_io_regs[offset];
switch (offset)
{
case DMA_GLOBAL_CTL:
result = (result & ~0xc) | (dma_enabled ? 0xc : 0x0);
result = (result & ~0xc) | (state->dma_enabled ? 0xc : 0x0);
break;
}
@ -396,6 +417,9 @@ static READ32_HANDLER( tms32031_io_r )
static WRITE32_HANDLER( tms32031_io_w )
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
COMBINE_DATA(&tms32031_io_regs[offset]);
if (LOG_32031_IOPORTS)
@ -430,7 +454,7 @@ static WRITE32_HANDLER( tms32031_io_w )
case SPORT_DATA_TX:
#if (DAC_BUFFER_CHANNELS == 4)
if ((int)ATTOSECONDS_TO_HZ(serial_period_per_word.attoseconds) == 22050*4 && (tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62)
if ((int)ATTOSECONDS_TO_HZ(state->serial_period_per_word.attoseconds) == 22050*4 && (tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62)
tms32031_io_regs[SPORT_RX_CTL] ^= 0x800;
#endif
break;
@ -453,104 +477,113 @@ static WRITE32_HANDLER( tms32031_io_w )
static void update_control_lines(running_machine &machine)
{
cage_t *state = &cage;
int val;
/* set the IRQ to the main CPU */
if (cage_irqhandler)
if (state->irqhandler)
{
int reason = 0;
if ((cage_control & 3) == 3 && !cpu_to_cage_ready)
if ((state->control & 3) == 3 && !state->cpu_to_cage_ready)
reason |= CAGE_IRQ_REASON_BUFFER_EMPTY;
if ((cage_control & 2) && cage_to_cpu_ready)
if ((state->control & 2) && state->cage_to_cpu_ready)
reason |= CAGE_IRQ_REASON_DATA_READY;
(*cage_irqhandler)(machine, reason);
(*state->irqhandler)(machine, reason);
}
/* set the IOF input lines */
val = cpu_get_reg(cage_cpu, TMS3203X_IOF);
val = cpu_get_reg(state->cpu, TMS3203X_IOF);
val &= ~0x88;
if (cpu_to_cage_ready) val |= 0x08;
if (cage_to_cpu_ready) val |= 0x80;
cage_cpu->set_state(TMS3203X_IOF, val);
if (state->cpu_to_cage_ready) val |= 0x08;
if (state->cage_to_cpu_ready) val |= 0x80;
state->cpu->set_state(TMS3203X_IOF, val);
}
static READ32_HANDLER( cage_from_main_r )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:CAGE read command = %04X\n", cpu_get_pc(&space->device()), cage_from_main);
cpu_to_cage_ready = 0;
logerror("%06X:CAGE read command = %04X\n", cpu_get_pc(&space->device()), state->from_main);
state->cpu_to_cage_ready = 0;
update_control_lines(space->machine());
device_set_input_line(cage_cpu, TMS3203X_IRQ0, CLEAR_LINE);
return cage_from_main;
device_set_input_line(state->cpu, TMS3203X_IRQ0, CLEAR_LINE);
return state->from_main;
}
static WRITE32_HANDLER( cage_from_main_ack_w )
{
if (LOG_COMM)
logerror("%06X:CAGE ack command = %04X\n", cpu_get_pc(&space->device()), cage_from_main);
{
cage_t *state = &cage;
logerror("%06X:CAGE ack command = %04X\n", cpu_get_pc(&space->device()), state->from_main);
}
}
static WRITE32_HANDLER( cage_to_main_w )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:Data from CAGE = %04X\n", cpu_get_pc(&space->device()), data);
soundlatch_word_w(space, 0, data, mem_mask);
cage_to_cpu_ready = 1;
state->cage_to_cpu_ready = 1;
update_control_lines(space->machine());
}
static READ32_HANDLER( cage_io_status_r )
{
cage_t *state = &cage;
int result = 0;
if (cpu_to_cage_ready)
if (state->cpu_to_cage_ready)
result |= 0x80;
if (!cage_to_cpu_ready)
if (!state->cage_to_cpu_ready)
result |= 0x40;
return result;
}
UINT16 main_from_cage_r(address_space *space)
UINT16 cage_main_r(address_space *space)
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%s:main read data = %04X\n", space->machine().describe_context(), soundlatch_word_r(space, 0, 0));
cage_to_cpu_ready = 0;
state->cage_to_cpu_ready = 0;
update_control_lines(space->machine());
return soundlatch_word_r(space, 0, 0xffff);
}
static TIMER_CALLBACK( deferred_cage_w )
static TIMER_CALLBACK( cage_deferred_w )
{
cage_from_main = param;
cpu_to_cage_ready = 1;
cage_t *state = &cage;
state->from_main = param;
state->cpu_to_cage_ready = 1;
update_control_lines(machine);
device_set_input_line(cage_cpu, TMS3203X_IRQ0, ASSERT_LINE);
device_set_input_line(state->cpu, TMS3203X_IRQ0, ASSERT_LINE);
}
void main_to_cage_w(UINT16 data)
void cage_main_w(address_space *space, UINT16 data)
{
running_machine &machine = cage_cpu->machine();
if (LOG_COMM)
logerror("%s:Command to CAGE = %04X\n", machine.describe_context(), data);
machine.scheduler().synchronize(FUNC(deferred_cage_w), data);
logerror("%s:Command to CAGE = %04X\n", space->machine().describe_context(), data);
space->machine().scheduler().synchronize(FUNC(cage_deferred_w), data);
}
UINT16 cage_control_r(void)
UINT16 cage_control_r(running_machine &machine)
{
cage_t *state = &cage;
UINT16 result = 0;
if (cpu_to_cage_ready)
if (state->cpu_to_cage_ready)
result |= 2;
if (cage_to_cpu_ready)
if (state->cage_to_cpu_ready)
result |= 1;
return result;
@ -559,29 +592,32 @@ UINT16 cage_control_r(void)
void cage_control_w(running_machine &machine, UINT16 data)
{
cage_control = data;
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
state->control = data;
/* CPU is reset if both control lines are 0 */
if (!(cage_control & 3))
if (!(state->control & 3))
{
device_set_input_line(cage_cpu, INPUT_LINE_RESET, ASSERT_LINE);
device_set_input_line(state->cpu, INPUT_LINE_RESET, ASSERT_LINE);
dma_enabled = 0;
dma_timer_enabled = 0;
dma_timer->reset();
state->dma_enabled = 0;
state->dma_timer_enabled = 0;
state->dma_timer->reset();
cage_timer_enabled[0] = 0;
cage_timer_enabled[1] = 0;
timer[0]->reset();
timer[1]->reset();
state->timer_enabled[0] = 0;
state->timer_enabled[1] = 0;
state->timer[0]->reset();
state->timer[1]->reset();
memset(tms32031_io_regs, 0, 0x60 * 4);
cpu_to_cage_ready = 0;
cage_to_cpu_ready = 0;
state->cpu_to_cage_ready = 0;
state->cage_to_cpu_ready = 0;
}
else
device_set_input_line(cage_cpu, INPUT_LINE_RESET, CLEAR_LINE);
device_set_input_line(state->cpu, INPUT_LINE_RESET, CLEAR_LINE);
/* update the control state */
update_control_lines(machine);
@ -597,8 +633,10 @@ void cage_control_w(running_machine &machine, UINT16 data)
static WRITE32_HANDLER( speedup_w )
{
cage_t *state = &cage;
device_eat_cycles(&space->device(), 100);
COMBINE_DATA(&speedup_ram[offset]);
COMBINE_DATA(&state->speedup_ram[offset]);
}
@ -619,7 +657,7 @@ static ADDRESS_MAP_START( cage_map, AS_PROGRAM, 32 )
AM_RANGE(0x000000, 0x00ffff) AM_RAM
AM_RANGE(0x200000, 0x200000) AM_WRITENOP
AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10")
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_BASE(&tms32031_io_regs)
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w)
AM_RANGE(0x809800, 0x809fff) AM_RAM
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_to_main_w)
AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank11")
@ -630,7 +668,7 @@ static ADDRESS_MAP_START( cage_map_seattle, AS_PROGRAM, 32 )
AM_RANGE(0x000000, 0x00ffff) AM_RAM
AM_RANGE(0x200000, 0x200000) AM_WRITENOP
AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10")
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_BASE(&tms32031_io_regs)
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w)
AM_RANGE(0x809800, 0x809fff) AM_RAM
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_from_main_ack_w)
AM_RANGE(0xa00001, 0xa00001) AM_WRITE(cage_to_main_w)

9
src/mame/audio/cage.h
View File

@ -12,9 +12,10 @@ MACHINE_CONFIG_EXTERN( cage_seattle );
void cage_init(running_machine &machine, offs_t speedup);
void cage_set_irq_handler(void (*irqhandler)(running_machine &, int));
void cage_reset_w(int state);
void cage_reset_w(address_space *space, int state);
UINT16 main_from_cage_r(address_space *space);
UINT16 cage_control_r(void);
void main_to_cage_w(UINT16 data);
UINT16 cage_main_r(address_space *space);
void cage_main_w(address_space *space, UINT16 data);
UINT16 cage_control_r(running_machine &machine);
void cage_control_w(running_machine &machine, UINT16 data);

308
src/mame/audio/dcs.c
View File

@ -216,45 +216,45 @@ enum
/* these macros are used to reference the SDRC ASIC */
#define SDRC_ROM_ST ((sdrc.reg[0] >> 0) & 3) /* 0=0000, 1=3000, 2=3400, 3=none */
#define SDRC_ROM_SZ ((sdrc.reg[0] >> 4) & 1) /* 0=4k, 1=1k */
#define SDRC_ROM_MS ((sdrc.reg[0] >> 5) & 1) /* 0=/BMS, 1=/DMS */
#define SDRC_ROM_PG ((sdrc.reg[0] >> 7) & 7)
#define SDRC_SM_EN ((sdrc.reg[0] >> 11) & 1)
#define SDRC_SM_BK ((sdrc.reg[0] >> 12) & 1)
#define SDRC_SMODE ((sdrc.reg[0] >> 13) & 7)
#define SDRC_ROM_ST ((dcs.sdrc.reg[0] >> 0) & 3) /* 0=0000, 1=3000, 2=3400, 3=none */
#define SDRC_ROM_SZ ((dcs.sdrc.reg[0] >> 4) & 1) /* 0=4k, 1=1k */
#define SDRC_ROM_MS ((dcs.sdrc.reg[0] >> 5) & 1) /* 0=/BMS, 1=/DMS */
#define SDRC_ROM_PG ((dcs.sdrc.reg[0] >> 7) & 7)
#define SDRC_SM_EN ((dcs.sdrc.reg[0] >> 11) & 1)
#define SDRC_SM_BK ((dcs.sdrc.reg[0] >> 12) & 1)
#define SDRC_SMODE ((dcs.sdrc.reg[0] >> 13) & 7)
#define SDRC_DM_ST ((sdrc.reg[1] >> 0) & 3) /* 0=none, 1=0000, 2=3000, 3=3400 */
#define SDRC_DM_REF ((sdrc.reg[1] >> 4) & 3)
#define SDRC_DM_3WS ((sdrc.reg[1] >> 7) & 1)
#define SDRC_TFS_INV ((sdrc.reg[1] >> 8) & 1)
#define SDRC_RES_TFS ((sdrc.reg[1] >> 10) & 3)
#define SDRC_LED ((sdrc.reg[1] >> 13) & 1)
#define SDRC_MUTE ((sdrc.reg[1] >> 14) & 1)
#define SDRC_AREF_ACT ((sdrc.reg[1] >> 15) & 1)
#define SDRC_DM_ST ((dcs.sdrc.reg[1] >> 0) & 3) /* 0=none, 1=0000, 2=3000, 3=3400 */
#define SDRC_DM_REF ((dcs.sdrc.reg[1] >> 4) & 3)
#define SDRC_DM_3WS ((dcs.sdrc.reg[1] >> 7) & 1)
#define SDRC_TFS_INV ((dcs.sdrc.reg[1] >> 8) & 1)
#define SDRC_RES_TFS ((dcs.sdrc.reg[1] >> 10) & 3)
#define SDRC_LED ((dcs.sdrc.reg[1] >> 13) & 1)
#define SDRC_MUTE ((dcs.sdrc.reg[1] >> 14) & 1)
#define SDRC_AREF_ACT ((dcs.sdrc.reg[1] >> 15) & 1)
#define SDRC_DM_PG ((sdrc.reg[2] >> 0) & 0x7ff)
#define SDRC_EPM_PG ((sdrc.reg[2] >> 0) & 0x1fff)
#define SDRC_DM_PG ((dcs.sdrc.reg[2] >> 0) & 0x7ff)
#define SDRC_EPM_PG ((dcs.sdrc.reg[2] >> 0) & 0x1fff)
/* these macros are used to reference the DSIO ASIC */
#define DSIO_EMPTY_FIFO ((dsio.reg[1] >> 0) & 1)
#define DSIO_CUR_OUTPUT ((dsio.reg[1] >> 4) & 1)
#define DSIO_RES_TFS ((dsio.reg[1] >> 10) & 1)
#define DSIO_LED ((dsio.reg[1] >> 13) & 1)
#define DSIO_MUTE ((dsio.reg[1] >> 14) & 1)
#define DSIO_EMPTY_FIFO ((dcs.dsio.reg[1] >> 0) & 1)
#define DSIO_CUR_OUTPUT ((dcs.dsio.reg[1] >> 4) & 1)
#define DSIO_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1)
#define DSIO_LED ((dcs.dsio.reg[1] >> 13) & 1)
#define DSIO_MUTE ((dcs.dsio.reg[1] >> 14) & 1)
#define DSIO_DM_PG ((dsio.reg[2] >> 0) & 0x7ff)
#define DSIO_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff)
/* these macros are used to reference the DENVER ASIC */
#define DENV_DSP_SPEED ((dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
#define DENV_RES_TFS ((dsio.reg[1] >> 10) & 1)
#define DENV_CHANNELS ((dsio.reg[1] >> 11) & 3) /* 0=2ch, 1=4ch, 2=6ch */
#define DENV_LED ((dsio.reg[1] >> 13) & 1)
#define DENV_MUTE ((dsio.reg[1] >> 14) & 1)
#define DENV_DSP_SPEED ((dcs.dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
#define DENV_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1)
#define DENV_CHANNELS ((dcs.dsio.reg[1] >> 11) & 3) /* 0=2ch, 1=4ch, 2=6ch */
#define DENV_LED ((dcs.dsio.reg[1] >> 13) & 1)
#define DENV_MUTE ((dcs.dsio.reg[1] >> 14) & 1)
#define DENV_DM_PG ((dsio.reg[2] >> 0) & 0x7ff)
#define DENV_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff)
@ -281,6 +281,23 @@ struct _dsio_denver_state
};
typedef struct _hle_transfer_state hle_transfer_state;
struct _hle_transfer_state
{
UINT8 hle_enabled;
INT32 dcs_state;
INT32 state;
INT32 start;
INT32 stop;
INT32 type;
INT32 temp;
INT32 writes_left;
UINT16 sum;
INT32 fifo_entries;
timer_device *watchdog;
};
typedef struct _dcs_state dcs_state;
struct _dcs_state
{
@ -334,23 +351,15 @@ struct _dcs_state
UINT32 timer_scale;
UINT32 timer_period;
UINT32 timers_fired;
};
UINT16 *sram;
UINT16 *polling_base;
UINT32 *internal_program_ram;
UINT32 *external_program_ram;
typedef struct _hle_transfer_state hle_transfer_state;
struct _hle_transfer_state
{
UINT8 hle_enabled;
INT32 dcs_state;
INT32 state;
INT32 start;
INT32 stop;
INT32 type;
INT32 temp;
INT32 writes_left;
UINT16 sum;
INT32 fifo_entries;
timer_device *watchdog;
sdrc_state sdrc;
dsio_state dsio;
hle_transfer_state transfer;
};
@ -362,16 +371,6 @@ struct _hle_transfer_state
*************************************/
static dcs_state dcs;
static sdrc_state sdrc;
static dsio_state dsio;
static hle_transfer_state transfer;
static UINT16 *dcs_sram;
static UINT16 *dcs_polling_base;
static UINT32 *dcs_internal_program_ram;
static UINT32 *dcs_external_program_ram;
@ -390,11 +389,11 @@ static READ16_HANDLER( sdrc_r );
static WRITE16_HANDLER( sdrc_w );
static STATE_POSTLOAD( sdrc_postload );
static void dsio_reset(void);
static void dsio_reset(running_machine &machine);
static READ16_HANDLER( dsio_r );
static WRITE16_HANDLER( dsio_w );
static void denver_reset(void);
static void denver_reset(running_machine &machine);
static READ16_HANDLER( denver_r );
static WRITE16_HANDLER( denver_w );
@ -432,10 +431,10 @@ static int preprocess_write(running_machine &machine, UINT16 data);
/* DCS 2k memory map */
static ADDRESS_MAP_START( dcs_2k_program_map, AS_PROGRAM, 32 )
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_BASE(&dcs_internal_program_ram)
AM_RANGE(0x0800, 0x0fff) AM_RAM AM_SHARE("share1") AM_BASE(&dcs_external_program_ram)
AM_RANGE(0x1000, 0x17ff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x1800, 0x1fff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint")
AM_RANGE(0x0800, 0x0fff) AM_RAM AM_SHARE("dcsext")
AM_RANGE(0x1000, 0x17ff) AM_RAM AM_SHARE("dcsext")
AM_RANGE(0x1800, 0x1fff) AM_RAM AM_SHARE("dcsext")
ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs_2k_data_map, AS_DATA, 16 )
@ -463,8 +462,8 @@ ADDRESS_MAP_END
/* DCS 8k memory map */
static ADDRESS_MAP_START( dcs_8k_program_map, AS_PROGRAM, 32 )
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_BASE(&dcs_internal_program_ram)
AM_RANGE(0x0800, 0x1fff) AM_RAM AM_BASE(&dcs_external_program_ram)
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint")
AM_RANGE(0x0800, 0x1fff) AM_RAM AM_SHARE("dcsext")
ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs_8k_data_map, AS_DATA, 16 )
@ -487,12 +486,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs2_2115_program_map, AS_PROGRAM, 32 )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_BASE(&dcs_internal_program_ram)
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs2_2104_program_map, AS_PROGRAM, 32 )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x01ff) AM_RAM AM_BASE(&dcs_internal_program_ram)
AM_RANGE(0x0000, 0x01ff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
@ -530,7 +529,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dsio_program_map, AS_PROGRAM, 32 )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_BASE(&dcs_internal_program_ram)
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
@ -562,7 +561,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( denver_program_map, AS_PROGRAM, 32 )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_BASE(&dcs_internal_program_ram)
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
@ -750,7 +749,7 @@ MACHINE_CONFIG_END
*
*************************************/
static void dcs_boot(void)
static void dcs_boot(running_machine &machine)
{
UINT8 buffer[0x1000];
UINT32 max_banks;
@ -769,7 +768,7 @@ static void dcs_boot(void)
/* convert from 16-bit data to 8-bit data and boot */
for (i = 0; i < 0x1000; i++)
buffer[i] = base[i];
dcs.cpu->load_boot_data(buffer, dcs_internal_program_ram);
dcs.cpu->load_boot_data(buffer, dcs.internal_program_ram);
break;
/* rev 2: use the ROM page in the SDRC to boot from */
@ -790,14 +789,14 @@ static void dcs_boot(void)
/* convert from 16-bit data to 8-bit data and boot */
for (i = 0; i < 0x1000; i++)
buffer[i] = base[i];
dcs.cpu->load_boot_data(buffer, dcs_internal_program_ram);
dcs.cpu->load_boot_data(buffer, dcs.internal_program_ram);
break;
/* rev 3/4: HALT the ADSP-2181 until program is downloaded via IDMA */
case 3:
case 4:
device_set_input_line(dcs.cpu, INPUT_LINE_HALT, ASSERT_LINE);
dsio.start_on_next_write = 0;
dcs.dsio.start_on_next_write = 0;
break;
}
}
@ -831,12 +830,12 @@ static TIMER_CALLBACK( dcs_reset )
/* rev 3: reset the DSIO ASIC */
case 3:
dsio_reset();
dsio_reset(machine);
break;
/* rev 4: reset the Denver ASIC */
case 4:
denver_reset();
denver_reset(machine);
break;
}
@ -862,7 +861,7 @@ static TIMER_CALLBACK( dcs_reset )
(*dcs.output_full_cb)(machine, dcs.last_output_full = 0);
/* boot */
dcs_boot();
dcs_boot(machine);
/* reset timers */
dcs.timer_enable = 0;
@ -874,7 +873,7 @@ static TIMER_CALLBACK( dcs_reset )
dcs.sport_timer->adjust(attotime::from_hz(1000), 0, attotime::from_hz(1000));
/* reset the HLE transfer states */
transfer.dcs_state = transfer.state = 0;
dcs.transfer.dcs_state = dcs.transfer.state = 0;
}
@ -887,12 +886,12 @@ static TIMER_CALLBACK( dcs_reset )
static void dcs_register_state(running_machine &machine)
{
state_save_register_global_array(machine, sdrc.reg);
state_save_register_global(machine, sdrc.seed);
state_save_register_global_array(machine, dcs.sdrc.reg);
state_save_register_global(machine, dcs.sdrc.seed);
state_save_register_global_array(machine, dsio.reg);
state_save_register_global(machine, dsio.start_on_next_write);
state_save_register_global(machine, dsio.channelbits);
state_save_register_global_array(machine, dcs.dsio.reg);
state_save_register_global(machine, dcs.dsio.start_on_next_write);
state_save_register_global(machine, dcs.dsio.channelbits);
state_save_register_global(machine, dcs.channels);
state_save_register_global(machine, dcs.size);
@ -921,18 +920,18 @@ static void dcs_register_state(running_machine &machine)
state_save_register_global(machine, dcs.timer_period);
state_save_register_global(machine, dcs.timers_fired);
state_save_register_global(machine, transfer.dcs_state);
state_save_register_global(machine, transfer.state);
state_save_register_global(machine, transfer.start);
state_save_register_global(machine, transfer.stop);
state_save_register_global(machine, transfer.type);
state_save_register_global(machine, transfer.temp);
state_save_register_global(machine, transfer.writes_left);
state_save_register_global(machine, transfer.sum);
state_save_register_global(machine, transfer.fifo_entries);
state_save_register_global(machine, dcs.transfer.dcs_state);
state_save_register_global(machine, dcs.transfer.state);
state_save_register_global(machine, dcs.transfer.start);
state_save_register_global(machine, dcs.transfer.stop);
state_save_register_global(machine, dcs.transfer.type);
state_save_register_global(machine, dcs.transfer.temp);
state_save_register_global(machine, dcs.transfer.writes_left);
state_save_register_global(machine, dcs.transfer.sum);
state_save_register_global(machine, dcs.transfer.fifo_entries);
if (dcs_sram != NULL)
state_save_register_global_pointer(machine, dcs_sram, 0x8000*4 / sizeof(dcs_sram[0]));
if (dcs.sram != NULL)
state_save_register_global_pointer(machine, dcs.sram, 0x8000*4 / sizeof(dcs.sram[0]));
if (dcs.rev == 2)
machine.state().register_postload(sdrc_postload, NULL);
@ -941,7 +940,10 @@ static void dcs_register_state(running_machine &machine)
void dcs_init(running_machine &machine)
{
memset(&dcs, 0, sizeof(dcs));
dcs_sram = NULL;
dcs.sram = NULL;
dcs.internal_program_ram = (UINT32 *)memory_get_shared(machine, "dcsint");
dcs.external_program_ram = (UINT32 *)memory_get_shared(machine, "dcsext");
/* find the DCS CPU and the sound ROMs */
dcs.cpu = machine.device<adsp21xx_device>("dcs");
@ -979,6 +981,8 @@ void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset)
int soundbank_words;
memset(&dcs, 0, sizeof(dcs));
dcs.internal_program_ram = (UINT32 *)memory_get_shared(machine, "dcsint");
dcs.external_program_ram = (UINT32 *)memory_get_shared(machine, "dcsext");
/* find the DCS CPU and the sound ROMs */
dcs.cpu = machine.device<adsp21xx_device>("dcs2");
@ -1022,7 +1026,7 @@ void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset)
memory_configure_bank(machine, "databank", 0, dcs.sounddata_banks, dcs.sounddata, soundbank_words*2);
/* allocate memory for the SRAM */
dcs_sram = auto_alloc_array(machine, UINT16, 0x8000*4/2);
dcs.sram = auto_alloc_array(machine, UINT16, 0x8000*4/2);
/* create the timers */
dcs.internal_timer = machine.device<timer_device>("dcs_int_timer");
@ -1035,12 +1039,12 @@ void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset)
/* install the speedup handler */
dcs.polling_offset = polling_offset;
if (polling_offset)
dcs_polling_base = dcs.cpu->space(AS_DATA)->install_legacy_readwrite_handler(polling_offset, polling_offset, FUNC(dcs_polling_r), FUNC(dcs_polling_w));
dcs.polling_base = dcs.cpu->space(AS_DATA)->install_legacy_readwrite_handler(dcs.polling_offset, dcs.polling_offset, FUNC(dcs_polling_r), FUNC(dcs_polling_w));
/* allocate a watchdog timer for HLE transfers */
transfer.hle_enabled = (ENABLE_HLE_TRANSFERS && dram_in_mb != 0);
if (transfer.hle_enabled)
transfer.watchdog = machine.device<timer_device>("dcs_hle_timer");
dcs.transfer.hle_enabled = (ENABLE_HLE_TRANSFERS && dram_in_mb != 0);
if (dcs.transfer.hle_enabled)
dcs.transfer.watchdog = machine.device<timer_device>("dcs_hle_timer");
/* register for save states */
dcs_register_state(machine);
@ -1050,7 +1054,7 @@ void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset)
}
void dcs_set_auto_ack(int state)
void dcs_set_auto_ack(running_machine &machine, int state)
{
dcs.auto_ack = state;
}
@ -1065,15 +1069,15 @@ void dcs_set_auto_ack(int state)
static READ16_HANDLER( dcs_dataram_r )
{
return dcs_external_program_ram[offset] >> 8;
return dcs.external_program_ram[offset] >> 8;
}
static WRITE16_HANDLER( dcs_dataram_w )
{
UINT16 newdata = dcs_external_program_ram[offset] >> 8;
UINT16 newdata = dcs.external_program_ram[offset] >> 8;
COMBINE_DATA(&newdata);
dcs_external_program_ram[offset] = (newdata << 8) | (dcs_external_program_ram[offset] & 0xff);
dcs.external_program_ram[offset] = (newdata << 8) | (dcs.external_program_ram[offset] & 0xff);
}
@ -1134,23 +1138,23 @@ static void sdrc_remap_memory(running_machine &machine)
else
{
/* first start with a clean program map */
dcs.program->install_ram(0x0800, 0x3fff, dcs_sram + 0x4800);
dcs.program->install_ram(0x0800, 0x3fff, dcs.sram + 0x4800);
/* set up the data map based on the SRAM banking */
/* map 0: ram from 0800-37ff */
if (SDRC_SM_BK == 0)
{
dcs.data->install_ram(0x0800, 0x17ff, dcs_sram + 0x0000);
dcs.data->install_ram(0x1800, 0x27ff, dcs_sram + 0x1000);
dcs.data->install_ram(0x2800, 0x37ff, dcs_sram + 0x2000);
dcs.data->install_ram(0x0800, 0x17ff, dcs.sram + 0x0000);
dcs.data->install_ram(0x1800, 0x27ff, dcs.sram + 0x1000);
dcs.data->install_ram(0x2800, 0x37ff, dcs.sram + 0x2000);
}
/* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */
else
{
dcs.data->unmap_readwrite(0x0800, 0x17ff);
dcs.data->install_ram(0x1800, 0x27ff, dcs_sram + 0x3000);
dcs.data->install_ram(0x2800, 0x37ff, dcs_sram + 0x2000);
dcs.data->install_ram(0x1800, 0x27ff, dcs.sram + 0x3000);
dcs.data->install_ram(0x2800, 0x37ff, dcs.sram + 0x2000);
}
}
@ -1174,7 +1178,7 @@ static void sdrc_remap_memory(running_machine &machine)
/* reinstall the polling hotspot */
if (dcs.polling_offset)
dcs_polling_base = dcs.cpu->space(AS_DATA)->install_legacy_readwrite_handler(dcs.polling_offset, dcs.polling_offset, FUNC(dcs_polling_r), FUNC(dcs_polling_w));
dcs.polling_base = dcs.cpu->space(AS_DATA)->install_legacy_readwrite_handler(dcs.polling_offset, dcs.polling_offset, FUNC(dcs_polling_r), FUNC(dcs_polling_w));
}
@ -1186,7 +1190,7 @@ static STATE_POSTLOAD( sdrc_postload )
static void sdrc_reset(running_machine &machine)
{
memset(sdrc.reg, 0, sizeof(sdrc.reg));
memset(dcs.sdrc.reg, 0, sizeof(dcs.sdrc.reg));
sdrc_remap_memory(machine);
}
@ -1200,6 +1204,7 @@ static void sdrc_reset(running_machine &machine)
static READ16_HANDLER( sdrc_r )
{
sdrc_state &sdrc = dcs.sdrc;
UINT16 result = sdrc.reg[offset];
/* offset 3 is for security */
@ -1248,6 +1253,7 @@ static READ16_HANDLER( sdrc_r )
static WRITE16_HANDLER( sdrc_w )
{
sdrc_state &sdrc = dcs.sdrc;
UINT16 diff = sdrc.reg[offset] ^ data;
switch (offset)
@ -1264,7 +1270,7 @@ static WRITE16_HANDLER( sdrc_w )
/* offset 1 controls RAM mapping */
case 1:
sdrc.reg[1] = data;
// dmadac_enable(&dcs.dmadac[0], dcs.channels, SDRC_MUTE);
//dmadac_enable(&dcs.dmadac[0], dcs.channels, SDRC_MUTE);
if (diff & 0x0003)
sdrc_remap_memory(space->machine());
break;
@ -1320,14 +1326,15 @@ static WRITE16_HANDLER( sdrc_w )
*
*************************************/
static void dsio_reset(void)
static void dsio_reset(running_machine &machine)
{
memset(&dsio, 0, sizeof(dsio));
memset(&dcs.dsio, 0, sizeof(dcs.dsio));
}
static READ16_HANDLER( dsio_r )
{
dsio_state &dsio = dcs.dsio;
UINT16 result = dsio.reg[offset];
if (offset == 1)
@ -1342,6 +1349,8 @@ static READ16_HANDLER( dsio_r )
static WRITE16_HANDLER( dsio_w )
{
dsio_state &dsio = dcs.dsio;
switch (offset)
{
/* offset 1 controls I/O */
@ -1371,15 +1380,15 @@ static WRITE16_HANDLER( dsio_w )
*
*************************************/
static void denver_reset(void)
static void denver_reset(running_machine &machine)
{
memset(&dsio, 0, sizeof(dsio));
memset(&dcs.dsio, 0, sizeof(dcs.dsio));
}
static READ16_HANDLER( denver_r )
{
UINT16 result = dsio.reg[offset];
UINT16 result = dcs.dsio.reg[offset];
if (offset == 3)
{
@ -1392,6 +1401,7 @@ static READ16_HANDLER( denver_r )
static WRITE16_HANDLER( denver_w )
{
dsio_state &dsio = dcs.dsio;
int enable, channels, chan;
switch (offset)
@ -1444,6 +1454,7 @@ static WRITE16_HANDLER( denver_w )
WRITE32_HANDLER( dsio_idma_addr_w )
{
dsio_state &dsio = dcs.dsio;
if (LOG_DCS_TRANSFERS)
logerror("%08X:IDMA_addr = %04X\n", cpu_get_pc(&space->device()), data);
downcast<adsp2181_device *>(dcs.cpu)->idma_addr_w(data);
@ -1454,6 +1465,7 @@ WRITE32_HANDLER( dsio_idma_addr_w )
WRITE32_HANDLER( dsio_idma_data_w )
{
dsio_state &dsio = dcs.dsio;
UINT32 pc = cpu_get_pc(&space->device());
if (ACCESSING_BITS_0_15)
{
@ -1504,24 +1516,24 @@ void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(device_t *device), UINT16 (*fi
}
int dcs_control_r(void)
int dcs_control_r(running_machine &machine)
{
/* only boost for DCS2 boards */
if (!dcs.auto_ack && !transfer.hle_enabled)
dcs.cpu->machine().scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5));
if (!dcs.auto_ack && !dcs.transfer.hle_enabled)
machine.scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5));
return dcs.latch_control;
}
void dcs_reset_w(int state)
void dcs_reset_w(running_machine &machine, int state)
{
/* going high halts the CPU */
if (state)
{
logerror("%s: DCS reset = %d\n", dcs.cpu->machine().describe_context(), state);
logerror("%s: DCS reset = %d\n", machine.describe_context(), state);
/* just run through the init code again */
dcs.cpu->machine().scheduler().synchronize(FUNC(dcs_reset));
machine.scheduler().synchronize(FUNC(dcs_reset));
device_set_input_line(dcs.cpu, INPUT_LINE_RESET, ASSERT_LINE);
}
@ -1538,9 +1550,9 @@ static READ16_HANDLER( latch_status_r )
result |= 0x80;
if (IS_OUTPUT_EMPTY())
result |= 0x40;
if (dcs.fifo_status_r != NULL && (!transfer.hle_enabled || transfer.state == 0))
if (dcs.fifo_status_r != NULL && (!dcs.transfer.hle_enabled || dcs.transfer.state == 0))
result |= (*dcs.fifo_status_r)(dcs.cpu) & 0x38;
if (transfer.hle_enabled && transfer.state != 0)
if (dcs.transfer.hle_enabled && dcs.transfer.state != 0)
result |= 0x08;
return result;
}
@ -1587,17 +1599,17 @@ static TIMER_CALLBACK( dcs_delayed_data_w_callback )
}
void dcs_data_w(int data)
void dcs_data_w(running_machine &machine, int data)
{
/* preprocess the write */
if (preprocess_write(dcs.cpu->machine(), data))
if (preprocess_write(machine, data))
return;
/* if we are DCS1, set a timer to latch the data */
if (dcs.sport_timer == NULL)
dcs.cpu->machine().scheduler().synchronize(FUNC(dcs_delayed_data_w_callback), data);
machine.scheduler().synchronize(FUNC(dcs_delayed_data_w_callback), data);
else
dcs_delayed_data_w(dcs.cpu->machine(), data);
dcs_delayed_data_w(machine, data);
}
@ -1642,7 +1654,7 @@ static WRITE16_HANDLER( output_latch_w )
}
static void delayed_ack_w(void)
static void delayed_ack_w(running_machine &machine)
{
SET_OUTPUT_EMPTY();
}
@ -1650,26 +1662,26 @@ static void delayed_ack_w(void)
static TIMER_CALLBACK( delayed_ack_w_callback )
{
delayed_ack_w();
delayed_ack_w(machine);
}
void dcs_ack_w(void)
void dcs_ack_w(running_machine &machine)
{
dcs.cpu->machine().scheduler().synchronize(FUNC(delayed_ack_w_callback));
machine.scheduler().synchronize(FUNC(delayed_ack_w_callback));
}
int dcs_data_r(void)
int dcs_data_r(running_machine &machine)
{
/* data is actually only 8 bit (read from d8-d15) */
if (dcs.last_output_full && dcs.output_full_cb)
(*dcs.output_full_cb)(dcs.cpu->machine(), dcs.last_output_full = 0);
(*dcs.output_full_cb)(machine, dcs.last_output_full = 0);
if (dcs.auto_ack)
delayed_ack_w();
delayed_ack_w(machine);
if (LOG_DCS_IO)
logerror("%s:dcs_data_r(%04X)\n", dcs.cpu->machine().describe_context(), dcs.output_data);
logerror("%s:dcs_data_r(%04X)\n", machine.describe_context(), dcs.output_data);
return dcs.output_data;
}
@ -1703,7 +1715,7 @@ static READ16_HANDLER( output_control_r )
}
int dcs_data2_r(void)
int dcs_data2_r(running_machine &machine)
{
return dcs.output_control;
}
@ -1803,12 +1815,12 @@ static void timer_enable_callback(adsp21xx_device &device, int enable)
dcs.timer_ignore = 0;
if (enable)
{
// mame_printf_debug("Timer enabled @ %d cycles/int, or %f Hz\n", dcs.timer_scale * (dcs.timer_period + 1), 1.0 / dcs.cpu->cycles_to_attotime(dcs.timer_scale * (dcs.timer_period + 1)));
//mame_printf_debug("Timer enabled @ %d cycles/int, or %f Hz\n", dcs.timer_scale * (dcs.timer_period + 1), 1.0 / dcs.cpu->cycles_to_attotime(dcs.timer_scale * (dcs.timer_period + 1)));
reset_timer(device.machine());
}
else
{
// mame_printf_debug("Timer disabled\n");
//mame_printf_debug("Timer disabled\n");
dcs.internal_timer->reset();
}
}
@ -1879,7 +1891,7 @@ static WRITE16_HANDLER( adsp_control_w )
{
logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", cpu_get_pc(&space->device()));
device_set_input_line(dcs.cpu, INPUT_LINE_RESET, PULSE_LINE);
dcs_boot();
dcs_boot(space->machine());
dcs.control_regs[SYSCONTROL_REG] = 0;
}
@ -2074,14 +2086,14 @@ static READ16_HANDLER( dcs_polling_r )
{
if (dcs.polling_count++ > 5)
device_eat_cycles(&space->device(), 10000);
return *dcs_polling_base;
return *dcs.polling_base;
}
static WRITE16_HANDLER( dcs_polling_w )
{
dcs.polling_count = 0;
COMBINE_DATA(dcs_polling_base);
COMBINE_DATA(dcs.polling_base);
}
@ -2090,8 +2102,10 @@ static WRITE16_HANDLER( dcs_polling_w )
DATA TRANSFER HLE MECHANISM
****************************************************************************/
void dcs_fifo_notify(int count, int max)
void dcs_fifo_notify(running_machine &machine, int count, int max)
{
hle_transfer_state &transfer = dcs.transfer;
/* skip if not in mid-transfer */
if (!transfer.hle_enabled || transfer.state == 0 || !dcs.fifo_data_r)
{
@ -2104,13 +2118,14 @@ void dcs_fifo_notify(int count, int max)
if (transfer.state != 5 || transfer.fifo_entries == transfer.writes_left || transfer.fifo_entries >= 256)
{
for ( ; transfer.fifo_entries; transfer.fifo_entries--)
preprocess_write(dcs.cpu->machine(), (*dcs.fifo_data_r)(dcs.cpu));
preprocess_write(machine, (*dcs.fifo_data_r)(dcs.cpu));
}
}
static TIMER_DEVICE_CALLBACK( transfer_watchdog_callback )
{
hle_transfer_state &transfer = dcs.transfer;
int starting_writes_left = param;
if (transfer.fifo_entries && starting_writes_left == transfer.writes_left)
@ -2152,6 +2167,8 @@ static TIMER_CALLBACK( s1_ack_callback1 )
static int preprocess_stage_1(running_machine &machine, UINT16 data)
{
hle_transfer_state &transfer = dcs.transfer;
switch (transfer.state)
{
case 0:
@ -2223,12 +2240,12 @@ static int preprocess_stage_1(running_machine &machine, UINT16 data)
{
if (transfer.type == 1 && SDRC_SM_BK == 1)
{
sdrc.reg[0] &= ~0x1000;
dcs.sdrc.reg[0] &= ~0x1000;
sdrc_remap_memory(machine);
}
if (transfer.type == 2 && SDRC_SM_BK == 0)
{
sdrc.reg[0] |= 0x1000;
dcs.sdrc.reg[0] |= 0x1000;
sdrc_remap_memory(machine);
}
return 1;
@ -2288,6 +2305,8 @@ static TIMER_CALLBACK( s2_ack_callback )
static int preprocess_stage_2(running_machine &machine, UINT16 data)
{
hle_transfer_state &transfer = dcs.transfer;
switch (transfer.state)
{
case 0:
@ -2388,6 +2407,7 @@ static int preprocess_stage_2(running_machine &machine, UINT16 data)
static int preprocess_write(running_machine &machine, UINT16 data)
{
hle_transfer_state &transfer = dcs.transfer;
int result;
/* if we're not DCS2, skip */

16
src/mame/audio/dcs.h
View File

@ -14,20 +14,20 @@ MACHINE_CONFIG_EXTERN( dcs2_audio_denver );
void dcs_init(running_machine &machine);
void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset);
void dcs_set_auto_ack(int state);
void dcs_set_auto_ack(running_machine &machine, int state);
void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(device_t *device), UINT16 (*fifo_status_r)(device_t *device));
void dcs_set_io_callbacks(void (*output_full_cb)(running_machine &, int), void (*input_empty_cb)(running_machine &, int));
int dcs_data_r(void);
void dcs_ack_w(void);
int dcs_data2_r(void);
int dcs_control_r(void);
int dcs_data_r(running_machine &machine);
void dcs_ack_w(running_machine &machine);
int dcs_data2_r(running_machine &machine);
int dcs_control_r(running_machine &machine);
void dcs_data_w(int data);
void dcs_reset_w(int state);
void dcs_data_w(running_machine &machine, int data);
void dcs_reset_w(running_machine &machine, int state);
void dcs_fifo_notify(int count, int max);
void dcs_fifo_notify(running_machine &machine, int count, int max);
WRITE32_HANDLER( dsio_idma_addr_w );
WRITE32_HANDLER( dsio_idma_data_w );

348
src/mame/audio/exidy440.c
View File

@ -71,33 +71,36 @@ typedef struct sound_cache_entry
/* local allocated storage */
static UINT8 sound_command;
static UINT8 sound_command_ack;
static UINT8 *sound_banks;
static UINT8 *m6844_data;
static UINT8 *sound_volume;
static INT32 *mixer_buffer_left;
static INT32 *mixer_buffer_right;
static sound_cache_entry *sound_cache;
static sound_cache_entry *sound_cache_end;
static sound_cache_entry *sound_cache_max;
typedef struct
{
UINT8 sound_command;
UINT8 sound_command_ack;
/* 6844 description */
static m6844_channel_data m6844_channel[4];
static UINT8 m6844_priority;
static UINT8 m6844_interrupt;
static UINT8 m6844_chain;
UINT8 sound_banks[4];
UINT8 m6844_data[0x20];
UINT8 sound_volume[0x10];
INT32 *mixer_buffer_left;
INT32 *mixer_buffer_right;
sound_cache_entry *sound_cache;
sound_cache_entry *sound_cache_end;
sound_cache_entry *sound_cache_max;
/* sound interface parameters */
static sound_stream *stream;
static sound_channel_data sound_channel[4];
/* 6844 description */
m6844_channel_data m6844_channel[4];
UINT8 m6844_priority;
UINT8 m6844_interrupt;
UINT8 m6844_chain;
/* debugging */
static FILE *debuglog;
/* sound interface parameters */
sound_stream *stream;
sound_channel_data sound_channel[4];
/* channel frequency is configurable */
static int channel_frequency[4];
/* debugging */
FILE *debuglog;
/* channel frequency is configurable */
int channel_frequency[4];
} exidy440_audio_state;
/* constant channel parameters */
static const int channel_bits[4] =
@ -109,18 +112,19 @@ static const int channel_bits[4] =
/* function prototypes */
static STREAM_UPDATE( channel_update );
static void m6844_finished(int ch);
static void play_cvsd(running_machine &machine, int ch);
static void stop_cvsd(int ch);
static void m6844_finished(m6844_channel_data *channel);
static void play_cvsd(device_t *device, int ch);
static void stop_cvsd(device_t *device, int ch);
static void reset_sound_cache(void);
static INT16 *add_to_sound_cache(UINT8 *input, int address, int length, int bits, int frequency);
static INT16 *find_or_add_to_sound_cache(running_machine &machine, int address, int length, int bits, int frequency);
static void reset_sound_cache(device_t *device);
static INT16 *add_to_sound_cache(device_t *device, UINT8 *input, int address, int length, int bits, int frequency);
static INT16 *find_or_add_to_sound_cache(device_t *device, int address, int length, int bits, int frequency);
static void decode_and_filter_cvsd(UINT8 *data, int bytes, int maskbits, int frequency, INT16 *dest);
static void fir_filter(INT32 *input, INT16 *output, int count);
static void decode_and_filter_cvsd(device_t *device, UINT8 *data, int bytes, int maskbits, int frequency, INT16 *dest);
static void fir_filter(device_t *device, INT32 *input, INT16 *output, int count);
DECLARE_LEGACY_SOUND_DEVICE(EXIDY440, exidy440_sound);
/*************************************
*
@ -128,53 +132,62 @@ static void fir_filter(INT32 *input, INT16 *output, int count);
*
*************************************/
INLINE exidy440_audio_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == EXIDY440);
return (exidy440_audio_state *)downcast<legacy_device_base *>(device)->token();
}
static DEVICE_START( exidy440_sound )
{
exidy440_audio_state *state = get_safe_token(device);
running_machine &machine = device->machine();
int i, length;
/* reset the system */
sound_command = 0;
sound_command_ack = 1;
state_save_register_global(machine, sound_command);
state_save_register_global(machine, sound_command_ack);
state->sound_command = 0;
state->sound_command_ack = 1;
state_save_register_global(machine, state->sound_command);
state_save_register_global(machine, state->sound_command_ack);
/* reset the 6844 */
for (i = 0; i < 4; i++)
{
m6844_channel[i].active = 0;
m6844_channel[i].control = 0x00;
state->m6844_channel[i].active = 0;
state->m6844_channel[i].control = 0x00;
}
m6844_priority = 0x00;
m6844_interrupt = 0x00;
m6844_chain = 0x00;
state->m6844_priority = 0x00;
state->m6844_interrupt = 0x00;
state->m6844_chain = 0x00;
state_save_register_global(machine, m6844_priority);
state_save_register_global(machine, m6844_interrupt);
state_save_register_global(machine, m6844_chain);
state_save_register_global(machine, state->m6844_priority);
state_save_register_global(machine, state->m6844_interrupt);
state_save_register_global(machine, state->m6844_chain);
channel_frequency[0] = device->clock(); /* channels 0 and 1 are run by FCLK */
channel_frequency[1] = device->clock();
channel_frequency[2] = device->clock()/2; /* channels 2 and 3 are run by SCLK */
channel_frequency[3] = device->clock()/2;
state->channel_frequency[0] = device->clock(); /* channels 0 and 1 are run by FCLK */
state->channel_frequency[1] = device->clock();
state->channel_frequency[2] = device->clock()/2; /* channels 2 and 3 are run by SCLK */
state->channel_frequency[3] = device->clock()/2;
/* get stream channels */
stream = device->machine().sound().stream_alloc(*device, 0, 2, device->clock(), NULL, channel_update);
state->stream = device->machine().sound().stream_alloc(*device, 0, 2, device->clock(), NULL, channel_update);
/* allocate the sample cache */
length = machine.region("cvsd")->bytes() * 16 + MAX_CACHE_ENTRIES * sizeof(sound_cache_entry);
sound_cache = (sound_cache_entry *)auto_alloc_array(machine, UINT8, length);
state->sound_cache = (sound_cache_entry *)auto_alloc_array(machine, UINT8, length);
/* determine the hard end of the cache and reset */
sound_cache_max = (sound_cache_entry *)((UINT8 *)sound_cache + length);
reset_sound_cache();
state->sound_cache_max = (sound_cache_entry *)((UINT8 *)state->sound_cache + length);
reset_sound_cache(device);
/* allocate the mixer buffer */
mixer_buffer_left = auto_alloc_array(machine, INT32, 2 * device->clock());
mixer_buffer_right = mixer_buffer_left + device->clock();
state->mixer_buffer_left = auto_alloc_array(machine, INT32, 2 * device->clock());
state->mixer_buffer_right = state->mixer_buffer_left + device->clock();
if (SOUND_LOG)
debuglog = fopen("sound.log", "w");
state->debuglog = fopen("sound.log", "w");
}
@ -187,8 +200,9 @@ static DEVICE_START( exidy440_sound )
static DEVICE_STOP( exidy440_sound )
{
if (SOUND_LOG && debuglog)
fclose(debuglog);
exidy440_audio_state *state = get_safe_token(device);
if (SOUND_LOG && state->debuglog)
fclose(state->debuglog);
}
@ -199,9 +213,10 @@ static DEVICE_STOP( exidy440_sound )
*
*************************************/
static void add_and_scale_samples(int ch, INT32 *dest, int samples, int volume)
static void add_and_scale_samples(device_t *device, int ch, INT32 *dest, int samples, int volume)
{
sound_channel_data *channel = &sound_channel[ch];
exidy440_audio_state *state = get_safe_token(device);
sound_channel_data *channel = &state->sound_channel[ch];
INT16 *srcdata;
int i;
@ -243,10 +258,11 @@ static void add_and_scale_samples(int ch, INT32 *dest, int samples, int volume)
*
*************************************/
static void mix_to_16(int length, stream_sample_t *dest_left, stream_sample_t *dest_right)
static void mix_to_16(device_t *device, int length, stream_sample_t *dest_left, stream_sample_t *dest_right)
{
INT32 *mixer_left = mixer_buffer_left;
INT32 *mixer_right = mixer_buffer_right;
exidy440_audio_state *state = get_safe_token(device);
INT32 *mixer_left = state->mixer_buffer_left;
INT32 *mixer_right = state->mixer_buffer_right;
int i, clippers = 0;
for (i = 0; i < length; i++)
@ -274,16 +290,17 @@ static void mix_to_16(int length, stream_sample_t *dest_left, stream_sample_t *d
static STREAM_UPDATE( channel_update )
{
exidy440_audio_state *state = get_safe_token(device);
int ch;
/* reset the mixer buffers */
memset(mixer_buffer_left, 0, samples * sizeof(INT32));
memset(mixer_buffer_right, 0, samples * sizeof(INT32));
memset(state->mixer_buffer_left, 0, samples * sizeof(INT32));
memset(state->mixer_buffer_right, 0, samples * sizeof(INT32));
/* loop over channels */
for (ch = 0; ch < 4; ch++)
{
sound_channel_data *channel = &sound_channel[ch];
sound_channel_data *channel = &state->sound_channel[ch];
int length, volume, left = samples;
int effective_offset;
@ -295,14 +312,14 @@ static STREAM_UPDATE( channel_update )
length = (left > channel->remaining) ? channel->remaining : left;
/* get a pointer to the sample data and copy to the left */
volume = sound_volume[2 * ch + 0];
volume = state->sound_volume[2 * ch + 0];
if (volume)
add_and_scale_samples(ch, mixer_buffer_left, length, volume);
add_and_scale_samples(device, ch, state->mixer_buffer_left, length, volume);
/* get a pointer to the sample data and copy to the left */
volume = sound_volume[2 * ch + 1];
volume = state->sound_volume[2 * ch + 1];
if (volume)
add_and_scale_samples(ch, mixer_buffer_right, length, volume);
add_and_scale_samples(device, ch, state->mixer_buffer_right, length, volume);
/* update our counters */
channel->offset += length;
@ -311,18 +328,18 @@ static STREAM_UPDATE( channel_update )
/* update the MC6844 */
effective_offset = (ch & 2) ? channel->offset / 2 : channel->offset;
m6844_channel[ch].address = m6844_channel[ch].start_address + effective_offset / 8;
m6844_channel[ch].counter = m6844_channel[ch].start_counter - effective_offset / 8;
if (m6844_channel[ch].counter <= 0)
state->m6844_channel[ch].address = state->m6844_channel[ch].start_address + effective_offset / 8;
state->m6844_channel[ch].counter = state->m6844_channel[ch].start_counter - effective_offset / 8;
if (state->m6844_channel[ch].counter <= 0)
{
if (SOUND_LOG && debuglog)
fprintf(debuglog, "Channel %d finished\n", ch);
m6844_finished(ch);
if (SOUND_LOG && state->debuglog)
fprintf(state->debuglog, "Channel %d finished\n", ch);
m6844_finished(&state->m6844_channel[ch]);
}
}
/* all done, time to mix it */
mix_to_16(samples, outputs[0], outputs[1]);
mix_to_16(device, samples, outputs[0], outputs[1]);
}
@ -333,27 +350,30 @@ static STREAM_UPDATE( channel_update )
*
*************************************/
static READ8_HANDLER( sound_command_r )
static READ8_DEVICE_HANDLER( sound_command_r )
{
exidy440_audio_state *state = get_safe_token(device);
/* clear the FIRQ that got us here and acknowledge the read to the main CPU */
cputag_set_input_line(space->machine(), "audiocpu", 1, CLEAR_LINE);
sound_command_ack = 1;
cputag_set_input_line(device->machine(), "audiocpu", 1, CLEAR_LINE);
state->sound_command_ack = 1;
return sound_command;
return state->sound_command;
}
void exidy440_sound_command(running_machine &machine, UINT8 param)
void exidy440_sound_command(device_t *device, UINT8 param)
{
sound_command = param;
sound_command_ack = 0;
cputag_set_input_line(machine, "audiocpu", INPUT_LINE_IRQ1, ASSERT_LINE);
exidy440_audio_state *state = get_safe_token(device);
state->sound_command = param;
state->sound_command_ack = 0;
cputag_set_input_line(device->machine(), "audiocpu", INPUT_LINE_IRQ1, ASSERT_LINE);
}
UINT8 exidy440_sound_command_ack(void)
UINT8 exidy440_sound_command_ack(device_t *device)
{
return sound_command_ack;
exidy440_audio_state *state = get_safe_token(device);
return state->sound_command_ack;
}
@ -364,16 +384,23 @@ UINT8 exidy440_sound_command_ack(void)
*
*************************************/
static WRITE8_HANDLER( sound_volume_w )
static READ8_DEVICE_HANDLER( sound_volume_r )
{
if (SOUND_LOG && debuglog)
fprintf(debuglog, "Volume %02X=%02X\n", offset, data);
exidy440_audio_state *state = get_safe_token(device);
return state->sound_volume[offset];
}
static WRITE8_DEVICE_HANDLER( sound_volume_w )
{
exidy440_audio_state *state = get_safe_token(device);
if (SOUND_LOG && state->debuglog)
fprintf(state->debuglog, "Volume %02X=%02X\n", offset, data);
/* update the stream */
stream->update();
state->stream->update();
/* set the new volume */
sound_volume[offset] = ~data;
state->sound_volume[offset] = ~data;
}
@ -384,9 +411,9 @@ static WRITE8_HANDLER( sound_volume_w )
*
*************************************/
static WRITE8_HANDLER( sound_interrupt_clear_w )
static WRITE8_DEVICE_HANDLER( sound_interrupt_clear_w )
{
cputag_set_input_line(space->machine(), "audiocpu", 0, CLEAR_LINE);
cputag_set_input_line(device->machine(), "audiocpu", 0, CLEAR_LINE);
}
@ -397,17 +424,16 @@ static WRITE8_HANDLER( sound_interrupt_clear_w )
*
*************************************/
static void m6844_update(void)
static void m6844_update(device_t *device)
{
exidy440_audio_state *state = get_safe_token(device);
/* update the stream */
stream->update();
state->stream->update();
}
static void m6844_finished(int ch)
static void m6844_finished(m6844_channel_data *channel)
{
m6844_channel_data *channel = &m6844_channel[ch];
/* mark us inactive */
channel->active = 0;
@ -428,12 +454,14 @@ static void m6844_finished(int ch)
*
*************************************/
static READ8_HANDLER( m6844_r )
static READ8_DEVICE_HANDLER( m6844_r )
{
exidy440_audio_state *state = get_safe_token(device);
m6844_channel_data *m6844_channel = state->m6844_channel;
int result = 0;
/* first update the current state of the DMA transfers */
m6844_update();
m6844_update(device);
/* switch off the offset we were given */
switch (offset)
@ -483,25 +511,25 @@ static READ8_HANDLER( m6844_r )
/* priority control */
case 0x14:
result = m6844_priority;
result = state->m6844_priority;
break;
/* interrupt control */
case 0x15:
/* update the global DMA end flag */
m6844_interrupt &= ~0x80;
m6844_interrupt |= (m6844_channel[0].control & 0x80) |
state->m6844_interrupt &= ~0x80;
state->m6844_interrupt |= (m6844_channel[0].control & 0x80) |
(m6844_channel[1].control & 0x80) |
(m6844_channel[2].control & 0x80) |
(m6844_channel[3].control & 0x80);
result = m6844_interrupt;
result = state->m6844_interrupt;
break;
/* chaining control */
case 0x16:
result = m6844_chain;
result = state->m6844_chain;
break;
/* 0x17-0x1f not used */
@ -512,12 +540,14 @@ static READ8_HANDLER( m6844_r )
}
static WRITE8_HANDLER( m6844_w )
static WRITE8_DEVICE_HANDLER( m6844_w )
{
exidy440_audio_state *state = get_safe_token(device);
m6844_channel_data *m6844_channel = state->m6844_channel;
int i;
/* first update the current state of the DMA transfers */
m6844_update();
m6844_update(device);
/* switch off the offset we were given */
switch (offset)
@ -564,7 +594,7 @@ static WRITE8_HANDLER( m6844_w )
/* priority control */
case 0x14:
m6844_priority = data;
state->m6844_priority = data;
/* update the sound playback on each channel */
for (i = 0; i < 4; i++)
@ -584,7 +614,7 @@ static WRITE8_HANDLER( m6844_w )
m6844_channel[i].start_counter = m6844_channel[i].counter;
/* generate and play the sample */
play_cvsd(space->machine(), i);
play_cvsd(device, i);
}
/* if we're going inactive... */
@ -594,19 +624,19 @@ static WRITE8_HANDLER( m6844_w )
m6844_channel[i].active = 0;
/* stop playing the sample */
stop_cvsd(i);
stop_cvsd(device, i);
}
}
break;
/* interrupt control */
case 0x15:
m6844_interrupt = (m6844_interrupt & 0x80) | (data & 0x7f);
state->m6844_interrupt = (state->m6844_interrupt & 0x80) | (data & 0x7f);
break;
/* chaining control */
case 0x16:
m6844_chain = data;
state->m6844_chain = data;
break;
/* 0x17-0x1f not used */
@ -622,48 +652,51 @@ static WRITE8_HANDLER( m6844_w )
*
*************************************/
static void reset_sound_cache(void)
static void reset_sound_cache(device_t *device)
{
sound_cache_end = sound_cache;
exidy440_audio_state *state = get_safe_token(device);
state->sound_cache_end = state->sound_cache;
}
static INT16 *add_to_sound_cache(UINT8 *input, int address, int length, int bits, int frequency)
static INT16 *add_to_sound_cache(device_t *device, UINT8 *input, int address, int length, int bits, int frequency)
{
sound_cache_entry *current = sound_cache_end;
exidy440_audio_state *state = get_safe_token(device);
sound_cache_entry *current = state->sound_cache_end;
/* compute where the end will be once we add this entry */
sound_cache_end = (sound_cache_entry *)((UINT8 *)current + sizeof(sound_cache_entry) + length * 16);
state->sound_cache_end = (sound_cache_entry *)((UINT8 *)current + sizeof(sound_cache_entry) + length * 16);
/* if this will overflow the cache, reset and re-add */
if (sound_cache_end > sound_cache_max)
if (state->sound_cache_end > state->sound_cache_max)
{
reset_sound_cache();
return add_to_sound_cache(input, address, length, bits, frequency);
reset_sound_cache(device);
return add_to_sound_cache(device, input, address, length, bits, frequency);
}
/* fill in this entry */
current->next = sound_cache_end;
current->next = state->sound_cache_end;
current->address = address;
current->length = length;
current->bits = bits;
current->frequency = frequency;
/* decode the data into the cache */
decode_and_filter_cvsd(input, length, bits, frequency, current->data);
decode_and_filter_cvsd(device, input, length, bits, frequency, current->data);
return current->data;
}
static INT16 *find_or_add_to_sound_cache(running_machine &machine, int address, int length, int bits, int frequency)
static INT16 *find_or_add_to_sound_cache(device_t *device, int address, int length, int bits, int frequency)
{
exidy440_audio_state *state = get_safe_token(device);
sound_cache_entry *current;
for (current = sound_cache; current < sound_cache_end; current = current->next)
for (current = state->sound_cache; current < state->sound_cache_end; current = current->next)
if (current->address == address && current->length == length && current->bits == bits && current->frequency == frequency)
return current->data;
return add_to_sound_cache(&machine.region("cvsd")->base()[address], address, length, bits, frequency);
return add_to_sound_cache(device, &device->machine().region("cvsd")->base()[address], address, length, bits, frequency);
}
@ -674,25 +707,26 @@ static INT16 *find_or_add_to_sound_cache(running_machine &machine, int address,
*
*************************************/
static void play_cvsd(running_machine &machine, int ch)
static void play_cvsd(device_t *device, int ch)
{
sound_channel_data *channel = &sound_channel[ch];
int address = m6844_channel[ch].address;
int length = m6844_channel[ch].counter;
exidy440_audio_state *state = get_safe_token(device);
sound_channel_data *channel = &state->sound_channel[ch];
int address = state->m6844_channel[ch].address;
int length = state->m6844_channel[ch].counter;
INT16 *base;
/* add the bank number to the address */
if (sound_banks[ch] & 1)
if (state->sound_banks[ch] & 1)
address += 0x00000;
else if (sound_banks[ch] & 2)
else if (state->sound_banks[ch] & 2)
address += 0x08000;
else if (sound_banks[ch] & 4)
else if (state->sound_banks[ch] & 4)
address += 0x10000;
else if (sound_banks[ch] & 8)
else if (state->sound_banks[ch] & 8)
address += 0x18000;
/* compute the base address in the converted samples array */
base = find_or_add_to_sound_cache(machine, address, length, channel_bits[ch], channel_frequency[ch]);
base = find_or_add_to_sound_cache(device, address, length, channel_bits[ch], state->channel_frequency[ch]);
if (!base)
return;
@ -702,14 +736,15 @@ static void play_cvsd(running_machine &machine, int ch)
channel->base = base;
channel->offset = length;
channel->remaining = 0;
m6844_finished(ch);
m6844_finished(&state->m6844_channel[ch]);
return;
}
if (SOUND_LOG && debuglog)
fprintf(debuglog, "Sound channel %d play at %02X,%04X, length = %04X, volume = %02X/%02X\n",
ch, sound_banks[ch], m6844_channel[ch].address,
m6844_channel[ch].counter, sound_volume[ch * 2], sound_volume[ch * 2 + 1]);
if (SOUND_LOG && state->debuglog)
fprintf(state->debuglog, "Sound channel %d play at %02X,%04X, length = %04X, volume = %02X/%02X\n",
ch, state->sound_banks[ch],
state->m6844_channel[ch].address, state->m6844_channel[ch].counter,
state->sound_volume[ch * 2], state->sound_volume[ch * 2 + 1]);
/* set the pointer and count */
channel->base = base;
@ -721,14 +756,15 @@ static void play_cvsd(running_machine &machine, int ch)
}
static void stop_cvsd(int ch)
static void stop_cvsd(device_t *device, int ch)
{
exidy440_audio_state *state = get_safe_token(device);
/* the DMA channel is marked inactive; that will kill the audio */
sound_channel[ch].remaining = 0;
stream->update();
state->sound_channel[ch].remaining = 0;
state->stream->update();
if (SOUND_LOG && debuglog)
fprintf(debuglog, "Channel %d stop\n", ch);
if (SOUND_LOG && state->debuglog)
fprintf(state->debuglog, "Channel %d stop\n", ch);
}
@ -739,7 +775,7 @@ static void stop_cvsd(int ch)
*
*************************************/
static void fir_filter(INT32 *input, INT16 *output, int count)
static void fir_filter(device_t *device, INT32 *input, INT16 *output, int count)
{
while (count--)
{
@ -774,7 +810,7 @@ static void fir_filter(INT32 *input, INT16 *output, int count)
*
*************************************/
static void decode_and_filter_cvsd(UINT8 *input, int bytes, int maskbits, int frequency, INT16 *output)
static void decode_and_filter_cvsd(device_t *device, UINT8 *input, int bytes, int maskbits, int frequency, INT16 *output)
{
INT32 buffer[SAMPLE_BUFFER_LENGTH + FIR_HISTORY_LENGTH];
int total_samples = bytes * 8;
@ -873,7 +909,7 @@ static void decode_and_filter_cvsd(UINT8 *input, int bytes, int maskbits, int fr
}
/* all done with this chunk, run the filter on it */
fir_filter(&buffer[FIR_HISTORY_LENGTH], &output[chunk_start], chunk_bytes * 8);
fir_filter(device, &buffer[FIR_HISTORY_LENGTH], &output[chunk_start], chunk_bytes * 8);
/* copy the last few input samples down to the start for a new history */
memcpy(&buffer[0], &buffer[SAMPLE_BUFFER_LENGTH], FIR_HISTORY_LENGTH * sizeof(INT32));
@ -895,6 +931,12 @@ static void decode_and_filter_cvsd(UINT8 *input, int bytes, int maskbits, int fr
}
static WRITE8_DEVICE_HANDLER( sound_banks_w )
{
exidy440_audio_state *state = get_safe_token(device);
state->sound_banks[offset] = data;
}
/*************************************
*
@ -904,12 +946,12 @@ static void decode_and_filter_cvsd(UINT8 *input, int bytes, int maskbits, int fr
static ADDRESS_MAP_START( exidy440_audio_map, AS_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x801f) AM_MIRROR(0x03e0) AM_READWRITE(m6844_r, m6844_w) AM_BASE(&m6844_data)
AM_RANGE(0x8400, 0x840f) AM_MIRROR(0x03f0) AM_RAM_WRITE(sound_volume_w) AM_BASE(&sound_volume)
AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x03ff) AM_READ(sound_command_r) AM_WRITENOP
AM_RANGE(0x8000, 0x801f) AM_MIRROR(0x03e0) AM_DEVREADWRITE("custom", m6844_r, m6844_w)
AM_RANGE(0x8400, 0x840f) AM_MIRROR(0x03f0) AM_DEVREADWRITE("custom", sound_volume_r, sound_volume_w)
AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x03ff) AM_DEVREAD("custom", sound_command_r) AM_WRITENOP
AM_RANGE(0x8c00, 0x93ff) AM_NOP
AM_RANGE(0x9400, 0x9403) AM_MIRROR(0x03fc) AM_READNOP AM_WRITEONLY AM_BASE(&sound_banks)
AM_RANGE(0x9800, 0x9800) AM_MIRROR(0x03ff) AM_READNOP AM_WRITE(sound_interrupt_clear_w)
AM_RANGE(0x9400, 0x9403) AM_MIRROR(0x03fc) AM_READNOP AM_DEVWRITE("custom", sound_banks_w)
AM_RANGE(0x9800, 0x9800) AM_MIRROR(0x03ff) AM_READNOP AM_DEVWRITE("custom", sound_interrupt_clear_w)
AM_RANGE(0x9c00, 0x9fff) AM_NOP
AM_RANGE(0xa000, 0xbfff) AM_RAM
AM_RANGE(0xc000, 0xdfff) AM_NOP
@ -928,6 +970,9 @@ DEVICE_GET_INFO( exidy440_sound )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(exidy440_audio_state); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(exidy440_sound); break;
case DEVINFO_FCT_STOP: info->stop = DEVICE_STOP_NAME(exidy440_sound); break;
@ -939,7 +984,6 @@ DEVICE_GET_INFO( exidy440_sound )
}
DECLARE_LEGACY_SOUND_DEVICE(EXIDY440, exidy440_sound);
DEFINE_LEGACY_SOUND_DEVICE(EXIDY440, exidy440_sound);

4
src/mame/audio/exidy440.h
View File

@ -1,4 +1,4 @@
void exidy440_sound_command(running_machine &machine, UINT8 param);
UINT8 exidy440_sound_command_ack(void);
void exidy440_sound_command(device_t *device, UINT8 param);
UINT8 exidy440_sound_command_ack(device_t *device);
MACHINE_CONFIG_EXTERN( exidy440_audio );

182
src/mame/audio/m72.c
View File

@ -67,144 +67,208 @@ enum
Z80_CLEAR
};
static UINT8 irqvector;
static UINT32 sample_addr;
typedef struct _m72_audio_state m72_audio_state;
struct _m72_audio_state
{
UINT8 irqvector;
UINT32 sample_addr;
UINT8 *samples;
UINT32 samples_size;
address_space *space;
device_t *dac;
};
INLINE m72_audio_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M72);
return (m72_audio_state *)downcast<legacy_device_base *>(device)->token();
}
static TIMER_CALLBACK( setvector_callback )
{
m72_audio_state *state = (m72_audio_state *)ptr;
switch(param)
{
case VECTOR_INIT:
irqvector = 0xff;
state->irqvector = 0xff;
break;
case YM2151_ASSERT:
irqvector &= 0xef;
state->irqvector &= 0xef;
break;
case YM2151_CLEAR:
irqvector |= 0x10;
state->irqvector |= 0x10;
break;
case Z80_ASSERT:
irqvector &= 0xdf;
state->irqvector &= 0xdf;
break;
case Z80_CLEAR:
irqvector |= 0x20;
state->irqvector |= 0x20;
break;
}
if (irqvector == 0)
if (state->irqvector == 0)
logerror("You didn't call m72_init_sound()\n");
if (irqvector == 0xff) /* no IRQs pending */
cputag_set_input_line_and_vector(machine, "soundcpu",0,CLEAR_LINE, irqvector);
else /* IRQ pending */
cputag_set_input_line_and_vector(machine, "soundcpu",0,ASSERT_LINE, irqvector);
cputag_set_input_line_and_vector(machine, "soundcpu", 0, (state->irqvector == 0xff) ? CLEAR_LINE : ASSERT_LINE, state->irqvector);
}
SOUND_START( m72 )
static DEVICE_START( m72_audio )
{
state_save_register_global(machine, irqvector);
state_save_register_global(machine, sample_addr);
m72_audio_state *state = get_safe_token(device);
state->samples = device->machine().region("samples")->base();
state->samples_size = device->machine().region("samples")->bytes();
state->space = device->machine().device("soundcpu")->memory().space(AS_IO);
state->dac = device->machine().device("dac");
device->save_item(NAME(state->irqvector));
device->save_item(NAME(state->sample_addr));
}
SOUND_RESET( m72 )
static DEVICE_RESET( m72_audio )
{
setvector_callback(machine, NULL, VECTOR_INIT);
m72_audio_state *state = get_safe_token(device);
setvector_callback(device->machine(), state, VECTOR_INIT);
}
void m72_ym2151_irq_handler(device_t *device, int irq)
{
if (irq)
device->machine().scheduler().synchronize(FUNC(setvector_callback), YM2151_ASSERT);
else
device->machine().scheduler().synchronize(FUNC(setvector_callback), YM2151_CLEAR);
device_t *audio = device->machine().device("m72");
m72_audio_state *state = get_safe_token(audio);
device->machine().scheduler().synchronize(FUNC(setvector_callback), irq ? YM2151_ASSERT : YM2151_CLEAR, state);
}
WRITE16_HANDLER( m72_sound_command_w )
WRITE16_DEVICE_HANDLER( m72_sound_command_w )
{
if (ACCESSING_BITS_0_7)
{
soundlatch_w(space,offset,data);
space->machine().scheduler().synchronize(FUNC(setvector_callback), Z80_ASSERT);
m72_audio_state *state = get_safe_token(device);
soundlatch_w(state->space, offset, data);
device->machine().scheduler().synchronize(FUNC(setvector_callback), Z80_ASSERT, state);
}
}
WRITE8_HANDLER( m72_sound_command_byte_w )
WRITE8_DEVICE_HANDLER( m72_sound_command_byte_w )
{
soundlatch_w(space,offset,data);
space->machine().scheduler().synchronize(FUNC(setvector_callback), Z80_ASSERT);
m72_audio_state *state = get_safe_token(device);
soundlatch_w(state->space, offset, data);
device->machine().scheduler().synchronize(FUNC(setvector_callback), Z80_ASSERT, state);
}
WRITE8_HANDLER( m72_sound_irq_ack_w )
WRITE8_DEVICE_HANDLER( m72_sound_irq_ack_w )
{
space->machine().scheduler().synchronize(FUNC(setvector_callback), Z80_CLEAR);
m72_audio_state *state = get_safe_token(device);
device->machine().scheduler().synchronize(FUNC(setvector_callback), Z80_CLEAR, state);
}
void m72_set_sample_start(int start)
void m72_set_sample_start(device_t *device, int start)
{
sample_addr = start;
m72_audio_state *state = get_safe_token(device);
state->sample_addr = start;
}
WRITE8_HANDLER( vigilant_sample_addr_w )
WRITE8_DEVICE_HANDLER( vigilant_sample_addr_w )
{
if (offset == 1)
sample_addr = (sample_addr & 0x00ff) | ((data << 8) & 0xff00);
else
sample_addr = (sample_addr & 0xff00) | ((data << 0) & 0x00ff);
}
WRITE8_HANDLER( shisen_sample_addr_w )
{
sample_addr >>= 2;
m72_audio_state *state = get_safe_token(device);
if (offset == 1)
sample_addr = (sample_addr & 0x00ff) | ((data << 8) & 0xff00);
state->sample_addr = (state->sample_addr & 0x00ff) | ((data << 8) & 0xff00);
else
sample_addr = (sample_addr & 0xff00) | ((data << 0) & 0x00ff);
sample_addr <<= 2;
state->sample_addr = (state->sample_addr & 0xff00) | ((data << 0) & 0x00ff);
}
WRITE8_HANDLER( rtype2_sample_addr_w )
WRITE8_DEVICE_HANDLER( shisen_sample_addr_w )
{
sample_addr >>= 5;
m72_audio_state *state = get_safe_token(device);
state->sample_addr >>= 2;
if (offset == 1)
sample_addr = (sample_addr & 0x00ff) | ((data << 8) & 0xff00);
state->sample_addr = (state->sample_addr & 0x00ff) | ((data << 8) & 0xff00);
else
sample_addr = (sample_addr & 0xff00) | ((data << 0) & 0x00ff);
state->sample_addr = (state->sample_addr & 0xff00) | ((data << 0) & 0x00ff);
sample_addr <<= 5;
state->sample_addr <<= 2;
}
WRITE8_HANDLER( poundfor_sample_addr_w )
WRITE8_DEVICE_HANDLER( rtype2_sample_addr_w )
{
m72_audio_state *state = get_safe_token(device);
state->sample_addr >>= 5;
if (offset == 1)
state->sample_addr = (state->sample_addr & 0x00ff) | ((data << 8) & 0xff00);
else
state->sample_addr = (state->sample_addr & 0xff00) | ((data << 0) & 0x00ff);
state->sample_addr <<= 5;
}
WRITE8_DEVICE_HANDLER( poundfor_sample_addr_w )
{
m72_audio_state *state = get_safe_token(device);
/* poundfor writes both sample start and sample END - a first for Irem...
we don't handle the end written here, 00 marks the sample end as usual. */
if (offset > 1) return;
sample_addr >>= 4;
state->sample_addr >>= 4;
if (offset == 1)
sample_addr = (sample_addr & 0x00ff) | ((data << 8) & 0xff00);
state->sample_addr = (state->sample_addr & 0x00ff) | ((data << 8) & 0xff00);
else
sample_addr = (sample_addr & 0xff00) | ((data << 0) & 0x00ff);
state->sample_addr = (state->sample_addr & 0xff00) | ((data << 0) & 0x00ff);
sample_addr <<= 4;
state->sample_addr <<= 4;
}
READ8_HANDLER( m72_sample_r )
READ8_DEVICE_HANDLER( m72_sample_r )
{
return space->machine().region("samples")->base()[sample_addr];
m72_audio_state *state = get_safe_token(device);
return state->samples[state->sample_addr];
}
WRITE8_DEVICE_HANDLER( m72_sample_w )
{
dac_signed_data_w(device, data);
sample_addr = (sample_addr + 1) & (device->machine().region("samples")->bytes() - 1);
m72_audio_state *state = get_safe_token(device);
dac_signed_data_w(state->dac, data);
state->sample_addr = (state->sample_addr + 1) & (state->samples_size - 1);
}
DEVICE_GET_INFO( m72_audio )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(m72_audio_state); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(m72_audio); break;
case DEVINFO_FCT_RESET: info->start = DEVICE_RESET_NAME(m72_audio); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "M72 Custom"); break;
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
}
}
DEFINE_LEGACY_SOUND_DEVICE(M72, m72_audio);

22
src/mame/audio/m72.h
View File

@ -4,18 +4,18 @@
****************************************************************************/
SOUND_START( m72 );
SOUND_RESET( m72 );
void m72_ym2151_irq_handler(device_t *device, int irq);
WRITE8_HANDLER( m72_sound_command_byte_w );
WRITE16_HANDLER( m72_sound_command_w );
WRITE8_HANDLER( m72_sound_irq_ack_w );
READ8_HANDLER( m72_sample_r );
WRITE8_DEVICE_HANDLER( m72_sound_command_byte_w );
WRITE16_DEVICE_HANDLER( m72_sound_command_w );
WRITE8_DEVICE_HANDLER( m72_sound_irq_ack_w );
READ8_DEVICE_HANDLER( m72_sample_r );
WRITE8_DEVICE_HANDLER( m72_sample_w );
/* the port goes to different address bits depending on the game */
void m72_set_sample_start(int start);
WRITE8_HANDLER( vigilant_sample_addr_w );
WRITE8_HANDLER( shisen_sample_addr_w );
WRITE8_HANDLER( rtype2_sample_addr_w );
WRITE8_HANDLER( poundfor_sample_addr_w );
void m72_set_sample_start(device_t *device, int start);
WRITE8_DEVICE_HANDLER( vigilant_sample_addr_w );
WRITE8_DEVICE_HANDLER( shisen_sample_addr_w );
WRITE8_DEVICE_HANDLER( rtype2_sample_addr_w );
WRITE8_DEVICE_HANDLER( poundfor_sample_addr_w );
DECLARE_LEGACY_SOUND_DEVICE(M72, m72_audio);

4
src/mame/audio/mcr.c
View File

@ -193,8 +193,8 @@ void mcr_sound_reset(running_machine &machine)
/* Advanced Audio */
if (mcr_sound_config & MCR_WILLIAMS_SOUND)
{
williams_cvsd_reset_w(1);
williams_cvsd_reset_w(0);
williams_cvsd_reset_w(machine, 1);
williams_cvsd_reset_w(machine, 0);
}
}

385
src/mame/audio/segasnd.c
View File

@ -80,6 +80,7 @@ struct _usb_state
{
sound_stream * stream; /* output stream */
device_t *cpu; /* CPU index of the 8035 */
device_t *maincpu;
UINT8 in_latch; /* input latch */
UINT8 out_latch; /* output latch */
UINT8 last_p2_value; /* current P2 output value */
@ -99,17 +100,13 @@ struct _usb_state
filter_state noise_filters[5];
};
/***************************************************************************
GLOBAL VARIABLES
***************************************************************************/
/* SP0250-based speech board */
static UINT8 speech_latch, speech_t0, speech_p2, speech_drq;
/* Universal sound board */
static usb_state usb;
typedef struct _speech_state speech_state;
struct _speech_state
{
UINT8 latch, t0, p2, drq;
UINT8 *speech;
};
@ -144,6 +141,43 @@ INLINE double step_cr_filter(filter_state *state, double input)
SPEECH BOARD
***************************************************************************/
DECLARE_LEGACY_SOUND_DEVICE(SEGASPEECH, speech_sound);
INLINE speech_state *get_safe_speech(device_t *device)
{
assert(device != NULL);
assert(device->type() == SEGASPEECH);
return (speech_state *)downcast<legacy_device_base *>(device)->token();
}
static DEVICE_START( speech_sound )
{
speech_state *state = get_safe_speech(device);
state->speech = device->machine().region("speech")->base();
}
DEVICE_GET_INFO( speech_sound )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(speech_state); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(speech_sound); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "Sega Speech Sound Board"); break;
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
}
}
DEFINE_LEGACY_SOUND_DEVICE(SEGASPEECH, speech_sound);
/*************************************
*
@ -151,35 +185,49 @@ INLINE double step_cr_filter(filter_state *state, double input)
*
*************************************/
static READ8_HANDLER( speech_t0_r )
static READ8_DEVICE_HANDLER( speech_t0_r )
{
return speech_t0;
speech_state *state = get_safe_speech(device);
return state->t0;
}
static READ8_HANDLER( speech_t1_r )
static READ8_DEVICE_HANDLER( speech_t1_r )
{
return speech_drq;
speech_state *state = get_safe_speech(device);
return state->drq;
}
static READ8_HANDLER( speech_p1_r )
static READ8_DEVICE_HANDLER( speech_p1_r )
{
return speech_latch & 0x7f;
speech_state *state = get_safe_speech(device);
return state->latch & 0x7f;
}
static READ8_HANDLER( speech_rom_r )
static READ8_DEVICE_HANDLER( speech_rom_r )
{
return space->machine().region("speech")->base()[0x100 * (speech_p2 & 0x3f) + offset];
speech_state *state = get_safe_speech(device);
return state->speech[0x100 * (state->p2 & 0x3f) + offset];
}
static WRITE8_HANDLER( speech_p1_w )
static WRITE8_DEVICE_HANDLER( speech_p1_w )
{
speech_state *state = get_safe_speech(device);
if (!(data & 0x80))
speech_t0 = 0;
state->t0 = 0;
}
static WRITE8_HANDLER( speech_p2_w )
static WRITE8_DEVICE_HANDLER( speech_p2_w )
{
speech_p2 = data;
speech_state *state = get_safe_speech(device);
state->p2 = data;
}
@ -192,7 +240,10 @@ static WRITE8_HANDLER( speech_p2_w )
static void speech_drq_w(device_t *device, int level)
{
speech_drq = (level == ASSERT_LINE);
device_t *speech = device->machine().device("segaspeech");
speech_state *state = get_safe_speech(speech);
state->drq = (level == ASSERT_LINE);
}
@ -206,27 +257,30 @@ static void speech_drq_w(device_t *device, int level)
static TIMER_CALLBACK( delayed_speech_w )
{
int data = param;
UINT8 old = speech_latch;
speech_state *state = (speech_state *)ptr;
UINT8 old = state->latch;
/* all 8 bits are latched */
speech_latch = data;
state->latch = data;
/* the high bit goes directly to the INT line */
cputag_set_input_line(machine, "audiocpu", 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
/* a clock on the high bit clocks a 1 into T0 */
if (!(old & 0x80) && (data & 0x80))
speech_t0 = 1;
state->t0 = 1;
}
WRITE8_HANDLER( sega_speech_data_w )
WRITE8_DEVICE_HANDLER( sega_speech_data_w )
{
space->machine().scheduler().synchronize(FUNC(delayed_speech_w), data);
speech_state *state = get_safe_speech(device);
device->machine().scheduler().synchronize(FUNC(delayed_speech_w), data, state);
}
WRITE8_HANDLER( sega_speech_control_w )
WRITE8_DEVICE_HANDLER( sega_speech_control_w )
{
LOG(("Speech control = %X\n", data));
}
@ -245,12 +299,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( speech_portmap, AS_IO, 8 )
AM_RANGE(0x00, 0xff) AM_READ(speech_rom_r)
AM_RANGE(0x00, 0xff) AM_DEVREAD("segaspeech", speech_rom_r)
AM_RANGE(0x00, 0xff) AM_DEVWRITE("speech", sp0250_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(speech_p1_r, speech_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(speech_p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(speech_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(speech_t1_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("segaspeech", speech_p1_r, speech_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_p2_w)
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_t0_r)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_t1_r)
ADDRESS_MAP_END
@ -282,6 +336,7 @@ MACHINE_CONFIG_FRAGMENT( sega_speech_board )
MCFG_CPU_IO_MAP(speech_portmap)
/* sound hardware */
MCFG_SOUND_ADD("segaspeech", SEGASPEECH, 0)
MCFG_SOUND_ADD("speech", SP0250, SPEECH_MASTER_CLOCK)
MCFG_SOUND_CONFIG(sp0250_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
@ -293,6 +348,15 @@ MACHINE_CONFIG_END
UNIVERSAL SOUND BOARD
***************************************************************************/
static DECLARE_LEGACY_SOUND_DEVICE(SEGAUSB, usb_sound);
INLINE usb_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == SEGAUSB);
return (usb_state *)downcast<legacy_device_base *>(device)->token();
}
/*************************************
*
@ -302,19 +366,24 @@ MACHINE_CONFIG_END
static TIMER_DEVICE_CALLBACK( increment_t1_clock )
{
device_t *usbsnd = timer.machine().device("usbsnd");
usb_state *usb = get_safe_token(usbsnd);
/* only increment if it is not being forced clear */
if (!(usb.last_p2_value & 0x80))
usb.t1_clock++;
if (!(usb->last_p2_value & 0x80))
usb->t1_clock++;
}
void sega_usb_reset(running_machine &machine, UINT8 t1_clock_mask)
static DEVICE_RESET( usb_sound )
{
usb_state *usb = get_safe_token(device);
/* halt the USB CPU at reset time */
device_set_input_line(usb.cpu, INPUT_LINE_RESET, ASSERT_LINE);
device_set_input_line(usb->cpu, INPUT_LINE_RESET, ASSERT_LINE);
/* start the clock timer */
usb.t1_clock_mask = t1_clock_mask;
usb->t1_clock_mask = 0x10;
}
@ -325,56 +394,65 @@ void sega_usb_reset(running_machine &machine, UINT8 t1_clock_mask)
*
*************************************/
READ8_HANDLER( sega_usb_status_r )
READ8_DEVICE_HANDLER( sega_usb_status_r )
{
LOG(("%04X:usb_data_r = %02X\n", cpu_get_pc(&space->device()), (usb.out_latch & 0x81) | (usb.in_latch & 0x7e)));
usb_state *usb = get_safe_token(device);
device_adjust_icount(&space->device(), -200);
LOG(("%04X:usb_data_r = %02X\n", cpu_get_pc(usb->maincpu), (usb->out_latch & 0x81) | (usb->in_latch & 0x7e)));
device_adjust_icount(usb->maincpu, -200);
/* only bits 0 and 7 are controlled by the I8035; the remaining */
/* bits 1-6 reflect the current input latch values */
return (usb.out_latch & 0x81) | (usb.in_latch & 0x7e);
return (usb->out_latch & 0x81) | (usb->in_latch & 0x7e);
}
static TIMER_CALLBACK( delayed_usb_data_w )
{
usb_state *usb = (usb_state *)ptr;
int data = param;
/* look for rising/falling edges of bit 7 to control the RESET line */
device_set_input_line(usb.cpu, INPUT_LINE_RESET, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
device_set_input_line(usb->cpu, INPUT_LINE_RESET, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
/* if the CLEAR line is set, the low 7 bits of the input are ignored */
if ((usb.last_p2_value & 0x40) == 0)
if ((usb->last_p2_value & 0x40) == 0)
data &= ~0x7f;
/* update the effective input latch */
usb.in_latch = data;
usb->in_latch = data;
}
WRITE8_HANDLER( sega_usb_data_w )
WRITE8_DEVICE_HANDLER( sega_usb_data_w )
{
LOG(("%04X:usb_data_w = %02X\n", cpu_get_pc(&space->device()), data));
space->machine().scheduler().synchronize(FUNC(delayed_usb_data_w), data);
usb_state *usb = get_safe_token(device);
LOG(("%04X:usb_data_w = %02X\n", cpu_get_pc(usb->maincpu), data));
device->machine().scheduler().synchronize(FUNC(delayed_usb_data_w), data, usb);
/* boost the interleave so that sequences can be sent */
space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(250));
device->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(250));
}
READ8_HANDLER( sega_usb_ram_r )
READ8_DEVICE_HANDLER( sega_usb_ram_r )
{
return usb.program_ram[offset];
usb_state *usb = get_safe_token(device);
return usb->program_ram[offset];
}
WRITE8_HANDLER( sega_usb_ram_w )
WRITE8_DEVICE_HANDLER( sega_usb_ram_w )
{
if (usb.in_latch & 0x80)
usb.program_ram[offset] = data;
usb_state *usb = get_safe_token(device);
if (usb->in_latch & 0x80)
usb->program_ram[offset] = data;
else
LOG(("%04X:sega_usb_ram_w(%03X) = %02X while /LOAD disabled\n", cpu_get_pc(&space->device()), offset, data));
LOG(("%04X:sega_usb_ram_w(%03X) = %02X while /LOAD disabled\n", cpu_get_pc(usb->maincpu), offset, data));
}
@ -385,50 +463,57 @@ WRITE8_HANDLER( sega_usb_ram_w )
*
*************************************/
static READ8_HANDLER( usb_p1_r )
static READ8_DEVICE_HANDLER( usb_p1_r )
{
usb_state *usb = get_safe_token(device);
/* bits 0-6 are inputs and map to bits 0-6 of the input latch */
if ((usb.in_latch & 0x7f) != 0)
LOG(("%03X: P1 read = %02X\n", cpu_get_pc(&space->device()), usb.in_latch & 0x7f));
return usb.in_latch & 0x7f;
if ((usb->in_latch & 0x7f) != 0)
LOG(("%03X: P1 read = %02X\n", cpu_get_pc(usb->maincpu), usb->in_latch & 0x7f));
return usb->in_latch & 0x7f;
}
static WRITE8_HANDLER( usb_p1_w )
static WRITE8_DEVICE_HANDLER( usb_p1_w )
{
usb_state *usb = get_safe_token(device);
/* bit 7 maps to bit 0 on the output latch */
usb.out_latch = (usb.out_latch & 0xfe) | (data >> 7);
LOG(("%03X: P1 write = %02X\n", cpu_get_pc(&space->device()), data));
usb->out_latch = (usb->out_latch & 0xfe) | (data >> 7);
LOG(("%03X: P1 write = %02X\n", cpu_get_pc(usb->maincpu), data));
}
static WRITE8_HANDLER( usb_p2_w )
static WRITE8_DEVICE_HANDLER( usb_p2_w )
{
UINT8 old = usb.last_p2_value;
usb.last_p2_value = data;
usb_state *usb = get_safe_token(device);
UINT8 old = usb->last_p2_value;
usb->last_p2_value = data;
/* low 2 bits control the bank of work RAM we are addressing */
usb.work_ram_bank = data & 3;
usb->work_ram_bank = data & 3;
/* bit 6 controls the "ready" bit output to the host */
/* it also clears the input latch from the host (active low) */
usb.out_latch = ((data & 0x40) << 1) | (usb.out_latch & 0x7f);
usb->out_latch = ((data & 0x40) << 1) | (usb->out_latch & 0x7f);
if ((data & 0x40) == 0)
usb.in_latch = 0;
usb->in_latch = 0;
/* bit 7 controls the reset on the upper counter at U33 */
if ((old & 0x80) && !(data & 0x80))
usb.t1_clock = 0;
usb->t1_clock = 0;
LOG(("%03X: P2 write -> bank=%d ready=%d clock=%d\n", cpu_get_pc(&space->device()), data & 3, (data >> 6) & 1, (data >> 7) & 1));
LOG(("%03X: P2 write -> bank=%d ready=%d clock=%d\n", cpu_get_pc(usb->maincpu), data & 3, (data >> 6) & 1, (data >> 7) & 1));
}
static READ8_HANDLER( usb_t1_r )
static READ8_DEVICE_HANDLER( usb_t1_r )
{
usb_state *usb = get_safe_token(device);
/* T1 returns 1 based on the value of the T1 clock; the exact */
/* pattern is determined by one or more jumpers on the board. */
return (usb.t1_clock & usb.t1_clock_mask) != 0;
return (usb->t1_clock & usb->t1_clock_mask) != 0;
}
@ -482,6 +567,7 @@ INLINE void clock_channel(timer8253_channel *ch)
static STREAM_UPDATE( usb_stream_update )
{
usb_state *usb = get_safe_token(device);
stream_sample_t *dest = outputs[0];
/* iterate over samples */
@ -503,30 +589,30 @@ static STREAM_UPDATE( usb_stream_update )
*/
/* update the noise source */
for (step = USB_2MHZ_CLOCK / SAMPLE_RATE; step >= usb.noise_subcount; step -= usb.noise_subcount)
for (step = USB_2MHZ_CLOCK / SAMPLE_RATE; step >= usb->noise_subcount; step -= usb->noise_subcount)
{
usb.noise_shift = (usb.noise_shift << 1) | (((usb.noise_shift >> 13) ^ (usb.noise_shift >> 16)) & 1);
usb.noise_state = (usb.noise_shift >> 16) & 1;
usb.noise_subcount = USB_2MHZ_CLOCK / MM5837_CLOCK;
usb->noise_shift = (usb->noise_shift << 1) | (((usb->noise_shift >> 13) ^ (usb->noise_shift >> 16)) & 1);
usb->noise_state = (usb->noise_shift >> 16) & 1;
usb->noise_subcount = USB_2MHZ_CLOCK / MM5837_CLOCK;
}
usb.noise_subcount -= step;
usb->noise_subcount -= step;
/* update the filtered noise value -- this is just an approximation to the pink noise filter */
/* being applied on the PCB, but it sounds pretty close */
usb.noise_filters[0].capval = 0.99765 * usb.noise_filters[0].capval + usb.noise_state * 0.0990460;
usb.noise_filters[1].capval = 0.96300 * usb.noise_filters[1].capval + usb.noise_state * 0.2965164;
usb.noise_filters[2].capval = 0.57000 * usb.noise_filters[2].capval + usb.noise_state * 1.0526913;
noiseval = usb.noise_filters[0].capval + usb.noise_filters[1].capval + usb.noise_filters[2].capval + usb.noise_state * 0.1848;
usb->noise_filters[0].capval = 0.99765 * usb->noise_filters[0].capval + usb->noise_state * 0.0990460;
usb->noise_filters[1].capval = 0.96300 * usb->noise_filters[1].capval + usb->noise_state * 0.2965164;
usb->noise_filters[2].capval = 0.57000 * usb->noise_filters[2].capval + usb->noise_state * 1.0526913;
noiseval = usb->noise_filters[0].capval + usb->noise_filters[1].capval + usb->noise_filters[2].capval + usb->noise_state * 0.1848;
/* final output goes through a CR filter; the scaling factor is arbitrary to get the noise to the */
/* correct relative volume */
noiseval = step_cr_filter(&usb.noise_filters[4], noiseval);
noiseval = step_cr_filter(&usb->noise_filters[4], noiseval);
noiseval *= 0.075;
/* there are 3 identical groups of circuits, each with its own 8253 */
for (group = 0; group < 3; group++)
{
timer8253 *g = &usb.timer_group[group];
timer8253 *g = &usb->timer_group[group];
double chan0, chan1, chan2, mix;
@ -601,8 +687,8 @@ static STREAM_UPDATE( usb_stream_update )
}
/* the exponents for the gate filters are determined by channel 2's output */
g->gate1.exponent = usb.gate_rc1_exp[g->chan[2].output];
g->gate2.exponent = usb.gate_rc2_exp[g->chan[2].output];
g->gate1.exponent = usb->gate_rc1_exp[g->chan[2].output];
g->gate2.exponent = usb->gate_rc2_exp[g->chan[2].output];
/* based on the envelope mode, we do one of two things with source 2 */
if (g->config == 0)
@ -631,33 +717,37 @@ static STREAM_UPDATE( usb_stream_update )
WEIGHT
*/
*dest++ = 4000 * step_cr_filter(&usb.final_filter, sample);
*dest++ = 4000 * step_cr_filter(&usb->final_filter, sample);
}
}
static DEVICE_START( usb_sound )
{
usb_state *usb = get_safe_token(device);
running_machine &machine = device->machine();
filter_state temp;
int tchan, tgroup;
/* find the CPU we are associated with */
usb.cpu = machine.device("usbcpu");
assert(usb.cpu != NULL);
usb->maincpu = machine.device("maincpu");
assert(usb->maincpu != NULL);
usb->cpu = machine.device("usbcpu");
assert(usb->cpu != NULL);
/* allocate work RAM */
usb.work_ram = auto_alloc_array(machine, UINT8, 0x400);
/* allocate RAM */
usb->program_ram = (UINT8 *)memory_get_shared(device->machine(), "pgmram");
usb->work_ram = auto_alloc_array(machine, UINT8, 0x400);
/* create a sound stream */
usb.stream = device->machine().sound().stream_alloc(*device, 0, 1, SAMPLE_RATE, NULL, usb_stream_update);
usb->stream = device->machine().sound().stream_alloc(*device, 0, 1, SAMPLE_RATE, NULL, usb_stream_update);
/* initialize state */
usb.noise_shift = 0x15555;
usb->noise_shift = 0x15555;
for (tgroup = 0; tgroup < 3; tgroup++)
{
timer8253 *g = &usb.timer_group[tgroup];
timer8253 *g = &usb->timer_group[tgroup];
configure_filter(&g->chan_filter[0], 10e3, 1e-6);
configure_filter(&g->chan_filter[1], 10e3, 1e-6);
configure_filter(&g->gate1, 100e3, 0.01e-6);
@ -665,32 +755,32 @@ static DEVICE_START( usb_sound )
}
configure_filter(&temp, 100e3, 0.01e-6);
usb.gate_rc1_exp[0] = temp.exponent;
usb->gate_rc1_exp[0] = temp.exponent;
configure_filter(&temp, 1e3, 0.01e-6);
usb.gate_rc1_exp[1] = temp.exponent;
usb->gate_rc1_exp[1] = temp.exponent;
configure_filter(&temp, 2 * 100e3, 0.01e-6);
usb.gate_rc2_exp[0] = temp.exponent;
usb->gate_rc2_exp[0] = temp.exponent;
configure_filter(&temp, 2 * 1e3, 0.01e-6);
usb.gate_rc2_exp[1] = temp.exponent;
usb->gate_rc2_exp[1] = temp.exponent;
configure_filter(&usb.noise_filters[0], 2.7e3 + 2.7e3, 1.0e-6);
configure_filter(&usb.noise_filters[1], 2.7e3 + 1e3, 0.30e-6);
configure_filter(&usb.noise_filters[2], 2.7e3 + 270, 0.15e-6);
configure_filter(&usb.noise_filters[3], 2.7e3 + 0, 0.082e-6);
configure_filter(&usb.noise_filters[4], 33e3, 0.1e-6);
configure_filter(&usb->noise_filters[0], 2.7e3 + 2.7e3, 1.0e-6);
configure_filter(&usb->noise_filters[1], 2.7e3 + 1e3, 0.30e-6);
configure_filter(&usb->noise_filters[2], 2.7e3 + 270, 0.15e-6);
configure_filter(&usb->noise_filters[3], 2.7e3 + 0, 0.082e-6);
configure_filter(&usb->noise_filters[4], 33e3, 0.1e-6);
configure_filter(&usb.final_filter, 100e3, 4.7e-6);
configure_filter(&usb->final_filter, 100e3, 4.7e-6);
/* register for save states */
state_save_register_item(machine, "usb", NULL, 0, usb.in_latch);
state_save_register_item(machine, "usb", NULL, 0, usb.out_latch);
state_save_register_item(machine, "usb", NULL, 0, usb.last_p2_value);
state_save_register_item(machine, "usb", NULL, 0, usb.work_ram_bank);
state_save_register_item(machine, "usb", NULL, 0, usb.t1_clock);
state_save_register_item(machine, "usb", NULL, 0, usb->in_latch);
state_save_register_item(machine, "usb", NULL, 0, usb->out_latch);
state_save_register_item(machine, "usb", NULL, 0, usb->last_p2_value);
state_save_register_item(machine, "usb", NULL, 0, usb->work_ram_bank);
state_save_register_item(machine, "usb", NULL, 0, usb->t1_clock);
for (tgroup = 0; tgroup < 3; tgroup++)
{
timer8253 *group = &usb.timer_group[tgroup];
timer8253 *group = &usb->timer_group[tgroup];
for (tchan = 0; tchan < 3; tchan++)
{
timer8253_channel *channel = &group->chan[tchan];
@ -714,16 +804,16 @@ static DEVICE_START( usb_sound )
state_save_register_item(machine, "usb", NULL, tgroup, group->config);
}
state_save_register_item_array(machine, "usb", NULL, 0, usb.timer_mode);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_shift);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_state);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_subcount);
state_save_register_item(machine, "usb", NULL, 0, usb.final_filter.capval);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_filters[0].capval);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_filters[1].capval);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_filters[2].capval);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_filters[3].capval);
state_save_register_item(machine, "usb", NULL, 0, usb.noise_filters[4].capval);
state_save_register_item_array(machine, "usb", NULL, 0, usb->timer_mode);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_shift);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_state);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_subcount);
state_save_register_item(machine, "usb", NULL, 0, usb->final_filter.capval);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_filters[0].capval);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_filters[1].capval);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_filters[2].capval);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_filters[3].capval);
state_save_register_item(machine, "usb", NULL, 0, usb->noise_filters[4].capval);
}
@ -731,8 +821,12 @@ static DEVICE_GET_INFO( usb_sound )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(usb_state); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(usb_sound); break;
case DEVINFO_FCT_RESET: info->start = DEVICE_RESET_NAME(usb_sound); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "Sega Universal Sound Board"); break;
@ -740,7 +834,6 @@ static DEVICE_GET_INFO( usb_sound )
}
}
DECLARE_LEGACY_SOUND_DEVICE(SEGAUSB, usb_sound);
DEFINE_LEGACY_SOUND_DEVICE(SEGAUSB, usb_sound);
@ -751,13 +844,13 @@ DEFINE_LEGACY_SOUND_DEVICE(SEGAUSB, usb_sound);
*
*************************************/
static void timer_w(int which, UINT8 offset, UINT8 data)
static void timer_w(usb_state *usb, int which, UINT8 offset, UINT8 data)
{
timer8253 *g = &usb.timer_group[which];
timer8253 *g = &usb->timer_group[which];
timer8253_channel *ch;
int was_holding;
usb.stream->update();
usb->stream->update();
/* switch off the offset */
switch (offset)
@ -820,11 +913,11 @@ static void timer_w(int which, UINT8 offset, UINT8 data)
}
static void env_w(int which, UINT8 offset, UINT8 data)
static void env_w(usb_state *usb, int which, UINT8 offset, UINT8 data)
{
timer8253 *g = &usb.timer_group[which];
timer8253 *g = &usb->timer_group[which];
usb.stream->update();
usb->stream->update();
if (offset < 3)
g->env[offset] = (double)data;
@ -840,43 +933,47 @@ static void env_w(int which, UINT8 offset, UINT8 data)
*
*************************************/
static READ8_HANDLER( usb_workram_r )
static READ8_DEVICE_HANDLER( usb_workram_r )
{
offset += 256 * usb.work_ram_bank;
return usb.work_ram[offset];
usb_state *usb = get_safe_token(device);
offset += 256 * usb->work_ram_bank;
return usb->work_ram[offset];
}
static WRITE8_HANDLER( usb_workram_w )
static WRITE8_DEVICE_HANDLER( usb_workram_w )
{
offset += 256 * usb.work_ram_bank;
usb.work_ram[offset] = data;
usb_state *usb = get_safe_token(device);
offset += 256 * usb->work_ram_bank;
usb->work_ram[offset] = data;
/* writes to the low 32 bytes go to various controls */
switch (offset & ~3)
{
case 0x00: /* CTC0 */
timer_w(0, offset & 3, data);
timer_w(usb, 0, offset & 3, data);
break;
case 0x04: /* ENV0 */
env_w(0, offset & 3, data);
env_w(usb, 0, offset & 3, data);
break;
case 0x08: /* CTC1 */
timer_w(1, offset & 3, data);
timer_w(usb, 1, offset & 3, data);
break;
case 0x0c: /* ENV1 */
env_w(1, offset & 3, data);
env_w(usb, 1, offset & 3, data);
break;
case 0x10: /* CTC2 */
timer_w(2, offset & 3, data);
timer_w(usb, 2, offset & 3, data);
break;
case 0x14: /* ENV2 */
env_w(2, offset & 3, data);
env_w(usb, 2, offset & 3, data);
break;
}
}
@ -890,7 +987,7 @@ static WRITE8_HANDLER( usb_workram_w )
*************************************/
static ADDRESS_MAP_START( usb_map, AS_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE(&usb.program_ram)
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("pgmram")
ADDRESS_MAP_END
@ -900,10 +997,10 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( usb_portmap, AS_IO, 8 )
AM_RANGE(0x00, 0xff) AM_READWRITE(usb_workram_r, usb_workram_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(usb_p1_r, usb_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(usb_p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(usb_t1_r)
AM_RANGE(0x00, 0xff) AM_DEVREADWRITE("usbsnd", usb_workram_r, usb_workram_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("usbsnd", usb_p1_r, usb_p1_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("usbsnd", usb_p2_w)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("usbsnd", usb_t1_r)
ADDRESS_MAP_END

14
src/mame/audio/segasnd.h
View File

@ -6,17 +6,15 @@
MACHINE_CONFIG_EXTERN( sega_speech_board );
WRITE8_HANDLER( sega_speech_data_w );
WRITE8_HANDLER( sega_speech_control_w );
WRITE8_DEVICE_HANDLER( sega_speech_data_w );
WRITE8_DEVICE_HANDLER( sega_speech_control_w );
MACHINE_CONFIG_EXTERN( sega_universal_sound_board );
MACHINE_CONFIG_EXTERN( sega_universal_sound_board_rom );
void sega_usb_reset(running_machine &machine, UINT8 t1_clock_mask);
READ8_HANDLER( sega_usb_status_r );
WRITE8_HANDLER( sega_usb_data_w );
READ8_HANDLER( sega_usb_ram_r );
WRITE8_HANDLER( sega_usb_ram_w );
READ8_DEVICE_HANDLER( sega_usb_status_r );
WRITE8_DEVICE_HANDLER( sega_usb_data_w );
READ8_DEVICE_HANDLER( sega_usb_ram_r );
WRITE8_DEVICE_HANDLER( sega_usb_ram_w );

5
src/mame/audio/taito_en.c
View File

@ -238,10 +238,8 @@ static WRITE16_HANDLER(es5510_dsp_w)
}
}
static UINT16 *sound_ram;
static ADDRESS_MAP_START( f3_sound_map, AS_PROGRAM, 16 )
AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_MIRROR(0x30000) AM_SHARE("share1") AM_BASE(&sound_ram)
AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_MIRROR(0x30000) AM_SHARE("share1")
AM_RANGE(0x140000, 0x140fff) AM_READWRITE(f3_68000_share_r, f3_68000_share_w)
AM_RANGE(0x200000, 0x20001f) AM_DEVREADWRITE("ensoniq", es5505_r, es5505_w)
AM_RANGE(0x260000, 0x2601ff) AM_READWRITE(es5510_dsp_r, es5510_dsp_w)
@ -258,6 +256,7 @@ SOUND_RESET( taito_f3_soundsystem_reset )
{
/* Sound cpu program loads to 0xc00000 so we use a bank */
UINT16 *ROM = (UINT16 *)machine.region("audiocpu")->base();
UINT16 *sound_ram = (UINT16 *)memory_get_shared(machine, "share1");
memory_set_bankptr(machine, "bank1",&ROM[0x80000]);
memory_set_bankptr(machine, "bank2",&ROM[0x90000]);
memory_set_bankptr(machine, "bank3",&ROM[0xa0000]);

145
src/mame/audio/williams.c
View File

@ -47,15 +47,19 @@
STATIC GLOBALS
****************************************************************************/
static UINT8 williams_sound_int_state;
typedef struct _williams_audio_state williams_audio_state;
struct _williams_audio_state
{
UINT8 sound_int_state;
static UINT8 audio_talkback;
static UINT8 audio_sync;
static device_t *sound_cpu;
static device_t *soundalt_cpu;
UINT8 audio_talkback;
UINT8 audio_sync;
device_t *sound_cpu;
device_t *soundalt_cpu;
};
static williams_audio_state audio;
/***************************************************************************
FUNCTION PROTOTYPES
@ -266,12 +270,13 @@ MACHINE_CONFIG_END
void williams_cvsd_init(running_machine &machine)
{
williams_audio_state *state = &audio;
UINT8 *ROM;
int bank;
/* configure the CPU */
sound_cpu = machine.device("cvsdcpu");
soundalt_cpu = NULL;
state->sound_cpu = machine.device("cvsdcpu");
state->soundalt_cpu = NULL;
/* configure master CPU banks */
ROM = machine.region("cvsdcpu")->base();
@ -291,19 +296,20 @@ void williams_cvsd_init(running_machine &machine)
pia6821_ca1_w(machine.device("cvsdpia"), 1);
/* register for save states */
state_save_register_global(machine, williams_sound_int_state);
state_save_register_global(machine, audio_talkback);
state_save_register_global(machine, state->sound_int_state);
state_save_register_global(machine, state->audio_talkback);
}
void williams_narc_init(running_machine &machine)
{
williams_audio_state *state = &audio;
UINT8 *ROM;
int bank;
/* configure the CPU */
sound_cpu = machine.device("narc1cpu");
soundalt_cpu = machine.device("narc2cpu");
state->sound_cpu = machine.device("narc1cpu");
state->soundalt_cpu = machine.device("narc2cpu");
/* configure master CPU banks */
ROM = machine.region("narc1cpu")->base();
@ -334,19 +340,20 @@ void williams_narc_init(running_machine &machine)
memory_set_bankptr(machine, "bank8", &ROM[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]);
/* register for save states */
state_save_register_global(machine, williams_sound_int_state);
state_save_register_global(machine, audio_talkback);
state_save_register_global(machine, audio_sync);
state_save_register_global(machine, state->sound_int_state);
state_save_register_global(machine, state->audio_talkback);
state_save_register_global(machine, state->audio_sync);
}
void williams_adpcm_init(running_machine &machine)
{
williams_audio_state *state = &audio;
UINT8 *ROM;
/* configure the CPU */
sound_cpu = machine.device("adpcm");
soundalt_cpu = NULL;
state->sound_cpu = machine.device("adpcm");
state->soundalt_cpu = NULL;
/* configure banks */
ROM = machine.region("adpcm")->base();
@ -373,18 +380,22 @@ void williams_adpcm_init(running_machine &machine)
memcpy(ROM + 0x020000, ROM + 0x060000, 0x20000);
/* register for save states */
state_save_register_global(machine, williams_sound_int_state);
state_save_register_global(machine, audio_talkback);
state_save_register_global(machine, state->sound_int_state);
state_save_register_global(machine, state->audio_talkback);
}
static void init_audio_state(running_machine &machine)
{
williams_audio_state *state = &audio;
device_t *sound_cpu = state->sound_cpu;
device_t *soundalt_cpu = state->soundalt_cpu;
/* reset the YM2151 state */
devtag_reset(machine, "ymsnd");
/* clear all the interrupts */
williams_sound_int_state = 0;
state->sound_int_state = 0;
if (sound_cpu != NULL)
{
device_set_input_line(sound_cpu, M6809_FIRQ_LINE, CLEAR_LINE);
@ -413,13 +424,17 @@ static void cvsd_ym2151_irq(device_t *device, int state)
static WRITE_LINE_DEVICE_HANDLER( cvsd_irqa )
{
device_set_input_line(sound_cpu, M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
williams_audio_state *sndstate = &audio;
device_set_input_line(sndstate->sound_cpu, M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
}
static WRITE_LINE_DEVICE_HANDLER( cvsd_irqb )
{
device_set_input_line(sound_cpu, INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE);
williams_audio_state *sndstate = &audio;
device_set_input_line(sndstate->sound_cpu, INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -430,7 +445,9 @@ static WRITE_LINE_DEVICE_HANDLER( cvsd_irqb )
static void adpcm_ym2151_irq(device_t *device, int state)
{
device_set_input_line(sound_cpu, M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
williams_audio_state *sndstate = &audio;
device_set_input_line(sndstate->sound_cpu, M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -447,7 +464,9 @@ static WRITE8_HANDLER( cvsd_bank_select_w )
static WRITE8_DEVICE_HANDLER( cvsd_talkback_w )
{
audio_talkback = data;
williams_audio_state *state = &audio;
state->audio_talkback = data;
logerror("CVSD Talkback = %02X\n", data);
}
@ -484,9 +503,10 @@ void williams_cvsd_data_w(running_machine &machine, int data)
}
void williams_cvsd_reset_w(int state)
void williams_cvsd_reset_w(running_machine &machine, int state)
{
address_space *space = sound_cpu->memory().space(AS_PROGRAM);
williams_audio_state *sndstate = &audio;
address_space *space = sndstate->sound_cpu->memory().space(AS_PROGRAM);
/* going high halts the CPU */
if (state)
@ -520,42 +540,54 @@ static WRITE8_HANDLER( narc_slave_bank_select_w )
static READ8_HANDLER( narc_command_r )
{
device_set_input_line(sound_cpu, M6809_IRQ_LINE, CLEAR_LINE);
williams_sound_int_state = 0;
williams_audio_state *state = &audio;
device_set_input_line(state->sound_cpu, M6809_IRQ_LINE, CLEAR_LINE);
state->sound_int_state = 0;
return soundlatch_r(space, 0);
}
static WRITE8_HANDLER( narc_command2_w )
{
williams_audio_state *state = &audio;
soundlatch2_w(space, 0, data & 0xff);
device_set_input_line(soundalt_cpu, M6809_FIRQ_LINE, ASSERT_LINE);
device_set_input_line(state->soundalt_cpu, M6809_FIRQ_LINE, ASSERT_LINE);
}
static READ8_HANDLER( narc_command2_r )
{
device_set_input_line(soundalt_cpu, M6809_FIRQ_LINE, CLEAR_LINE);
williams_audio_state *state = &audio;
device_set_input_line(state->soundalt_cpu, M6809_FIRQ_LINE, CLEAR_LINE);
return soundlatch2_r(space, 0);
}
static WRITE8_HANDLER( narc_master_talkback_w )
{
audio_talkback = data;
williams_audio_state *state = &audio;
state->audio_talkback = data;
logerror("Master Talkback = %02X\n", data);
}
static TIMER_CALLBACK( narc_sync_clear )
{
audio_sync &= ~param;
williams_audio_state *state = &audio;
state->audio_sync &= ~param;
}
static WRITE8_HANDLER( narc_master_sync_w )
{
williams_audio_state *state = &audio;
space->machine().scheduler().timer_set(attotime::from_double(TIME_OF_74LS123(180000, 0.000001)), FUNC(narc_sync_clear), 0x01);
audio_sync |= 0x01;
state->audio_sync |= 0x01;
logerror("Master sync = %02X\n", data);
}
@ -568,8 +600,10 @@ static WRITE8_HANDLER( narc_slave_talkback_w )
static WRITE8_HANDLER( narc_slave_sync_w )
{
williams_audio_state *state = &audio;
space->machine().scheduler().timer_set(attotime::from_double(TIME_OF_74LS123(180000, 0.000001)), FUNC(narc_sync_clear), 0x02);
audio_sync |= 0x02;
state->audio_sync |= 0x02;
logerror("Slave sync = %02X\n", data);
}
@ -579,8 +613,10 @@ static WRITE8_HANDLER( narc_slave_sync_w )
NARC COMMUNICATIONS
****************************************************************************/
void williams_narc_data_w(int data)
void williams_narc_data_w(running_machine &machine, int data)
{
williams_audio_state *state = &audio;
device_t *sound_cpu = state->sound_cpu;
address_space *space = sound_cpu->memory().space(AS_PROGRAM);
soundlatch_w(space, 0, data & 0xff);
@ -588,13 +624,17 @@ void williams_narc_data_w(int data)
if (!(data & 0x200))
{
device_set_input_line(sound_cpu, M6809_IRQ_LINE, ASSERT_LINE);
williams_sound_int_state = 1;
state->sound_int_state = 1;
}
}
void williams_narc_reset_w(int state)
void williams_narc_reset_w(running_machine &machine, int state)
{
williams_audio_state *sndstate = &audio;
device_t *sound_cpu = sndstate->sound_cpu;
device_t *soundalt_cpu = sndstate->soundalt_cpu;
/* going high halts the CPU */
if (state)
{
@ -614,9 +654,11 @@ void williams_narc_reset_w(int state)
}
int williams_narc_talkback_r(void)
int williams_narc_talkback_r(running_machine &machine)
{
return audio_talkback | (audio_sync << 8);
williams_audio_state *state = &audio;
return state->audio_talkback | (state->audio_sync << 8);
}
@ -639,12 +681,16 @@ static WRITE8_DEVICE_HANDLER( adpcm_6295_bank_select_w )
static TIMER_CALLBACK( clear_irq_state )
{
williams_sound_int_state = 0;
williams_audio_state *state = &audio;
state->sound_int_state = 0;
}
static READ8_HANDLER( adpcm_command_r )
{
williams_audio_state *state = &audio;
device_t *sound_cpu = state->sound_cpu;
device_set_input_line(sound_cpu, M6809_IRQ_LINE, CLEAR_LINE);
/* don't clear the external IRQ state for a short while; this allows the
@ -656,7 +702,8 @@ static READ8_HANDLER( adpcm_command_r )
static WRITE8_HANDLER( adpcm_talkback_w )
{
audio_talkback = data;
williams_audio_state *state = &audio;
state->audio_talkback = data;
logerror("ADPCM Talkback = %02X\n", data);
}
@ -666,21 +713,26 @@ static WRITE8_HANDLER( adpcm_talkback_w )
ADPCM COMMUNICATIONS
****************************************************************************/
void williams_adpcm_data_w(int data)
void williams_adpcm_data_w(running_machine &machine, int data)
{
williams_audio_state *state = &audio;
device_t *sound_cpu = state->sound_cpu;
address_space *space = sound_cpu->memory().space(AS_PROGRAM);
soundlatch_w(space, 0, data & 0xff);
if (!(data & 0x200))
{
device_set_input_line(sound_cpu, M6809_IRQ_LINE, ASSERT_LINE);
williams_sound_int_state = 1;
state->sound_int_state = 1;
space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
}
}
void williams_adpcm_reset_w(int state)
void williams_adpcm_reset_w(running_machine &machine, int state)
{
williams_audio_state *sndstate = &audio;
device_t *sound_cpu = sndstate->sound_cpu;
/* going high halts the CPU */
if (state)
{
@ -695,7 +747,8 @@ void williams_adpcm_reset_w(int state)
}
int williams_adpcm_sound_irq_r(void)
int williams_adpcm_sound_irq_r(running_machine &machine)
{
return williams_sound_int_state;
williams_audio_state *state = &audio;
return state->sound_int_state;
}

14
src/mame/audio/williams.h
View File

@ -10,14 +10,14 @@ MACHINE_CONFIG_EXTERN( williams_narc_sound );
void williams_cvsd_init(running_machine &machine);
void williams_cvsd_data_w(running_machine &machine, int data);
void williams_cvsd_reset_w(int state);
void williams_cvsd_reset_w(running_machine &machine, int state);
void williams_adpcm_init(running_machine &machine);
void williams_adpcm_data_w(int data);
void williams_adpcm_reset_w(int state);
int williams_adpcm_sound_irq_r(void);
void williams_adpcm_data_w(running_machine &machine, int data);
void williams_adpcm_reset_w(running_machine &machine, int state);
int williams_adpcm_sound_irq_r(running_machine &machine);
void williams_narc_init(running_machine &machine);
void williams_narc_data_w(int data);
void williams_narc_reset_w(int state);
int williams_narc_talkback_r(void);
void williams_narc_data_w(running_machine &machine, int data);
void williams_narc_reset_w(running_machine &machine, int state);
int williams_narc_talkback_r(running_machine &machine);

8
src/mame/drivers/atarigt.c
View File

@ -204,7 +204,7 @@ static WRITE32_HANDLER( latch_w )
if (ACCESSING_BITS_16_23)
{
// cage_reset_w(data & 0x00100000);
//cage_reset_w(space, data & 0x00100000);
coin_counter_w(space->machine(), 0, data & 0x00080000);
coin_counter_w(space->machine(), 1, data & 0x00010000);
}
@ -238,9 +238,9 @@ static READ32_HANDLER( sound_data_r )
UINT32 result = 0;
if (ACCESSING_BITS_0_15)
result |= cage_control_r();
result |= cage_control_r(space->machine());
if (ACCESSING_BITS_16_31)
result |= main_from_cage_r(space) << 16;
result |= cage_main_r(space) << 16;
return result;
}
@ -250,7 +250,7 @@ static WRITE32_HANDLER( sound_data_w )
if (ACCESSING_BITS_0_15)
cage_control_w(space->machine(), data);
if (ACCESSING_BITS_16_31)
main_to_cage_w(data >> 16);
cage_main_w(space, data >> 16);
}

9
src/mame/drivers/exidy440.c
View File

@ -345,8 +345,9 @@ static READ8_HANDLER( exidy440_input_port_3_r )
static READ8_HANDLER( sound_command_ack_r )
{
exidy440_state *state = space->machine().driver_data<exidy440_state>();
/* sound command acknowledgements come on bit 3 here */
return exidy440_sound_command_ack() ? 0xf7 : 0xff;
return exidy440_sound_command_ack(state->m_custom) ? 0xf7 : 0xff;
}
@ -359,7 +360,8 @@ static READ8_HANDLER( sound_command_ack_r )
static TIMER_CALLBACK( delayed_sound_command_w )
{
exidy440_sound_command(machine, param);
exidy440_state *state = machine.driver_data<exidy440_state>();
exidy440_sound_command(state->m_custom, param);
}
@ -447,8 +449,11 @@ static WRITE8_HANDLER( topsecex_yscroll_w )
static MACHINE_START( exidy440 )
{
exidy440_state *state = machine.driver_data<exidy440_state>();
/* the EEROM lives in the uppermost 8k of the top bank */
UINT8 *rom = machine.region("maincpu")->base();
state->m_custom = machine.device("custom");
machine.device<nvram_device>("nvram")->set_base(&rom[0x10000 + 15 * 0x4000 + 0x2000], 0x2000);
}

6
src/mame/drivers/kinst.c
View File

@ -335,7 +335,7 @@ static READ32_HANDLER( kinst_control_r )
case 2: /* $90 -- sound return */
result = input_port_read(space->machine(), portnames[offset]);
result &= ~0x0002;
if (dcs_control_r() & 0x800)
if (dcs_control_r(space->machine()) & 0x800)
result |= 0x0002;
break;
@ -376,12 +376,12 @@ static WRITE32_HANDLER( kinst_control_w )
break;
case 1: /* $88 - sound reset */
dcs_reset_w(~data & 0x01);
dcs_reset_w(space->machine(), ~data & 0x01);
break;
case 2: /* $90 - sound control */
if (!(olddata & 0x02) && (state->m_control[offset] & 0x02))
dcs_data_w(state->m_control[3]);
dcs_data_w(space->machine(), state->m_control[3]);
break;
case 3: /* $98 - sound data */

126
src/mame/drivers/m72.c
View File

@ -453,8 +453,8 @@ static int find_sample(int num)
static INTERRUPT_GEN(fake_nmi)
{
address_space *space = device->memory().space(AS_PROGRAM);
int sample = m72_sample_r(space,0);
m72_state *state = device->machine().driver_data<m72_state>();
int sample = m72_sample_r(state->m_audio,0);
if (sample)
m72_sample_w(device->machine().device("dac"),0,sample);
}
@ -462,68 +462,77 @@ static INTERRUPT_GEN(fake_nmi)
static WRITE16_HANDLER( bchopper_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[6] = { 0x0000, 0x0010, 0x2510, 0x6510, 0x8510, 0x9310 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 6) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 6) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( nspirit_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[9] = { 0x0000, 0x0020, 0x2020, 0, 0x5720, 0, 0x7b60, 0x9b60, 0xc360 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 9) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 9) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( imgfight_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[7] = { 0x0000, 0x0020, 0x44e0, 0x98a0, 0xc820, 0xf7a0, 0x108c0 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 7) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 7) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( loht_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[7] = { 0x0000, 0x0020, 0, 0x2c40, 0x4320, 0x7120, 0xb200 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 7) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 7) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( xmultiplm72_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[3] = { 0x0000, 0x0020, 0x1a40 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 3) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 3) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( dbreedm72_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[9] = { 0x00000, 0x00020, 0x02c40, 0x08160, 0x0c8c0, 0x0ffe0, 0x13000, 0x15820, 0x15f40 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 9) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 9) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( airduel_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[16] = {
0x00000, 0x00020, 0x03ec0, 0x05640, 0x06dc0, 0x083a0, 0x0c000, 0x0eb60,
0x112e0, 0x13dc0, 0x16520, 0x16d60, 0x18ae0, 0x1a5a0, 0x1bf00, 0x1c340 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 16) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 16) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( dkgenm72_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[28] = {
0x00000, 0x00020, 0x01800, 0x02da0, 0x03be0, 0x05ae0, 0x06100, 0x06de0,
0x07260, 0x07a60, 0x08720, 0x0a5c0, 0x0c3c0, 0x0c7a0, 0x0e140, 0x0fb00,
0x10fa0, 0x10fc0, 0x10fe0, 0x11f40, 0x12b20, 0x130a0, 0x13c60, 0x14740,
0x153c0, 0x197e0, 0x1af40, 0x1c080 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 28) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 28) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
static WRITE16_HANDLER( gallop_sample_trigger_w )
{
m72_state *state = space->machine().driver_data<m72_state>();
static const int a[31] = {
0x00000, 0x00020, 0x00040, 0x01360, 0x02580, 0x04f20, 0x06240, 0x076e0,
0x08660, 0x092a0, 0x09ba0, 0x0a560, 0x0cee0, 0x0de20, 0x0e620, 0x0f1c0,
0x10200, 0x10220, 0x10240, 0x11380, 0x12760, 0x12780, 0x127a0, 0x13c40,
0x140a0, 0x16760, 0x17e40, 0x18ee0, 0x19f60, 0x1bbc0, 0x1cee0 };
if (ACCESSING_BITS_0_7 && (data & 0xff) < 31) m72_set_sample_start(a[data & 0xff]);
if (ACCESSING_BITS_0_7 && (data & 0xff) < 31) m72_set_sample_start(state->m_audio, a[data & 0xff]);
}
@ -998,7 +1007,7 @@ static ADDRESS_MAP_START( m72_portmap, AS_IO, 16 )
AM_RANGE(0x00, 0x01) AM_READ_PORT("IN0")
AM_RANGE(0x02, 0x03) AM_READ_PORT("IN1")
AM_RANGE(0x04, 0x05) AM_READ_PORT("DSW")
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x02, 0x03) AM_WRITE(m72_port02_w) /* coin counters, reset sound cpu, other stuff? */
AM_RANGE(0x04, 0x05) AM_WRITE(m72_dmaon_w)
AM_RANGE(0x06, 0x07) AM_WRITE(m72_irq_line_w)
@ -1014,7 +1023,7 @@ static ADDRESS_MAP_START( rtype2_portmap, AS_IO, 16 )
AM_RANGE(0x00, 0x01) AM_READ_PORT("IN0")
AM_RANGE(0x02, 0x03) AM_READ_PORT("IN1")
AM_RANGE(0x04, 0x05) AM_READ_PORT("DSW")
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x02, 0x03) AM_WRITE(rtype2_port02_w)
AM_RANGE(0x40, 0x43) AM_WRITENOP /* Interrupt controller, only written to at bootup */
AM_RANGE(0x80, 0x81) AM_WRITE(m72_scrolly1_w)
@ -1027,7 +1036,7 @@ static ADDRESS_MAP_START( poundfor_portmap, AS_IO, 16 )
AM_RANGE(0x02, 0x03) AM_READ_PORT("IN1")
AM_RANGE(0x04, 0x05) AM_READ_PORT("DSW")
AM_RANGE(0x08, 0x0f) AM_READ(poundfor_trackball_r)
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x02, 0x03) AM_WRITE(rtype2_port02_w)
AM_RANGE(0x40, 0x43) AM_WRITENOP /* Interrupt controller, only written to at bootup */
AM_RANGE(0x80, 0x81) AM_WRITE(m72_scrolly1_w)
@ -1040,7 +1049,7 @@ static ADDRESS_MAP_START( majtitle_portmap, AS_IO, 16 )
AM_RANGE(0x00, 0x01) AM_READ_PORT("IN0")
AM_RANGE(0x02, 0x03) AM_READ_PORT("IN1")
AM_RANGE(0x04, 0x05) AM_READ_PORT("DSW")
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x02, 0x03) AM_WRITE(rtype2_port02_w)
AM_RANGE(0x40, 0x43) AM_WRITENOP /* Interrupt controller, only written to at bootup */
AM_RANGE(0x80, 0x81) AM_WRITE(m72_scrolly1_w)
@ -1054,7 +1063,7 @@ static ADDRESS_MAP_START( hharry_portmap, AS_IO, 16 )
AM_RANGE(0x00, 0x01) AM_READ_PORT("IN0")
AM_RANGE(0x02, 0x03) AM_READ_PORT("IN1")
AM_RANGE(0x04, 0x05) AM_READ_PORT("DSW")
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x02, 0x03) AM_WRITE(rtype2_port02_w) /* coin counters, reset sound cpu, other stuff? */
AM_RANGE(0x04, 0x05) AM_WRITE(m72_dmaon_w)
AM_RANGE(0x06, 0x07) AM_WRITE(m72_irq_line_w)
@ -1069,7 +1078,7 @@ static ADDRESS_MAP_START( kengo_portmap, AS_IO, 16 )
AM_RANGE(0x00, 0x01) AM_READ_PORT("IN0")
AM_RANGE(0x02, 0x03) AM_READ_PORT("IN1")
AM_RANGE(0x04, 0x05) AM_READ_PORT("DSW")
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x02, 0x03) AM_WRITE(rtype2_port02_w)
AM_RANGE(0x80, 0x81) AM_WRITE(m72_scrolly1_w)
AM_RANGE(0x82, 0x83) AM_WRITE(m72_scrollx1_w)
@ -1092,36 +1101,36 @@ static ADDRESS_MAP_START( rtype_sound_portmap, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x02, 0x02) AM_READ(soundlatch_r)
AM_RANGE(0x06, 0x06) AM_WRITE(m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r)
AM_RANGE(0x06, 0x06) AM_DEVWRITE("m72", m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_DEVREAD("m72", m72_sample_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_portmap, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x02, 0x02) AM_READ(soundlatch_r)
AM_RANGE(0x06, 0x06) AM_WRITE(m72_sound_irq_ack_w)
AM_RANGE(0x06, 0x06) AM_DEVWRITE("m72", m72_sound_irq_ack_w)
AM_RANGE(0x82, 0x82) AM_DEVWRITE("dac", m72_sample_w)
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r)
AM_RANGE(0x84, 0x84) AM_DEVREAD("m72", m72_sample_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( rtype2_sound_portmap, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x80, 0x80) AM_READ(soundlatch_r)
AM_RANGE(0x80, 0x81) AM_WRITE(rtype2_sample_addr_w)
AM_RANGE(0x80, 0x81) AM_DEVWRITE("m72", rtype2_sample_addr_w)
AM_RANGE(0x82, 0x82) AM_DEVWRITE("dac", m72_sample_w)
AM_RANGE(0x83, 0x83) AM_WRITE(m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r)
AM_RANGE(0x83, 0x83) AM_DEVWRITE("m72", m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_DEVREAD("m72", m72_sample_r)
// AM_RANGE(0x87, 0x87) AM_WRITENOP /* ??? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( poundfor_sound_portmap, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x10, 0x13) AM_WRITE(poundfor_sample_addr_w)
AM_RANGE(0x10, 0x13) AM_DEVWRITE("m72", poundfor_sample_addr_w)
AM_RANGE(0x40, 0x41) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x42, 0x42) AM_READ(soundlatch_r)
AM_RANGE(0x42, 0x42) AM_WRITE(m72_sound_irq_ack_w)
AM_RANGE(0x42, 0x42) AM_DEVWRITE("m72", m72_sound_irq_ack_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_io_map, AS_IO, 8 )
@ -1859,9 +1868,6 @@ static MACHINE_CONFIG_START( m72_base, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(m72)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(m72)
MCFG_PALETTE_LENGTH(512)
@ -1876,6 +1882,8 @@ static MACHINE_CONFIG_START( m72_base, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -1916,9 +1924,6 @@ static MACHINE_CONFIG_START( rtype, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(m72)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(m72)
MCFG_PALETTE_LENGTH(512)
@ -1933,6 +1938,8 @@ static MACHINE_CONFIG_START( rtype, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -1955,9 +1962,6 @@ static MACHINE_CONFIG_START( xmultipl, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(xmultipl)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(m72)
MCFG_PALETTE_LENGTH(512)
@ -1972,6 +1976,8 @@ static MACHINE_CONFIG_START( xmultipl, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -1998,9 +2004,6 @@ static MACHINE_CONFIG_START( xmultiplm72, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(xmultipl)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(m72)
MCFG_PALETTE_LENGTH(512)
@ -2015,6 +2018,8 @@ static MACHINE_CONFIG_START( xmultiplm72, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2041,9 +2046,6 @@ static MACHINE_CONFIG_START( dbreed, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(xmultipl)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(rtype2)
MCFG_PALETTE_LENGTH(512)
@ -2058,6 +2060,8 @@ static MACHINE_CONFIG_START( dbreed, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2084,9 +2088,6 @@ static MACHINE_CONFIG_START( dbreedm72, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(xmultipl)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(m72)
MCFG_PALETTE_LENGTH(512)
@ -2101,6 +2102,8 @@ static MACHINE_CONFIG_START( dbreedm72, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2127,9 +2130,6 @@ static MACHINE_CONFIG_START( rtype2, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(m72)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(rtype2)
MCFG_PALETTE_LENGTH(512)
@ -2144,6 +2144,8 @@ static MACHINE_CONFIG_START( rtype2, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2170,9 +2172,6 @@ static MACHINE_CONFIG_START( majtitle, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(m72)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(majtitle)
MCFG_PALETTE_LENGTH(512)
@ -2187,6 +2186,8 @@ static MACHINE_CONFIG_START( majtitle, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2213,9 +2214,6 @@ static MACHINE_CONFIG_START( hharry, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(xmultipl)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(rtype2)
MCFG_PALETTE_LENGTH(512)
@ -2230,6 +2228,8 @@ static MACHINE_CONFIG_START( hharry, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2256,9 +2256,6 @@ static MACHINE_CONFIG_START( hharryu, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(xmultipl)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(rtype2)
MCFG_PALETTE_LENGTH(512)
@ -2273,6 +2270,8 @@ static MACHINE_CONFIG_START( hharryu, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2299,9 +2298,6 @@ static MACHINE_CONFIG_START( dkgenm72, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(xmultipl)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(m72)
MCFG_PALETTE_LENGTH(512)
@ -2316,6 +2312,8 @@ static MACHINE_CONFIG_START( dkgenm72, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2342,9 +2340,6 @@ static MACHINE_CONFIG_START( poundfor, m72_state )
MCFG_MACHINE_START(m72)
MCFG_MACHINE_RESET(m72)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(rtype2)
MCFG_PALETTE_LENGTH(512)
@ -2359,6 +2354,8 @@ static MACHINE_CONFIG_START( poundfor, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
@ -2385,9 +2382,6 @@ static MACHINE_CONFIG_START( cosmccop, m72_state )
MCFG_MACHINE_START(kengo)
MCFG_MACHINE_RESET(kengo)
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_GFXDECODE(rtype2)
MCFG_PALETTE_LENGTH(512)
@ -2402,6 +2396,8 @@ static MACHINE_CONFIG_START( cosmccop, m72_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0);
MCFG_SOUND_ADD("ymsnd", YM2151, SOUND_CLOCK)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)

23
src/mame/drivers/m90.c
View File

@ -109,7 +109,7 @@ static ADDRESS_MAP_START( bomblord_main_cpu_map, AS_PROGRAM, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( m90_main_cpu_io_map, AS_IO, 16 )
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_READ_PORT("P1_P2")
AM_RANGE(0x02, 0x03) AM_WRITE(m90_coincounter_w)
AM_RANGE(0x02, 0x03) AM_READ_PORT("SYSTEM")
@ -120,7 +120,7 @@ static ADDRESS_MAP_START( m90_main_cpu_io_map, AS_IO, 16 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( dynablsb_cpu_io_map, AS_IO, 16 )
AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_DEVWRITE("m72", m72_sound_command_w)
AM_RANGE(0x00, 0x01) AM_READ_PORT("P1_P2")
AM_RANGE(0x02, 0x03) AM_WRITE(m90_coincounter_w)
AM_RANGE(0x02, 0x03) AM_READ_PORT("SYSTEM")
@ -142,19 +142,19 @@ static ADDRESS_MAP_START( m90_sound_cpu_io_map, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x80, 0x80) AM_READ(soundlatch_r)
AM_RANGE(0x80, 0x81) AM_WRITE(rtype2_sample_addr_w)
AM_RANGE(0x82, 0x82) AM_DEVWRITE("dac", m72_sample_w)
AM_RANGE(0x83, 0x83) AM_WRITE(m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r)
AM_RANGE(0x80, 0x81) AM_DEVWRITE("m72", rtype2_sample_addr_w)
AM_RANGE(0x82, 0x82) AM_DEVWRITE("m72", m72_sample_w)
AM_RANGE(0x83, 0x83) AM_DEVWRITE("m72", m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_DEVREAD("m72", m72_sample_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( bbmanw_sound_io_map, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x40, 0x41) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x42, 0x42) AM_READWRITE(soundlatch_r, m72_sound_irq_ack_w)
AM_RANGE(0x42, 0x42) AM_READ(soundlatch_r) AM_DEVWRITE("m72", m72_sound_irq_ack_w)
// AM_RANGE(0x40, 0x41) AM_WRITE(rtype2_sample_addr_w)
// AM_RANGE(0x41, 0x41) AM_READ(m72_sample_r)
// AM_RANGE(0x42, 0x42) AM_DEVWRITE("dac", m72_sample_w)
// AM_RANGE(0x41, 0x41) AM_DEVREAD("m72", m72_sample_r)
// AM_RANGE(0x42, 0x42) AM_DEVWRITE("m72", m72_sample_w)
ADDRESS_MAP_END
/*****************************************************************************/
@ -709,9 +709,6 @@ static MACHINE_CONFIG_START( m90, m90_state )
MCFG_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -729,6 +726,8 @@ static MACHINE_CONFIG_START( m90, m90_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("m72", M72, 0)
MCFG_SOUND_ADD("ymsnd", YM2151, XTAL_3_579545MHz) /* verified on pcb */
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "mono", 0.15)

2
src/mame/drivers/mcr68.c
View File

@ -210,7 +210,7 @@ static WRITE16_HANDLER( archrivl_control_w )
{
mcr68_state *state = space->machine().driver_data<mcr68_state>();
COMBINE_DATA(&state->m_control_word);
williams_cvsd_reset_w(~state->m_control_word & 0x0400);
williams_cvsd_reset_w(space->machine(), ~state->m_control_word & 0x0400);
williams_cvsd_data_w(space->machine(), state->m_control_word & 0x3ff);
}

6
src/mame/drivers/metalmx.c
View File

@ -351,9 +351,9 @@ static READ32_HANDLER( sound_data_r )
UINT32 result = 0;
if (ACCESSING_BITS_0_15)
result |= cage_control_r();
result |= cage_control_r(space->machine());
if (ACCESSING_BITS_16_31)
result |= main_from_cage_r(space) << 16;
result |= cage_main_r(space) << 16;
return result;
}
@ -362,7 +362,7 @@ static WRITE32_HANDLER( sound_data_w )
if (ACCESSING_BITS_0_15)
cage_control_w(space->machine(), data);
if (ACCESSING_BITS_16_31)
main_to_cage_w(data >> 16);
cage_main_w(space, data >> 16);
}
static void cage_irq_callback(running_machine &machine, int reason)

14
src/mame/drivers/midvunit.c
View File

@ -53,8 +53,8 @@ static MACHINE_START( midvunit )
static MACHINE_RESET( midvunit )
{
midvunit_state *state = machine.driver_data<midvunit_state>();
dcs_reset_w(1);
dcs_reset_w(0);
dcs_reset_w(machine, 1);
dcs_reset_w(machine, 0);
memcpy(state->m_ram_base, machine.region("user1")->base(), 0x20000*4);
machine.device("maincpu")->reset();
@ -67,8 +67,8 @@ static MACHINE_RESET( midvunit )
static MACHINE_RESET( midvplus )
{
midvunit_state *state = machine.driver_data<midvunit_state>();
dcs_reset_w(1);
dcs_reset_w(0);
dcs_reset_w(machine, 1);
dcs_reset_w(machine, 0);
memcpy(state->m_ram_base, machine.region("user1")->base(), 0x20000*4);
machine.device("maincpu")->reset();
@ -203,7 +203,7 @@ static WRITE32_HANDLER( midvunit_control_w )
watchdog_reset_w(space, 0, 0);
/* bit 1 is the DCS sound reset */
dcs_reset_w((~state->m_control_data >> 1) & 1);
dcs_reset_w(space->machine(), (~state->m_control_data >> 1) & 1);
/* log anything unusual */
if ((olddata ^ state->m_control_data) & ~0x00e8)
@ -218,7 +218,7 @@ static WRITE32_HANDLER( crusnwld_control_w )
COMBINE_DATA(&state->m_control_data);
/* bit 11 is the DCS sound reset */
dcs_reset_w((~state->m_control_data >> 11) & 1);
dcs_reset_w(space->machine(), (~state->m_control_data >> 11) & 1);
/* bit 9 is the watchdog */
if ((olddata ^ state->m_control_data) & 0x0200)
@ -235,7 +235,7 @@ static WRITE32_HANDLER( crusnwld_control_w )
static WRITE32_HANDLER( midvunit_sound_w )
{
logerror("Sound W = %02X\n", data);
dcs_data_w(data & 0xff);
dcs_data_w(space->machine(), data & 0xff);
}

6
src/mame/drivers/midyunit.c
View File

@ -152,19 +152,19 @@ static WRITE8_DEVICE_HANDLER( yawdim_oki_bank_w )
static CUSTOM_INPUT( narc_talkback_strobe_r )
{
return (williams_narc_talkback_r() >> 8) & 1;
return (williams_narc_talkback_r(field->port->machine()) >> 8) & 1;
}
static CUSTOM_INPUT( narc_talkback_data_r )
{
return williams_narc_talkback_r() & 0xff;
return williams_narc_talkback_r(field->port->machine()) & 0xff;
}
static CUSTOM_INPUT( adpcm_irq_state_r )
{
return williams_adpcm_sound_irq_r() & 1;
return williams_adpcm_sound_irq_r(field->port->machine()) & 1;
}

4
src/mame/drivers/seattle.c
View File

@ -555,8 +555,8 @@ static MACHINE_RESET( seattle )
/* reset either the DCS2 board or the CAGE board */
if (machine.device("dcs2") != NULL)
{
dcs_reset_w(1);
dcs_reset_w(0);
dcs_reset_w(machine, 1);
dcs_reset_w(machine, 0);
}
else if (machine.device("cage") != NULL)
{

59
src/mame/drivers/segag80r.c
View File

@ -160,12 +160,6 @@ static MACHINE_START( g80r )
}
static MACHINE_RESET( pignewt )
{
sega_usb_reset(machine, 0x10);
}
/*************************************
*
@ -196,7 +190,7 @@ static WRITE8_HANDLER( vidram_w ) { segag80r_videoram_w(space, decrypt_
static WRITE8_HANDLER( monsterb_vidram_w ) { monsterb_videoram_w(space, decrypt_offset(space, offset), data); }
static WRITE8_HANDLER( pignewt_vidram_w ) { pignewt_videoram_w(space, decrypt_offset(space, offset), data); }
static WRITE8_HANDLER( sindbadm_vidram_w ) { sindbadm_videoram_w(space, decrypt_offset(space, offset), data); }
static WRITE8_HANDLER( usb_ram_w ) { sega_usb_ram_w(space, decrypt_offset(space, offset), data); }
static WRITE8_DEVICE_HANDLER( usb_ram_w ) { sega_usb_ram_w(device, decrypt_offset(device->machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
@ -916,7 +910,6 @@ static MACHINE_CONFIG_DERIVED( pignewt, g80r_base )
MCFG_PALETTE_LENGTH(64+64)
/* sound boards */
MCFG_MACHINE_RESET(pignewt)
MCFG_FRAGMENT_ADD(sega_universal_sound_board)
MACHINE_CONFIG_END
@ -1439,6 +1432,8 @@ static void monsterb_expand_gfx(running_machine &machine, const char *region)
static DRIVER_INIT( astrob )
{
segag80r_state *state = machine.driver_data<segag80r_state>();
device_t *speech = machine.device("segaspeech");
address_space *iospace = machine.device("maincpu")->memory().space(AS_IO);
/* configure the 315-0062 security chip */
state->m_decrypt = segag80_security(62);
@ -1447,11 +1442,11 @@ static DRIVER_INIT( astrob )
state->m_background_pcb = G80_BACKGROUND_NONE;
/* install speech board */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0x38, 0x38, FUNC(sega_speech_data_w));
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0x3b, 0x3b, FUNC(sega_speech_control_w));
iospace->install_legacy_write_handler(*speech, 0x38, 0x38, FUNC(sega_speech_data_w));
iospace->install_legacy_write_handler(*speech, 0x3b, 0x3b, FUNC(sega_speech_control_w));
/* install Astro Blaster sound board */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0x3e, 0x3f, FUNC(astrob_sound_w));
iospace->install_legacy_write_handler(0x3e, 0x3f, FUNC(astrob_sound_w));
}
@ -1470,6 +1465,7 @@ static DRIVER_INIT( 005 )
static DRIVER_INIT( spaceod )
{
segag80r_state *state = machine.driver_data<segag80r_state>();
address_space *iospace = machine.device("maincpu")->memory().space(AS_IO);
/* configure the 315-0063 security chip */
state->m_decrypt = segag80_security(63);
@ -1478,20 +1474,22 @@ static DRIVER_INIT( spaceod )
state->m_background_pcb = G80_BACKGROUND_SPACEOD;
/* configure ports for the background board */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_readwrite_handler(0x08, 0x0f, FUNC(spaceod_back_port_r), FUNC(spaceod_back_port_w));
iospace->install_legacy_readwrite_handler(0x08, 0x0f, FUNC(spaceod_back_port_r), FUNC(spaceod_back_port_w));
/* install Space Odyssey sound board */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0x0e, 0x0f, FUNC(spaceod_sound_w));
iospace->install_legacy_write_handler(0x0e, 0x0f, FUNC(spaceod_sound_w));
/* install our wacky mangled ports */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_read_handler(0xf8, 0xfb, FUNC(spaceod_mangled_ports_r));
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_read_handler(0xfc, 0xfc, FUNC(spaceod_port_fc_r));
iospace->install_legacy_read_handler(0xf8, 0xfb, FUNC(spaceod_mangled_ports_r));
iospace->install_legacy_read_handler(0xfc, 0xfc, FUNC(spaceod_port_fc_r));
}
static DRIVER_INIT( monsterb )
{
segag80r_state *state = machine.driver_data<segag80r_state>();
address_space *iospace = machine.device("maincpu")->memory().space(AS_IO);
address_space *pgmspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
/* configure the 315-0082 security chip */
state->m_decrypt = segag80_security(82);
@ -1501,14 +1499,16 @@ static DRIVER_INIT( monsterb )
monsterb_expand_gfx(machine, "gfx1");
/* install background board handlers */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0xb8, 0xbd, FUNC(monsterb_back_port_w));
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xe000, 0xffff, FUNC(monsterb_vidram_w));
iospace->install_legacy_write_handler(0xb8, 0xbd, FUNC(monsterb_back_port_w));
pgmspace->install_legacy_write_handler(0xe000, 0xffff, FUNC(monsterb_vidram_w));
}
static DRIVER_INIT( monster2 )
{
segag80r_state *state = machine.driver_data<segag80r_state>();
address_space *iospace = machine.device("maincpu")->memory().space(AS_IO);
address_space *pgmspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
/* configure the 315-5006 security chip */
spatter_decode(machine, "maincpu");
@ -1519,15 +1519,18 @@ static DRIVER_INIT( monster2 )
monsterb_expand_gfx(machine, "gfx1");
/* install background board handlers */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0xb4, 0xb5, FUNC(pignewt_back_color_w));
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0xb8, 0xbd, FUNC(pignewt_back_port_w));
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xe000, 0xffff, FUNC(pignewt_vidram_w));
iospace->install_legacy_write_handler(0xb4, 0xb5, FUNC(pignewt_back_color_w));
iospace->install_legacy_write_handler(0xb8, 0xbd, FUNC(pignewt_back_port_w));
pgmspace->install_legacy_write_handler(0xe000, 0xffff, FUNC(pignewt_vidram_w));
}
static DRIVER_INIT( pignewt )
{
segag80r_state *state = machine.driver_data<segag80r_state>();
device_t *usbsnd = machine.device("usbsnd");
address_space *iospace = machine.device("maincpu")->memory().space(AS_IO);
address_space *pgmspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
/* configure the 315-0063? security chip */
state->m_decrypt = segag80_security(63);
@ -1537,19 +1540,21 @@ static DRIVER_INIT( pignewt )
monsterb_expand_gfx(machine, "gfx1");
/* install background board handlers */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0xb4, 0xb5, FUNC(pignewt_back_color_w));
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0xb8, 0xbd, FUNC(pignewt_back_port_w));
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xe000, 0xffff, FUNC(pignewt_vidram_w));
iospace->install_legacy_write_handler(0xb4, 0xb5, FUNC(pignewt_back_color_w));
iospace->install_legacy_write_handler(0xb8, 0xbd, FUNC(pignewt_back_port_w));
pgmspace->install_legacy_write_handler(0xe000, 0xffff, FUNC(pignewt_vidram_w));
/* install Universal sound board */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_readwrite_handler(0x3f, 0x3f, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xd000, 0xdfff, FUNC(sega_usb_ram_r), FUNC(usb_ram_w));
iospace->install_legacy_readwrite_handler(*usbsnd, 0x3f, 0x3f, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
pgmspace->install_legacy_readwrite_handler(*usbsnd, 0xd000, 0xdfff, FUNC(sega_usb_ram_r), FUNC(usb_ram_w));
}
static DRIVER_INIT( sindbadm )
{
segag80r_state *state = machine.driver_data<segag80r_state>();
address_space *iospace = machine.device("maincpu")->memory().space(AS_IO);
address_space *pgmspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
/* configure the encrypted Z80 */
sindbadm_decode(machine, "maincpu");
@ -1559,8 +1564,8 @@ static DRIVER_INIT( sindbadm )
state->m_background_pcb = G80_BACKGROUND_SINDBADM;
/* install background board handlers */
machine.device("maincpu")->memory().space(AS_IO)->install_legacy_write_handler(0x40, 0x41, FUNC(sindbadm_back_port_w));
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xe000, 0xffff, FUNC(sindbadm_vidram_w));
iospace->install_legacy_write_handler(0x40, 0x41, FUNC(sindbadm_back_port_w));
pgmspace->install_legacy_write_handler(0xe000, 0xffff, FUNC(sindbadm_vidram_w));
}

45
src/mame/drivers/segag80v.c
View File

@ -178,15 +178,6 @@ static MACHINE_START( g80v )
}
static MACHINE_RESET( g80v )
{
segag80v_state *state = machine.driver_data<segag80v_state>();
/* if we have a Universal Sound Board, reset it here */
if (state->m_has_usb)
sega_usb_reset(machine, 0x10);
}
/*************************************
*
@ -213,8 +204,7 @@ static WRITE8_HANDLER( mainram_w )
state->m_mainram[decrypt_offset(space, offset)] = data;
}
static WRITE8_HANDLER( usb_ram_w ) { sega_usb_ram_w(space, decrypt_offset(space, offset), data); }
static WRITE8_DEVICE_HANDLER( usb_ram_w ) { sega_usb_ram_w(device, decrypt_offset(device->machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
static WRITE8_HANDLER( vectorram_w )
{
segag80v_state *state = space->machine().driver_data<segag80v_state>();
@ -919,7 +909,6 @@ static MACHINE_CONFIG_START( g80v_base, segag80v_state )
MCFG_CPU_VBLANK_INT("screen", irq0_line_hold)
MCFG_MACHINE_START(g80v)
MCFG_MACHINE_RESET(g80v)
/* video hardware */
MCFG_SCREEN_ADD("screen", VECTOR)
@ -1318,7 +1307,7 @@ static DRIVER_INIT( elim2 )
state->m_decrypt = segag80_security(70);
/* configure sound */
state->m_has_usb = FALSE;
state->m_usb = NULL;
iospace->install_legacy_write_handler(0x3e, 0x3e, FUNC(elim1_sh_w));
iospace->install_legacy_write_handler(0x3f, 0x3f, FUNC(elim2_sh_w));
}
@ -1333,7 +1322,7 @@ static DRIVER_INIT( elim4 )
state->m_decrypt = segag80_security(76);
/* configure sound */
state->m_has_usb = FALSE;
state->m_usb = NULL;
iospace->install_legacy_write_handler(0x3e, 0x3e, FUNC(elim1_sh_w));
iospace->install_legacy_write_handler(0x3f, 0x3f, FUNC(elim2_sh_w));
@ -1352,9 +1341,9 @@ static DRIVER_INIT( spacfury )
state->m_decrypt = segag80_security(64);
/* configure sound */
state->m_has_usb = FALSE;
iospace->install_legacy_write_handler(0x38, 0x38, FUNC(sega_speech_data_w));
iospace->install_legacy_write_handler(0x3b, 0x3b, FUNC(sega_speech_control_w));
state->m_usb = NULL;
iospace->install_legacy_write_handler(*machine.device("segaspeech"), 0x38, 0x38, FUNC(sega_speech_data_w));
iospace->install_legacy_write_handler(*machine.device("segaspeech"), 0x3b, 0x3b, FUNC(sega_speech_control_w));
iospace->install_legacy_write_handler(0x3e, 0x3e, FUNC(spacfury1_sh_w));
iospace->install_legacy_write_handler(0x3f, 0x3f, FUNC(spacfury2_sh_w));
}
@ -1370,9 +1359,9 @@ static DRIVER_INIT( zektor )
state->m_decrypt = segag80_security(82);
/* configure sound */
state->m_has_usb = FALSE;
iospace->install_legacy_write_handler(0x38, 0x38, FUNC(sega_speech_data_w));
iospace->install_legacy_write_handler(0x3b, 0x3b, FUNC(sega_speech_control_w));
state->m_usb = NULL;
iospace->install_legacy_write_handler(*machine.device("segaspeech"), 0x38, 0x38, FUNC(sega_speech_data_w));
iospace->install_legacy_write_handler(*machine.device("segaspeech"), 0x3b, 0x3b, FUNC(sega_speech_control_w));
iospace->install_legacy_write_handler(*ay, 0x3c, 0x3d, FUNC(ay8910_address_data_w));
iospace->install_legacy_write_handler(0x3e, 0x3e, FUNC(zektor1_sh_w));
iospace->install_legacy_write_handler(0x3f, 0x3f, FUNC(zektor2_sh_w));
@ -1393,9 +1382,9 @@ static DRIVER_INIT( tacscan )
state->m_decrypt = segag80_security(76);
/* configure sound */
state->m_has_usb = TRUE;
iospace->install_legacy_readwrite_handler(0x3f, 0x3f, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
pgmspace->install_legacy_readwrite_handler(0xd000, 0xdfff, FUNC(sega_usb_ram_r), FUNC(usb_ram_w));
state->m_usb = machine.device("segausb");
iospace->install_legacy_readwrite_handler(*state->m_usb, 0x3f, 0x3f, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
pgmspace->install_legacy_readwrite_handler(*state->m_usb, 0xd000, 0xdfff, FUNC(sega_usb_ram_r), FUNC(usb_ram_w));
/* configure inputs */
iospace->install_legacy_write_handler(0xf8, 0xf8, FUNC(spinner_select_w));
@ -1413,12 +1402,12 @@ static DRIVER_INIT( startrek )
state->m_decrypt = segag80_security(64);
/* configure sound */
state->m_has_usb = TRUE;
iospace->install_legacy_write_handler(0x38, 0x38, FUNC(sega_speech_data_w));
iospace->install_legacy_write_handler(0x3b, 0x3b, FUNC(sega_speech_control_w));
state->m_usb = machine.device("segausb");
iospace->install_legacy_write_handler(*machine.device("segaspeech"), 0x38, 0x38, FUNC(sega_speech_data_w));
iospace->install_legacy_write_handler(*machine.device("segaspeech"), 0x3b, 0x3b, FUNC(sega_speech_control_w));
iospace->install_legacy_readwrite_handler(0x3f, 0x3f, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
pgmspace->install_legacy_readwrite_handler(0xd000, 0xdfff, FUNC(sega_usb_ram_r), FUNC(usb_ram_w));
iospace->install_legacy_readwrite_handler(*state->m_usb, 0x3f, 0x3f, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
pgmspace->install_legacy_readwrite_handler(*state->m_usb, 0xd000, 0xdfff, FUNC(sega_usb_ram_r), FUNC(usb_ram_w));
/* configure inputs */
iospace->install_legacy_write_handler(0xf8, 0xf8, FUNC(spinner_select_w));

16
src/mame/drivers/shisen.c
View File

@ -53,7 +53,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( shisen_io_map, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(sichuan2_dsw1_r, sichuan2_coin_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("DSW2") AM_WRITE(m72_sound_command_byte_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("DSW2") AM_DEVWRITE("m72", m72_sound_command_byte_w)
AM_RANGE(0x02, 0x02) AM_READ_PORT("P1") AM_WRITE(sichuan2_bankswitch_w)
AM_RANGE(0x03, 0x03) AM_READ_PORT("P2")
AM_RANGE(0x04, 0x04) AM_READ_PORT("COIN")
@ -68,10 +68,10 @@ static ADDRESS_MAP_START( shisen_sound_io_map, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x80, 0x80) AM_READ(soundlatch_r)
AM_RANGE(0x80, 0x81) AM_WRITE(shisen_sample_addr_w)
AM_RANGE(0x82, 0x82) AM_DEVWRITE("dac", m72_sample_w)
AM_RANGE(0x83, 0x83) AM_WRITE(m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r)
AM_RANGE(0x80, 0x81) AM_DEVWRITE("m72", shisen_sample_addr_w)
AM_RANGE(0x82, 0x82) AM_DEVWRITE("m72", m72_sample_w)
AM_RANGE(0x83, 0x83) AM_DEVWRITE("m72", m72_sound_irq_ack_w)
AM_RANGE(0x84, 0x84) AM_DEVREAD("m72", m72_sample_r)
ADDRESS_MAP_END
@ -222,10 +222,6 @@ static MACHINE_CONFIG_START( shisen, shisen_state )
MCFG_CPU_IO_MAP(shisen_sound_io_map)
MCFG_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
/* IRQs are generated by main Z80 and YM2151 */
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(55)
@ -243,6 +239,8 @@ static MACHINE_CONFIG_START( shisen, shisen_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0)
MCFG_SOUND_ADD("ymsnd", YM2151, 3579545)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 0.5)

6
src/mame/drivers/vegas.c
View File

@ -577,8 +577,8 @@ static MACHINE_RESET( vegas )
/* reset the DCS system if we have one */
if (machine.device("dcs2") != NULL || machine.device("dsio") != NULL || machine.device("denver") != NULL)
{
dcs_reset_w(1);
dcs_reset_w(0);
dcs_reset_w(machine, 1);
dcs_reset_w(machine, 0);
}
/* initialize IRQ states */
@ -1313,7 +1313,7 @@ static WRITE32_HANDLER( sio_irq_clear_w )
if (!(data & 0x01))
{
midway_ioasic_reset(space->machine());
dcs_reset_w(data & 0x01);
dcs_reset_w(space->machine(), data & 0x01);
}
/* they toggle bit 0x08 low to reset the VBLANK */

35
src/mame/drivers/vigilant.c
View File

@ -72,7 +72,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( vigilant_io_map, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(m72_sound_command_byte_w) /* SD */
AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_DEVWRITE("m72", m72_sound_command_byte_w) /* SD */
AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITE(vigilant_out2_w) /* OUT2 */
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
@ -98,7 +98,7 @@ static ADDRESS_MAP_START( kikcubic_io_map, AS_IO, 8 )
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN0")
AM_RANGE(0x03, 0x03) AM_READ_PORT("IN1")
AM_RANGE(0x04, 0x04) AM_READ_PORT("IN2") AM_WRITE(vigilant_bank_select_w)
AM_RANGE(0x06, 0x06) AM_WRITE(m72_sound_command_byte_w)
AM_RANGE(0x06, 0x06) AM_DEVWRITE("m72", m72_sound_command_byte_w)
// AM_RANGE(0x07, 0x07) AM_WRITENOP /* ?? */
ADDRESS_MAP_END
@ -110,10 +110,10 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_io_map, AS_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x80, 0x81) AM_READWRITE(soundlatch_r, vigilant_sample_addr_w) /* STL / STH */
AM_RANGE(0x82, 0x82) AM_DEVWRITE("dac", m72_sample_w) /* COUNT UP */
AM_RANGE(0x83, 0x83) AM_WRITE(m72_sound_irq_ack_w) /* IRQ clear */
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r) /* S ROM C */
AM_RANGE(0x80, 0x81) AM_READ(soundlatch_r) AM_DEVWRITE("m72", vigilant_sample_addr_w) /* STL / STH */
AM_RANGE(0x82, 0x82) AM_DEVWRITE("m72", m72_sample_w) /* COUNT UP */
AM_RANGE(0x83, 0x83) AM_DEVWRITE("m72", m72_sound_irq_ack_w) /* IRQ clear */
AM_RANGE(0x84, 0x84) AM_DEVREAD("m72", m72_sample_r) /* S ROM C */
ADDRESS_MAP_END
static ADDRESS_MAP_START( buccanrs_sound_io_map, AS_IO, 8 )
@ -121,10 +121,10 @@ static ADDRESS_MAP_START( buccanrs_sound_io_map, AS_IO, 8 )
AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
AM_RANGE(0x02, 0x03) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
AM_RANGE(0x80, 0x80) AM_READ(soundlatch_r) /* SDRE */
AM_RANGE(0x80, 0x81) AM_WRITE(vigilant_sample_addr_w) /* STL / STH */
AM_RANGE(0x82, 0x82) AM_DEVWRITE("dac", m72_sample_w) /* COUNT UP */
AM_RANGE(0x83, 0x83) AM_WRITE(m72_sound_irq_ack_w) /* IRQ clear */
AM_RANGE(0x84, 0x84) AM_READ(m72_sample_r) /* S ROM C */
AM_RANGE(0x80, 0x81) AM_DEVWRITE("m72", vigilant_sample_addr_w) /* STL / STH */
AM_RANGE(0x82, 0x82) AM_DEVWRITE("m72", m72_sample_w) /* COUNT UP */
AM_RANGE(0x83, 0x83) AM_DEVWRITE("m72", m72_sound_irq_ack_w) /* IRQ clear */
AM_RANGE(0x84, 0x84) AM_DEVREAD("m72", m72_sample_r) /* S ROM C */
ADDRESS_MAP_END
@ -526,9 +526,6 @@ static MACHINE_CONFIG_START( vigilant, vigilant_state )
MCFG_CPU_IO_MAP(sound_io_map)
MCFG_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1 */
/* IRQs are generated by main Z80 and YM2151 */
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(55)
@ -547,6 +544,8 @@ static MACHINE_CONFIG_START( vigilant, vigilant_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0)
MCFG_SOUND_ADD("ymsnd", YM2151, 3579645)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 0.55)
@ -570,9 +569,6 @@ static MACHINE_CONFIG_START( buccanrs, vigilant_state )
MCFG_CPU_IO_MAP(buccanrs_sound_io_map)
MCFG_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1 */
/* IRQs are generated by main Z80 and YM2151 */
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(55)
@ -591,6 +587,8 @@ static MACHINE_CONFIG_START( buccanrs, vigilant_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0)
MCFG_SOUND_ADD("ym1", YM2203, 18432000/6)
MCFG_SOUND_CONFIG(ym2203_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 0.35)
@ -630,9 +628,6 @@ static MACHINE_CONFIG_START( kikcubic, vigilant_state )
MCFG_CPU_IO_MAP(sound_io_map)
MCFG_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1 */
/* IRQs are generated by main Z80 and YM2151 */
MCFG_SOUND_START(m72)
MCFG_SOUND_RESET(m72)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(55)
@ -651,6 +646,8 @@ static MACHINE_CONFIG_START( kikcubic, vigilant_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("m72", M72, 0)
MCFG_SOUND_ADD("ymsnd", YM2151, 3579645)
MCFG_SOUND_CONFIG(ym2151_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 0.55)

26
src/mame/drivers/zaxxon.c
View File

@ -334,13 +334,6 @@ static MACHINE_START( zaxxon )
}
static MACHINE_RESET( razmataz )
{
/* the timer value is unknown, but this seems to work well */
sega_usb_reset(machine, 0x10);
}
/*************************************
*
@ -981,8 +974,6 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( razmataz, root )
MCFG_MACHINE_RESET(razmataz)
/* video hardware */
MCFG_VIDEO_START(razmataz)
MCFG_SCREEN_MODIFY("screen")
@ -1508,19 +1499,21 @@ static DRIVER_INIT( futspy )
static DRIVER_INIT( razmataz )
{
zaxxon_state *state = machine.driver_data<zaxxon_state>();
address_space *pgmspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
device_t *usbsnd = machine.device("usbsnd");
nprinces_decode(machine, "maincpu");
/* additional input ports are wired */
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_port(0xc004, 0xc004, 0, 0x18f3, "SW04");
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_port(0xc008, 0xc008, 0, 0x18f3, "SW08");
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_port(0xc00c, 0xc00c, 0, 0x18f3, "SW0C");
pgmspace->install_read_port(0xc004, 0xc004, 0, 0x18f3, "SW04");
pgmspace->install_read_port(0xc008, 0xc008, 0, 0x18f3, "SW08");
pgmspace->install_read_port(0xc00c, 0xc00c, 0, 0x18f3, "SW0C");
/* unknown behavior expected here */
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0xc80a, 0xc80a, FUNC(razmataz_counter_r));
pgmspace->install_legacy_read_handler(0xc80a, 0xc80a, FUNC(razmataz_counter_r));
/* connect the universal sound board */
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xe03c, 0xe03c, 0, 0x1f00, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
pgmspace->install_legacy_readwrite_handler(*usbsnd, 0xe03c, 0xe03c, 0, 0x1f00, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
/* additional state saving */
state->save_item(NAME(state->m_razmataz_dial_pos));
@ -1530,10 +1523,13 @@ static DRIVER_INIT( razmataz )
static DRIVER_INIT( ixion )
{
address_space *pgmspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
device_t *usbsnd = machine.device("usbsnd");
szaxxon_decode(machine, "maincpu");
/* connect the universal sound board */
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xe03c, 0xe03c, 0, 0x1f00, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
pgmspace->install_legacy_readwrite_handler(*usbsnd, 0xe03c, 0xe03c, 0, 0x1f00, FUNC(sega_usb_status_r), FUNC(sega_usb_data_w));
}

1
src/mame/includes/exidy440.h
View File

@ -30,6 +30,7 @@ public:
UINT8 m_palettebank_io;
UINT8 m_palettebank_vis;
UINT8 *m_spriteram;
device_t *m_custom;
};

1
src/mame/includes/m72.h
View File

@ -37,6 +37,7 @@ public:
INT32 m_scrolly2;
INT32 m_video_off;
int m_majtitle_rowscroll;
device_t *m_audio;
};

2
src/mame/includes/segag80v.h
View File

@ -13,7 +13,7 @@ public:
: driver_device(machine, config) { }
UINT8 *m_mainram;
UINT8 m_has_usb;
device_t *m_usb;
UINT8 m_mult_data[2];
UINT16 m_mult_result;
UINT8 m_spinner_select;

1
src/mame/includes/vertigo.h
View File

@ -85,6 +85,7 @@ public:
UINT16 *m_vectorram;
device_t *m_ttl74148;
device_t *m_custom;
attotime m_irq4_time;
UINT8 m_irq_state;
UINT8 m_adc_result;

20
src/mame/machine/midtunit.c
View File

@ -577,13 +577,13 @@ MACHINE_RESET( midtunit )
{
case SOUND_ADPCM:
case SOUND_ADPCM_LARGE:
williams_adpcm_reset_w(1);
williams_adpcm_reset_w(0);
williams_adpcm_reset_w(machine, 1);
williams_adpcm_reset_w(machine, 0);
break;
case SOUND_DCS:
dcs_reset_w(1);
dcs_reset_w(0);
dcs_reset_w(machine, 1);
dcs_reset_w(machine, 0);
break;
}
}
@ -601,7 +601,7 @@ READ16_HANDLER( midtunit_sound_state_r )
/* logerror("%08X:Sound status read\n", cpu_get_pc(&space->device()));*/
if (chip_type == SOUND_DCS)
return dcs_control_r() >> 4;
return dcs_control_r(space->machine()) >> 4;
if (fake_sound_state)
{
@ -616,7 +616,7 @@ READ16_HANDLER( midtunit_sound_r )
logerror("%08X:Sound data read\n", cpu_get_pc(&space->device()));
if (chip_type == SOUND_DCS)
return dcs_data_r() & 0xff;
return dcs_data_r(space->machine()) & 0xff;
return ~0;
}
@ -636,8 +636,8 @@ WRITE16_HANDLER( midtunit_sound_w )
{
case SOUND_ADPCM:
case SOUND_ADPCM_LARGE:
williams_adpcm_reset_w(~data & 0x100);
williams_adpcm_data_w(data & 0xff);
williams_adpcm_reset_w(space->machine(), ~data & 0x100);
williams_adpcm_data_w(space->machine(), data & 0xff);
/* the games seem to check for $82 loops, so this should be just barely enough */
fake_sound_state = 128;
@ -645,8 +645,8 @@ WRITE16_HANDLER( midtunit_sound_w )
case SOUND_DCS:
logerror("%08X:Sound write = %04X\n", cpu_get_pc(&space->device()), data);
dcs_reset_w(~data & 0x100);
dcs_data_w(data & 0xff);
dcs_reset_w(space->machine(), ~data & 0x100);
dcs_data_w(space->machine(), data & 0xff);
/* the games seem to check for $82 loops, so this should be just barely enough */
fake_sound_state = 128;
break;

24
src/mame/machine/midwayic.c
View File

@ -820,7 +820,7 @@ void midway_ioasic_fifo_w(running_machine &machine, UINT16 data)
if (LOG_FIFO)
logerror("fifo_w(%04X): out of space!\n", data);
}
dcs_fifo_notify(ioasic.fifo_bytes, FIFO_SIZE);
dcs_fifo_notify(machine, ioasic.fifo_bytes, FIFO_SIZE);
}
@ -830,7 +830,7 @@ void midway_ioasic_fifo_full_w(running_machine &machine, UINT16 data)
logerror("fifo_full_w(%04X)\n", data);
ioasic.force_fifo_full = 1;
update_ioasic_irq(machine);
dcs_fifo_notify(ioasic.fifo_bytes, FIFO_SIZE);
dcs_fifo_notify(machine, ioasic.fifo_bytes, FIFO_SIZE);
}
@ -894,13 +894,13 @@ READ32_HANDLER( midway_ioasic_r )
result = 0;
if (ioasic.has_dcs)
{
result |= ((dcs_control_r() >> 4) ^ 0x40) & 0x00c0;
result |= ((dcs_control_r(space->machine()) >> 4) ^ 0x40) & 0x00c0;
result |= ioasic_fifo_status_r(&space->device()) & 0x0038;
result |= dcs_data2_r() & 0xff00;
result |= dcs_data2_r(space->machine()) & 0xff00;
}
else if (ioasic.has_cage)
{
result |= (cage_control_r() << 6) ^ 0x80;
result |= (cage_control_r(space->machine()) << 6) ^ 0x80;
}
else
result |= 0x48;
@ -910,12 +910,12 @@ READ32_HANDLER( midway_ioasic_r )
result = 0;
if (ioasic.has_dcs)
{
result = dcs_data_r();
result = dcs_data_r(space->machine());
if (ioasic.auto_ack)
dcs_ack_w();
dcs_ack_w(space->machine());
}
else if (ioasic.has_cage)
result = main_from_cage_r(space);
result = cage_main_r(space);
else
{
static UINT16 val = 0;
@ -994,7 +994,7 @@ WRITE32_HANDLER( midway_ioasic_w )
/* sound reset? */
if (ioasic.has_dcs)
{
dcs_reset_w(~newreg & 1);
dcs_reset_w(space->machine(), ~newreg & 1);
}
else if (ioasic.has_cage)
{
@ -1012,13 +1012,13 @@ WRITE32_HANDLER( midway_ioasic_w )
case IOASIC_SOUNDOUT:
if (ioasic.has_dcs)
dcs_data_w(newreg);
dcs_data_w(space->machine(), newreg);
else if (ioasic.has_cage)
main_to_cage_w(newreg);
cage_main_w(space, newreg);
break;
case IOASIC_SOUNDIN:
dcs_ack_w();
dcs_ack_w(space->machine());
/* acknowledge data read */
break;

12
src/mame/machine/midwunit.c
View File

@ -97,7 +97,7 @@ WRITE16_HANDLER( midwunit_io_w )
logerror("%08X:Control W @ %05X = %04X\n", cpu_get_pc(&space->device()), offset, data);
/* bit 4 reset sound CPU */
dcs_reset_w(newword & 0x10);
dcs_reset_w(space->machine(), newword & 0x10);
/* bit 5 (active low) reset security chip */
midway_serial_pic_reset_w(newword & 0x20);
@ -378,8 +378,8 @@ MACHINE_RESET( midwunit )
int i;
/* reset sound */
dcs_reset_w(1);
dcs_reset_w(0);
dcs_reset_w(machine, 1);
dcs_reset_w(machine, 0);
/* reset I/O shuffling */
for (i = 0; i < 16; i++)
@ -418,13 +418,13 @@ READ16_HANDLER( midwunit_sound_r )
{
logerror("%08X:Sound read\n", cpu_get_pc(&space->device()));
return dcs_data_r() & 0xff;
return dcs_data_r(space->machine()) & 0xff;
}
READ16_HANDLER( midwunit_sound_state_r )
{
return dcs_control_r();
return dcs_control_r(space->machine());
}
@ -441,6 +441,6 @@ WRITE16_HANDLER( midwunit_sound_w )
if (ACCESSING_BITS_0_7)
{
logerror("%08X:Sound write = %04X\n", cpu_get_pc(&space->device()), data);
dcs_data_w(data & 0xff);
dcs_data_w(space->machine(), data & 0xff);
}
}

14
src/mame/machine/midxunit.c
View File

@ -104,7 +104,7 @@ WRITE16_HANDLER( midxunit_unknown_w )
int offs = offset / 0x40000;
if (offs == 1 && ACCESSING_BITS_0_7)
dcs_reset_w(data & 2);
dcs_reset_w(space->machine(), data & 2);
if (ACCESSING_BITS_0_7 && offset % 0x40000 == 0)
logerror("%08X:midxunit_unknown_w @ %d = %02X\n", cpu_get_pc(&space->device()), offs, data & 0xff);
@ -274,7 +274,7 @@ WRITE16_HANDLER( midxunit_uart_w )
break;
case 5: /* register 5 write seems to reset things */
dcs_data_r();
dcs_data_r(space->machine());
break;
default: /* everyone else just stores themselves */
@ -342,8 +342,8 @@ MACHINE_RESET( midxunit )
int i;
/* reset sound */
dcs_reset_w(1);
dcs_reset_w(0);
dcs_reset_w(machine, 1);
dcs_reset_w(machine, 0);
/* reset I/O shuffling */
for (i = 0; i < 16; i++)
@ -392,13 +392,13 @@ READ16_HANDLER( midxunit_sound_r )
{
logerror("%08X:Sound read\n", cpu_get_pc(&space->device()));
return dcs_data_r() & 0xff;
return dcs_data_r(space->machine()) & 0xff;
}
READ16_HANDLER( midxunit_sound_state_r )
{
return dcs_control_r();
return dcs_control_r(space->machine());
}
@ -415,6 +415,6 @@ WRITE16_HANDLER( midxunit_sound_w )
if (ACCESSING_BITS_0_7)
{
logerror("%08X:Sound write = %04X\n", cpu_get_pc(&space->device()), data);
dcs_data_w(data & 0xff);
dcs_data_w(space->machine(), data & 0xff);
}
}

24
src/mame/machine/midyunit.c
View File

@ -178,8 +178,8 @@ static WRITE16_HANDLER( term2_sound_w )
if (offset == 0)
state->m_term2_analog_select = (data >> 12) & 3;
williams_adpcm_reset_w((~data & 0x100) >> 1);
williams_adpcm_data_w(data);
williams_adpcm_reset_w(space->machine(), (~data & 0x100) >> 1);
williams_adpcm_data_w(space->machine(), data);
}
@ -569,19 +569,19 @@ MACHINE_RESET( midyunit )
switch (state->m_chip_type)
{
case SOUND_NARC:
williams_narc_reset_w(1);
williams_narc_reset_w(0);
williams_narc_reset_w(machine, 1);
williams_narc_reset_w(machine, 0);
break;
case SOUND_CVSD:
case SOUND_CVSD_SMALL:
williams_cvsd_reset_w(1);
williams_cvsd_reset_w(0);
williams_cvsd_reset_w(machine, 1);
williams_cvsd_reset_w(machine, 0);
break;
case SOUND_ADPCM:
williams_adpcm_reset_w(1);
williams_adpcm_reset_w(0);
williams_adpcm_reset_w(machine, 1);
williams_adpcm_reset_w(machine, 0);
break;
case SOUND_YAWDIM:
@ -612,18 +612,18 @@ WRITE16_HANDLER( midyunit_sound_w )
switch (state->m_chip_type)
{
case SOUND_NARC:
williams_narc_data_w(data);
williams_narc_data_w(space->machine(), data);
break;
case SOUND_CVSD_SMALL:
case SOUND_CVSD:
williams_cvsd_reset_w((~data & 0x100) >> 8);
williams_cvsd_reset_w(space->machine(), (~data & 0x100) >> 8);
williams_cvsd_data_w(space->machine(), (data & 0xff) | ((data & 0x200) >> 1));
break;
case SOUND_ADPCM:
williams_adpcm_reset_w((~data & 0x100) >> 8);
williams_adpcm_data_w(data);
williams_adpcm_reset_w(space->machine(), (~data & 0x100) >> 8);
williams_adpcm_data_w(space->machine(), data);
break;
case SOUND_YAWDIM:

11
src/mame/machine/vertigo.c
View File

@ -169,7 +169,8 @@ WRITE16_HANDLER( vertigo_wsot_w )
static TIMER_CALLBACK( sound_command_w )
{
exidy440_sound_command(machine, param);
vertigo_state *state = machine.driver_data<vertigo_state>();
exidy440_sound_command(state->m_custom, param);
/* It is important that the sound cpu ACKs the sound command
quickly. Otherwise the main CPU gives up with sound. Boosting
@ -188,7 +189,8 @@ WRITE16_HANDLER( vertigo_audio_w )
READ16_HANDLER( vertigo_sio_r )
{
return exidy440_sound_command_ack() ? 0xfc : 0xfd;
vertigo_state *state = space->machine().driver_data<vertigo_state>();
return exidy440_sound_command_ack(state->m_custom) ? 0xfc : 0xfd;
}
@ -202,6 +204,10 @@ READ16_HANDLER( vertigo_sio_r )
MACHINE_START( vertigo )
{
vertigo_state *state = machine.driver_data<vertigo_state>();
state->m_custom = machine.device("custom");
state->m_ttl74148 = machine.device("74148");
state_save_register_global(machine, state->m_irq_state);
state_save_register_global(machine, state->m_adc_result);
state_save_register_global(machine, state->m_irq4_time);
@ -214,7 +220,6 @@ MACHINE_RESET( vertigo )
vertigo_state *state = machine.driver_data<vertigo_state>();
int i;
state->m_ttl74148 = machine.device("74148");
ttl74148_enable_input_w(state->m_ttl74148, 0);
for (i = 0; i < 8; i++)