mirror of
https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
geniusjr.cpp: Switch to more likely HC05 type, at least for gj4000 (nw)
This commit is contained in:
parent
843d806e8d
commit
69c8b4f0e7
@ -93,6 +93,7 @@ constexpr u16 M68HC05_INT_MASK = M68HC05_INT_IRQ | M68HC05_INT_TIMER;
|
||||
DEFINE_DEVICE_TYPE(M68HC05C4, m68hc05c4_device, "m68hc05c4", "Motorola MC68HC05C4")
|
||||
DEFINE_DEVICE_TYPE(M68HC05C8, m68hc05c8_device, "m68hc05c8", "Motorola MC68HC05C8")
|
||||
DEFINE_DEVICE_TYPE(M68HC705C8A, m68hc705c8a_device, "m68hc705c8a", "Motorola MC68HC705C8A")
|
||||
DEFINE_DEVICE_TYPE(M68HC05L9, m68hc05l9_device, "m68hc05l9", "Motorola MC68HC05L9")
|
||||
|
||||
|
||||
|
||||
@ -106,6 +107,7 @@ m68hc05_device::m68hc05_device(
|
||||
device_t *owner,
|
||||
u32 clock,
|
||||
device_type type,
|
||||
u32 addr_width,
|
||||
address_map_constructor internal_map)
|
||||
: m6805_base_device(
|
||||
mconfig,
|
||||
@ -113,7 +115,7 @@ m68hc05_device::m68hc05_device(
|
||||
owner,
|
||||
clock,
|
||||
type,
|
||||
{ s_hc_ops, s_hc_cycles, 13, 0x00ff, 0x00c0, M68HC05_VECTOR_SWI },
|
||||
{ s_hc_ops, s_hc_cycles, addr_width, 0x00ff, 0x00c0, M68HC05_VECTOR_SWI },
|
||||
internal_map)
|
||||
, m_port_cb_r{ *this, *this, *this, *this }
|
||||
, m_port_cb_w{ *this, *this, *this, *this }
|
||||
@ -707,8 +709,9 @@ m68hc705_device::m68hc705_device(
|
||||
device_t *owner,
|
||||
u32 clock,
|
||||
device_type type,
|
||||
u32 addr_width,
|
||||
address_map_constructor internal_map)
|
||||
: m68hc05_device(mconfig, tag, owner, clock, type, internal_map)
|
||||
: m68hc05_device(mconfig, tag, owner, clock, type, addr_width, internal_map)
|
||||
{
|
||||
}
|
||||
|
||||
@ -757,6 +760,7 @@ m68hc05c4_device::m68hc05c4_device(machine_config const &mconfig, char const *ta
|
||||
owner,
|
||||
clock,
|
||||
M68HC05C4,
|
||||
13,
|
||||
address_map_constructor(FUNC(m68hc05c4_device::c4_map), this))
|
||||
{
|
||||
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0xbf }});
|
||||
@ -822,6 +826,7 @@ m68hc05c8_device::m68hc05c8_device(machine_config const &mconfig, char const *ta
|
||||
owner,
|
||||
clock,
|
||||
M68HC05C8,
|
||||
13,
|
||||
address_map_constructor(FUNC(m68hc05c8_device::c8_map), this))
|
||||
{
|
||||
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0xbf }});
|
||||
@ -893,6 +898,7 @@ m68hc705c8a_device::m68hc705c8a_device(machine_config const &mconfig, char const
|
||||
owner,
|
||||
clock,
|
||||
M68HC705C8A,
|
||||
13,
|
||||
address_map_constructor(FUNC(m68hc705c8a_device::c8a_map), this))
|
||||
{
|
||||
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0xbf }});
|
||||
@ -929,3 +935,76 @@ std::unique_ptr<util::disasm_interface> m68hc705c8a_device::create_disassembler(
|
||||
{
|
||||
return std::make_unique<m68hc05_disassembler>(m68hc705c8a_syms);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* MC68HC05L9 device
|
||||
****************************************************************************/
|
||||
|
||||
void m68hc05l9_device::l9_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0xffff);
|
||||
map.unmap_value_high();
|
||||
|
||||
map(0x0000, 0x0003).rw(FUNC(m68hc05l9_device::port_read), FUNC(m68hc05l9_device::port_latch_w));
|
||||
map(0x0004, 0x0007).rw(FUNC(m68hc05l9_device::port_ddr_r), FUNC(m68hc05l9_device::port_ddr_w));
|
||||
// 0x0008 count down
|
||||
// 0x0009-0x000a configuration
|
||||
// 0x000b minute alarm
|
||||
// 0x000c hour alarm
|
||||
// 0x000d BAUD
|
||||
// 0x000e SCCR1
|
||||
// 0x000f SCCR2l9_device
|
||||
// 0x0010 SCSR
|
||||
// 0x0011 SCDR
|
||||
map(0x0012, 0x0012).rw(FUNC(m68hc05l9_device::tcr_r), FUNC(m68hc05l9_device::tcr_w));
|
||||
map(0x0013, 0x0013).r(FUNC(m68hc05l9_device::tsr_r));
|
||||
map(0x0014, 0x0015).r(FUNC(m68hc05l9_device::icr_r));
|
||||
map(0x0016, 0x0017).rw(FUNC(m68hc05l9_device::ocr_r), FUNC(m68hc05l9_device::ocr_w));
|
||||
map(0x0018, 0x001b).r(FUNC(m68hc05l9_device::timer_r));
|
||||
// 0x001c RTC flags
|
||||
// 0x001d hours
|
||||
// 0x001e minutes
|
||||
// 0x001f seconds
|
||||
map(0x0020, 0x004f).rom(); // user ROM
|
||||
map(0x0050, 0x00ff).ram(); // RAM/stack
|
||||
// 0x0100-0x01ff unused
|
||||
map(0x0200, 0x027f).ram(); // display RAM (128x5)
|
||||
// 0x0280-0x048f reserved for slaves (528x5)
|
||||
// 0x0490-0x07ff unused
|
||||
map(0x0800, 0x1e69).rom(); // user ROM
|
||||
map(0x1e6a, 0x1fef).rom(); // self-test (vectors at 0x1fe0-0x1fef)
|
||||
map(0x1ff0, 0x1fff).rom(); // user vectors
|
||||
// 0x2000-0xffff external memory
|
||||
}
|
||||
|
||||
|
||||
m68hc05l9_device::m68hc05l9_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
|
||||
: m68hc05_device(
|
||||
mconfig,
|
||||
tag,
|
||||
owner,
|
||||
clock,
|
||||
M68HC05L9,
|
||||
16,
|
||||
address_map_constructor(FUNC(m68hc05l9_device::l9_map), this))
|
||||
{
|
||||
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0x1f }});
|
||||
}
|
||||
|
||||
|
||||
|
||||
void m68hc05l9_device::device_start()
|
||||
{
|
||||
m68hc05_device::device_start();
|
||||
|
||||
add_port_state(std::array<bool, PORT_COUNT>{{ true, true, true, false }});
|
||||
add_timer_state();
|
||||
}
|
||||
|
||||
|
||||
std::unique_ptr<util::disasm_interface> m68hc05l9_device::create_disassembler()
|
||||
{
|
||||
return std::make_unique<m68hc05_disassembler>(m68hc05c4_syms);
|
||||
}
|
||||
|
@ -17,6 +17,7 @@
|
||||
DECLARE_DEVICE_TYPE(M68HC05C4, m68hc05c4_device)
|
||||
DECLARE_DEVICE_TYPE(M68HC05C8, m68hc05c8_device)
|
||||
DECLARE_DEVICE_TYPE(M68HC705C8A, m68hc705c8a_device)
|
||||
DECLARE_DEVICE_TYPE(M68HC05L9, m68hc05l9_device)
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
@ -77,6 +78,7 @@ protected:
|
||||
device_t *owner,
|
||||
u32 clock,
|
||||
device_type type,
|
||||
u32 addr_width,
|
||||
address_map_constructor internal_map);
|
||||
|
||||
void set_port_bits(std::array<u8, PORT_COUNT> const &bits);
|
||||
@ -177,6 +179,7 @@ protected:
|
||||
device_t *owner,
|
||||
u32 clock,
|
||||
device_type type,
|
||||
u32 addr_width,
|
||||
address_map_constructor internal_map);
|
||||
};
|
||||
|
||||
@ -232,6 +235,22 @@ protected:
|
||||
};
|
||||
|
||||
|
||||
// ======================> m68hc05l9_device
|
||||
|
||||
class m68hc05l9_device : public m68hc05_device
|
||||
{
|
||||
public:
|
||||
m68hc05l9_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
|
||||
|
||||
protected:
|
||||
void l9_map(address_map &map);
|
||||
|
||||
virtual void device_start() override;
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
};
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* 68HC05 section
|
||||
****************************************************************************/
|
||||
|
@ -19,23 +19,42 @@ public:
|
||||
geniusjr_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_rombank(*this, "rombank")
|
||||
{
|
||||
}
|
||||
|
||||
void geniusjr(machine_config &config);
|
||||
void gj4000(machine_config &config);
|
||||
void gj5000(machine_config &config);
|
||||
void gjrstar(machine_config &config);
|
||||
void gjmovie(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_start() override;
|
||||
|
||||
private:
|
||||
void mem_map(address_map &map);
|
||||
void gj4000_map(address_map &map);
|
||||
void gj5000_map(address_map &map);
|
||||
void gjrstar_map(address_map &map);
|
||||
|
||||
required_device<m68hc05_device> m_maincpu;
|
||||
required_memory_bank m_rombank;
|
||||
|
||||
u16 m_bank_size;
|
||||
};
|
||||
|
||||
void geniusjr_state::mem_map(address_map &map)
|
||||
void geniusjr_state::gj4000_map(address_map &map)
|
||||
{
|
||||
map(0x8000, 0xffff).bankr("rombank");
|
||||
}
|
||||
|
||||
void geniusjr_state::gj5000_map(address_map &map)
|
||||
{
|
||||
map(0x4000, 0x7fff).bankr("rombank");
|
||||
}
|
||||
|
||||
void geniusjr_state::gjrstar_map(address_map &map)
|
||||
{
|
||||
map(0x2000, 0x3fff).bankr("rombank");
|
||||
}
|
||||
|
||||
|
||||
@ -45,57 +64,97 @@ INPUT_PORTS_END
|
||||
|
||||
void geniusjr_state::machine_start()
|
||||
{
|
||||
memory_region *extrom = memregion("extrom");
|
||||
|
||||
m_rombank->configure_entries(0, extrom->bytes() / m_bank_size, extrom->base(), m_bank_size);
|
||||
m_rombank->set_entry(0);
|
||||
}
|
||||
|
||||
void geniusjr_state::geniusjr(machine_config &config)
|
||||
void geniusjr_state::gj4000(machine_config &config)
|
||||
{
|
||||
M68HC05C8(config, m_maincpu, 8'000'000); // unknown type and clock
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &geniusjr_state::mem_map);
|
||||
M68HC05L9(config, m_maincpu, 8'000'000); // unknown clock
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &geniusjr_state::gj4000_map);
|
||||
|
||||
m_bank_size = 0x8000;
|
||||
}
|
||||
|
||||
void geniusjr_state::gj5000(machine_config &config)
|
||||
{
|
||||
M68HC05L9(config, m_maincpu, 8'000'000); // unknown clock (type also uncertain)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &geniusjr_state::gj5000_map);
|
||||
|
||||
m_bank_size = 0x4000;
|
||||
}
|
||||
|
||||
void geniusjr_state::gjrstar(machine_config &config)
|
||||
{
|
||||
M68HC05L9(config, m_maincpu, 8'000'000); // unknown clock (type also uncertain)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &geniusjr_state::gjrstar_map);
|
||||
|
||||
m_bank_size = 0x2000;
|
||||
}
|
||||
|
||||
void geniusjr_state::gjmovie(machine_config &config)
|
||||
{
|
||||
geniusjr(config);
|
||||
gjrstar(config);
|
||||
|
||||
SOFTWARE_LIST(config, "cart_list").set_original("gjmovie");
|
||||
}
|
||||
|
||||
|
||||
ROM_START( gj4000 )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_REGION( 0x2000, "maincpu", 0 )
|
||||
ROM_LOAD( "hc05_internal.bin", 0x0000, 0x1fff, NO_DUMP )
|
||||
|
||||
ROM_REGION( 0x40000, "extrom", 0 )
|
||||
ROM_LOAD( "27-05886-000-000.u4", 0x000000, 0x40000, CRC(5f6db95b) SHA1(fe683154e33a82ea38696096616d11e850e0c7a3))
|
||||
ROM_END
|
||||
|
||||
ROM_START( gj5000 )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_REGION( 0x2000, "maincpu", 0 )
|
||||
ROM_LOAD( "hc05_internal.bin", 0x0000, 0x1fff, NO_DUMP )
|
||||
|
||||
ROM_REGION( 0x80000, "extrom", 0 )
|
||||
ROM_LOAD( "27-6019-01.u2", 0x000000, 0x80000, CRC(946e5b7d) SHA1(80963d6ad80d49e54c8996bfc77ac135c4935be5))
|
||||
ROM_END
|
||||
|
||||
ROM_START( gjmovie )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_REGION( 0x2000, "maincpu", 0 )
|
||||
ROM_LOAD( "hc05_internal.bin", 0x0000, 0x1fff, NO_DUMP )
|
||||
|
||||
ROM_REGION( 0x40000, "extrom", 0 )
|
||||
ROM_LOAD( "lh532hlk.bin", 0x000000, 0x40000, CRC(2e64c296) SHA1(604034f902e20851cb9af60964031a508ceef83e))
|
||||
ROM_END
|
||||
|
||||
ROM_START( gjrstar )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_REGION( 0x2000, "maincpu", 0 )
|
||||
ROM_LOAD( "hc05_internal.bin", 0x0000, 0x1fff, NO_DUMP )
|
||||
|
||||
ROM_REGION( 0x40000, "extrom", 0 )
|
||||
ROM_LOAD( "27-5740-00.u1", 0x000000, 0x40000, CRC(ff3dc3bb) SHA1(bc16dfc1e12b0008456c700c431c8df6263b671f))
|
||||
ROM_END
|
||||
|
||||
ROM_START( gjrstar2 )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_REGION( 0x2000, "maincpu", 0 )
|
||||
ROM_LOAD( "hc05_internal.bin", 0x0000, 0x1fff, NO_DUMP )
|
||||
|
||||
ROM_REGION( 0x40000, "extrom", 0 )
|
||||
ROM_LOAD( "27-5740-00.u1", 0x000000, 0x40000, CRC(ff3dc3bb) SHA1(bc16dfc1e12b0008456c700c431c8df6263b671f)) // identical to 'Genius Junior Redstar'
|
||||
ROM_END
|
||||
|
||||
ROM_START( gjrstar3 )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_REGION( 0x2000, "maincpu", 0 )
|
||||
ROM_LOAD( "hc05_internal.bin", 0x0000, 0x1fff, NO_DUMP )
|
||||
|
||||
ROM_REGION( 0x40000, "extrom", 0 )
|
||||
ROM_LOAD( "54-06056-000-000.u3", 0x000000, 0x040000, CRC(72522179) SHA1(ede9491713ad018012cf925a519bcafe126f1ad3))
|
||||
ROM_END
|
||||
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1996, gj4000, 0, 0, geniusjr, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior 4000 (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1996, gj4000, 0, 0, gj4000, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior 4000 (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1993, gjmovie, 0, 0, gjmovie, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Movie (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1996, gjrstar, 0, 0, geniusjr, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1996, gjrstar2, gjrstar, 0, geniusjr, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar 2 (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1998, gjrstar3, 0, 0, geniusjr, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar 3 (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1998, gj5000, 0, 0, geniusjr, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior 5000 (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1996, gjrstar, 0, 0, gjrstar, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1996, gjrstar2, gjrstar, 0, gjrstar, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar 2 (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1998, gjrstar3, 0, 0, gjrstar, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar 3 (Germany)", MACHINE_IS_SKELETON )
|
||||
COMP( 1998, gj5000, 0, 0, gj5000, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior 5000 (Germany)", MACHINE_IS_SKELETON )
|
||||
|
Loading…
Reference in New Issue
Block a user