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(MESS) softbox: Fixed reset. [Mike Naberezny]

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(MESS) corvushd: Supported 4 hard disks and usage from within a device. [Curt Coder]
This commit is contained in:
Curt Coder 2013-06-12 13:48:22 +00:00
parent 39aac3fc10
commit 6a4fdb6a33
6 changed files with 85 additions and 19 deletions
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25
src/mess/drivers/softbox.c
View File

@ -357,6 +357,28 @@ void softbox_state::machine_start()
}
//-------------------------------------------------
// device_reset_after_children - device-specific
// reset that must happen after child devices
// have performed their resets
//-------------------------------------------------
void softbox_state::device_reset_after_children()
{
/* The Z80 starts at address 0x0000 but the SoftBox has RAM there and
needs to start from the BIOS at 0xf000. The PCB has logic and a
74S287 PROM that temporarily changes the memory map so that the
IC3 EPROM at 0xf000 is mapped to 0x0000 for the first instruction
fetch only. The instruction normally at 0xf000 is an absolute jump
into the BIOS. On reset, the Z80 will fetch it from 0x0000 and set
its PC, then the normal map will be restored before the next
instruction fetch. Here we just set the PC to 0xf000 after the Z80
resets, which has the same effect. */
m_maincpu->set_state_int(Z80_PC, 0xf000);
}
//**************************************************************************
// MACHINE CONFIGURATION
@ -379,6 +401,9 @@ static MACHINE_CONFIG_START( softbox, softbox_state )
MCFG_COM8116_ADD(COM8116_TAG, XTAL_5_0688MHz, NULL, DEVWRITELINE(I8251_TAG, i8251_device, rxc_w), DEVWRITELINE(I8251_TAG, i8251_device, txc_w))
MCFG_CBM_IEEE488_ADD("c8050")
MCFG_HARDDISK_ADD("harddisk1")
MCFG_HARDDISK_ADD("harddisk2")
MCFG_HARDDISK_ADD("harddisk3")
MCFG_HARDDISK_ADD("harddisk4")
MCFG_RS232_PORT_ADD(RS232_TAG, rs232_intf, default_rs232_devices, "serial_terminal")
MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("serial_terminal", terminal)

1
src/mess/includes/corvushd.h
View File

@ -178,6 +178,7 @@
// Prototypes
//
UINT8 corvus_hdc_init( running_machine &machine );
UINT8 corvus_hdc_init( device_t *device );
DECLARE_READ8_HANDLER ( corvus_hdc_status_r );
DECLARE_READ8_HANDLER ( corvus_hdc_data_r );
DECLARE_WRITE8_HANDLER ( corvus_hdc_data_w );

3
src/mess/includes/softbox.h
View File

@ -26,14 +26,17 @@ class softbox_state : public driver_device
public:
softbox_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, Z80_TAG),
m_dbrg(*this, COM8116_TAG),
m_ieee(*this, IEEE488_TAG)
{ }
required_device<cpu_device> m_maincpu;
required_device<com8116_device> m_dbrg;
required_device<ieee488_device> m_ieee;
virtual void machine_start();
virtual void device_reset_after_children();
DECLARE_WRITE8_MEMBER( dbrg_w );

43
src/mess/machine/corvushd.c
View File

@ -97,6 +97,7 @@ struct dadr_t {
// Controller structure
struct corvus_hdc_t {
device_t *root_device;
UINT8 status; // Controller status byte (DIRECTION + BUSY/READY)
char prep_mode; // Whether the controller is in Prep Mode or not
// Physical drive info
@ -1159,14 +1160,16 @@ static UINT8 corvus_format_drive(running_machine &machine, UINT8 *pattern, UINT1
// hard_disk_file object
//
static hard_disk_file *corvus_hdc_file(running_machine &machine, int id) {
corvus_hdc_t
*c = &corvus_hdc;
static const char *const tags[] = {
"harddisk1"
"harddisk1", "harddisk2", "harddisk3", "harddisk4"
};
harddisk_image_device *img;
/* Only one harddisk supported right now */
assert ( id == 0 );
if (c->root_device)
img = dynamic_cast<harddisk_image_device *>(c->root_device->subdevice(tags[id]));
else
img = dynamic_cast<harddisk_image_device *>(machine.device(tags[id]));
if ( !img )
@ -1175,7 +1178,16 @@ static hard_disk_file *corvus_hdc_file(running_machine &machine, int id) {
if (!img->exists())
return NULL;
return img->get_hard_disk_file();
// Pick up the Head/Cylinder/Sector info
hard_disk_file *file = img->get_hard_disk_file();
hard_disk_info *info = hard_disk_get_info(file);
c->sectors_per_track = info->sectors;
c->tracks_per_cylinder = info->heads;
c->cylinders_per_drive = info->cylinders;
LOG(("corvus_hdc_init: Attached to drive %u image: H:%d, C:%d, S:%d\n", id, info->heads, info->cylinders, info->sectors));
return file;
}
@ -1420,19 +1432,9 @@ static TIMER_CALLBACK(corvus_hdc_callback)
//
UINT8 corvus_hdc_init(running_machine &machine) {
corvus_hdc_t *c = &corvus_hdc; // Pick up global controller structure
hard_disk_file *disk; // Structures for interface to CHD routines
hard_disk_info *info;
if((disk = corvus_hdc_file(machine, 0))) // Attach to the CHD file
info = hard_disk_get_info(disk); // Pick up the Head/Cylinder/Sector info
else
return 0;
c->status &= ~(CONTROLLER_DIRECTION | CONTROLLER_BUSY); // Host-to-controller mode, Idle (awaiting command from Host mode)
c->prep_mode = FALSE; // We're not in Prep Mode
c->sectors_per_track = info->sectors;
c->tracks_per_cylinder = info->heads;
c->cylinders_per_drive = info->cylinders;
c->offset = 0; // Buffer is empty
c->awaiting_modifier = FALSE; // We're not in the middle of a two-byte command
c->xmit_bytes = 0; // We don't have anything to say to the host
@ -1442,8 +1444,6 @@ UINT8 corvus_hdc_init(running_machine &machine) {
c->timeout_timer->adjust(attotime::from_seconds(4), CALLBACK_TIMEOUT);
c->timeout_timer->enable(0); // Start this timer out disabled
LOG(("corvus_hdc_init: Attached to drive image: H:%d, C:%d, S:%d\n", info->heads, info->cylinders, info->sectors));
//
// Define all of the packet sizes for the commands
//
@ -1548,6 +1548,15 @@ UINT8 corvus_hdc_init(running_machine &machine) {
}
UINT8 corvus_hdc_init( device_t *device )
{
corvus_hdc_t *c = &corvus_hdc; // Pick up global controller structure
c->root_device = device;
return corvus_hdc_init(device->machine());
}
//
// Corvus_HDC_Status_R

28
src/mess/machine/softbox.c
View File

@ -277,6 +277,9 @@ static MACHINE_CONFIG_FRAGMENT( softbox )
MCFG_I8255A_ADD(I8255_1_TAG, ppi1_intf)
MCFG_COM8116_ADD(COM8116_TAG, XTAL_5_0688MHz, NULL, DEVWRITELINE(I8251_TAG, i8251_device, rxc_w), DEVWRITELINE(I8251_TAG, i8251_device, txc_w))
MCFG_HARDDISK_ADD("harddisk1")
MCFG_HARDDISK_ADD("harddisk2")
MCFG_HARDDISK_ADD("harddisk3")
MCFG_HARDDISK_ADD("harddisk4")
MCFG_RS232_PORT_ADD(RS232_TAG, rs232_intf, default_rs232_devices, NULL)
MACHINE_CONFIG_END
@ -331,6 +334,7 @@ ioport_constructor softbox_device::device_input_ports() const
softbox_device::softbox_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SOFTBOX, "PET SoftBox", tag, owner, clock, "pet_softbox", __FILE__),
device_ieee488_interface(mconfig, *this),
m_maincpu(*this, Z80_TAG),
m_dbrg(*this, COM8116_TAG)
{
}
@ -342,7 +346,29 @@ softbox_device::softbox_device(const machine_config &mconfig, const char *tag, d
void softbox_device::device_start()
{
corvus_hdc_init(machine());
corvus_hdc_init(this);
}
//-------------------------------------------------
// device_reset_after_children - device-specific
// reset that must happen after child devices
// have performed their resets
//-------------------------------------------------
void softbox_device::device_reset_after_children()
{
/* The Z80 starts at address 0x0000 but the SoftBox has RAM there and
needs to start from the BIOS at 0xf000. The PCB has logic and a
74S287 PROM that temporarily changes the memory map so that the
IC3 EPROM at 0xf000 is mapped to 0x0000 for the first instruction
fetch only. The instruction normally at 0xf000 is an absolute jump
into the BIOS. On reset, the Z80 will fetch it from 0x0000 and set
its PC, then the normal map will be restored before the next
instruction fetch. Here we just set the PC to 0xf000 after the Z80
resets, which has the same effect. */
m_maincpu->set_state_int(Z80_PC, 0xf000);
}

2
src/mess/machine/softbox.h
View File

@ -56,6 +56,7 @@ public:
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset_after_children();
private:
enum
@ -65,6 +66,7 @@ private:
LED_READY
};
required_device<cpu_device> m_maincpu;
required_device<com8116_device> m_dbrg;
};