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Merge remote-tracking branch 'upstream/master'

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This commit is contained in:
Ricardo Barreira 2017-11-23 00:47:44 +00:00
commit 6a6ba1dc98
77 changed files with 1083 additions and 635 deletions
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2
scripts/target/mame/mess.lua
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@ -3445,6 +3445,7 @@ files {
MAME_DIR .. "src/mame/drivers/chesstrv.cpp",
MAME_DIR .. "src/mame/drivers/cd2650.cpp",
MAME_DIR .. "src/mame/drivers/cdc721.cpp",
MAME_DIR .. "src/mame/drivers/cit220.cpp",
MAME_DIR .. "src/mame/drivers/codata.cpp",
MAME_DIR .. "src/mame/drivers/controlid.cpp",
MAME_DIR .. "src/mame/drivers/cortex.cpp",
@ -3454,6 +3455,7 @@ files {
MAME_DIR .. "src/mame/drivers/cxhumax.cpp",
MAME_DIR .. "src/mame/includes/cxhumax.h",
MAME_DIR .. "src/mame/drivers/czk80.cpp",
MAME_DIR .. "src/mame/drivers/d400.cpp",
MAME_DIR .. "src/mame/drivers/d6800.cpp",
MAME_DIR .. "src/mame/drivers/d6809.cpp",
MAME_DIR .. "src/mame/drivers/daruma.cpp",

1
src/devices/bus/coco/cococart.h
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@ -22,6 +22,7 @@
#include "cpu/tms7000/tms7000.h"
#include "machine/mos6551.h"
#include "machine/6850acia.h"
#include "machine/mc14411.h"
#include "machine/msm6242.h"
#include "machine/ds1315.h"
#include "machine/wd_fdc.h"

8
src/devices/bus/electron/m2105.cpp
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@ -78,13 +78,13 @@ MACHINE_CONFIG_MEMBER( electron_m2105_device::device_add_mconfig )
MCFG_VIA6522_IRQ_HANDLER(DEVWRITELINE("irqs", input_merger_device, in_w<1>))
/* duart */
MCFG_MC68681_ADD("sc2681", XTAL_3_6864MHz)
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(DEVWRITELINE("irqs", input_merger_device, in_w<2>))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
//MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(electron_m2105_device, sio_out_w))
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sc2681", mc68681_device, rx_a_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_a_w))
/* printer */
MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer")
@ -117,7 +117,7 @@ electron_m2105_device::electron_m2105_device(const machine_config &mconfig, cons
, m_exp_rom(*this, "exp_rom")
, m_via6522_0(*this, "via6522_0")
, m_via6522_1(*this, "via6522_1")
, m_duart(*this, "sc2681")
, m_duart(*this, "duart")
, m_tms(*this, "tms5220")
, m_centronics(*this, "centronics")
, m_irqs(*this, "irqs")
@ -134,7 +134,7 @@ void electron_m2105_device::device_start()
m_slot = dynamic_cast<electron_expansion_slot_device *>(owner());
space.install_readwrite_handler(0xfc40, 0xfc5f, READ8_DEVICE_DELEGATE(m_via6522_1, via6522_device, read), WRITE8_DEVICE_DELEGATE(m_via6522_1, via6522_device, write));
space.install_readwrite_handler(0xfc60, 0xfc6f, READ8_DEVICE_DELEGATE(m_duart, mc68681_device, read), WRITE8_DEVICE_DELEGATE(m_duart, mc68681_device, write));
space.install_readwrite_handler(0xfc60, 0xfc6f, READ8_DEVICE_DELEGATE(m_duart, scn2681_device, read), WRITE8_DEVICE_DELEGATE(m_duart, scn2681_device, write));
space.install_readwrite_handler(0xfc70, 0xfc8f, READ8_DEVICE_DELEGATE(m_via6522_0, via6522_device, read), WRITE8_DEVICE_DELEGATE(m_via6522_0, via6522_device, write));
}

2
src/devices/bus/electron/m2105.h
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@ -46,7 +46,7 @@ private:
required_memory_region m_exp_rom;
required_device<via6522_device> m_via6522_0;
required_device<via6522_device> m_via6522_1;
required_device<mc68681_device> m_duart;
required_device<scn2681_device> m_duart;
required_device<tms5220_device> m_tms;
required_device<centronics_device> m_centronics;
required_device<input_merger_device> m_irqs;

2
src/devices/bus/isa/omti8621.cpp
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@ -64,8 +64,6 @@ public:
virtual bool is_reset_on_load() const override { return 0; }
virtual bool support_command_line_image_creation() const override { return 1; }
virtual const char *file_extensions() const override { return "awd"; }
virtual const char *custom_instance_name() const override { return "disk"; }
virtual const char *custom_brief_instance_name() const override { return "disk"; }
virtual image_init_result call_create(int format_type, util::option_resolution *format_options) override;
protected:

2
src/devices/machine/68307.cpp
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@ -44,7 +44,7 @@ ADDRESS_MAP_END
MACHINE_CONFIG_MEMBER( m68307_cpu_device::device_add_mconfig )
MCFG_MC68681_ADD("internal68681", 16000000/4) // ?? Mhz - should be specified in inline config
MCFG_DEVICE_ADD("internal68681", MC68681, 16000000/4) // ?? Mhz - should be specified in inline config
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(m68307_cpu_device, m68307_duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(m68307_cpu_device, m68307_duart_txa))
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(m68307_cpu_device, m68307_duart_txb))

273
src/devices/machine/mc68681.cpp
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@ -11,12 +11,18 @@
Improved interrupt handling by R. Belmont
Rewrite and modernization in progress by R. Belmont
Addition of the duart compatible 68340 serial module support by Edstrom
The main incompatibility between the 2681 and 68681 (Signetics and Motorola each
manufactured both versions of the chip) is that the 68681 has a R/W input and
generates a 68000-compatible DTACK signal, instead of using generic RD and WR
strobes as the 2681 does. The 68681 also adds a programmable interrupt vector,
with an IACK input replacing IP6.
*/
#include "emu.h"
#include "mc68681.h"
//#define VERBOSE 1
#define VERBOSE 1
//#define LOG_OUTPUT_FUNC printf
#include "logmacro.h"
@ -60,17 +66,18 @@ static const int baud_rate_ACR_1[] = { 75, 110, 134, 150, 300, 600, 1200, 2000,
#define CHAND_TAG "chd"
// device type definition
DEFINE_DEVICE_TYPE(SCN2681, scn2681_device, "scn2681", "SCN2681 DUART")
DEFINE_DEVICE_TYPE(MC68681, mc68681_device, "mc68681", "MC68681 DUART")
DEFINE_DEVICE_TYPE(SC28C94, sc28c94_device, "sc28c94", "SC28C94 QUART")
DEFINE_DEVICE_TYPE(MC68340_DUART, mc68340_duart_device, "mc68340duart", "MC68340 DUART Device")
DEFINE_DEVICE_TYPE(MC68681_CHANNEL, mc68681_channel, "mc68681_channel", "MC68681 DUART channel")
DEFINE_DEVICE_TYPE(DUART_CHANNEL, duart_channel, "duart_channel", "DUART channel")
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
mc68681_base_device::mc68681_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
duart_base_device::duart_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock),
m_chanA(*this, CHANA_TAG),
m_chanB(*this, CHANB_TAG),
@ -88,18 +95,23 @@ mc68681_base_device::mc68681_base_device(const machine_config &mconfig, device_t
ip5clk(0),
ip6clk(0),
ACR(0),
m_read_vector(false),
IP_last_state(0)
{
}
scn2681_device::scn2681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: duart_base_device(mconfig, SCN2681, tag, owner, clock)
{
}
mc68681_device::mc68681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mc68681_base_device(mconfig, MC68681, tag, owner, clock)
: duart_base_device(mconfig, MC68681, tag, owner, clock),
m_read_vector(false)
{
}
sc28c94_device::sc28c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mc68681_base_device(mconfig, SC28C94, tag, owner, clock)
: duart_base_device(mconfig, SC28C94, tag, owner, clock)
{
}
@ -111,7 +123,7 @@ sc28c94_device::sc28c94_device(const machine_config &mconfig, const char *tag, d
// TODO: A lot of subtle differences and also detect misuse of unavailable registers as they should be ignored
//--------------------------------------------------------------------------------------------------------------------
mc68340_duart_device::mc68340_duart_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: mc68681_base_device(mconfig, type, tag, owner, clock)
: duart_base_device(mconfig, type, tag, owner, clock)
{
}
@ -125,9 +137,9 @@ mc68340_duart_device::mc68340_duart_device(const machine_config &mconfig, const
// the external clocks
//-------------------------------------------------
void mc68681_base_device::static_set_clocks(device_t &device, int clk3, int clk4, int clk5, int clk6)
void duart_base_device::static_set_clocks(device_t &device, int clk3, int clk4, int clk5, int clk6)
{
mc68681_base_device &duart = downcast<mc68681_base_device &>(device);
duart_base_device &duart = downcast<duart_base_device &>(device);
duart.ip3clk = clk3;
duart.ip4clk = clk4;
duart.ip5clk = clk5;
@ -138,7 +150,7 @@ void mc68681_base_device::static_set_clocks(device_t &device, int clk3, int clk4
device start callback
-------------------------------------------------*/
void mc68681_base_device::device_start()
void duart_base_device::device_start()
{
write_irq.resolve_safe();
write_a_tx.resolve_safe();
@ -148,56 +160,70 @@ void mc68681_base_device::device_start()
read_inport.resolve();
write_outport.resolve_safe();
duart_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mc68681_base_device::duart_timer_callback),this), nullptr);
duart_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(duart_base_device::duart_timer_callback),this), nullptr);
save_item(NAME(ACR));
save_item(NAME(IMR));
save_item(NAME(ISR));
save_item(NAME(IVR));
save_item(NAME(OPCR));
save_item(NAME(CTR));
save_item(NAME(IP_last_state));
save_item(NAME(half_period));
}
void mc68681_device::device_start()
{
duart_base_device::device_start();
save_item(NAME(m_read_vector));
save_item(NAME(IVR));
}
/*-------------------------------------------------
device reset callback
-------------------------------------------------*/
void mc68681_base_device::device_reset()
void duart_base_device::device_reset()
{
ACR = 0; /* Interrupt Vector Register */
IVR = 0x0f; /* Interrupt Vector Register */
IMR = 0; /* Interrupt Mask Register */
ISR = 0; /* Interrupt Status Register */
OPCR = 0; /* Output Port Conf. Register */
OPR = 0; /* Output Port Register */
CTR.d = 0; /* Counter/Timer Preset Value */
m_read_vector = false;
// "reset clears internal registers (SRA, SRB, IMR, ISR, OPR, OPCR) puts OP0-7 in the high state, stops the counter/timer, and puts channels a/b in the inactive state"
IPCR = 0;
write_irq(CLEAR_LINE);
write_outport(OPR ^ 0xff);
}
MACHINE_CONFIG_MEMBER( mc68681_base_device::device_add_mconfig )
MCFG_DEVICE_ADD(CHANA_TAG, MC68681_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANB_TAG, MC68681_CHANNEL, 0)
void mc68681_device::device_reset()
{
duart_base_device::device_reset();
IVR = 0x0f; /* Interrupt Vector Register */
m_read_vector = false;
}
MACHINE_CONFIG_MEMBER( duart_base_device::device_add_mconfig )
MCFG_DEVICE_ADD(CHANA_TAG, DUART_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANB_TAG, DUART_CHANNEL, 0)
MACHINE_CONFIG_END
MACHINE_CONFIG_MEMBER( sc28c94_device::device_add_mconfig )
MCFG_DEVICE_ADD(CHANA_TAG, MC68681_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANB_TAG, MC68681_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANC_TAG, MC68681_CHANNEL, 0)
MCFG_DEVICE_ADD(CHAND_TAG, MC68681_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANA_TAG, DUART_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANB_TAG, DUART_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANC_TAG, DUART_CHANNEL, 0)
MCFG_DEVICE_ADD(CHAND_TAG, DUART_CHANNEL, 0)
MACHINE_CONFIG_END
MACHINE_CONFIG_MEMBER( mc68340_duart_device::device_add_mconfig )
MCFG_DEVICE_ADD(CHANA_TAG, MC68681_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANB_TAG, MC68681_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANA_TAG, DUART_CHANNEL, 0)
MCFG_DEVICE_ADD(CHANB_TAG, DUART_CHANNEL, 0)
MACHINE_CONFIG_END
void mc68681_base_device::update_interrupts()
void duart_base_device::update_interrupts()
{
/* update SR state and update interrupt ISR state for the following bits:
SRn: bits 7-4: handled elsewhere.
@ -223,7 +249,6 @@ void mc68681_base_device::update_interrupts()
{
LOG( "68681: Interrupt line not active (IMR & ISR = %02X)\n", ISR & IMR);
write_irq(CLEAR_LINE);
m_read_vector = false; // clear IACK too
}
if(OPCR & 0xf0)
{
@ -259,7 +284,15 @@ void mc68681_base_device::update_interrupts()
}
}
double mc68681_base_device::duart68681_get_ct_rate()
void mc68681_device::update_interrupts()
{
duart_base_device::update_interrupts();
if (!irq_pending())
m_read_vector = false; // clear IACK too
}
double duart_base_device::get_ct_rate()
{
double rate = 0.0f;
@ -301,19 +334,19 @@ double mc68681_base_device::duart68681_get_ct_rate()
return rate;
}
uint16_t mc68681_base_device::duart68681_get_ct_count()
uint16_t duart_base_device::get_ct_count()
{
double clock = duart68681_get_ct_rate();
double clock = get_ct_rate();
return (duart_timer->remaining() * clock).as_double();
}
void mc68681_base_device::duart68681_start_ct(int count)
void duart_base_device::start_ct(int count)
{
double clock = duart68681_get_ct_rate();
double clock = get_ct_rate();
duart_timer->adjust(attotime::from_hz(clock) * count, 0);
}
TIMER_CALLBACK_MEMBER( mc68681_base_device::duart_timer_callback )
TIMER_CALLBACK_MEMBER( duart_base_device::duart_timer_callback )
{
if (ACR & 0x40)
{
@ -353,24 +386,39 @@ TIMER_CALLBACK_MEMBER( mc68681_base_device::duart_timer_callback )
}
if (!half_period)
{
ISR |= INT_COUNTER_READY;
update_interrupts();
}
set_ISR_bits(INT_COUNTER_READY);
int count = std::max(CTR.w.l, uint16_t(1));
duart68681_start_ct(count);
start_ct(count);
}
else
{
// Counter mode
ISR |= INT_COUNTER_READY;
update_interrupts();
duart68681_start_ct(0xffff);
set_ISR_bits(INT_COUNTER_READY);
start_ct(0xffff);
}
}
READ8_MEMBER( mc68681_device::read )
{
if (offset == 0x0c)
return IVR;
uint8_t r = duart_base_device::read(space, offset, mem_mask);
if (offset == 0x0d)
{
// bit 6 is /IACK (note the active-low)
if (m_read_vector)
r &= ~0x40;
else
r |= 0x40;
}
return r;
}
READ8_MEMBER( mc68340_duart_device::read )
{
uint8_t r = 0;
@ -390,7 +438,7 @@ READ8_MEMBER( mc68340_duart_device::read )
r = m_chanB->read_MR2();
break;
default:
r = mc68681_base_device::read(space, offset, mem_mask);
r = duart_base_device::read(space, offset, mem_mask);
}
return r;
}
@ -402,7 +450,7 @@ READ8_MEMBER( sc28c94_device::read )
if (offset < 0x10)
{
return mc68681_base_device::read(space, offset, mem_mask);
return duart_base_device::read(space, offset, mem_mask);
}
switch (offset)
@ -423,7 +471,7 @@ READ8_MEMBER( sc28c94_device::read )
return r;
}
READ8_MEMBER( mc68681_base_device::read )
READ8_MEMBER( duart_base_device::read )
{
uint8_t r = 0xff;
@ -445,8 +493,7 @@ READ8_MEMBER( mc68681_base_device::read )
// reading this clears all the input change bits
IPCR &= 0x0f;
ISR &= ~INT_INPUT_PORT_CHANGE;
update_interrupts();
clear_ISR_bits(INT_INPUT_PORT_CHANGE);
}
break;
@ -455,11 +502,11 @@ READ8_MEMBER( mc68681_base_device::read )
break;
case 0x06: /* CUR */
r = duart68681_get_ct_count() >> 8;
r = get_ct_count() >> 8;
break;
case 0x07: /* CLR */
r = duart68681_get_ct_count() & 0xff;
r = get_ct_count() & 0xff;
break;
case 0x08: /* MR1B/MR2B */
@ -483,16 +530,6 @@ READ8_MEMBER( mc68681_base_device::read )
}
r |= 0x80; // bit 7 is always set
// bit 6 is /IACK (note the active-low)
if (m_read_vector)
{
r &= ~0x40;
}
else
{
r |= 0x40;
}
break;
case 0x0e: /* Start counter command */
@ -504,18 +541,17 @@ READ8_MEMBER( mc68681_base_device::read )
}
int count = std::max(CTR.w.l, uint16_t(1));
duart68681_start_ct(count);
start_ct(count);
break;
}
case 0x0f: /* Stop counter command */
ISR &= ~INT_COUNTER_READY;
clear_ISR_bits(INT_COUNTER_READY);
// Stop the counter only
if (!(ACR & 0x40))
duart_timer->adjust(attotime::never);
update_interrupts();
break;
default:
@ -527,6 +563,14 @@ READ8_MEMBER( mc68681_base_device::read )
return r;
}
WRITE8_MEMBER( mc68681_device::write )
{
if (offset == 0x0c)
IVR = data;
else
duart_base_device::write(space, offset, data, mem_mask);
}
WRITE8_MEMBER( mc68340_duart_device::write )
{
//printf("Duart write %02x -> %02x\n", data, offset);
@ -546,7 +590,7 @@ WRITE8_MEMBER( mc68340_duart_device::write )
m_chanB->write_MR2(data);
break;
default:
mc68681_base_device::write(space, offset, data, mem_mask);
duart_base_device::write(space, offset, data, mem_mask);
}
}
@ -556,7 +600,7 @@ WRITE8_MEMBER( sc28c94_device::write )
if (offset < 0x10)
{
mc68681_base_device::write(space, offset, data, mem_mask);
duart_base_device::write(space, offset, data, mem_mask);
}
switch(offset)
@ -577,7 +621,7 @@ WRITE8_MEMBER( sc28c94_device::write )
}
}
WRITE8_MEMBER( mc68681_base_device::write )
WRITE8_MEMBER( duart_base_device::write )
{
offset &= 0x0f;
LOG( "Writing 68681 (%s) reg %x (%s) with %04x\n", tag(), offset, duart68681_reg_write_names[offset], data );
@ -605,7 +649,7 @@ WRITE8_MEMBER( mc68681_base_device::write )
uint16_t count = std::max(CTR.w.l, uint16_t(1));
half_period = 0;
duart68681_start_ct(count);
start_ct(count);
}
else
{
@ -616,15 +660,12 @@ WRITE8_MEMBER( mc68681_base_device::write )
// check for pending input port delta interrupts
if ((((IPCR>>4) & data) & 0x0f) != 0)
{
ISR |= INT_INPUT_PORT_CHANGE;
}
set_ISR_bits(INT_INPUT_PORT_CHANGE);
m_chanA->ACR_updated();
m_chanB->ACR_updated();
m_chanA->update_interrupts();
m_chanB->update_interrupts();
update_interrupts();
break;
}
case 0x05: /* IMR */
@ -647,10 +688,6 @@ WRITE8_MEMBER( mc68681_base_device::write )
m_chanB->write_chan_reg(offset&3, data);
break;
case 0x0c: /* IVR */
IVR = data;
break;
case 0x0d: /* OPCR */
if (((data & 0xf) != 0x00) && ((data & 0xc) != 0x4))
logerror( "68681 (%s): Unhandled OPCR value: %02x\n", tag(), data);
@ -669,7 +706,7 @@ WRITE8_MEMBER( mc68681_base_device::write )
}
}
WRITE_LINE_MEMBER( mc68681_base_device::ip0_w )
WRITE_LINE_MEMBER( duart_base_device::ip0_w )
{
uint8_t newIP = (IP_last_state & ~0x01) | ((state == ASSERT_LINE) ? 1 : 0);
@ -680,16 +717,13 @@ WRITE_LINE_MEMBER( mc68681_base_device::ip0_w )
IPCR |= 0x10;
if (ACR & 1)
{
ISR |= INT_INPUT_PORT_CHANGE;
update_interrupts();
}
set_ISR_bits(INT_INPUT_PORT_CHANGE);
}
IP_last_state = newIP;
}
WRITE_LINE_MEMBER( mc68681_base_device::ip1_w )
WRITE_LINE_MEMBER( duart_base_device::ip1_w )
{
uint8_t newIP = (IP_last_state & ~0x02) | ((state == ASSERT_LINE) ? 2 : 0);
@ -700,16 +734,13 @@ WRITE_LINE_MEMBER( mc68681_base_device::ip1_w )
IPCR |= 0x20;
if (ACR & 2)
{
ISR |= INT_INPUT_PORT_CHANGE;
update_interrupts();
}
set_ISR_bits(INT_INPUT_PORT_CHANGE);
}
IP_last_state = newIP;
}
WRITE_LINE_MEMBER( mc68681_base_device::ip2_w )
WRITE_LINE_MEMBER( duart_base_device::ip2_w )
{
uint8_t newIP = (IP_last_state & ~0x04) | ((state == ASSERT_LINE) ? 4 : 0);
@ -720,16 +751,13 @@ WRITE_LINE_MEMBER( mc68681_base_device::ip2_w )
IPCR |= 0x40;
if (ACR & 4)
{
ISR |= INT_INPUT_PORT_CHANGE;
update_interrupts();
}
set_ISR_bits(INT_INPUT_PORT_CHANGE);
}
IP_last_state = newIP;
}
WRITE_LINE_MEMBER( mc68681_base_device::ip3_w )
WRITE_LINE_MEMBER( duart_base_device::ip3_w )
{
uint8_t newIP = (IP_last_state & ~0x08) | ((state == ASSERT_LINE) ? 8 : 0);
@ -740,37 +768,34 @@ WRITE_LINE_MEMBER( mc68681_base_device::ip3_w )
IPCR |= 0x80;
if (ACR & 8)
{
ISR |= INT_INPUT_PORT_CHANGE;
update_interrupts();
}
set_ISR_bits(INT_INPUT_PORT_CHANGE);
}
IP_last_state = newIP;
}
WRITE_LINE_MEMBER( mc68681_base_device::ip4_w )
WRITE_LINE_MEMBER( duart_base_device::ip4_w )
{
uint8_t newIP = (IP_last_state & ~0x10) | ((state == ASSERT_LINE) ? 0x10 : 0);
// TODO: special mode for ip4 (Ch. A Rx clock)
IP_last_state = newIP;
}
WRITE_LINE_MEMBER( mc68681_base_device::ip5_w )
WRITE_LINE_MEMBER( duart_base_device::ip5_w )
{
uint8_t newIP = (IP_last_state & ~0x20) | ((state == ASSERT_LINE) ? 0x20 : 0);
// TODO: special mode for ip5 (Ch. B Tx clock)
IP_last_state = newIP;
}
WRITE_LINE_MEMBER( mc68681_base_device::ip6_w )
WRITE_LINE_MEMBER( duart_base_device::ip6_w )
{
uint8_t newIP = (IP_last_state & ~0x40) | ((state == ASSERT_LINE) ? 0x40 : 0);
// TODO: special mode for ip6 (Ch. B Rx clock)
IP_last_state = newIP;
}
mc68681_channel *mc68681_base_device::get_channel(int chan)
duart_channel *duart_base_device::get_channel(int chan)
{
if (chan == 0)
{
@ -780,7 +805,7 @@ mc68681_channel *mc68681_base_device::get_channel(int chan)
return m_chanB;
}
int mc68681_base_device::calc_baud(int ch, uint8_t data)
int duart_base_device::calc_baud(int ch, uint8_t data)
{
int baud_rate;
@ -825,20 +850,28 @@ int mc68681_base_device::calc_baud(int ch, uint8_t data)
return baud_rate;
}
void mc68681_base_device::clear_ISR_bits(int mask)
void duart_base_device::clear_ISR_bits(int mask)
{
ISR &= ~mask;
if ((ISR & mask) != 0)
{
ISR &= ~mask;
update_interrupts();
}
}
void mc68681_base_device::set_ISR_bits(int mask)
void duart_base_device::set_ISR_bits(int mask)
{
ISR |= mask;
if ((~ISR & mask) != 0)
{
ISR |= mask;
update_interrupts();
}
}
// DUART channel class stuff
mc68681_channel::mc68681_channel(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, MC68681_CHANNEL, tag, owner, clock),
duart_channel::duart_channel(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, DUART_CHANNEL, tag, owner, clock),
device_serial_interface(mconfig, *this),
MR1(0),
MR2(0),
@ -849,9 +882,9 @@ mc68681_channel::mc68681_channel(const machine_config &mconfig, const char *tag,
{
}
void mc68681_channel::device_start()
void duart_channel::device_start()
{
m_uart = downcast<mc68681_base_device *>(owner());
m_uart = downcast<duart_base_device *>(owner());
m_ch = m_uart->get_ch(this); // get our channel number
save_item(NAME(CR));
@ -872,7 +905,7 @@ void mc68681_channel::device_start()
save_item(NAME(tx_ready));
}
void mc68681_channel::device_reset()
void duart_channel::device_reset()
{
write_CR(0x10); // reset MR
write_CR(0x20); // reset Rx
@ -886,7 +919,7 @@ void mc68681_channel::device_reset()
}
// serial device virtual overrides
void mc68681_channel::rcv_complete()
void duart_channel::rcv_complete()
{
receive_register_extract();
@ -910,7 +943,7 @@ void mc68681_channel::rcv_complete()
}
}
void mc68681_channel::tra_complete()
void duart_channel::tra_complete()
{
//printf("%s ch %d Tx complete\n", tag(), m_ch);
tx_ready = 1;
@ -943,7 +976,7 @@ void mc68681_channel::tra_complete()
update_interrupts();
}
void mc68681_channel::tra_callback()
void duart_channel::tra_callback()
{
// don't actually send in loopback mode
if ((MR2&0xC0) != 0x80)
@ -973,7 +1006,7 @@ void mc68681_channel::tra_callback()
}
}
void mc68681_channel::update_interrupts()
void duart_channel::update_interrupts()
{
if (rx_enabled)
{
@ -1067,12 +1100,10 @@ void mc68681_channel::update_interrupts()
}
}
m_uart->update_interrupts();
//logerror("DEBUG: 68681 int check: after receiver test, SR%c is %02X, ISR is %02X\n", (ch+0x41), duart68681->channel[ch].SR, duart68681->ISR);
}
uint8_t mc68681_channel::read_rx_fifo()
uint8_t duart_channel::read_rx_fifo()
{
uint8_t rv;
@ -1099,7 +1130,7 @@ uint8_t mc68681_channel::read_rx_fifo()
return rv;
}
uint8_t mc68681_channel::read_chan_reg(int reg)
uint8_t duart_channel::read_chan_reg(int reg)
{
uint8_t rv = 0xff;
@ -1132,7 +1163,7 @@ uint8_t mc68681_channel::read_chan_reg(int reg)
return rv;
}
void mc68681_channel::write_chan_reg(int reg, uint8_t data)
void duart_channel::write_chan_reg(int reg, uint8_t data)
{
switch (reg)
{
@ -1159,7 +1190,7 @@ void mc68681_channel::write_chan_reg(int reg, uint8_t data)
}
}
void mc68681_channel::write_MR(uint8_t data)
void duart_channel::write_MR(uint8_t data)
{
if ( MR_ptr == 0 )
{
@ -1174,7 +1205,7 @@ void mc68681_channel::write_MR(uint8_t data)
update_interrupts();
}
void mc68681_channel::recalc_framing()
void duart_channel::recalc_framing()
{
parity_t parity = PARITY_NONE;
switch ((MR1>>3) & 3)
@ -1234,7 +1265,7 @@ void mc68681_channel::recalc_framing()
set_data_frame(1, (MR1 & 3)+5, parity, stopbits);
}
void mc68681_channel::write_CR(uint8_t data)
void duart_channel::write_CR(uint8_t data)
{
CR = data;
@ -1312,7 +1343,7 @@ void mc68681_channel::write_CR(uint8_t data)
update_interrupts();
}
void mc68681_channel::write_TX(uint8_t data)
void duart_channel::write_TX(uint8_t data)
{
tx_data = data;
@ -1337,12 +1368,12 @@ void mc68681_channel::write_TX(uint8_t data)
update_interrupts();
}
void mc68681_channel::ACR_updated()
void duart_channel::ACR_updated()
{
write_chan_reg(1, CSR);
}
uint8_t mc68681_channel::get_chan_CSR()
uint8_t duart_channel::get_chan_CSR()
{
return CSR;
}

103
src/devices/machine/mc68681.h
View File

@ -6,30 +6,24 @@
#pragma once
#define MCFG_MC68681_ADD(_tag, _clock) \
MCFG_DEVICE_ADD(_tag, MC68681, _clock)
#define MCFG_MC68681_REPLACE(_tag, _clock) \
MCFG_DEVICE_REPLACE(_tag, MC68681, _clock)
#define MCFG_MC68681_IRQ_CALLBACK(_cb) \
devcb = &mc68681_base_device::set_irq_cb(*device, DEVCB_##_cb);
devcb = &duart_base_device::set_irq_cb(*device, DEVCB_##_cb);
#define MCFG_MC68681_A_TX_CALLBACK(_cb) \
devcb = &mc68681_base_device::set_a_tx_cb(*device, DEVCB_##_cb);
devcb = &duart_base_device::set_a_tx_cb(*device, DEVCB_##_cb);
#define MCFG_MC68681_B_TX_CALLBACK(_cb) \
devcb = &mc68681_base_device::set_b_tx_cb(*device, DEVCB_##_cb);
devcb = &duart_base_device::set_b_tx_cb(*device, DEVCB_##_cb);
// deprecated: use ipX_w() instead
#define MCFG_MC68681_INPORT_CALLBACK(_cb) \
devcb = &mc68681_base_device::set_inport_cb(*device, DEVCB_##_cb);
devcb = &duart_base_device::set_inport_cb(*device, DEVCB_##_cb);
#define MCFG_MC68681_OUTPORT_CALLBACK(_cb) \
devcb = &mc68681_base_device::set_outport_cb(*device, DEVCB_##_cb);
devcb = &duart_base_device::set_outport_cb(*device, DEVCB_##_cb);
#define MCFG_MC68681_SET_EXTERNAL_CLOCKS(_a, _b, _c, _d) \
mc68681_base_device::static_set_clocks(*device, _a, _b, _c, _d);
duart_base_device::static_set_clocks(*device, _a, _b, _c, _d);
// SC28C94 specific callbacks
#define MCFG_SC28C94_ADD(_tag, _clock) \
@ -48,13 +42,13 @@
#define MC68681_RX_FIFO_SIZE 3
// forward declaration
class mc68681_base_device;
class duart_base_device;
// mc68681_channel class
class mc68681_channel : public device_t, public device_serial_interface
// duart_channel class
class duart_channel : public device_t, public device_serial_interface
{
public:
mc68681_channel(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
duart_channel(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@ -107,7 +101,7 @@ private:
uint8_t tx_data;
uint8_t tx_ready;
mc68681_base_device *m_uart;
duart_base_device *m_uart;
void write_MR(uint8_t data);
void write_CR(uint8_t data);
@ -115,15 +109,15 @@ private:
void recalc_framing();
};
class mc68681_base_device : public device_t
class duart_base_device : public device_t
{
friend class mc68681_channel;
friend class duart_channel;
public:
required_device<mc68681_channel> m_chanA;
required_device<mc68681_channel> m_chanB;
optional_device<mc68681_channel> m_chanC;
optional_device<mc68681_channel> m_chanD;
required_device<duart_channel> m_chanA;
required_device<duart_channel> m_chanB;
optional_device<duart_channel> m_chanC;
optional_device<duart_channel> m_chanD;
// inline configuration helpers
static void static_set_clocks(device_t &device, int clk3, int clk4, int clk5, int clk6);
@ -131,16 +125,15 @@ public:
// API
virtual DECLARE_READ8_MEMBER(read);
virtual DECLARE_WRITE8_MEMBER(write);
uint8_t get_irq_vector() { m_read_vector = true; return IVR; }
DECLARE_WRITE_LINE_MEMBER( rx_a_w ) { m_chanA->device_serial_interface::rx_w((uint8_t)state); }
DECLARE_WRITE_LINE_MEMBER( rx_b_w ) { m_chanB->device_serial_interface::rx_w((uint8_t)state); }
template <class Object> static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast<mc68681_base_device &>(device).write_irq.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast<mc68681_base_device &>(device).write_a_tx.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast<mc68681_base_device &>(device).write_b_tx.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast<mc68681_base_device &>(device).read_inport.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast<mc68681_base_device &>(device).write_outport.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast<duart_base_device &>(device).write_irq.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast<duart_base_device &>(device).write_a_tx.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast<duart_base_device &>(device).write_b_tx.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast<duart_base_device &>(device).read_inport.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast<duart_base_device &>(device).write_outport.set_callback(std::forward<Object>(cb)); }
// new-style push handlers for input port bits
DECLARE_WRITE_LINE_MEMBER( ip0_w );
@ -151,8 +144,10 @@ public:
DECLARE_WRITE_LINE_MEMBER( ip5_w );
DECLARE_WRITE_LINE_MEMBER( ip6_w );
bool irq_pending() const { return (ISR & IMR) != 0; }
protected:
mc68681_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
duart_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@ -164,6 +159,9 @@ protected:
devcb_write8 write_outport;
int32_t ip3clk, ip4clk, ip5clk, ip6clk;
protected:
virtual void update_interrupts();
private:
TIMER_CALLBACK_MEMBER( duart_timer_callback );
@ -171,14 +169,11 @@ private:
uint8_t ACR; /* Auxiliary Control Register */
uint8_t IMR; /* Interrupt Mask Register */
uint8_t ISR; /* Interrupt Status Register */
uint8_t IVR; /* Interrupt Vector Register */
uint8_t OPCR; /* Output Port Conf. Register */
uint8_t OPR; /* Output Port Register */
PAIR CTR; /* Counter/Timer Preset Value */
uint8_t IPCR; /* Input Port Control Register */
bool m_read_vector; // if this is read and IRQ is active, it counts as pulling IACK
/* state */
uint8_t IP_last_state; /* last state of IP bits */
@ -186,15 +181,14 @@ private:
uint8_t half_period;
emu_timer *duart_timer;
double duart68681_get_ct_rate();
uint16_t duart68681_get_ct_count();
void duart68681_start_ct(int count);
double get_ct_rate();
uint16_t get_ct_count();
void start_ct(int count);
int calc_baud(int ch, uint8_t data);
void clear_ISR_bits(int mask);
void set_ISR_bits(int mask);
void update_interrupts();
int get_ch(mc68681_channel *ch)
int get_ch(duart_channel *ch)
{
if (ch == m_chanA)
{
@ -212,16 +206,36 @@ private:
return 3;
}
mc68681_channel *get_channel(int chan);
duart_channel *get_channel(int chan);
};
class mc68681_device : public mc68681_base_device
class scn2681_device : public duart_base_device
{
public:
scn2681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class mc68681_device : public duart_base_device
{
public:
mc68681_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
uint8_t get_irq_vector() { m_read_vector = true; return IVR; }
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void update_interrupts() override;
private:
bool m_read_vector; // if this is read and IRQ is active, it counts as pulling IACK
uint8_t IVR; /* Interrupt Vector Register */
};
class sc28c94_device : public mc68681_base_device
class sc28c94_device : public duart_base_device
{
public:
sc28c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -241,10 +255,10 @@ protected:
private:
};
class mc68340_duart_device : public mc68681_base_device
class mc68340_duart_device : public duart_base_device
{
public:
mc68340_duart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
mc68340_duart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override;
@ -254,9 +268,10 @@ protected:
mc68340_duart_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(SCN2681, scn2681_device)
DECLARE_DEVICE_TYPE(MC68681, mc68681_device)
DECLARE_DEVICE_TYPE(SC28C94, sc28c94_device)
DECLARE_DEVICE_TYPE(MC68340_DUART, mc68340_duart_device)
DECLARE_DEVICE_TYPE(MC68681_CHANNEL, mc68681_channel)
DECLARE_DEVICE_TYPE(DUART_CHANNEL, duart_channel)
#endif // MAME_MACHINE_MC68681_H

5
src/emu/diexec.h
View File

@ -164,8 +164,6 @@ public:
int input_state(int linenum) const { return m_input[linenum].m_curstate; }
void pulse_input_line(int irqline, const attotime &duration);
void pulse_input_line_and_vector(int irqline, int vector, const attotime &duration);
void pulse_input_line(int irqline, int cycles) { pulse_input_line(irqline, cycles_to_attotime(cycles * min_cycles())); }
void pulse_input_line_and_vector(int irqline, int vector, int cycles) { pulse_input_line_and_vector(irqline, vector, cycles_to_attotime(cycles * min_cycles())); }
// suspend/resume
void suspend(u32 reason, bool eatcycles);
@ -300,6 +298,9 @@ private:
void suspend_resume_changed();
attoseconds_t minimum_quantum() const;
public:
attotime minimum_quantum_time() const { return attotime(0, minimum_quantum()); }
};
// iterator

20
src/emu/drivers/xtal.h
View File

@ -152,12 +152,14 @@ enum
XTAL_14MHz = 14000000,
XTAL_14_112MHz = 14112000, /* Timex/Sinclair TS2068 */
XTAL_14_192640MHz = 14192640, /* Reported by Central Data 2650 document, true xtal unchecked on PCB */
XTAL_14_218MHz = 14218000, /* Dragon */
XTAL_14_3MHz = 14300000, /* Agat-7 */
XTAL_14_314MHz = 14314000, /* Taito TTL Board */
XTAL_14_31818MHz = 14318181, /* Extremely common, used on 100's of PCBs (4x NTSC subcarrier) */
XTAL_14_705882MHz = 14705882, /* Aleck64 */
XTAL_14_7456MHz = 14745600, /* Namco System 12 & System Super 22/23 for JVS */
XTAL_15MHz = 15000000, /* Sinclair QL, Amusco Poker */
XTAL_15_30072MHz = 15300720, /* Microterm 420 */
XTAL_15_36MHz = 15360000, /* Visual 1050 */
XTAL_15_4MHz = 15400000, /* DVK KSM */
XTAL_15_468MHz = 15468480, /* Bank Panic h/w, Sega G80 */
@ -168,6 +170,7 @@ enum
XTAL_16_384MHz = 16384000,
XTAL_16_4MHz = 16400000, /* MS 6102 */
XTAL_16_5888MHz = 16588800, /* SM 7238 */
XTAL_16_6698MHz = 16669800, /* Qume QVT-102 */
XTAL_16_67MHz = 16670000,
XTAL_16_777216MHz = 16777216, /* Nintendo Game Boy Advance */
XTAL_16_9344MHz = 16934400, /* Usually used to drive 90's Yamaha OPL/FM chips (44100 * 384) */
@ -178,8 +181,10 @@ enum
XTAL_17_9712MHz = 17971200,
XTAL_18MHz = 18000000, /* S.A.R, Ikari Warriors 3 */
XTAL_18_432MHz = 18432000, /* Extremely common, used on 100's of PCBs (48000 * 384) */
XTAL_18_575MHz = 18575000, /* Visual 102 */
XTAL_18_720MHz = 18720000, /* Nokia MikroMikko 1 */
XTAL_18_8696MHz = 18869600, /* Memorex 2178 */
XTAL_19_3396MHz = 19339600, /* TeleVideo TVI-955 80-column display clock */
XTAL_19_6MHz = 19600000, /* Universal Mr. Do - Model 8021 PCB */
XTAL_19_6608MHz = 19660800, /* Euro League (bootleg), labeled as "UKI 19.6608 20PF" */
XTAL_19_923MHz = 19923000, /* Cinematronics vectors */
@ -195,6 +200,7 @@ enum
XTAL_22_1184MHz = 22118400, /* Amusco Poker */
XTAL_22_3210MHz = 22321000, /* Apple LaserWriter II NT */
XTAL_22_656MHz = 22656000, /* Super Pinball Action (~1440x NTSC line rate) */
XTAL_23_814MHz = 23814000, /* TeleVideo TVI-912C & 950 */
XTAL_23_9616MHz = 23961600, /* Osborne 4 (Vixen) */
XTAL_24MHz = 24000000, /* Mario, 80's Data East games, 80's Konami games */
XTAL_24_0734MHz = 24073400, /* DEC Rainbow 100 */
@ -206,10 +212,12 @@ enum
XTAL_25_447MHz = 25447000, /* Namco EVA3A (Funcube2) */
XTAL_25_590906MHz = 25590906, /* Atari Jaguar NTSC */
XTAL_25_593900MHz = 25593900, /* Atari Jaguar PAL */
XTAL_25_7715MHz = 25771500, /* HP-2622A */
XTAL_26MHz = 26000000, /* Gaelco PCBs */
XTAL_26_601712MHz = 26601712, /* Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */
XTAL_26_66666MHz = 26666666, /* Irem M92 but most use 27MHz */
XTAL_26_686MHz = 26686000, /* Typically used on 90's Taito PCBs to drive the custom chips */
XTAL_26_9892MHz = 26989200, /* TeleVideo 965 */
XTAL_27MHz = 27000000, /* Some Banpresto games macrossp, Irem M92 and 90's Toaplan games */
XTAL_27_164MHz = 27164000, /* Typically used on 90's Taito PCBs to drive the custom chips */
XTAL_27_2109MHz = 27210900, /* LA Girl */
@ -221,9 +229,11 @@ enum
XTAL_28_64MHz = 28640000, /* Fukki FG-1c AI AM-2 PCB */
XTAL_28_7MHz = 28700000,
XTAL_29_4912MHz = 29491200, /* Xerox Alto-II system clock (tagged 29.4MHz in the schematics) */
XTAL_29_876MHz = 29876000, /* Qume QVT-103 */
XTAL_30MHz = 30000000, /* Impera Magic Card */
XTAL_30_4761MHz = 30476100, /* Taito JC */
XTAL_30_8MHz = 30800000, /* 15IE-00-013 */
XTAL_31_684MHz = 31684000, /* TeleVideo TVI-955 132-column display clock */
XTAL_32MHz = 32000000,
XTAL_32_22MHz = 32220000, /* Typically used on 90's Data East PCBs (close to 9x NTSC subcarrier which is 32.215905Mhz*/
XTAL_32_5304MHz = 32530400, /* Seta 2 */
@ -239,12 +249,18 @@ enum
XTAL_40MHz = 40000000,
XTAL_42MHz = 42000000, /* BMC A-00211 - Popo Bear */
XTAL_42_9545MHz = 42954545, /* CPS3 (12x NTSC subcarrier)*/
XTAL_43_320MHz = 43320000, /* DEC VT420 */
XTAL_44_1MHz = 44100000, /* Subsino's Bishou Jan */
XTAL_44_4528MHz = 44452800, /* TeleVideo 965 */
XTAL_45MHz = 45000000, /* Eolith with Hyperstone CPUs */
XTAL_45_158MHz = 45158000, /* Sega Model 2A video board, Model 3 CPU board */
XTAL_45_6192Mhz = 45619200, /* DEC VK100 */
XTAL_45_582MHz = 45582000, /* Zentec Zephyr */
XTAL_45_6192MHz = 45619200, /* DEC VK100 */
XTAL_45_8304MHz = 45830400, /* Microterm 5510 */
XTAL_47_736MHz = 47736000, /* Visual 100 */
XTAL_48MHz = 48000000, /* Williams/Midway Y/Z-unit system / SSV board */
XTAL_48_384MHz = 48384000, /* Namco NB-1 */
XTAL_48_654MHz = 48654000, /* Qume QVT-201 */
XTAL_48_66MHz = 48660000, /* Zaxxon */
XTAL_49_152MHz = 49152000, /* Used on some Namco PCBs, Baraduke h/w, System 21, Super System 22 */
XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */
@ -258,6 +274,7 @@ enum
XTAL_55MHz = 55000000, /* Eolith Vega */
XTAL_57_2727MHz = 57272727, /* Psikyo SH2 with /2 divider (16x NTSC subcarrier)*/
XTAL_58MHz = 58000000, /* Magic Reel (Play System) */
XTAL_59_2920MHz = 59292000, /* Data General D461 */
XTAL_60MHz = 60000000,
XTAL_61_44MHz = 61440000, /* dkong */
XTAL_64MHz = 64000000, /* BattleToads */
@ -266,6 +283,7 @@ enum
XTAL_72MHz = 72000000, /* Aristocrat MKV */
XTAL_72_576MHz = 72576000, /* Centipede, Millipede, Missile Command, Let's Go Bowling "Multipede" */
XTAL_73_728MHz = 73728000, /* Ms. Pac-Man/Galaga 20th Anniversary */
XTAL_87_18336MHz = 87183360, /* AT&T 630 MTG */
XTAL_100MHz = 100000000, /* PSX-based Namco System 12, Vegas, Sony ZN1-2-based */
XTAL_101_4912MHz = 101491200, /* PSX-based Namco System 10 */
XTAL_200MHz = 200000000, /* Base SH4 CPU (Naomi, Hikaru etc.) */

2
src/mame/audio/dcs.cpp
View File

@ -1962,7 +1962,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::dcs_irq )
/* generate the (internal, thats why the pulse) irq */
if (LOG_DCS_IO)
logerror("dcs_irq: Genrating interrupt\n");
m_cpu->pulse_input_line(ADSP2105_IRQ1, 1);
m_cpu->pulse_input_line(ADSP2105_IRQ1, m_cpu->minimum_quantum_time());
}
/* store it */

2
src/mame/audio/rax.cpp
View File

@ -227,7 +227,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( acclaim_rax_device::dma_timer_callback )
if (m_control_regs[BDMA_CONTROL_REG] & 8)
m_cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
else
m_cpu->pulse_input_line(ADSP2181_BDMA, 1);
m_cpu->pulse_input_line(ADSP2181_BDMA, m_cpu->minimum_quantum_time());
timer.adjust(attotime::never);
}

2
src/mame/audio/taito_en.cpp
View File

@ -276,7 +276,7 @@ MACHINE_CONFIG_MEMBER( taito_en_device::device_add_mconfig )
MCFG_CPU_ADD("audiocpu", M68000, XTAL_30_4761MHz / 2)
MCFG_CPU_PROGRAM_MAP(en_sound_map)
MCFG_MC68681_ADD("duart68681", XTAL_16MHz / 4)
MCFG_DEVICE_ADD("duart68681", MC68681, XTAL_16MHz / 4)
MCFG_MC68681_SET_EXTERNAL_CLOCKS(XTAL_16MHz/2/8, XTAL_16MHz/2/16, XTAL_16MHz/2/16, XTAL_16MHz/2/8)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(taito_en_device, duart_irq_handler))

2
src/mame/drivers/adp.cpp
View File

@ -542,7 +542,7 @@ static MACHINE_CONFIG_START( quickjac )
MCFG_MACHINE_START_OVERRIDE(adp_state,skattv)
MCFG_MACHINE_RESET_OVERRIDE(adp_state,skattv)
MCFG_MC68681_ADD( "duart68681", XTAL_8_664MHz / 2 )
MCFG_DEVICE_ADD( "duart68681", MC68681, XTAL_8_664MHz / 2 )
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(adp_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_device, rx))
MCFG_MC68681_INPORT_CALLBACK(IOPORT("DSW1"))

231
src/mame/drivers/at.cpp
View File

@ -3,7 +3,7 @@
/***************************************************************************
IBM AT Compatibles
Commodore PC 30-III and PC 40-III
=================================
Links: http://www.richardlagendijk.nl/cip/computer/item/pc30iii/en , ftp://ftp.zimmers.net/pub/cbm-pc/firmware/pc30/
@ -18,6 +18,40 @@ Mass storage: One HD disk drive standard, second drive optional; PC 30-III: 20MB
On board: Serial, Parallel, Commodore 1532 Mouse port (MS Bus mouse compatible), Keyboard, Beeper, Floppy (2 devices), AT-IDE (1 device)
Options: 80287
Sanyo MBC-28
============
Links: http://www.cc-computerarchiv.de/CC-Archiv/bc-alt/gb-san/gb-san-12_91.html
Form factor: Desktop
CPU: 80386sx-20
RAM: 1MB - 8MB on board
Mass storage: 1.44MB Floppy disk drive and 80MB IDE hard disk
On board: 2xserial, parallel, bus mouse, keyboard
To-Do: Complains about missing mouse hardware (Bus Mouse), hangs in POST
Siemens PCD-2
=============
Links: http://www.z80.eu/siemenspcd2.html , http://www.z80.eu/downloads/Siemens_PCD-2_SW-Monitor-Buchse-Belegung.pdf , https://www.computerwoche.de/a/at-klon-und-lan-ergaenzen-siemens-palette,1166395
Form Factor: low profile desktop
CPU: 80286-12 on a Tandon supplied slot CPU card
RAM: 1MB - 4MB in four SIMM modules
Mass storage: 1.2MB Floppy disk drive and 20MB or 40MB MFM harddisk
Bus: Vertical passive ISA backplane with six slots
On board: 2xserial, parallel, floppy, keyboard, RTC, MFM harddisk controller piggybacked to bus extension on slot CPU
Options: 80287
Compaq Portable III
===================
Links: http://www.old-computers.com/museum/computer.asp?c=1064 , http://www.freakedenough.at/infoseiten/read.php?id=66 , http://www.1000bit.it/ad/bro/compaq/CompaqProtable3.pdf , http://oldcomputers.net/compaqiii.pdf
Info: The later Compaq Portable 386 uses the same case, screen and video adapter; Models: 1 (no), 20 (20MB) and 40 (40MB harddisk)
Form factor: Luggable
CPU: AMD N80L286-12/S 12MHz (could be downclocked to 8MHz)
RAM: 640KB, attitional RAM cards were 512KB or 2MB to give 1.1MB, 1.6MB, 2.1MB, 2.6MB, 4.6MB or 6.6MB of total RAM
Video: AT&T 6300/Olivetti M24 driver compatible "Super CGA" with a 640x400 red/amber Plasma screen
Mass storage: One 1.2MB floppy disk drive, no/20MB/40MB hard disk
On board: Serial, Parallel, RTC, RGBI (external Monitor), keyboard
Options: 80827, Expansion box with 2 ISA slots, 300/1200Baud internal Modem, Compaq EGA Board
To-Do: Emulate Graphics card fully
***************************************************************************/
#include "emu.h"
@ -623,6 +657,22 @@ static MACHINE_CONFIG_START( ficpio2 )
MCFG_VT82C496_REGION("isa")
MACHINE_CONFIG_END
// Compaq Portable III
static MACHINE_CONFIG_DERIVED( comportiii, ibm5170 )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_CLOCK(XTAL_48MHz / 4)
MCFG_DEVICE_MODIFY(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
MCFG_RAM_EXTRA_OPTIONS("1152K,1664K,2176K,2688K,4736K,6784K")
MCFG_DEVICE_MODIFY("isa1")
MCFG_DEVICE_SLOT_INTERFACE(pc_isa8_cards, "cga_m24", false)
MCFG_DEVICE_MODIFY("isa4")
MCFG_DEVICE_SLOT_INTERFACE(pc_isa16_cards, "hdc", false)
MACHINE_CONFIG_END
//**************************************************************************
// ROM DEFINITIONS
//**************************************************************************
ROM_START( ibm5170 )
ROM_REGION(0x20000,"bios", 0)
@ -758,6 +808,13 @@ ROM_START( at )
ROM_SYSTEM_BIOS(13, "aw303gs", "Award 303GS")
ROMX_LOAD( "aw303gs-hi.bin", 0x18001, 0x4000, CRC(82392e18) SHA1(042453b7b29933a1b72301d21fcf8fa6b293c9c9), ROM_SKIP(1) | ROM_BIOS(14) )
ROMX_LOAD( "aw303gs-lo.bin", 0x18000, 0x4000, CRC(a4cf8ba1) SHA1(b73e34be3b2754aaed1ac06471f4441fea06c67c), ROM_SKIP(1) | ROM_BIOS(14) )
ROM_SYSTEM_BIOS(14, "ami_200960", "AMI 200960")
ROMX_LOAD( "ami_286_bios_sn200960_even.bin", 0x10000, 0x8000, CRC(67745815) SHA1(ca6886c7a0716a92a8720fc71ff2d95328c467a5), ROM_SKIP(1) | ROM_BIOS(15) )
ROMX_LOAD( "ami_286_bios_sn200960_odd.bin", 0x10001, 0x8000, CRC(360a5f73) SHA1(1b1980fd99779d0cdc4764928a641e081b35ee9f), ROM_SKIP(1) | ROM_BIOS(15) )
ROM_SYSTEM_BIOS(15, "magitronic_b233", "Magitronic B233") // SUNTAC Chipset, http://toastytech.com/manuals/Magitronic%20B233%20Manual.pdf
ROMX_LOAD( "magitronic_b233_ami_1986_286_bios_plus_even_sa027343.bin", 0x10000, 0x8000, CRC(d4a18444) SHA1(d95242104fc9b51cf26de72ef5b6c52d99ccce30), ROM_SKIP(1) | ROM_BIOS(16) )
ROMX_LOAD( "magitronic_b233_ami_1986_286_bios_plus_odd_sa027343.bin", 0x10001, 0x8000, CRC(7ac3db56) SHA1(4340140450c4f8b4f6a19eae50a5dc5449edfdf6), ROM_SKIP(1) | ROM_BIOS(16) )
// ROM_LOAD("magitronic_b233_ami_1986_keyboard_bios_plus_a025352.bin", 0x0000, 0x1000), CRC(84fd28fd) SHA1(43da0f49e52c921844e60b6f3d22f2a316d865cc) )
ROM_END
@ -907,34 +964,36 @@ ROM_START( at486 )
ROM_SYSTEM_BIOS(8, "ficgiovt2_326", "FIC 486-GIO-VT2 3.26G") /* 1994-07-06 */
ROMX_LOAD("326g1c00.awd", 0x10000, 0x10000, CRC(2e729ab5) SHA1(b713f97fa0e0b62856dab917f417f5b21020b354), ROM_BIOS(9))
ROM_SYSTEM_BIOS(9, "ficgiovt2_3276", "FIC 486-GIO-VT2 3.276") /* 1997-07-17 */
ROMX_LOAD("32760000.bin", 0x10000, 0x10000, CRC(ad179128) SHA1(595f67ba4a1c8eb5e118d75bf657fff3803dcf4f), ROM_BIOS(10))
ROM_SYSTEM_BIOS(9, "486_gio_vt2","VBS1.08H 486-GVT-2") /* 1995-06-19 */
ROMX_LOAD("award_486_gio_vt2.bin", 0x10000, 0x10000, CRC(58d7c7f9) SHA1(097f15ec2bd672cb3f1763298ca802c7ff26021f), ROM_BIOS(10)) // Vobis version, Highscreen boot logo
ROM_SYSTEM_BIOS(10, "ficgiovt2_3276", "FIC 486-GIO-VT2 3.276") /* 1997-07-17 */
ROMX_LOAD("32760000.bin", 0x10000, 0x10000, CRC(ad179128) SHA1(595f67ba4a1c8eb5e118d75bf657fff3803dcf4f), ROM_BIOS(11))
ROM_SYSTEM_BIOS(10, "ficgvt2", "FIC 486-GVT-2 3.07G") /* 1994-11-02 */
ROMX_LOAD("3073.bin", 0x10000, 0x10000, CRC(a6723863) SHA1(ee93a2f1ec84a3d67e267d0a490029f9165f1533), ROM_BIOS(11))
ROM_SYSTEM_BIOS(11, "ficgpak2", "FIC 486-PAK-2 5.15S") /* 1995-06-27, includes Phoenix S3 TRIO64 Enhanced VGA BIOS 1.4-01 */
ROMX_LOAD("515sbd8a.awd", 0x00000, 0x20000, CRC(778247e1) SHA1(07d8f0f2464abf507be1e8dfa06cd88737782411), ROM_BIOS(12))
ROM_SYSTEM_BIOS(11, "ficgvt2", "FIC 486-GVT-2 3.07G") /* 1994-11-02 */
ROMX_LOAD("3073.bin", 0x10000, 0x10000, CRC(a6723863) SHA1(ee93a2f1ec84a3d67e267d0a490029f9165f1533), ROM_BIOS(12))
ROM_SYSTEM_BIOS(12, "ficgpak2", "FIC 486-PAK-2 5.15S") /* 1995-06-27, includes Phoenix S3 TRIO64 Enhanced VGA BIOS 1.4-01 */
ROMX_LOAD("515sbd8a.awd", 0x00000, 0x20000, CRC(778247e1) SHA1(07d8f0f2464abf507be1e8dfa06cd88737782411), ROM_BIOS(13))
ROM_SYSTEM_BIOS(12, "ficpio3g7", "FIC 486-PIO-3 1.15G705") /* pnp */
ROMX_LOAD("115g705.awd", 0x00000, 0x20000, CRC(ddb1544a) SHA1(d165c9ecdc9397789abddfe0fef69fdf954fa41b), ROM_BIOS(13))
ROM_SYSTEM_BIOS(13, "ficpio3g1", "FIC 486-PIO-3 1.15G105") /* non-pnp */
ROMX_LOAD("115g105.awd", 0x00000, 0x20000, CRC(b327eb83) SHA1(9e1ff53e07ca035d8d43951bac345fec7131678d), ROM_BIOS(14))
ROM_SYSTEM_BIOS(13, "ficpio3g7", "FIC 486-PIO-3 1.15G705") /* pnp */
ROMX_LOAD("115g705.awd", 0x00000, 0x20000, CRC(ddb1544a) SHA1(d165c9ecdc9397789abddfe0fef69fdf954fa41b), ROM_BIOS(14))
ROM_SYSTEM_BIOS(14, "ficpio3g1", "FIC 486-PIO-3 1.15G105") /* non-pnp */
ROMX_LOAD("115g105.awd", 0x00000, 0x20000, CRC(b327eb83) SHA1(9e1ff53e07ca035d8d43951bac345fec7131678d), ROM_BIOS(15))
ROM_SYSTEM_BIOS(14, "ficpos", "FIC 486-POS")
ROMX_LOAD("116di6b7.bin", 0x00000, 0x20000, CRC(d1d84616) SHA1(2f2b27ce100cf784260d8e155b48db8cfbc63285), ROM_BIOS(15))
ROM_SYSTEM_BIOS(15, "ficpvt", "FIC 486-PVT 5.15") /* 1995-06-27 */
ROMX_LOAD("5150eef3.awd", 0x00000, 0x20000, CRC(eb35785d) SHA1(1e601bc8da73f22f11effe9cdf5a84d52576142b), ROM_BIOS(16))
ROM_SYSTEM_BIOS(16, "ficpvtio", "FIC 486-PVT-IO 5.162W2") /* 1995-10-05 */
ROMX_LOAD("5162cf37.awd", 0x00000, 0x20000, CRC(378d813d) SHA1(aa674eff5b972b31924941534c3c988f6f78dc93), ROM_BIOS(17))
ROM_SYSTEM_BIOS(17, "ficvipio426", "FIC 486-VIP-IO 4.26GN2") /* 1994-12-07 */
ROMX_LOAD("426gn2.awd", 0x00000, 0x20000, CRC(5f472aa9) SHA1(9160abefae32b450e973651c052657b4becc72ba), ROM_BIOS(18))
ROM_SYSTEM_BIOS(18, "ficvipio427", "FIC 486-VIP-IO 4.27GN2A") /* 1996-02-14 */
ROMX_LOAD("427gn2a.awd", 0x00000, 0x20000, CRC(035ad56d) SHA1(0086db3eff711fc710b30e7f422fc5b4ab8d47aa), ROM_BIOS(19))
ROM_SYSTEM_BIOS(19, "ficvipio2", "FIC 486-VIP-IO2")
ROMX_LOAD("1164g701.awd", 0x00000, 0x20000, CRC(7b762683) SHA1(84debce7239c8b1978246688ae538f7c4f519d13), ROM_BIOS(20))
ROM_SYSTEM_BIOS(15, "ficpos", "FIC 486-POS")
ROMX_LOAD("116di6b7.bin", 0x00000, 0x20000, CRC(d1d84616) SHA1(2f2b27ce100cf784260d8e155b48db8cfbc63285), ROM_BIOS(16))
ROM_SYSTEM_BIOS(16, "ficpvt", "FIC 486-PVT 5.15") /* 1995-06-27 */
ROMX_LOAD("5150eef3.awd", 0x00000, 0x20000, CRC(eb35785d) SHA1(1e601bc8da73f22f11effe9cdf5a84d52576142b), ROM_BIOS(17))
ROM_SYSTEM_BIOS(17, "ficpvtio", "FIC 486-PVT-IO 5.162W2") /* 1995-10-05 */
ROMX_LOAD("5162cf37.awd", 0x00000, 0x20000, CRC(378d813d) SHA1(aa674eff5b972b31924941534c3c988f6f78dc93), ROM_BIOS(18))
ROM_SYSTEM_BIOS(18, "ficvipio426", "FIC 486-VIP-IO 4.26GN2") /* 1994-12-07 */
ROMX_LOAD("426gn2.awd", 0x00000, 0x20000, CRC(5f472aa9) SHA1(9160abefae32b450e973651c052657b4becc72ba), ROM_BIOS(19))
ROM_SYSTEM_BIOS(19, "ficvipio427", "FIC 486-VIP-IO 4.27GN2A") /* 1996-02-14 */
ROMX_LOAD("427gn2a.awd", 0x00000, 0x20000, CRC(035ad56d) SHA1(0086db3eff711fc710b30e7f422fc5b4ab8d47aa), ROM_BIOS(20))
ROM_SYSTEM_BIOS(20, "ficvipio2", "FIC 486-VIP-IO2")
ROMX_LOAD("1164g701.awd", 0x00000, 0x20000, CRC(7b762683) SHA1(84debce7239c8b1978246688ae538f7c4f519d13), ROM_BIOS(21))
ROM_SYSTEM_BIOS(20, "qdi", "QDI PX486DX33/50P3")
ROMX_LOAD("qdi_px486.u23", 0x10000, 0x10000, CRC(c80ecfb6) SHA1(34cc9ef68ff719cd0771297bf184efa83a805f3e), ROM_BIOS(21))
ROM_SYSTEM_BIOS(21, "qdi", "QDI PX486DX33/50P3")
ROMX_LOAD("qdi_px486.u23", 0x10000, 0x10000, CRC(c80ecfb6) SHA1(34cc9ef68ff719cd0771297bf184efa83a805f3e), ROM_BIOS(22))
ROM_END
@ -1146,59 +1205,93 @@ ROM_START( pc2386 )
ROM_LOAD( "40211.ic801", 0x000, 0x1000, CRC(4440d981) SHA1(a76006a929f26c178e09908c66f28abc92e7744c) )
ROM_END
// Kaypro 286i
ROM_START( k286i )
ROM_REGION(0x20000,"bios", 0)
ROM_LOAD16_BYTE( "81_1598", 0x18000, 0x4000, CRC(e25a1e43) SHA1(d00b976ac94323f3867b1c256e315839c906dd5a) )
ROM_LOAD16_BYTE( "81_1599", 0x18001, 0x4000, CRC(08e2a17b) SHA1(a86ef116e82eb9240e60b52f76e5e510cdd393fd) )
ROM_END
// Sanyo MBC-28
ROM_START( mbc28 ) // Complains about missing mouse hardware
ROM_REGION(0x20000,"bios", 0)
ROM_LOAD16_BYTE( "mbc-28_sl-dt_ver.1620_low_din_checksum_(454f00)_27c256-15.bin", 0x10000, 0x8000, CRC(423b4693) SHA1(08e877baa59ebd9a1817dcdd27138c638edcbb84) )
ROM_LOAD16_BYTE( "mbc-28_sl-dt_ver.1620_high_din_checksum_(45ae00)_27c256-15.bin", 0x10001, 0x8000, CRC(557b7346) SHA1(c0dca88627f8451211172441fefb4020839fb87f) )
ROM_END
// Siemens PCD-2
ROM_START( pcd2 )
ROM_REGION(0x20000,"bios", 0)
ROM_LOAD16_BYTE( "bios_tandon_188782-032a_rev_5.21_low.bin", 0x10000, 0x8000, CRC(a8fbffd3) SHA1(8a3ad5bc7f86ff984be10a8b1ae4542be4c80e5f) )
ROM_LOAD16_BYTE( "bios_tandon_188782-031a_rev_5.21_high.bin", 0x10001, 0x8000, CRC(8d7dfdcc) SHA1(d1d58c0ad7db60399f9a93db48feb10e44ffd624) )
// ROM_LOAD( "kbd_8742_award_upi_1.61_rev_1.01.bin", 0x0000, 0x0800, CRC(bb8a1979) SHA(43d35ecf76e5e8d5ddf6c32b0f6f628a7542d6e4) ) // 8742 keyboard controller
// ROM_LOAD( "vga_nmc27c256q_435-0029-04_1988_video7_arrow.bin", 0x8000, 0x0800, CRC(0d8d7dff) SHA(cb5b2ab78d480ec3164d16c9c75f1449fa81a0e7) ) // Video7 VGA card
// ROM_LOAD( "vga_nmc27c256q_435-0030-04_1988_video7_arrow.bin", 0x8000, 0x0800, CRC(0935c003) SHA(35ac571818f616b856da8bbf6a7a9172f68b3ab6) )
ROM_END
// Compaq Portable III
ROM_START( comportiii )
ROM_REGION(0x20000,"bios", 0)
ROM_SYSTEM_BIOS(0, "106779-002", "106779-002")
ROMX_LOAD( "cpiii_87c128_106779-002.bin", 0x18000, 0x4000, CRC(aef8f532) SHA1(b0374d5aa8766f11043cbaee007e6d311f792e44), ROM_SKIP(1) | ROM_BIOS(1) )
ROMX_LOAD( "cpiii_87c128_106778-002.bin", 0x18001, 0x4000, CRC(c259f628) SHA1(df0ca8aaead617114fbecb4ececbd1a3bb1d5f30), ROM_SKIP(1) | ROM_BIOS(1) )
// ROM_LOAD( "cpiii_106436-001.bin", 0x0000, 0x1000, CRC(5acc716b) SHA(afe166ecf99136d15269e44ebf2d66317945bf9c) ) // keyboard
ROM_SYSTEM_BIOS(1, "109737-002", "109737-002")
ROMX_LOAD( "109738-002.bin", 0x10000, 0x8000, CRC(db131b8a) SHA1(6a8517a771272edf16870501fc1ed94c7555ef45), ROM_SKIP(1) | ROM_BIOS(2) )
ROMX_LOAD( "109737-002.bin", 0x10001, 0x8000, CRC(8463cc41) SHA1(cb9801591e4a2cd13bbcc40739c9e675ba84c079), ROM_SKIP(1) | ROM_BIOS(2) )
ROM_END
/***************************************************************************
Game driver(s)
***************************************************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
COMP ( 1984, ibm5170, 0, ibm5150, ibm5170, 0, at_state, at, "International Business Machines", "IBM PC/AT 5170", MACHINE_NOT_WORKING )
COMP ( 1985, ibm5170a, ibm5170, 0, ibm5170a, 0, at_state, at, "International Business Machines", "IBM PC/AT 5170 8MHz", MACHINE_NOT_WORKING )
COMP ( 1985, ibm5162, ibm5170, 0, ibm5162, 0, at_state, at, "International Business Machines", "IBM PC/XT-286 5162", MACHINE_NOT_WORKING )
COMP ( 1989, ibmps1es, ibm5170, 0, ibmps1, 0, at_state, at, "International Business Machines", "IBM PS/1 (Spanish)", MACHINE_NOT_WORKING )
COMP ( 1987, at, ibm5170, 0, ibm5162, 0, at_state, at, "<generic>", "PC/AT (CGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1987, atvga, ibm5170, 0, atvga, 0, at_state, at, "<generic>", "PC/AT (VGA, MF2 Keyboard)" , MACHINE_NOT_WORKING )
COMP ( 1988, at386, ibm5170, 0, at386, 0, at_state, at, "<generic>", "PC/AT 386 (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1988, ct386sx, ibm5170, 0, ct386sx, 0, at_state, at, "<generic>", "NEAT 386SX (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1988, at386sx, ibm5170, 0, at386sx, 0, at_state, at, "<generic>", "PC/AT 386SX (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1990, at486, ibm5170, 0, at486, 0, at_state, at, "<generic>", "PC/AT 486 (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1989, neat, ibm5170, 0, neat, 0, at_state, at, "<generic>", "NEAT (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1989, ec1842, ibm5150, 0, ec1842, 0, at_state, at, "<unknown>", "EC-1842", MACHINE_NOT_WORKING )
COMP ( 1993, ec1849, ibm5170, 0, ec1842, 0, at_state, at, "<unknown>", "EC-1849", MACHINE_NOT_WORKING )
COMP ( 1993, megapc, 0, 0, megapc, 0, megapc_state, megapc, "Amstrad plc", "MegaPC", MACHINE_NOT_WORKING )
COMP ( 199?, megapcpl, megapc, 0, megapcpl, 0, megapc_state, megapcpl, "Amstrad plc", "MegaPC Plus", MACHINE_NOT_WORKING )
COMP ( 199?, megapcpla, megapc, 0, megapcpla, 0, at_state, megapcpla,"Amstrad plc", "MegaPC Plus (WINBUS chipset)", MACHINE_NOT_WORKING )
COMP ( 1989, pc2386, ibm5170, 0, at386l, 0, at_state, at, "Amstrad plc", "Amstrad PC2386", MACHINE_NOT_WORKING )
COMP ( 1991, aprfte, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot FT//ex 486 (J3 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1991, ftsserv, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot FTs (Scorpion)", MACHINE_NOT_WORKING )
COMP ( 1992, aprpand, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot FTs (Panther Rev F 1.02.26)", MACHINE_NOT_WORKING )
COMP ( 1990, aplanst, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot LANstation (Krypton Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1990, aplannb, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot LANstation (Novell Remote Boot)", MACHINE_NOT_WORKING )
COMP ( 1992, aplscar, ibm5170, 0, at486l, 0, at_state, at, "Apricot", "Apricot LS Pro (Caracal Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1992, aplsbon, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot LS Pro (Bonsai Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1988, xb42663, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot Qi 300 (Rev D,E & F Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1988, qi600, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot Qi 600 (Neptune Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1990, qi900, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot Qi 900 (Scorpion Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1989, apvxft, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot VX FT server", MACHINE_NOT_WORKING )
COMP ( 1991, apxenls3, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN-LS (Venus IV Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1993, apxlsam, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN-LS II (Samurai Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1987, apxeni, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot XEN-i 386 (Leopard Motherboard)" , MACHINE_NOT_WORKING )
COMP ( 1989, xb42639, ibm5170, 0, xb42639, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus I Motherboard 286)" , MACHINE_NOT_WORKING )
COMP ( 1990, xb42639a, ibm5170, 0, xb42639, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus II Motherboard 286)" , MACHINE_NOT_WORKING )
COMP ( 1989, xb42664, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus I Motherboard 386)" , MACHINE_NOT_WORKING )
COMP ( 1990, xb42664a, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus II Motherboard 386)" , MACHINE_NOT_WORKING )
COMP ( 1993, apxena1, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN PC (A1 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1993, apxenp2, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN PC (P2 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1990, c386sx16, ibm5170, 0, at386sx, 0, at_state, at, "Commodore Business Machines", "Commodore 386SX-16", MACHINE_NOT_WORKING )
COMP ( 1988, pc30iii, ibm5170, 0, pc30iii, 0, at_state, at, "Commodore Business Machines", "PC 30-III", MACHINE_NOT_WORKING )
COMP ( 1988, pc40iii, ibm5170, 0, pc40iii, 0, at_state, at, "Commodore Business Machines", "PC 40-III", MACHINE_NOT_WORKING )
COMP ( 1995, ficpio2, ibm5170, 0, ficpio2, 0, at_state, atpci, "FIC", "486-PIO-2", MACHINE_NOT_WORKING )
COMP ( 1985, k286i, ibm5170, 0, k286i, 0, at_state, at, "Kaypro", "286i", MACHINE_NOT_WORKING )
COMP ( 1991, t2000sx, ibm5170, 0, at386sx, 0, at_state, at, "Toshiba", "T2000SX", MACHINE_NOT_WORKING )
// YEAR NAME PARENT COMPAT MACHINE INIT INPUT STATE COMPANY FULLNAME FLAGS
COMP ( 1984, ibm5170, 0, ibm5150, ibm5170, 0, at_state, at, "International Business Machines", "IBM PC/AT 5170", MACHINE_NOT_WORKING )
COMP ( 1985, ibm5170a, ibm5170, 0, ibm5170a, 0, at_state, at, "International Business Machines", "IBM PC/AT 5170 8MHz", MACHINE_NOT_WORKING )
COMP ( 1985, ibm5162, ibm5170, 0, ibm5162, 0, at_state, at, "International Business Machines", "IBM PC/XT-286 5162", MACHINE_NOT_WORKING )
COMP ( 1989, ibmps1es, ibm5170, 0, ibmps1, 0, at_state, at, "International Business Machines", "IBM PS/1 (Spanish)", MACHINE_NOT_WORKING )
COMP ( 1987, at, ibm5170, 0, ibm5162, 0, at_state, at, "<generic>", "PC/AT (CGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1987, atvga, ibm5170, 0, atvga, 0, at_state, at, "<generic>", "PC/AT (VGA, MF2 Keyboard)" , MACHINE_NOT_WORKING )
COMP ( 1988, at386, ibm5170, 0, at386, 0, at_state, at, "<generic>", "PC/AT 386 (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1988, ct386sx, ibm5170, 0, ct386sx, 0, at_state, at, "<generic>", "NEAT 386SX (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1988, at386sx, ibm5170, 0, at386sx, 0, at_state, at, "<generic>", "PC/AT 386SX (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1990, at486, ibm5170, 0, at486, 0, at_state, at, "<generic>", "PC/AT 486 (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1989, neat, ibm5170, 0, neat, 0, at_state, at, "<generic>", "NEAT (VGA, MF2 Keyboard)", MACHINE_NOT_WORKING )
COMP ( 1989, ec1842, ibm5150, 0, ec1842, 0, at_state, at, "<unknown>", "EC-1842", MACHINE_NOT_WORKING )
COMP ( 1993, ec1849, ibm5170, 0, ec1842, 0, at_state, at, "<unknown>", "EC-1849", MACHINE_NOT_WORKING )
COMP ( 1993, megapc, 0, 0, megapc, 0, megapc_state, megapc, "Amstrad plc", "MegaPC", MACHINE_NOT_WORKING )
COMP ( 199?, megapcpl, megapc, 0, megapcpl, 0, megapc_state, megapcpl, "Amstrad plc", "MegaPC Plus", MACHINE_NOT_WORKING )
COMP ( 199?, megapcpla, megapc, 0, megapcpla, 0, at_state, megapcpla,"Amstrad plc", "MegaPC Plus (WINBUS chipset)", MACHINE_NOT_WORKING )
COMP ( 1989, pc2386, ibm5170, 0, at386l, 0, at_state, at, "Amstrad plc", "Amstrad PC2386", MACHINE_NOT_WORKING )
COMP ( 1991, aprfte, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot FT//ex 486 (J3 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1991, ftsserv, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot FTs (Scorpion)", MACHINE_NOT_WORKING )
COMP ( 1992, aprpand, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot FTs (Panther Rev F 1.02.26)", MACHINE_NOT_WORKING )
COMP ( 1990, aplanst, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot LANstation (Krypton Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1990, aplannb, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot LANstation (Novell Remote Boot)", MACHINE_NOT_WORKING )
COMP ( 1992, aplscar, ibm5170, 0, at486l, 0, at_state, at, "Apricot", "Apricot LS Pro (Caracal Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1992, aplsbon, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot LS Pro (Bonsai Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1988, xb42663, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot Qi 300 (Rev D,E & F Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1988, qi600, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot Qi 600 (Neptune Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1990, qi900, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot Qi 900 (Scorpion Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1989, apvxft, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot VX FT server", MACHINE_NOT_WORKING )
COMP ( 1991, apxenls3, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN-LS (Venus IV Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1993, apxlsam, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN-LS II (Samurai Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1987, apxeni, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot XEN-i 386 (Leopard Motherboard)" , MACHINE_NOT_WORKING )
COMP ( 1989, xb42639, ibm5170, 0, xb42639, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus I Motherboard 286)" , MACHINE_NOT_WORKING )
COMP ( 1990, xb42639a, ibm5170, 0, xb42639, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus II Motherboard 286)" , MACHINE_NOT_WORKING )
COMP ( 1989, xb42664, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus I Motherboard 386)" , MACHINE_NOT_WORKING )
COMP ( 1990, xb42664a, ibm5170, 0, at386, 0, at_state, at, "Apricot", "Apricot XEN-S (Venus II Motherboard 386)" , MACHINE_NOT_WORKING )
COMP ( 1993, apxena1, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN PC (A1 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1993, apxenp2, ibm5170, 0, at486, 0, at_state, at, "Apricot", "Apricot XEN PC (P2 Motherboard)", MACHINE_NOT_WORKING )
COMP ( 1990, c386sx16, ibm5170, 0, at386sx, 0, at_state, at, "Commodore Business Machines", "Commodore 386SX-16", MACHINE_NOT_WORKING )
COMP ( 1988, pc30iii, ibm5170, 0, pc30iii, 0, at_state, at, "Commodore Business Machines", "PC 30-III", MACHINE_NOT_WORKING )
COMP ( 1988, pc40iii, ibm5170, 0, pc40iii, 0, at_state, at, "Commodore Business Machines", "PC 40-III", MACHINE_NOT_WORKING )
COMP ( 1995, ficpio2, ibm5170, 0, ficpio2, 0, at_state, atpci, "FIC", "486-PIO-2", MACHINE_NOT_WORKING )
COMP ( 1985, k286i, ibm5170, 0, k286i, 0, at_state, at, "Kaypro", "286i", MACHINE_NOT_WORKING )
COMP ( 1991, t2000sx, ibm5170, 0, at386sx, 0, at_state, at, "Toshiba", "T2000SX", MACHINE_NOT_WORKING )
COMP ( 199?, mbc28, ibm5170, 0, at386sx, 0, at_state, at, "Sanyo", "MBC-28", MACHINE_NOT_WORKING )
COMP ( 1986, pcd2, ibm5170, 0, ibm5170, 0, at_state, at, "Siemens", "PCD-2", MACHINE_NOT_WORKING )
COMP ( 1987, comportiii,ibm5170, 0, comportiii,0, at_state, at, "Compaq", "Portable III", MACHINE_NOT_WORKING )

42
src/mame/drivers/att4425.cpp
View File

@ -50,6 +50,11 @@ public:
, m_screen(*this, SCREEN_TAG)
{ }
DECLARE_WRITE8_MEMBER(port10_w);
DECLARE_WRITE8_MEMBER(port14_w);
DECLARE_READ8_MEMBER(port14_r);
DECLARE_READ8_MEMBER(port15_r);
DECLARE_WRITE_LINE_MEMBER(write_line_clock);
DECLARE_WRITE_LINE_MEMBER(write_keyboard_clock);
@ -69,19 +74,42 @@ private:
/* Memory Maps */
WRITE8_MEMBER(att4425_state::port10_w)
{
logerror("Writing %02X to port 10\n", data);
}
WRITE8_MEMBER(att4425_state::port14_w)
{
logerror("Writing %02X to port 14\n", data);
}
READ8_MEMBER(att4425_state::port14_r)
{
// only complement of bit 0 used?
return 0;
}
READ8_MEMBER(att4425_state::port15_r)
{
// status of something (at least bits 2 and 3 used)
return 0;
}
static ADDRESS_MAP_START( att4425_mem, AS_PROGRAM, 8, att4425_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION(Z80_TAG, 0)
AM_RANGE(0x8000, 0xffff) AM_RAM AM_SHARE("videoram") // c000..f7af?
ADDRESS_MAP_END
static ADDRESS_MAP_START( att4425_io, AS_IO, 8, att4425_state )
AM_RANGE(0x0000, 0x0000) AM_MIRROR(0xff00) AM_DEVREADWRITE(I8251_TAG, i8251_device, data_r, data_w)
AM_RANGE(0x0001, 0x0001) AM_MIRROR(0xff00) AM_DEVREADWRITE(I8251_TAG, i8251_device, status_r, control_w)
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_UNMAP // write 08
AM_RANGE(0x0010, 0x0010) AM_MIRROR(0xff00) AM_UNMAP // write 10
AM_RANGE(0x0014, 0x0015) AM_MIRROR(0xff00) AM_UNMAP // NVRAM? read 14, 15; write 14
AM_RANGE(0x0018, 0x001b) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_device, read, write)
AM_RANGE(0x001c, 0x001f) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80SIO_TAG, z80sio_device, ba_cd_r, ba_cd_w)
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_DEVREADWRITE(I8251_TAG, i8251_device, data_r, data_w)
AM_RANGE(0x01, 0x01) AM_DEVREADWRITE(I8251_TAG, i8251_device, status_r, control_w)
AM_RANGE(0x10, 0x10) AM_WRITE(port10_w)
AM_RANGE(0x14, 0x14) AM_READWRITE(port14_r, port14_w)
AM_RANGE(0x15, 0x15) AM_READ(port15_r)
AM_RANGE(0x18, 0x1b) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_device, read, write)
AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE(Z80SIO_TAG, z80sio_device, ba_cd_r, ba_cd_w)
ADDRESS_MAP_END
/* Input Ports */

2
src/mame/drivers/bfm_sc4.cpp
View File

@ -905,7 +905,7 @@ MACHINE_CONFIG_START( sc4_common )
MCFG_NVRAM_ADD_1FILL("nvram")
MCFG_MC68681_ADD("duart68681", 16000000/4) // ?? Mhz
MCFG_DEVICE_ADD("duart68681", MC68681, 16000000/4) // ?? Mhz
MCFG_MC68681_SET_EXTERNAL_CLOCKS(XTAL_16MHz/2/8, XTAL_16MHz/2/16, XTAL_16MHz/2/16, XTAL_16MHz/2/8)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(sc4_state, bfm_sc4_duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(sc4_state, bfm_sc4_duart_txa))

2
src/mame/drivers/bfm_sc5.cpp
View File

@ -217,7 +217,7 @@ MACHINE_CONFIG_START( bfm_sc5 )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_MC68681_ADD("duart68681", 16000000/4) // ?? Mhz
MCFG_DEVICE_ADD("duart68681", MC68681, 16000000/4) // ?? Mhz
MCFG_MC68681_SET_EXTERNAL_CLOCKS(16000000/2/8, 16000000/2/16, 16000000/2/16, 16000000/2/8)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(bfm_sc5_state, bfm_sc5_duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(bfm_sc5_state, bfm_sc5_duart_txa))

2
src/mame/drivers/cat.cpp
View File

@ -1070,7 +1070,7 @@ static MACHINE_CONFIG_START( cat )
MCFG_VIDEO_START_OVERRIDE(cat_state,cat)
MCFG_MC68681_ADD( "duartn68681", (XTAL_19_968MHz*2)/11 ) // duart is normally clocked by 3.6864mhz xtal, but cat seemingly uses a divider from the main xtal instead which probably yields 3.63054545Mhz. There is a trace to cut and a mounting area to allow using an actual 3.6864mhz xtal if you so desire
MCFG_DEVICE_ADD( "duartn68681", MC68681, (XTAL_19_968MHz*2)/11 ) // duart is normally clocked by 3.6864mhz xtal, but cat seemingly uses a divider from the main xtal instead which probably yields 3.63054545Mhz. There is a trace to cut and a mounting area to allow using an actual 3.6864mhz xtal if you so desire
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(cat_state, cat_duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(cat_state, cat_duart_txa))
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(cat_state, cat_duart_txb))

2
src/mame/drivers/cball.cpp
View File

@ -114,7 +114,7 @@ TIMER_CALLBACK_MEMBER(cball_state::interrupt_callback)
{
int scanline = param;
m_maincpu->pulse_input_line(0, 1);
m_maincpu->pulse_input_line(0, m_maincpu->minimum_quantum_time());
scanline = scanline + 32;

2
src/mame/drivers/changela.cpp
View File

@ -352,7 +352,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(changela_state::changela_scanline)
INTERRUPT_GEN_MEMBER(changela_state::chl_mcu_irq)
{
m_mcu->pulse_input_line(0, 1);
m_mcu->pulse_input_line(0, m_mcu->minimum_quantum_time());
}
void changela_state::machine_start()

117
src/mame/drivers/cit220.cpp Normal file
View File

@ -0,0 +1,117 @@
// license:BSD-3-Clause
// copyright-holders:
/***********************************************************************************************************************************
Skeleton driver for VT220-compatible terminals by C. Itoh/CIE Terminals.
The CIT-220+ Video Terminal was introduced as a direct competitor to DEC's VT220. It copied the design of the VT220 closely
enough to provoke a lawsuit, which led to its eventual withdrawal in favor of its successor, the CIT224.
************************************************************************************************************************************/
#include "emu.h"
#include "cpu/i8085/i8085.h"
#include "machine/i8251.h"
#include "machine/mc68681.h"
#include "video/scn2674.h"
#include "screen.h"
class cit220_state : public driver_device
{
public:
cit220_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_screen(*this, "screen")
//, m_p_chargen(*this, "chargen")
{ }
DECLARE_WRITE_LINE_MEMBER(sod_w);
SCN2674_DRAW_CHARACTER_MEMBER(draw_character);
private:
required_device<cpu_device> m_maincpu;
required_device<screen_device> m_screen;
//required_region_ptr<u8> m_p_chargen;
};
WRITE_LINE_MEMBER(cit220_state::sod_w)
{
// controls access to memory at Exxx?
}
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, cit220_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("maincpu", 0)
AM_RANGE(0x8000, 0x87ff) AM_RAM
AM_RANGE(0xa000, 0xa1ff) AM_ROM AM_REGION("eeprom", 0x800)
AM_RANGE(0xe000, 0xe7ff) AM_RAM // ???
ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_IO, 8, cit220_state )
AM_RANGE(0x00, 0x0f) AM_DEVREADWRITE("duart", scn2681_device, read, write)
AM_RANGE(0x10, 0x10) AM_DEVREADWRITE("usart", i8251_device, data_r, data_w)
AM_RANGE(0x11, 0x11) AM_DEVREADWRITE("usart", i8251_device, status_r, control_w)
AM_RANGE(0x20, 0x27) AM_DEVREADWRITE("avdc", scn2674_device, read, write)
AM_RANGE(0xa0, 0xa0) AM_UNMAP // ???
AM_RANGE(0xc0, 0xc0) AM_UNMAP // ???
ADDRESS_MAP_END
SCN2674_DRAW_CHARACTER_MEMBER(cit220_state::draw_character)
{
}
static ADDRESS_MAP_START( vram_map, 0, 8, cit220_state )
AM_RANGE(0x0000, 0x27ff) AM_NOP
ADDRESS_MAP_END
static INPUT_PORTS_START( cit220p )
INPUT_PORTS_END
static MACHINE_CONFIG_START( cit220p )
MCFG_CPU_ADD("maincpu", I8085A, 6000000)
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
MCFG_I8085A_SOD(WRITELINE(cit220_state, sod_w))
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(50)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_SIZE(720, 360)
MCFG_SCREEN_VISIBLE_AREA(0, 720-1, 0, 360-1)
MCFG_SCREEN_UPDATE_DEVICE("avdc", scn2674_device, screen_update)
MCFG_SCN2674_VIDEO_ADD("avdc", 4000000, INPUTLINE("maincpu", I8085_RST65_LINE))
MCFG_SCN2674_TEXT_CHARACTER_WIDTH(8)
MCFG_SCN2674_GFX_CHARACTER_WIDTH(8)
MCFG_SCN2674_DRAW_CHARACTER_CALLBACK_OWNER(cit220_state, draw_character)
MCFG_DEVICE_ADDRESS_MAP(0, vram_map)
MCFG_VIDEO_SET_SCREEN("screen")
MCFG_DEVICE_ADD("duart", SCN2681, 3686400)
MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", I8085_RST55_LINE))
MCFG_DEVICE_ADD("usart", I8251, 3000000)
MACHINE_CONFIG_END
ROM_START( cit220p )
ROM_REGION(0x8000, "maincpu", 0)
ROM_LOAD( "v17_001a.ic23", 0x0000, 0x4000, CRC(2cc43026) SHA1(366f57292c6e44571368c29e3258203779847356) )
ROM_LOAD( "v17_001b.ic24", 0x4000, 0x4000, CRC(a56b16f1) SHA1(c68f26b35453153f7defcf1cf2b7ad7fe36cc9e7) )
ROM_REGION(0x1000, "eeprom", 0)
ROM_LOAD( "eeprom.bin", 0x0000, 0x1000, CRC(7b24878a) SHA1(20086fb792a24339b65abe627aefbcf48e2abcf4) ) // don't know where this fits in
ROM_REGION(0x1000, "chargen", 0)
ROM_LOAD( "v20_cg.ic17", 0x0000, 0x1000, CRC(76ef7ca9) SHA1(6e7799ca0a41350fbc369bbbd4ab581150f37b10) )
ROM_REGION(0x10000, "keyboard", 0)
ROM_LOAD( "v00_kbd.bin", 0x0000, 0x1000, CRC(f9d24190) SHA1(c4e9ef8188afb18de373f2a537ca9b7a315bfb76) )
ROM_END
COMP( 1983, cit220p, 0, 0, cit220p, cit220p, cit220_state, 0, "C. Itoh", "CIT-220+ Video Terminal", MACHINE_IS_SKELETON )

2
src/mame/drivers/cvs.cpp
View File

@ -227,7 +227,7 @@ WRITE8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_w)
INTERRUPT_GEN_MEMBER(cvs_state::cvs_main_cpu_interrupt)
{
device.execute().pulse_input_line_and_vector(0, 0x03, 1);
device.execute().pulse_input_line_and_vector(0, 0x03, device.execute().minimum_quantum_time());
cvs_scroll_stars();
}

64
src/mame/drivers/d400.cpp Normal file
View File

@ -0,0 +1,64 @@
// license:BSD-3-Clause
// copyright-holders:
/***********************************************************************************************************************************
Skeleton driver for Data General Dasher 400 series terminals.
************************************************************************************************************************************/
#include "emu.h"
#include "cpu/m6809/m6809.h"
#include "machine/mc68681.h"
#include "machine/x2212.h"
class d400_state : public driver_device
{
public:
d400_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
{ }
private:
required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, d400_state )
AM_RANGE(0x0000, 0x3fff) AM_RAM
AM_RANGE(0x4800, 0x48ff) AM_RAM
AM_RANGE(0x5000, 0x50ff) AM_RAM
AM_RANGE(0x6000, 0x6fff) AM_RAM
AM_RANGE(0x7800, 0x780f) AM_DEVREADWRITE("duart", scn2681_device, read, write)
AM_RANGE(0x7880, 0x78bf) AM_DEVREADWRITE("novram", x2210_device, read, write)
AM_RANGE(0x7c00, 0x7c00) AM_WRITENOP
AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("maincpu", 0)
ADDRESS_MAP_END
static INPUT_PORTS_START( d461 )
INPUT_PORTS_END
static MACHINE_CONFIG_START( d461 )
MCFG_CPU_ADD("maincpu", M6809, 4'000'000)
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_DEVICE_ADD("novram", X2210, 0)
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz)
MACHINE_CONFIG_END
/**************************************************************************************************************
Data General D461.
Chips: SCN2681A, X2210P, 2x HM6116P-2, 2x HM6264P-20, HD68B09EP, CRT9007, 1x 8-sw dip.
Crystals: 3.6864, 59.2920
***************************************************************************************************************/
ROM_START( d461 )
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "dgc_100_5776-05.bin", 0x0000, 0x8000, CRC(fdce2132) SHA1(82eac1751c31f99d4490505e16af5e7e7a52b310) )
ROM_END
COMP( 1986, d461, 0, 0, d461, d461, d400_state, 0, "Data General", "Dasher D461", MACHINE_IS_SKELETON )

157
src/mame/drivers/dectalk.cpp
View File

@ -261,7 +261,7 @@ public:
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_dsp(*this, "dsp"),
m_duart(*this, "duartn68681"),
m_duart(*this, "duart"),
m_nvram(*this, "x2212"),
m_dac(*this, "dac")
{
@ -277,27 +277,27 @@ public:
uint8_t m_outfifo_count;
uint8_t m_outfifo_tail_ptr;
uint8_t m_outfifo_head_ptr;
uint8_t m_infifo_semaphore; // latch for status of output fifo, d-latch 74ls74 @ E64 'lower half'
uint8_t m_spc_error_latch; // latch for error status of speech dsp, d-latch 74ls74 @ E64 'upper half'
uint8_t m_m68k_spcflags_latch; // latch for initializing the speech dsp, d-latch 74ls74 @ E29 'lower half', AND latch for spc irq enable, d-latch 74ls74 @ E29 'upper half'; these are stored in bits 0 and 6 respectively, the rest of the bits stored here MUST be zeroed!
uint8_t m_m68k_tlcflags_latch; // latch for telephone interface stuff, d-latches 74ls74 @ E93 'upper half' and @ 103 'upper and lower halves'
uint8_t m_simulate_outfifo_error; // simulate an error on the outfifo, which does something unusual to the dsp latches
uint8_t m_tlc_tonedetect;
uint8_t m_tlc_ringdetect;
bool m_infifo_semaphore; // latch for status of output fifo, d-latch 74ls74 @ E64 'lower half'
bool m_spc_error_latch; // latch for error status of speech dsp, d-latch 74ls74 @ E64 'upper half'
uint8_t m_m68k_spcflags_latch; // latch for initializing the speech dsp, d-latch 74ls74 @ E29 'lower half', AND latch for spc irq enable, d-latch 74ls74 @ E29 'upper half'; these are stored in bits 0 and 6 respectively, the rest of the bits stored here MUST be zeroed! // TODO: Split this into two separate booleans!
uint8_t m_m68k_tlcflags_latch; // latch for telephone interface stuff, d-latches 74ls74 @ E93 'upper half' and @ 103 'upper and lower halves' // TODO: Split this into three separate booleans!
bool m_simulate_outfifo_error; // simulate an error on the outfifo, which does something unusual to the dsp latches
bool m_tlc_tonedetect;
bool m_tlc_ringdetect;
uint8_t m_tlc_dtmf; // dtmf holding reg
uint8_t m_duart_inport; // low 4 bits of duart input
uint8_t m_duart_outport; // most recent duart output
uint8_t m_hack_self_test; // temp variable for hack below
bool m_hack_self_test_is_second_read; // temp variable for hack below
required_device<m68000_base_device> m_maincpu;
required_device<cpu_device> m_dsp;
required_device<mc68681_device> m_duart;
required_device<scn2681_device> m_duart;
required_device<x2212_device> m_nvram;
required_device<dac_word_interface> m_dac;
DECLARE_WRITE_LINE_MEMBER(dectalk_duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(dectalk_duart_txa);
DECLARE_READ8_MEMBER(dectalk_duart_input);
DECLARE_WRITE8_MEMBER(dectalk_duart_output);
DECLARE_WRITE_LINE_MEMBER(duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(duart_txa);
DECLARE_READ8_MEMBER(duart_input);
DECLARE_WRITE8_MEMBER(duart_output);
DECLARE_READ8_MEMBER(nvram_recall);
DECLARE_WRITE8_MEMBER(led_write);
DECLARE_WRITE8_MEMBER(nvram_store);
@ -315,10 +315,10 @@ public:
virtual void machine_start() override;
TIMER_CALLBACK_MEMBER(outfifo_read_cb);
emu_timer *m_outfifo_read_timer;
void dectalk_outfifo_check();
void dectalk_clear_all_fifos();
void dectalk_semaphore_w(uint16_t data);
uint16_t dectalk_outfifo_r();
void outfifo_check();
void clear_all_fifos();
void dsp_semaphore_w(bool state);
uint16_t dsp_outfifo_r();
DECLARE_WRITE_LINE_MEMBER(dectalk_reset);
protected:
@ -327,24 +327,24 @@ protected:
/* 2681 DUART */
WRITE_LINE_MEMBER(dectalk_state::dectalk_duart_irq_handler)
WRITE_LINE_MEMBER(dectalk_state::duart_irq_handler)
{
m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR);
//drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_6, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
//drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_6, HOLD_LINE, vector);
}
READ8_MEMBER(dectalk_state::dectalk_duart_input)
READ8_MEMBER(dectalk_state::duart_input)
{
uint8_t data = 0;
data |= m_duart_inport&0xf;
data |= (ioport("duart_in")->read()&0xf0);
if ((m_hack_self_test == 1) && (ioport("hacks")->read()&0x01)) data |= 0x10; // hack to prevent hang if selftest disable bit is kept low past the first read; i suppose the proper use of this bit was an incremental switch, or perhaps its expecting an interrupt later from serial in or tone in? added a dipswitch to disable the hack for testing
m_hack_self_test = 1;
if ((m_hack_self_test_is_second_read) && (ioport("hacks")->read()&0x01)) data |= 0x10; // hack to prevent hang if selftest disable bit is kept low past the first read; i suppose the proper use of this bit was an incremental switch, or perhaps its expecting an interrupt later from serial in or tone in? added a dipswitch to disable the hack for testing
m_hack_self_test_is_second_read = true;
return data;
}
WRITE8_MEMBER(dectalk_state::dectalk_duart_output)
WRITE8_MEMBER(dectalk_state::duart_output)
{
m_duart_outport = data;
#ifdef SERIAL_TO_STDERR
@ -352,7 +352,7 @@ WRITE8_MEMBER(dectalk_state::dectalk_duart_output)
#endif
}
WRITE_LINE_MEMBER(dectalk_state::dectalk_duart_txa)
WRITE_LINE_MEMBER(dectalk_state::duart_txa)
{
//TODO: this needs to be plumbed so it shows up optionally on a second terminal somehow, or connects to diserial
// it is the second 'alternate' serial connection on the DTC-01, used for a serial passthru and other stuff.
@ -365,7 +365,7 @@ WRITE_LINE_MEMBER(dectalk_state::dectalk_duart_txa)
#define SPC_INITIALIZE state->m_m68k_spcflags_latch&0x1 // speech initialize flag
#define SPC_IRQ_ENABLED ((state->m_m68k_spcflags_latch&0x40)>>6) // irq enable flag
void dectalk_state::dectalk_outfifo_check ()
void dectalk_state::outfifo_check()
{
// check if output fifo is full; if it isn't, set the int on the dsp
if (m_outfifo_count < 16)
@ -374,7 +374,7 @@ void dectalk_state::dectalk_outfifo_check ()
m_dsp->set_input_line(0, CLEAR_LINE); // TMS32010 INT
}
void dectalk_state::dectalk_clear_all_fifos( )
void dectalk_state::clear_all_fifos()
{
// clear fifos (TODO: memset would work better here...)
int i;
@ -384,14 +384,14 @@ void dectalk_state::dectalk_clear_all_fifos( )
for (i=0; i<32; i++) m_infifo[i] = 0;
m_infifo_count = 0;
m_infifo_tail_ptr = m_infifo_head_ptr = 0;
dectalk_outfifo_check();
outfifo_check();
}
// helper for dsp infifo_semaphore flag to make dealing with interrupts easier
void dectalk_state::dectalk_semaphore_w ( uint16_t data )
void dectalk_state::dsp_semaphore_w(bool state)
{
m_infifo_semaphore = data&1;
if ((m_infifo_semaphore == 1) && (m_m68k_spcflags_latch&0x40))
m_infifo_semaphore = state;
if ((m_infifo_semaphore) && (m_m68k_spcflags_latch&0x40))
{
#ifdef VERBOSE
logerror("speech int fired!\n");
@ -403,7 +403,7 @@ void dectalk_state::dectalk_semaphore_w ( uint16_t data )
}
// read the output fifo and set the interrupt line active on the dsp
uint16_t dectalk_state::dectalk_outfifo_r ( )
uint16_t dectalk_state::dsp_outfifo_r ( )
{
uint16_t data = 0xffff;
#ifdef USE_LOOSE_TIMING_OUTPUT
@ -422,7 +422,7 @@ uint16_t dectalk_state::dectalk_outfifo_r ( )
m_outfifo_count--;
}
m_outfifo_tail_ptr&=0xf;
dectalk_outfifo_check();
outfifo_check();
return ((data&0xfff0)^0x8000); // yes this is right, top bit is inverted and bottom 4 are ignored
//return data; // not right but want to get it working first
}
@ -430,7 +430,7 @@ uint16_t dectalk_state::dectalk_outfifo_r ( )
/* Machine reset and friends: stuff that needs setting up which IS directly affected by reset */
WRITE_LINE_MEMBER(dectalk_state::dectalk_reset)
{
m_hack_self_test = 0; // hack
m_hack_self_test_is_second_read = false; // hack
// stuff that is DIRECTLY affected by the RESET line
machine().device<x2212_device>("x2212")->recall(0);
machine().device<x2212_device>("x2212")->recall(1);
@ -439,12 +439,12 @@ WRITE_LINE_MEMBER(dectalk_state::dectalk_reset)
m_m68k_tlcflags_latch = 0; // initial status is tone detect int(d6) off, answer phone(d8) off, ring detect int(d14) off
m_duart->reset(); // reset the DUART
// stuff that is INDIRECTLY affected by the RESET line
dectalk_clear_all_fifos(); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function.
dectalk_semaphore_w(0); // on the original DECtalk DTC-01 pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true.
m_spc_error_latch = 0; // spc error latch is cleared on /reset
clear_all_fifos(); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function.
dsp_semaphore_w(false); // on the original DECtalk DTC-01 pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true.
m_spc_error_latch = false; // spc error latch is cleared on /reset
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
m_tlc_tonedetect = 0; // TODO, needed for selftest pass
m_tlc_ringdetect = 0; // TODO
m_tlc_tonedetect = false; // TODO, needed for selftest pass
m_tlc_ringdetect = false; // TODO
m_tlc_dtmf = 0; // TODO
m_duart_inport = 0xf;
m_duart_outport = 0;
@ -472,9 +472,9 @@ void dectalk_state::machine_start()
save_item(NAME(m_tlc_dtmf));
save_item(NAME(m_duart_inport));
save_item(NAME(m_duart_outport));
save_item(NAME(m_hack_self_test));
dectalk_clear_all_fifos();
m_simulate_outfifo_error = 0;
save_item(NAME(m_hack_self_test_is_second_read));
clear_all_fifos();
m_simulate_outfifo_error = false; // TODO: HACK for now, should be hooked to a fake dipswitch to simulate fifo errors
}
void dectalk_state::machine_reset()
@ -541,8 +541,8 @@ READ16_MEMBER(dectalk_state::m68k_spcflags_r)// 68k read from the speech flags
{
uint8_t data = 0;
data |= m_m68k_spcflags_latch; // bits 0 and 6
data |= m_spc_error_latch<<5; // bit 5
data |= m_infifo_semaphore<<7; // bit 7
data |= m_spc_error_latch?0x20:0; // bit 5
data |= m_infifo_semaphore?0x80:0; // bit 7
#ifdef SPC_LOG_68K
logerror("m68k: SPC flags read, returning data = %04X\n",data);
#endif
@ -564,11 +564,11 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
#ifdef SPC_LOG_68K
logerror(" | 0x01: initialize speech: fifos reset, clear error+semaphore latches and dsp reset\n");
#endif
dectalk_clear_all_fifos();
clear_all_fifos();
m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
// clear the two speech side latches
m_spc_error_latch = 0;
dectalk_semaphore_w(0);
m_spc_error_latch = false;
dsp_semaphore_w(false);
}
else // (data&0x1) == 0
{
@ -583,15 +583,15 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
logerror(" | 0x02: clear error+semaphore latches\n");
#endif
// clear the two speech side latches
m_spc_error_latch = 0;
dectalk_semaphore_w(0);
m_spc_error_latch = false;
dsp_semaphore_w(false);
}
if ((data&0x40) == 0x40) // bit 6 - spc irq enable
{
#ifdef SPC_LOG_68K
logerror(" | 0x40: speech int enabled\n");
#endif
if (m_infifo_semaphore == 1)
if (m_infifo_semaphore)
{
#ifdef SPC_LOG_68K
logerror(" speech int fired!\n");
@ -611,9 +611,9 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
READ16_MEMBER(dectalk_state::m68k_tlcflags_r)// dtmf flags read
{
uint16_t data = 0;
data |= m_m68k_tlcflags_latch; // bits 6, 8, 14;
data |= m_tlc_tonedetect<<7; // bit 7 is tone detect
data |= m_tlc_ringdetect<<14; // bit 15 is ring detect
data |= m_m68k_tlcflags_latch; // bits 6, 8, 14: tone detected int enable, answer phone relay enable, and ring int enable respectively
data |= m_tlc_tonedetect?0x0080:0; // bit 7 is tone detected
data |= m_tlc_ringdetect?0x8000:0; // bit 15 is ring detected
#ifdef TLC_LOG
logerror("m68k: TLC flags read, returning data = %04X\n",data);
#endif
@ -626,12 +626,12 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
logerror("m68k: TLC flags written with %04X, only storing %04X\n",data, data&0x4140);
#endif
m_m68k_tlcflags_latch = data&0x4140; // ONLY store bits 6 8 and 14!
if ((data&0x40) == 0x40) // bit 6: tone detect interrupt enable
if (data&0x40) // bit 6: tone detect interrupt enable
{
#ifdef TLC_LOG
logerror(" | 0x40: tone detect int enabled\n");
#endif
if (m_tlc_tonedetect == 1)
if (m_tlc_tonedetect)
{
#ifdef TLC_LOG
logerror(" TLC int fired!\n");
@ -644,10 +644,10 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
#ifdef TLC_LOG
logerror(" | 0x40 = 0: tone detect int disabled\n");
#endif
if (((data&0x4000)!=0x4000) || (m_tlc_ringdetect == 0)) // check to be sure we don't disable int if both ints fired at once
if ((!(data&0x4000)) || (!m_tlc_ringdetect)) // check to be sure we don't disable int if both ints fired at once
m_maincpu->set_input_line_and_vector(M68K_IRQ_4, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); // clear int because int is now disabled
}
if ((data&0x100) == 0x100) // bit 8: answer phone relay enable
if (data&0x100) // bit 8: answer phone relay enable
{
#ifdef TLC_LOG
logerror(" | 0x100: answer phone relay enabled\n");
@ -659,7 +659,7 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
logerror(" | 0x100 = 0: answer phone relay disabled\n");
#endif
}
if ((data&0x4000) == 0x4000) // bit 14: ring int enable
if (data&0x4000) // bit 14: ring int enable
{
#ifdef TLC_LOG
logerror(" | 0x4000: ring detect int enabled\n");
@ -677,7 +677,7 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
#ifdef TLC_LOG
logerror(" | 0x4000 = 0: ring detect int disabled\n");
#endif
if (((data&0x40)!=0x40) || (m_tlc_tonedetect == 0)) // check to be sure we don't disable int if both ints fired at once
if ((!(data&0x40)) || (!m_tlc_tonedetect)) // check to be sure we don't disable int if both ints fired at once
m_maincpu->set_input_line_and_vector(M68K_IRQ_4, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); // clear int because int is now disabled
}
}
@ -702,7 +702,7 @@ WRITE16_MEMBER(dectalk_state::spc_latch_outfifo_error_stats)// latch 74ls74 @ E6
#ifdef SPC_LOG_DSP
logerror("dsp: set fifo semaphore and set error status = %01X\n",data&1);
#endif
dectalk_semaphore_w((~m_simulate_outfifo_error)&1); // always set to 1 here, unless outfifo desync-between-the-three-parallel-fifo-chips error occurs.
dsp_semaphore_w(m_simulate_outfifo_error?false:true); // always set to true here, unless outfifo desync-between-the-three-parallel-fifo-chips error occurs.
m_spc_error_latch = (data&1); // latch the dsp 'soft error' state aka "ERROR DETECTED D5 H" on schematics (different from the outfifo error state above!)
}
@ -742,7 +742,7 @@ WRITE16_MEMBER(dectalk_state::spc_outfifo_data_w)
m_outfifo_head_ptr++;
m_outfifo_count++;
m_outfifo_head_ptr&=0xf;
//dectalk_outfifo_check(); // outfifo check should only be done in the audio 10khz polling function
//outfifo_check(); // outfifo check should only be done in the audio 10khz polling function
}
READ_LINE_MEMBER(dectalk_state::spc_semaphore_r)// Return state of d-latch 74ls74 @ E64 'lower half' in d0 which indicates whether infifo is readable
@ -780,10 +780,10 @@ a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4
0 x x x 1 x x 1 0 1 x x x x 0 * * * * * * * * 1 RW NVRAM (read/write volatile ram, does not store to eeprom)
0 x x x 1 x x 1 0 1 x x x x 1 * * * * * * * * 1 RW NVRAM (all reads do /recall from eeprom, all writes do /store to eeprom)
0 x x x 1 x x 1 1 0 x x x x x x x x x * * * * x RW DUART (keep in mind that a0 is not connected)
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 0 0 * RW SPC flags: fifo writable (readonly, d7), spc irq suppress (readwrite, d6), fifo error status (readonly, d5), 'fifo release'/clear-tms-fifo-error-status-bits (writeonly, d1), speech initialize/clear (readwrite, d0) [see schematic sheet 4]
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 0 1 0? W SPC fifo write (clocks fifo)
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 1 0 * RW TLC flags: ring detect (readonly, d15), ring detected irq enable (readwrite, d14), answer phone (readwrite, d8), tone detected (readonly, d7), tone detected irq enable (readwrite, d6) [see schematic sheet 6]
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 1 1 * R TLC tone chip read, reads on bits d0-d7 only, d4-d7 are tied low; d15-d8 are probably open bus
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 0 0 0? RW SPC SR (flags): fifo-not-full (spc writable) flag (readonly, d7), fifo-not-full spc irq mask (readwrite, d6), fifo error status (readonly, d5), 'fifo release'/clear-tms-fifo-error-status-bits (writeonly, d1), speech initialize/clear (readwrite, d0) [see schematic sheet 4]
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 0 1 * W SPC DR fifo write (clocks fifo)
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 1 0 * RW TLC SR (flags): ring detect (readonly, d15), ring detected irq enable (readwrite, d14), answer phone (readwrite, d8), tone detected (readonly, d7), tone detected irq enable (readwrite, d6) [see schematic sheet 6]
0 x x x 1 x x 1 1 1 x x x x x x x x x x x 1 1 * R TLC DR tone chip read, reads on bits d0-d7 only, d4-d7 are tied low; d15-d8 are probably open bus
1 x x x x x x x x x x x x x x x x x x x x x x x OPEN BUS
| | | | |
*/
@ -795,18 +795,13 @@ static ADDRESS_MAP_START(m68k_mem, AS_PROGRAM, 16, dectalk_state )
AM_RANGE(0x094000, 0x0943ff) AM_MIRROR(0x763c00) AM_WRITE8(led_write, 0x00ff) /* LED array */
AM_RANGE(0x094000, 0x0941ff) AM_MIRROR(0x763c00) AM_DEVREADWRITE8("x2212", x2212_device, read, write, 0xff00) /* Xicor X2212 NVRAM */
AM_RANGE(0x094200, 0x0943ff) AM_MIRROR(0x763c00) AM_READWRITE8(nvram_recall, nvram_store, 0xff00) /* Xicor X2212 NVRAM */
AM_RANGE(0x098000, 0x09801f) AM_MIRROR(0x763fe0) AM_DEVREADWRITE8("duartn68681", mc68681_device, read, write, 0xff ) /* DUART */
AM_RANGE(0x098000, 0x09801f) AM_MIRROR(0x763fe0) AM_DEVREADWRITE8("duart", scn2681_device, read, write, 0x00ff ) /* DUART */
AM_RANGE(0x09c000, 0x09c001) AM_MIRROR(0x763ff8) AM_READWRITE(m68k_spcflags_r, m68k_spcflags_w) /* SPC flags reg */
AM_RANGE(0x09c002, 0x09c003) AM_MIRROR(0x763ff8) AM_WRITE(m68k_infifo_w) /* SPC fifo reg */
AM_RANGE(0x09c004, 0x09c005) AM_MIRROR(0x763ff8) AM_READWRITE(m68k_tlcflags_r, m68k_tlcflags_w) /* telephone status flags */
AM_RANGE(0x09c006, 0x09c007) AM_MIRROR(0x763ff8) AM_READ(m68k_tlc_dtmf_r) /* telephone dtmf read */
ADDRESS_MAP_END
// do we even need this below?
static ADDRESS_MAP_START(m68k_io, AS_IO, 16, dectalk_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
ADDRESS_MAP_END
static ADDRESS_MAP_START(tms32010_mem, AS_PROGRAM, 16, dectalk_state )
AM_RANGE(0x000, 0x7ff) AM_ROM /* ROM */
ADDRESS_MAP_END
@ -858,8 +853,7 @@ void dectalk_state::device_timer(emu_timer &timer, device_timer_id id, int param
TIMER_CALLBACK_MEMBER(dectalk_state::outfifo_read_cb)
{
uint16_t data;
data = dectalk_outfifo_r();
uint16_t data = dsp_outfifo_r();
#ifdef VERBOSE
if (data!= 0x8000) logerror("sample output: %04X\n", data);
#endif
@ -867,24 +861,23 @@ TIMER_CALLBACK_MEMBER(dectalk_state::outfifo_read_cb)
m_dac->write(data >> 4);
// hack for break key, requires hacked up duart core so disabled for now
// also it doesn't work well, the setup menu is badly corrupt
/*device_t *duart = machine().device("duartn68681");
/*device_t *duart = machine().device("duart");
if (machine.input().code_pressed(KEYCODE_F1))
duart68681_rx_break(duart, 1, 1);
duart_rx_break(duart, 1, 1);
else
duart68681_rx_break(duart, 1, 0);*/
duart_rx_break(duart, 1, 0);*/
}
static MACHINE_CONFIG_START( dectalk )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_20MHz/2) /* E74 20MHz OSC (/2) */
MCFG_CPU_PROGRAM_MAP(m68k_mem)
MCFG_CPU_IO_MAP(m68k_io)
MCFG_MC68681_ADD( "duartn68681", XTAL_3_6864MHz ) /* 2681 duart (not 68681!); Y3 3.6864MHz Xtal */
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(dectalk_state, dectalk_duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(dectalk_state, dectalk_duart_txa))
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz) // MC2681 DUART ; Y3 3.6864MHz xtal */
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(dectalk_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(dectalk_state, duart_txa))
MCFG_MC68681_B_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_MC68681_INPORT_CALLBACK(READ8(dectalk_state, dectalk_duart_input))
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(dectalk_state, dectalk_duart_output))
MCFG_MC68681_INPORT_CALLBACK(READ8(dectalk_state, duart_input))
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(dectalk_state, duart_output))
MCFG_CPU_ADD("dsp", TMS32010, XTAL_20MHz) /* Y1 20MHz xtal */
MCFG_CPU_PROGRAM_MAP(tms32010_mem)
@ -909,7 +902,7 @@ static MACHINE_CONFIG_START( dectalk )
/* Y2 is a 3.579545 MHz xtal for the dtmf decoder chip */
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duartn68681", mc68681_device, rx_b_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_b_w))
MACHINE_CONFIG_END

6
src/mame/drivers/dragon.cpp
View File

@ -175,7 +175,7 @@ SLOT_INTERFACE_END
static MACHINE_CONFIG_START( dragon_base )
MCFG_DEVICE_MODIFY(":")
MCFG_DEVICE_CLOCK(XTAL_4_433619MHz)
MCFG_DEVICE_CLOCK(XTAL_14_218MHz/4)
// basic machine hardware
MCFG_CPU_ADD("maincpu", M6809E, DERIVED_CLOCK(1, 1))
@ -200,7 +200,7 @@ static MACHINE_CONFIG_START( dragon_base )
MCFG_PIA_IRQA_HANDLER(WRITELINE(coco_state, pia1_firq_a))
MCFG_PIA_IRQB_HANDLER(WRITELINE(coco_state, pia1_firq_b))
MCFG_SAM6883_ADD(SAM_TAG, XTAL_4_433619MHz, MAINCPU_TAG, AS_PROGRAM)
MCFG_SAM6883_ADD(SAM_TAG, XTAL_14_218MHz/4, MAINCPU_TAG, AS_PROGRAM)
MCFG_SAM6883_RES_CALLBACK(READ8(dragon_state, sam_read))
MCFG_CASSETTE_ADD("cassette")
MCFG_CASSETTE_FORMATS(coco_cassette_formats)
@ -280,7 +280,7 @@ static MACHINE_CONFIG_DERIVED( d64plus, dragon64 )
MCFG_PALETTE_ADD_MONOCHROME("palette")
// crtc
MCFG_MC6845_ADD("crtc", HD6845, "plus_screen", 14218000 / 8) /* unknown clock, hand tuned to get ~50 fps */
MCFG_MC6845_ADD("crtc", HD6845, "plus_screen", XTAL_14_218MHz/4/2)
MCFG_MC6845_SHOW_BORDER_AREA(false)
MCFG_MC6845_CHAR_WIDTH(8)
MCFG_MC6845_UPDATE_ROW_CB(d64plus_state, crtc_update_row)

2
src/mame/drivers/equites.cpp
View File

@ -416,7 +416,7 @@ WRITE8_MEMBER(equites_state::equites_c0f8_w)
case 1: // c0f9: RST75 trigger (written by NMI handler)
// Note: solder pad CP3 on the pcb would allow to disable this
m_audiocpu->pulse_input_line(I8085_RST75_LINE, 1);
m_audiocpu->pulse_input_line(I8085_RST75_LINE, m_audiocpu->minimum_quantum_time());
break;
case 2: // c0fa: INTR trigger (written by NMI handler)

30
src/mame/drivers/esq1.cpp
View File

@ -396,7 +396,7 @@ public:
{ }
required_device<cpu_device> m_maincpu;
required_device<mc68681_device> m_duart;
required_device<scn2681_device> m_duart;
required_device<esq1_filters> m_filters;
optional_device<wd1772_device> m_fdc;
optional_device<esqpanel2x40_device> m_panel;
@ -409,7 +409,6 @@ public:
DECLARE_WRITE8_MEMBER(mapper_w);
DECLARE_WRITE8_MEMBER(analog_w);
DECLARE_WRITE_LINE_MEMBER(duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(duart_tx_a);
DECLARE_WRITE_LINE_MEMBER(duart_tx_b);
DECLARE_WRITE8_MEMBER(duart_output);
@ -503,7 +502,7 @@ static ADDRESS_MAP_START( esq1_map, AS_PROGRAM, 8, esq1_state )
AM_RANGE(0x0000, 0x1fff) AM_RAM // OSRAM
AM_RANGE(0x4000, 0x5fff) AM_RAM // SEQRAM
AM_RANGE(0x6000, 0x63ff) AM_DEVREADWRITE("es5503", es5503_device, read, write)
AM_RANGE(0x6400, 0x640f) AM_DEVREADWRITE("duart", mc68681_device, read, write)
AM_RANGE(0x6400, 0x640f) AM_DEVREADWRITE("duart", scn2681_device, read, write)
AM_RANGE(0x6800, 0x68ff) AM_WRITE(analog_w)
AM_RANGE(0x7000, 0x7fff) AM_ROMBANK("osbank")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("osrom", 0x8000) // OS "high" ROM is always mapped here
@ -514,7 +513,7 @@ static ADDRESS_MAP_START( sq80_map, AS_PROGRAM, 8, esq1_state )
AM_RANGE(0x4000, 0x5fff) AM_RAM // SEQRAM
// AM_RANGE(0x4000, 0x5fff) AM_READWRITE(seqdosram_r, seqdosram_w)
AM_RANGE(0x6000, 0x63ff) AM_DEVREADWRITE("es5503", es5503_device, read, write)
AM_RANGE(0x6400, 0x640f) AM_DEVREADWRITE("duart", mc68681_device, read, write)
AM_RANGE(0x6400, 0x640f) AM_DEVREADWRITE("duart", scn2681_device, read, write)
AM_RANGE(0x6800, 0x68ff) AM_WRITE(analog_w)
AM_RANGE(0x6c00, 0x6dff) AM_WRITE(mapper_w)
AM_RANGE(0x6e00, 0x6fff) AM_READWRITE(wd1772_r, wd1772_w)
@ -537,11 +536,6 @@ ADDRESS_MAP_END
// OP5 = metronome hi
// OP6/7 = tape out
WRITE_LINE_MEMBER(esq1_state::duart_irq_handler)
{
m_maincpu->set_input_line(M6809_IRQ_LINE, state);
}
WRITE8_MEMBER(esq1_state::duart_output)
{
int bank = ((data >> 1) & 0x7);
@ -588,18 +582,18 @@ static MACHINE_CONFIG_START( esq1 )
MCFG_CPU_ADD("maincpu", M6809E, 4000000) // how fast is it?
MCFG_CPU_PROGRAM_MAP(esq1_map)
MCFG_MC68681_ADD("duart", 4000000)
MCFG_MC68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(esq1_state, duart_irq_handler))
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_8MHz / 2)
MCFG_MC68681_SET_EXTERNAL_CLOCKS(XTAL_8MHz / 16, XTAL_8MHz / 16, XTAL_8MHz / 8, XTAL_8MHz / 8)
MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", M6809_IRQ_LINE))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(esq1_state, duart_tx_a))
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(esq1_state, duart_tx_b))
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(esq1_state, duart_output))
MCFG_ESQPANEL2X40_ADD("panel")
MCFG_ESQPANEL_TX_CALLBACK(DEVWRITELINE("duart", mc68681_device, rx_b_w))
MCFG_ESQPANEL_TX_CALLBACK(DEVWRITELINE("duart", scn2681_device, rx_b_w))
MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin")
MCFG_MIDI_RX_HANDLER(DEVWRITELINE("duart", mc68681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
MCFG_MIDI_RX_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")
@ -609,7 +603,7 @@ static MACHINE_CONFIG_START( esq1 )
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
MCFG_ES5503_ADD("es5503", 7000000)
MCFG_ES5503_ADD("es5503", XTAL_8MHz)
MCFG_ES5503_OUTPUT_CHANNELS(8)
MCFG_ES5503_IRQ_FUNC(WRITELINE(esq1_state, esq1_doc_irq))
MCFG_ES5503_ADC_FUNC(READ8(esq1_state, esq1_adc_read))
@ -696,6 +690,6 @@ ROM_START( esqm )
ROM_END
CONS( 1986, esq1, 0 , 0, esq1, esq1, esq1_state, 0, "Ensoniq", "ESQ-1", MACHINE_NOT_WORKING )
CONS( 1986, esqm, esq1, 0, esq1, esq1, esq1_state, 0, "Ensoniq", "ESQ-M", MACHINE_NOT_WORKING )
CONS( 1988, sq80, 0, 0, sq80, esq1, esq1_state, 0, "Ensoniq", "SQ-80", MACHINE_NOT_WORKING )
CONS( 1986, esq1, 0 , 0, esq1, esq1, esq1_state, 0, "Ensoniq", "ESQ-1 Digital Wave Synthesizer", MACHINE_NOT_WORKING )
CONS( 1986, esqm, esq1, 0, esq1, esq1, esq1_state, 0, "Ensoniq", "ESQ-M Digital Wave Synthesizer Module", MACHINE_NOT_WORKING )
CONS( 1988, sq80, 0, 0, sq80, esq1, esq1_state, 0, "Ensoniq", "SQ-80 Cross Wave Synthesizer", MACHINE_NOT_WORKING )

4
src/mame/drivers/esq5505.cpp
View File

@ -616,7 +616,7 @@ static MACHINE_CONFIG_START( vfx )
MCFG_ESQPANEL_TX_CALLBACK(DEVWRITELINE("duart", mc68681_device, rx_b_w))
MCFG_ESQPANEL_ANALOG_CALLBACK(WRITE16(esq5505_state, analog_w))
MCFG_MC68681_ADD("duart", 4000000)
MCFG_DEVICE_ADD("duart", MC68681, 4000000)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(esq5505_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_a))
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_b))
@ -693,7 +693,7 @@ static MACHINE_CONFIG_START(vfx32)
MCFG_ESQPANEL_TX_CALLBACK(DEVWRITELINE("duart", mc68681_device, rx_b_w))
MCFG_ESQPANEL_ANALOG_CALLBACK(WRITE16(esq5505_state, analog_w))
MCFG_MC68681_ADD("duart", 4000000)
MCFG_DEVICE_ADD("duart", MC68681, 4000000)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(esq5505_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_a))
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_b))

12
src/mame/drivers/esqkt.cpp
View File

@ -8,7 +8,7 @@
Hardware:
CPU: 68EC020-16 CPU
Serial/timers: SCN2681 (MC68681 clone)
Serial/timers: SCN2681
Sound: 2xES5506
Effects: ES5510
@ -114,7 +114,7 @@ public:
required_device<m68ec020_device> m_maincpu;
required_device<es5510_device> m_esp;
required_device<mc68681_device> m_duart;
required_device<scn2681_device> m_duart;
required_device<esqpanel2x16_sq1_device> m_sq1panel;
required_device<midi_port_device> m_mdout;
@ -144,7 +144,7 @@ static ADDRESS_MAP_START( kt_map, AS_PROGRAM, 32, esqkt_state )
AM_RANGE(0x200000, 0x20003f) AM_DEVREADWRITE8("ensoniq", es5506_device, read, write, 0xffffffff)
AM_RANGE(0x240000, 0x24003f) AM_DEVREADWRITE8("ensoniq2", es5506_device, read, write, 0xffffffff)
AM_RANGE(0x280000, 0x2801ff) AM_DEVREADWRITE8("esp", es5510_device, host_r, host_w, 0xffffffff)
AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE8("duart", mc68681_device, read, write, 0xffffffff)
AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE8("duart", scn2681_device, read, write, 0xffffffff)
AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_SHARE("osram")
ADDRESS_MAP_END
@ -209,9 +209,9 @@ static MACHINE_CONFIG_START( kt )
MCFG_DEVICE_DISABLE()
MCFG_ESQPANEL2X16_SQ1_ADD("sq1panel")
MCFG_ESQPANEL_TX_CALLBACK(DEVWRITELINE("duart", mc68681_device, rx_b_w))
MCFG_ESQPANEL_TX_CALLBACK(DEVWRITELINE("duart", scn2681_device, rx_b_w))
MCFG_MC68681_ADD("duart", 4000000)
MCFG_DEVICE_ADD("duart", SCN2681, 4000000)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(esqkt_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(esqkt_state, duart_tx_a))
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(esqkt_state, duart_tx_b))
@ -220,7 +220,7 @@ static MACHINE_CONFIG_START( kt )
MCFG_MC68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin")
MCFG_MIDI_RX_HANDLER(DEVWRITELINE("duart", mc68681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
MCFG_MIDI_RX_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")

2
src/mame/drivers/fitfight.cpp
View File

@ -258,7 +258,7 @@ WRITE8_MEMBER(fitfight_state::snd_portc_w)
INTERRUPT_GEN_MEMBER(fitfight_state::snd_irq)
{
device.execute().pulse_input_line(UPD7810_INTF2, 1);
device.execute().pulse_input_line(UPD7810_INTF2, device.execute().minimum_quantum_time());
}

2
src/mame/drivers/gaelco3d.cpp
View File

@ -561,7 +561,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(gaelco3d_state::adsp_autobuffer_irq)
reg = m_adsp_ireg_base;
/* generate the (internal, thats why the pulse) irq */
m_adsp->pulse_input_line(ADSP2105_IRQ1, 1);
m_adsp->pulse_input_line(ADSP2105_IRQ1, m_adsp->minimum_quantum_time());
}
/* store it */

2
src/mame/drivers/harddriv.cpp
View File

@ -1446,7 +1446,7 @@ static MACHINE_CONFIG_START( driver_nomsp )
MCFG_M48T02_ADD("200e") // MK48T02
MCFG_EEPROM_2816_ADD("210e") // MK48Z02
MCFG_MC68681_ADD("duartn68681", XTAL_3_6864MHz)
MCFG_DEVICE_ADD("duartn68681", MC68681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(harddriv_state, harddriv_duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE ("rs232", rs232_port_device, write_txd))

2
src/mame/drivers/homedata.cpp
View File

@ -253,7 +253,7 @@ INTERRUPT_GEN_MEMBER(homedata_state::homedata_irq)
INTERRUPT_GEN_MEMBER(homedata_state::upd7807_irq)
{
device.execute().pulse_input_line(UPD7810_INTF1, 1);
device.execute().pulse_input_line(UPD7810_INTF1, device.execute().minimum_quantum_time());
}

2
src/mame/drivers/ht68k.cpp
View File

@ -129,7 +129,7 @@ static MACHINE_CONFIG_START( ht68k )
MCFG_CPU_PROGRAM_MAP(ht68k_mem)
/* video hardware */
MCFG_MC68681_ADD( "duart68681", XTAL_8MHz / 2 )
MCFG_DEVICE_ADD( "duart68681", MC68681, XTAL_8MHz / 2 )
MCFG_MC68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(ht68k_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))

2
src/mame/drivers/igs_m027.cpp
View File

@ -329,7 +329,7 @@ INPUT_PORTS_END
INTERRUPT_GEN_MEMBER(igs_m027_state::igs_majhong_interrupt)
{
device.execute().pulse_input_line(ARM7_FIRQ_LINE, 1);
device.execute().pulse_input_line(ARM7_FIRQ_LINE, device.execute().minimum_quantum_time());
}

4
src/mame/drivers/iris3130.cpp
View File

@ -423,11 +423,11 @@ static MACHINE_CONFIG_START( sgi_ip2 )
MCFG_CPU_ADD("maincpu", M68020, 16000000)
MCFG_CPU_PROGRAM_MAP(sgi_ip2_map)
MCFG_MC68681_ADD( "duart68681a", XTAL_3_6864MHz ) /* Y3 3.6864MHz Xtal ??? copy-over from dectalk */
MCFG_DEVICE_ADD( "duart68681a", MC68681, XTAL_3_6864MHz ) /* Y3 3.6864MHz Xtal ??? copy-over from dectalk */
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(sgi_ip2_state, duarta_irq_handler))
MCFG_MC68681_B_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_MC68681_ADD( "duart68681b", XTAL_3_6864MHz ) /* Y3 3.6864MHz Xtal ??? copy-over from dectalk */
MCFG_DEVICE_ADD( "duart68681b", MC68681, XTAL_3_6864MHz ) /* Y3 3.6864MHz Xtal ??? copy-over from dectalk */
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(sgi_ip2_state, duartb_irq_handler))
MCFG_MC146818_ADD( "rtc", XTAL_4_194304Mhz )

8
src/mame/drivers/lb186.cpp
View File

@ -92,7 +92,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( lb186_io, AS_IO, 16, lb186_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x1000, 0x101f) AM_DEVREADWRITE8("sc2681", mc68681_device, read, write, 0x00ff)
AM_RANGE(0x1000, 0x101f) AM_DEVREADWRITE8("duart", scn2681_device, read, write, 0x00ff)
AM_RANGE(0x1080, 0x108f) AM_DEVREADWRITE8("scsibus:7:ncr5380", ncr5380n_device, read, write, 0x00ff)
AM_RANGE(0x1100, 0x1107) AM_DEVREADWRITE8("fdc", wd1772_device, read, write, 0x00ff)
AM_RANGE(0x1180, 0x1181) AM_READWRITE8(scsi_dack_r, scsi_dack_w, 0x00ff)
@ -124,16 +124,16 @@ static MACHINE_CONFIG_START( lb186 )
MCFG_CPU_PROGRAM_MAP(lb186_map)
MCFG_CPU_IO_MAP(lb186_io)
MCFG_MC68681_ADD("sc2681", XTAL_3_6864MHz)
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(DEVWRITELINE("maincpu", i80186_cpu_device, int0_w))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232_1", rs232_port_device, write_txd))
MCFG_MC68681_B_TX_CALLBACK(DEVWRITELINE("rs232_2", rs232_port_device, write_txd))
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(lb186_state, sio_out_w))
MCFG_RS232_PORT_ADD("rs232_1", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sc2681", mc68681_device, rx_a_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_a_w))
MCFG_RS232_PORT_ADD("rs232_2", default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sc2681", mc68681_device, rx_b_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_b_w))
MCFG_WD1772_ADD("fdc", XTAL_16MHz/2)
MCFG_WD_FDC_INTRQ_CALLBACK(DEVWRITELINE("maincpu", i80186_cpu_device, int2_w))

2
src/mame/drivers/m90.cpp
View File

@ -699,7 +699,7 @@ INTERRUPT_GEN_MEMBER(m90_state::bomblord_fake_nmi)
INTERRUPT_GEN_MEMBER(m90_state::m90_interrupt)
{
device.execute().pulse_input_line(NEC_INPUT_LINE_INTP0, 1);
device.execute().pulse_input_line(NEC_INPUT_LINE_INTP0, device.execute().minimum_quantum_time());
}
INTERRUPT_GEN_MEMBER(m90_state::dynablsb_interrupt)

2
src/mame/drivers/maygay1b.cpp
View File

@ -776,7 +776,7 @@ MACHINE_CONFIG_START( maygay_m1 )
MCFG_CPU_IO_MAP(maygay_mcu_io)
MCFG_MC68681_ADD("duart68681", M1_DUART_CLOCK)
MCFG_DEVICE_ADD("duart68681", MC68681, M1_DUART_CLOCK)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(maygay1b_state, duart_irq_handler))
MCFG_MC68681_INPORT_CALLBACK(READ8(maygay1b_state, m1_duart_r))

2
src/mame/drivers/maygayv1.cpp
View File

@ -897,7 +897,7 @@ static MACHINE_CONFIG_START( maygayv1 )
MCFG_PALETTE_ADD("palette", 16)
MCFG_MC68681_ADD("duart68681", DUART_CLOCK)
MCFG_DEVICE_ADD("duart68681", MC68681, DUART_CLOCK)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(maygayv1_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(maygayv1_state, duart_txa))

38
src/mame/drivers/metro.cpp
View File

@ -108,7 +108,6 @@ driver modified by Hau
#include "sound/ym2413.h"
#include "sound/2610intf.h"
#include "sound/ymf278b.h"
#include "speaker.h"
@ -226,6 +225,25 @@ INTERRUPT_GEN_MEMBER(metro_state::metro_periodic_interrupt)
update_irq_state();
}
TIMER_DEVICE_CALLBACK_MEMBER(metro_state::bangball_scanline)
{
int scanline = param;
// vblank irq
if(scanline == 224)
{
m_requested_int[m_vblank_bit] = 1;
m_requested_int[4] = 1; // ???
update_irq_state();
}
else if(scanline < 224 && (*m_irq_enable & 2) == 0)
{
// pretty likely hblank irq (pressing a button when clearing a stage)
m_requested_int[1] = 1;
update_irq_state();
}
}
/* lev 2-7 (lev 1 seems sound related) */
INTERRUPT_GEN_MEMBER(metro_state::karatour_interrupt)
{
@ -3152,15 +3170,25 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( bangball, msgogo )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(bangball_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", metro_state, metro_vblank_interrupt)
MCFG_CPU_PERIODIC_INT_DRIVER(metro_state, metro_periodic_interrupt, 60) // ?
MCFG_CPU_VBLANK_INT_REMOVE()
MCFG_CPU_PERIODIC_INT_REMOVE()
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", metro_state, bangball_scanline, "screen", 0, 1)
// doesn't like 58.2 Hz
MCFG_DEVICE_MODIFY("screen")
MCFG_SCREEN_REFRESH_RATE(60)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( batlbubl, msgogo )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(batlbubl_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", metro_state, metro_vblank_interrupt)
MCFG_CPU_PERIODIC_INT_DRIVER(metro_state, metro_periodic_interrupt, 60) // ?
MCFG_CPU_VBLANK_INT_REMOVE()
MCFG_CPU_PERIODIC_INT_REMOVE()
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", metro_state, bangball_scanline, "screen", 0, 1)
// doesn't like 58.2 Hz
MCFG_DEVICE_MODIFY("screen")
MCFG_SCREEN_REFRESH_RATE(60)
MACHINE_CONFIG_END

2
src/mame/drivers/mgolf.cpp
View File

@ -159,7 +159,7 @@ TIMER_CALLBACK_MEMBER(mgolf_state::interrupt_callback)
update_plunger();
m_maincpu->pulse_input_line(0, 1);
m_maincpu->pulse_input_line(0, m_maincpu->minimum_quantum_time());
scanline = scanline + 32;

4
src/mame/drivers/micro20.cpp
View File

@ -156,13 +156,13 @@ static MACHINE_CONFIG_START( micro20 )
MCFG_CPU_ADD(MAINCPU_TAG, M68020, XTAL_16_67MHz)
MCFG_CPU_PROGRAM_MAP(micro20_map)
MCFG_MC68681_ADD(DUART_A_TAG, XTAL_3_6864MHz)
MCFG_DEVICE_ADD(DUART_A_TAG, MC68681, XTAL_3_6864MHz)
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(DUART_A_TAG, mc68681_device, rx_a_w))
MCFG_MC68681_ADD(DUART_B_TAG, XTAL_3_6864MHz)
MCFG_DEVICE_ADD(DUART_B_TAG, MC68681, XTAL_3_6864MHz)
MCFG_WD1772_ADD(FDC_TAG, XTAL_16_67MHz / 2)

2
src/mame/drivers/micro3d.cpp
View File

@ -319,7 +319,7 @@ static MACHINE_CONFIG_START( micro3d )
MCFG_MCS51_SERIAL_TX_CB(WRITE8(micro3d_state, data_from_i8031))
MCFG_MCS51_SERIAL_RX_CB(READ8(micro3d_state, data_to_i8031))
MCFG_MC68681_ADD("duart", XTAL_3_6864MHz)
MCFG_DEVICE_ADD("duart", MC68681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(micro3d_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("monitor", rs232_port_device, write_txd))
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(micro3d_state, duart_txb))

14
src/mame/drivers/microterm.cpp
View File

@ -44,7 +44,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mt420_io_map, AS_IO, 8, microterm_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0xe0, 0xef) AM_DEVREADWRITE("duart", mc68681_device, read, write)
AM_RANGE(0xe0, 0xef) AM_DEVREADWRITE("duart", scn2681_device, read, write)
AM_RANGE(0xf0, 0xf3) AM_DEVREADWRITE("asci", mc2661_device, read, write)
ADDRESS_MAP_END
@ -56,7 +56,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mt5510_io_map, AS_IO, 8, microterm_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x60, 0x6f) AM_DEVREADWRITE("duart", mc68681_device, read, write)
AM_RANGE(0x60, 0x6f) AM_DEVREADWRITE("duart", scn2681_device, read, write)
ADDRESS_MAP_END
static INPUT_PORTS_START( microterm )
@ -67,7 +67,7 @@ static MACHINE_CONFIG_START( mt420 )
MCFG_CPU_PROGRAM_MAP(mt420_mem_map)
MCFG_CPU_IO_MAP(mt420_io_map)
MCFG_DEVICE_ADD("duart", MC68681, XTAL_3_6864MHz) // SCN2681
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz) // MC2681
MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", 0))
MCFG_MC68681_OUTPORT_CALLBACK(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, di_write)) MCFG_DEVCB_BIT(5)
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, cs_write)) MCFG_DEVCB_BIT(4)
@ -76,7 +76,7 @@ static MACHINE_CONFIG_START( mt420 )
MCFG_DEVICE_ADD("asci", MC2661, XTAL_3_6864MHz) // SCN2641
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
MCFG_EEPROM_SERIAL_DO_CALLBACK(DEVWRITELINE("duart", mc68681_device, ip6_w))
MCFG_EEPROM_SERIAL_DO_CALLBACK(DEVWRITELINE("duart", scn2681_device, ip6_w))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( mt5510 )
@ -84,7 +84,7 @@ static MACHINE_CONFIG_START( mt5510 )
MCFG_CPU_PROGRAM_MAP(mt5510_mem_map)
MCFG_CPU_IO_MAP(mt5510_io_map)
MCFG_DEVICE_ADD("duart", MC68681, XTAL_3_6864MHz) // SCN2681
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", 0))
MCFG_MC68681_OUTPORT_CALLBACK(DEVWRITELINE("eeprom1", eeprom_serial_93cxx_device, di_write)) MCFG_DEVCB_BIT(6)
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("eeprom2", eeprom_serial_93cxx_device, di_write)) MCFG_DEVCB_BIT(5)
@ -94,10 +94,10 @@ static MACHINE_CONFIG_START( mt5510 )
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("eeprom2", eeprom_serial_93cxx_device, clk_write)) MCFG_DEVCB_BIT(3)
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom1")
MCFG_EEPROM_SERIAL_DO_CALLBACK(DEVWRITELINE("duart", mc68681_device, ip6_w))
MCFG_EEPROM_SERIAL_DO_CALLBACK(DEVWRITELINE("duart", scn2681_device, ip6_w))
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom2")
MCFG_EEPROM_SERIAL_DO_CALLBACK(DEVWRITELINE("duart", mc68681_device, ip5_w))
MCFG_EEPROM_SERIAL_DO_CALLBACK(DEVWRITELINE("duart", scn2681_device, ip5_w))
MACHINE_CONFIG_END

16
src/mame/drivers/model2.cpp
View File

@ -5600,7 +5600,7 @@ ROM_START( daytonase ) /* Daytona USA (Japan, Revision A), Original Model 2 w/Mo
ROM_LOAD("epr-16488a.ic12", 0x000000, 0x010000, CRC(546c5d1a) SHA1(5533301fe7e3b499e6cee12230d2c656c3c667da) )
ROM_END
ROM_START( daytona93 ) /* Daytona USA Deluxe '93 version (There is said to be a Deluxe '94 edition) */
ROM_START( daytona93 ) /* Daytona USA (Deluxe cabinet, '93 version. There is said to be a Deluxe '94 edition) */
ROM_REGION( 0x200000, "maincpu", 0 ) // i960 program
ROM_LOAD32_WORD("epr-16530a.12", 0x000000, 0x020000, CRC(39e962b5) SHA1(b98a1faabb4f1eff707a94c32224c7820f259874) )
ROM_LOAD32_WORD("epr-16531a.13", 0x000002, 0x020000, CRC(693126eb) SHA1(779734ba536db67e14760d52e8d8d7db07816481) )
@ -6123,13 +6123,13 @@ DRIVER_INIT_MEMBER(model2_state,srallyc)
// Model 2 (TGPs, Model 1 sound board)
GAME( 1993, daytona, 0, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA (Japan, Revision A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1993, daytonase, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA Special Edition (Japan, Revision A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1993, daytona93, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA Deluxe '93", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1993, daytonas, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA (With Saturn Adverts)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1993, daytonat, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA (Japan, Turbo hack, set 1)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1993, daytonata, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA (Japan, Turbo hack, set 2)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1993, daytonam, daytona, daytona, daytona, model2_state, daytonam, ROT0, "Sega", "Daytona USA (Japan, To The MAXX)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, daytona, 0, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA (Japan, Revision A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, daytonase, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA Special Edition (Japan, Revision A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1993, daytona93, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA (Japan)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, daytonas, daytona, daytona, daytona, model2_state, srallyc, ROT0, "Sega", "Daytona USA (With Saturn Adverts)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, daytonat, daytona, daytona, daytona, model2_state, srallyc, ROT0, "hack (Kyle Hodgetts)", "Daytona USA (Japan, Turbo hack, set 1)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, daytonata, daytona, daytona, daytona, model2_state, srallyc, ROT0, "hack (Kyle Hodgetts)", "Daytona USA (Japan, Turbo hack, set 2)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 2001, daytonam, daytona, daytona, daytona, model2_state, daytonam, ROT0, "hack (Kyle Hodgetts)", "Daytona USA (Japan, To The MAXX)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, desert, 0, model2o, desert, model2_state, 0, ROT0, "Sega / Martin Marietta", "Desert Tank", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, vcop, 0, model2o, vcop, model2_state, 0, ROT0, "Sega", "Virtua Cop (Revision B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, vcopa, vcop, model2o, vcop, model2_state, 0, ROT0, "Sega", "Virtua Cop (Revision A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS )

2
src/mame/drivers/namcond1.cpp
View File

@ -322,7 +322,7 @@ INTERRUPT_GEN_MEMBER(namcond1_state::mcu_interrupt)
{
if( m_h8_irq5_enabled )
{
device.execute().pulse_input_line(5, 1);
device.execute().pulse_input_line(5, device.execute().minimum_quantum_time());
}
}

4
src/mame/drivers/namcos22.cpp
View File

@ -2978,7 +2978,7 @@ ADDRESS_MAP_END
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_interrupt)
{
m_mcu->pulse_input_line(M37710_LINE_TIMERA3TICK, 1);
m_mcu->pulse_input_line(M37710_LINE_TIMERA3TICK, m_mcu->minimum_quantum_time());
}
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_update)
@ -3013,7 +3013,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_update)
TIMER_CALLBACK_MEMBER(namcos22_state::adillor_trackball_interrupt)
{
m_mcu->pulse_input_line(param ? M37710_LINE_TIMERA2TICK : M37710_LINE_TIMERA3TICK, 1);
m_mcu->pulse_input_line(param ? M37710_LINE_TIMERA2TICK : M37710_LINE_TIMERA3TICK, m_mcu->minimum_quantum_time());
}
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::adillor_trackball_update)

2
src/mame/drivers/pntnpuzl.cpp
View File

@ -293,7 +293,7 @@ INPUT_CHANGED_MEMBER(pntnpuzl_state::coin_inserted)
{
/* TODO: change this! */
if(newval)
m_maincpu->pulse_input_line((uint8_t)(uintptr_t)param, 1);
m_maincpu->pulse_input_line((uint8_t)(uintptr_t)param, m_maincpu->minimum_quantum_time());
}
static INPUT_PORTS_START( pntnpuzl )

8
src/mame/drivers/pt68k4.cpp
View File

@ -399,11 +399,11 @@ static MACHINE_CONFIG_START( pt68k2 )
MCFG_CPU_ADD(M68K_TAG, M68000, XTAL_16MHz/2) // 68k2 came in 8, 10, and 12 MHz versions
MCFG_CPU_PROGRAM_MAP(pt68k2_mem)
MCFG_MC68681_ADD("duart1", XTAL_3_6864MHz)
MCFG_DEVICE_ADD("duart1", MC68681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(pt68k4_state, duart1_irq))
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(pt68k4_state, duart1_out))
MCFG_MC68681_ADD("duart2", XTAL_3_6864MHz)
MCFG_DEVICE_ADD("duart2", MC68681, XTAL_3_6864MHz)
MCFG_DEVICE_ADD(KBDC_TAG, PC_KBDC, 0)
MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE(pt68k4_state, keyboard_clock_w))
@ -440,11 +440,11 @@ static MACHINE_CONFIG_START( pt68k4 )
MCFG_CPU_PROGRAM_MAP(pt68k4_mem)
// add the DUARTS. first one has the console on channel A at 19200.
MCFG_MC68681_ADD("duart1", XTAL_16MHz / 4)
MCFG_DEVICE_ADD("duart1", MC68681, XTAL_16MHz / 4)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(pt68k4_state, duart1_irq))
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(pt68k4_state, duart1_out))
MCFG_MC68681_ADD("duart2", XTAL_16MHz / 4)
MCFG_DEVICE_ADD("duart2", MC68681, XTAL_16MHz / 4)
MCFG_DEVICE_ADD(KBDC_TAG, PC_KBDC, 0)
MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE(pt68k4_state, keyboard_clock_w))

6
src/mame/drivers/riscpc.cpp
View File

@ -589,7 +589,7 @@ TIMER_CALLBACK_MEMBER(riscpc_state::IOMD_timer0_callback)
m_IRQ_status_A|=0x20;
if(m_IRQ_mask_A&0x20)
{
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, 1);
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time());
}
}
@ -598,7 +598,7 @@ TIMER_CALLBACK_MEMBER(riscpc_state::IOMD_timer1_callback)
m_IRQ_status_A|=0x40;
if(m_IRQ_mask_A&0x40)
{
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, 1);
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time());
}
}
@ -607,7 +607,7 @@ TIMER_CALLBACK_MEMBER(riscpc_state::flyback_timer_callback)
m_IRQ_status_A|=0x08;
if(m_IRQ_mask_A&0x08)
{
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, 1);
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time());
}
m_flyback_timer->adjust(machine().first_screen()->time_until_pos(m_vidc20_vert_reg[VDER]));

191
src/mame/drivers/seibucats.cpp
View File

@ -4,6 +4,15 @@
Seibu CATS E-Touch Mahjong Series (c) 2001 Seibu Kaihatsu
TODO:
- verify obj roms (maybe bad or wrong decryption);
- coins inputs are ok?
- touchscreen;
- sound;
- DVD player;
=========================================================================================================================================================
CPU and system control devices:
- Intel i386DX (U0169; lower right corner)
- SEI600 SB08-1513 custom DMA chip (U0154; above i386DX)
@ -69,6 +78,7 @@
#include "machine/i8251.h"
//#include "machine/microtch.h"
//#include "machine/rtc4543.h"
#include "machine/seibuspi.h"
#include "sound/ymz280b.h"
#include "screen.h"
#include "speaker.h"
@ -91,6 +101,7 @@ class seibucats_state : public seibuspi_state
public:
seibucats_state(const machine_config &mconfig, device_type type, const char *tag)
: seibuspi_state(mconfig, type, tag)
// m_key(*this, "KEY.%u", 0)
{
}
@ -103,6 +114,7 @@ public:
DECLARE_WRITE16_MEMBER(input_select_w);
DECLARE_WRITE16_MEMBER(output_latch_w);
DECLARE_WRITE16_MEMBER(aux_rtc_w);
DECLARE_DRIVER_INIT(seibucats);
protected:
// driver_device overrides
@ -114,18 +126,28 @@ protected:
private:
uint16_t m_input_select;
// optional_ioport_array<5> m_key;
// optional_ioport m_special;
};
// identical to EJ Sakura
READ16_MEMBER(seibucats_state::input_mux_r)
{
// TODO: mahjong keyboard is read from here
return m_eeprom->do_read() << 14;
uint16_t ret = m_special->read();
// multiplexed inputs
for (int i = 0; i < 5; i++)
if (m_input_select >> i & 1)
ret &= m_key[i]->read();
return ret;
}
WRITE16_MEMBER(seibucats_state::input_select_w)
{
// Note that this is active high in ejsakura but active low here
m_input_select = data;
m_input_select = data ^ 0xffff;
}
WRITE16_MEMBER(seibucats_state::output_latch_w)
@ -166,60 +188,61 @@ static ADDRESS_MAP_START( seibucats_map, AS_PROGRAM, 32, seibucats_state )
AM_RANGE(0xffe00000, 0xffffffff) AM_ROM AM_REGION("ipl", 0)
ADDRESS_MAP_END
static INPUT_PORTS_START( seibucats )
/* dummy active high structure */
PORT_START("SYSA")
PORT_DIPNAME( 0x01, 0x00, "SYSA" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
static INPUT_PORTS_START( spi_mahjong_keyboard )
PORT_START("KEY.0")
PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_MAHJONG_PON )
PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_MAHJONG_L )
PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_MAHJONG_H )
PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_MAHJONG_D )
PORT_BIT( 0xffffffe0, IP_ACTIVE_LOW, IPT_UNUSED )
/* dummy active low structure */
PORT_START("DSWA")
PORT_DIPNAME( 0x01, 0x01, "DSWA" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("KEY.1")
PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_MAHJONG_BIG )
PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP )
PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP )
PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE )
PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE )
PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL )
PORT_BIT( 0xffffffc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("KEY.2")
PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_MAHJONG_RON )
PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_MAHJONG_CHI )
PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_MAHJONG_K )
PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_MAHJONG_G )
PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_MAHJONG_C )
PORT_BIT( 0xffffffe0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("KEY.3")
PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_MAHJONG_KAN )
PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_MAHJONG_M )
PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_MAHJONG_I )
PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_MAHJONG_E )
PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_MAHJONG_A )
PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0xffffffc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("KEY.4")
PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_MAHJONG_REACH )
PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_MAHJONG_N )
PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_MAHJONG_J )
PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_MAHJONG_F )
PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_MAHJONG_B )
PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_MAHJONG_BET )
PORT_SERVICE_NO_TOGGLE( 0x00000200, IP_ACTIVE_LOW)
PORT_BIT( 0xfffffdc0, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( seibucats )
PORT_INCLUDE( spi_mahjong_keyboard )
PORT_START("SPECIAL")
PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x00004000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read)
PORT_BIT( 0xffffbf3f, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static const gfx_layout sys386f_spritelayout =
@ -309,6 +332,14 @@ MACHINE_CONFIG_END
***************************************************************************/
#define SEIBUCATS_OBJ_LOAD \
ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASE00) \
/* obj4.u0234 empty slot */ \
ROM_LOAD16_WORD_SWAP("obj03.u0232", 0x100000, 0x100000, BAD_DUMP CRC(15c230cf) SHA1(7e12871d6e34e28cd4b5b23af6b0cbdff9432500) ) \
ROM_LOAD16_WORD_SWAP("obj02.u0233", 0x200000, 0x100000, BAD_DUMP CRC(dffd0114) SHA1(b74254061b6da5a2ce310ea89684db430b43583e) ) \
ROM_LOAD16_WORD_SWAP("obj01.u0231", 0x300000, 0x100000, BAD_DUMP CRC(ee5ae0fd) SHA1(0baff6ca4e8bceac4e09732da267f57578dcc280) )
ROM_START( emjjoshi )
ROM_REGION32_LE( 0x200000, "ipl", 0 ) /* i386 program */
ROM_LOAD32_BYTE( "prg0.u016", 0x000000, 0x080000, CRC(e69bed6d) SHA1(e9626e704c5d28419cfa6a7a2c1b13b4b46f941c) )
@ -320,11 +351,7 @@ ROM_START( emjjoshi )
ROM_REGION( 0x900000, "gfx2", ROMREGION_ERASEFF ) /* background layer roms - none! */
ROM_REGION( 0x600000, "gfx3", 0)
ROM_LOAD("obj1.u0231", 0x000000, 0x200000, NO_DUMP )
ROM_LOAD("obj2.u0233", 0x200000, 0x200000, NO_DUMP )
ROM_LOAD("obj3.u0232", 0x400000, 0x200000, NO_DUMP )
// obj4.u0234 empty slot
SEIBUCATS_OBJ_LOAD
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "At the Girls Dorm SKTP-10002", 0, SHA1(be47c105089d6ef4ce05a6e1ba2ec7a3101015dc) )
@ -343,12 +370,8 @@ ROM_START( emjscanb )
ROM_REGION( 0x900000, "gfx2", ROMREGION_ERASEFF ) /* background layer roms - none! */
ROM_REGION( 0x600000, "gfx3", 0)
ROM_LOAD("obj1.u0231", 0x000000, 0x200000, NO_DUMP )
ROM_LOAD("obj2.u0233", 0x200000, 0x200000, NO_DUMP )
ROM_LOAD("obj3.u0232", 0x400000, 0x200000, NO_DUMP )
// obj4.u0234 empty slot
SEIBUCATS_OBJ_LOAD
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "Scandal Blue SKTP-10008", 0, SHA1(17fe67698a9bc5dbd452c4b1afa739294ec2011c) )
ROM_END
@ -364,25 +387,41 @@ ROM_START( emjtrapz )
ROM_REGION( 0x900000, "gfx2", ROMREGION_ERASEFF ) /* background layer roms - none! */
ROM_REGION( 0x600000, "gfx3", 0)
ROM_LOAD("obj1.u0231", 0x000000, 0x200000, NO_DUMP )
ROM_LOAD("obj2.u0233", 0x200000, 0x200000, NO_DUMP )
ROM_LOAD("obj3.u0232", 0x400000, 0x200000, NO_DUMP )
// obj4.u0234 empty slot
SEIBUCATS_OBJ_LOAD
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "Trap Zone SKTP-00009", 0, SHA1(b4a51f42eeaeefc329031651859caa108418a96e) )
ROM_END
DRIVER_INIT_MEMBER(seibucats_state,seibucats)
{
int i, j;
uint16_t *src = (uint16_t *)memregion("gfx3")->base();
uint16_t tmp[0x40 / 2], offset;
// sprite_reorder() only
for (i = 0; i < memregion("gfx3")->bytes() / 0x40; i++)
{
memcpy(tmp, src, 0x40);
for (j = 0; j < 0x40 / 2; j++)
{
offset = (j >> 1) | (j << 4 & 0x10);
*src++ = tmp[offset];
}
}
// seibuspi_rise11_sprite_decrypt_rfjet(memregion("gfx3")->base(), 0x300000);
}
// Gravure Collection
// Pakkun Ball TV
/* 01 */ // Mahjong Shichau zo!
/* 02 */ GAME( 1999, emjjoshi, 0, seibucats, seibucats, seibucats_state, 0, ROT0, "Seibu Kaihatsu / CATS", "E-Touch Mahjong Series #2: Joshiryou de NE! (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
/* 02 */ GAME( 1999, emjjoshi, 0, seibucats, seibucats, seibucats_state, seibucats, ROT0, "Seibu Kaihatsu / CATS", "E-Touch Mahjong Series #2: Joshiryou de NE! (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
/* 03 */ // Lingerie DE Ikou
/* 04 */ // Marumie Network
/* 05 */ // BINKAN Lips
/* 06 */ GAME( 2001, emjscanb, 0, seibucats, seibucats, seibucats_state, 0, ROT0, "Seibu Kaihatsu / CATS", "E-Touch Mahjong Series #6: Scandal Blue - Midara na Daishou (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
/* 07 */ GAME( 2001, emjtrapz, 0, seibucats, seibucats, seibucats_state, 0, ROT0, "Seibu Kaihatsu / CATS", "E-Touch Mahjong Series #7: Trap Zone - Yokubou no Kaisoku Densha (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
/* 06 */ GAME( 2001, emjscanb, 0, seibucats, seibucats, seibucats_state, seibucats, ROT0, "Seibu Kaihatsu / CATS", "E-Touch Mahjong Series #6: Scandal Blue - Midara na Daishou (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
/* 07 */ GAME( 2001, emjtrapz, 0, seibucats, seibucats, seibucats_state, seibucats, ROT0, "Seibu Kaihatsu / CATS", "E-Touch Mahjong Series #7: Trap Zone - Yokubou no Kaisoku Densha (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
/* 08 */ // Poison
/* 09 */ // Nurse Call
/* 10 */ // Secret Love

12
src/mame/drivers/seta.cpp
View File

@ -8,16 +8,16 @@
CPU : 68000 + [65C02] (only in the earlier games)
Custom : X1-001A X1-002A (SDIP64) Sprites
Custom : X1-001A, X1-002A (SDIP64) Sprites
X1-001
X1-002
X1-003
X1-003 or X1-007 (SDIP42) Video blanking (feeds RGB DACs)
X1-004 (SDIP52) Inputs
X1-005 X0-005
X1-006 X0-006
X1-007 (SDIP42) Video DAC
X1-005
X1-006 (SDIP64) Palette
X1-010 (QFP80) Sound: 16 Bit PCM
X1-011 X1-012 (QFP100) Tilemaps
X1-011 (QFP80) Graphics mixing
X1-012 (QFP100) Tilemaps
X1-014 Sprites?
-------------------------------------------------------------------------------

57
src/mame/drivers/slicer.cpp
View File

@ -7,6 +7,7 @@
#include "emu.h"
#include "cpu/i86/i186.h"
#include "machine/74259.h"
#include "machine/wd_fdc.h"
#include "machine/mc68681.h"
#include "bus/rs232/rs232.h"
@ -24,7 +25,7 @@ public:
}
DECLARE_WRITE8_MEMBER(sio_out_w);
DECLARE_WRITE8_MEMBER(drive_sel_w);
template<unsigned int drive> DECLARE_WRITE_LINE_MEMBER(drive_sel_w);
protected:
required_device<fd1797_device> m_fdc;
@ -46,35 +47,18 @@ WRITE8_MEMBER(slicer_state::sio_out_w)
}
}
WRITE8_MEMBER(slicer_state::drive_sel_w)
template<unsigned int drive>
WRITE_LINE_MEMBER(slicer_state::drive_sel_w)
{
data &= 1;
switch(offset)
{
case 0:
m_sasi->write_sel(data);
break;
case 1:
m_sasi->write_rst(data);
break;
case 7:
m_fdc->dden_w(data);
break;
floppy_image_device *floppy;
char devname[8];
default:
{
floppy_image_device *floppy;
char devname[8];
unsigned int drive = 3 - (offset - 2);
if((drive > 3) || !data)
break;
if (!state)
return;
sprintf(devname, "%d", drive);
floppy = m_fdc->subdevice<floppy_connector>(devname)->get_device();
m_fdc->set_floppy(floppy);
break;
}
}
sprintf(devname, "%d", drive);
floppy = m_fdc->subdevice<floppy_connector>(devname)->get_device();
m_fdc->set_floppy(floppy);
}
static ADDRESS_MAP_START( slicer_map, AS_PROGRAM, 16, slicer_state )
@ -85,8 +69,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( slicer_io, AS_IO, 16, slicer_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x007f) AM_DEVREADWRITE8("fdc", fd1797_device, read, write, 0x00ff) //PCS0
AM_RANGE(0x0080, 0x00ff) AM_DEVREADWRITE8("sc2681", mc68681_device, read, write, 0x00ff) //PCS1
AM_RANGE(0x0100, 0x017f) AM_WRITE8(drive_sel_w, 0x00ff) //PCS2
AM_RANGE(0x0080, 0x00ff) AM_DEVREADWRITE8("duart", scn2681_device, read, write, 0x00ff) //PCS1
AM_RANGE(0x0100, 0x0107) AM_MIRROR(0x0078) AM_DEVWRITE8("drivelatch", ls259_device, write_d0, 0x00ff) //PCS2
// TODO: 0x180 sets ack
AM_RANGE(0x0180, 0x0181) AM_DEVREAD8("sasi_data_in", input_buffer_device, read, 0x00ff) AM_DEVWRITE8("sasi_data_out", output_latch_device, write, 0x00ff) //PCS3
AM_RANGE(0x0180, 0x0181) AM_DEVREAD8("sasi_ctrl_in", input_buffer_device, read, 0xff00)
@ -104,16 +88,16 @@ static MACHINE_CONFIG_START( slicer )
MCFG_CPU_PROGRAM_MAP(slicer_map)
MCFG_CPU_IO_MAP(slicer_io)
MCFG_MC68681_ADD("sc2681", XTAL_3_6864MHz)
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(DEVWRITELINE("maincpu", i80186_cpu_device, int0_w))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232_1", rs232_port_device, write_txd))
MCFG_MC68681_B_TX_CALLBACK(DEVWRITELINE("rs232_2", rs232_port_device, write_txd))
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(slicer_state, sio_out_w))
MCFG_RS232_PORT_ADD("rs232_1", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sc2681", mc68681_device, rx_a_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_a_w))
MCFG_RS232_PORT_ADD("rs232_2", default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sc2681", mc68681_device, rx_b_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_b_w))
MCFG_FD1797_ADD("fdc", XTAL_16MHz/2/8)
MCFG_WD_FDC_INTRQ_CALLBACK(DEVWRITELINE("maincpu", i80186_cpu_device, int1_w))
@ -123,6 +107,15 @@ static MACHINE_CONFIG_START( slicer )
MCFG_FLOPPY_DRIVE_ADD("fdc:2", slicer_floppies, nullptr, floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:3", slicer_floppies, nullptr, floppy_image_device::default_floppy_formats)
MCFG_DEVICE_ADD("drivelatch", LS259, 0) // U29
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("sasi", scsi_port_device, write_sel))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("sasi", scsi_port_device, write_rst))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(slicer_state, drive_sel_w<3>))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(slicer_state, drive_sel_w<2>))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(slicer_state, drive_sel_w<1>))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(slicer_state, drive_sel_w<0>))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITELINE("fdc", fd1797_device, dden_w))
MCFG_DEVICE_ADD("sasi", SCSI_PORT, 0)
MCFG_SCSI_DATA_INPUT_BUFFER("sasi_data_in")
MCFG_SCSI_BSY_HANDLER(DEVWRITELINE("sasi_ctrl_in", input_buffer_device, write_bit3))

6
src/mame/drivers/ssfindo.cpp
View File

@ -339,7 +339,7 @@ TIMER_CALLBACK_MEMBER(ssfindo_state::PS7500_Timer0_callback)
m_PS7500_IO[IRQSTA]|=0x20;
if(m_PS7500_IO[IRQMSKA]&0x20)
{
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, 1);
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time());
}
}
@ -358,7 +358,7 @@ TIMER_CALLBACK_MEMBER(ssfindo_state::PS7500_Timer1_callback)
m_PS7500_IO[IRQSTA]|=0x40;
if(m_PS7500_IO[IRQMSKA]&0x40)
{
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, 1);
m_maincpu->pulse_input_line(ARM7_IRQ_LINE, m_maincpu->minimum_quantum_time());
}
}
@ -376,7 +376,7 @@ INTERRUPT_GEN_MEMBER(ssfindo_state::interrupt)
m_PS7500_IO[IRQSTA]|=0x08;
if(m_PS7500_IO[IRQMSKA]&0x08)
{
device.execute().pulse_input_line(ARM7_IRQ_LINE, 1);
device.execute().pulse_input_line(ARM7_IRQ_LINE, device.execute().minimum_quantum_time());
}
}

2
src/mame/drivers/starshp1.cpp
View File

@ -21,7 +21,7 @@ Atari Starship 1 driver
INTERRUPT_GEN_MEMBER(starshp1_state::starshp1_interrupt)
{
if ((ioport("SYSTEM")->read() & 0x90) != 0x90)
device.execute().pulse_input_line(0, 1);
device.execute().pulse_input_line(0, device.execute().minimum_quantum_time());
}

105
src/mame/drivers/terminals.cpp
View File

@ -124,47 +124,6 @@ COMP( 1987, att630, 0, 0, terminals, terminals, terminals_state, 0, "AT&T", "630
/**************************************************************************************************************
C. Itoh CIT-220+
Code looks like Z80/8080/8085
***************************************************************************************************************/
ROM_START( cit220p )
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "v17_001a.ic23", 0x0000, 0x4000, CRC(2cc43026) SHA1(366f57292c6e44571368c29e3258203779847356) )
ROM_LOAD( "v17_001b.ic24", 0x4000, 0x4000, CRC(a56b16f1) SHA1(c68f26b35453153f7defcf1cf2b7ad7fe36cc9e7) )
ROM_LOAD( "eeprom.bin", 0xf000, 0x1000, CRC(7b24878a) SHA1(20086fb792a24339b65abe627aefbcf48e2abcf4) ) // don't know where this fits in
ROM_REGION(0x1000, "chargen", 0)
ROM_LOAD( "v20_cg.ic17", 0x0000, 0x1000, CRC(76ef7ca9) SHA1(6e7799ca0a41350fbc369bbbd4ab581150f37b10) )
ROM_REGION(0x10000, "keyboard", 0)
ROM_LOAD( "v00_kbd.bin", 0x0000, 0x1000, CRC(f9d24190) SHA1(c4e9ef8188afb18de373f2a537ca9b7a315bfb76) )
ROM_END
COMP( 1985, cit220p, 0, 0, terminals, terminals, terminals_state, 0, "C. Itoh", "CIT-220+", MACHINE_IS_SKELETON )
/**************************************************************************************************************
Data General D461.
Chips: SCN2681A, X2210P, 2x HM6116P-2, 2x HM6264P-20, HD68B09EP, CRT9007, 1x 8-sw dip.
Crystals: 3.6864, 59.2920
***************************************************************************************************************/
ROM_START( d461 )
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "dgc_100_5776-05.bin", 0x0000, 0x8000, CRC(fdce2132) SHA1(82eac1751c31f99d4490505e16af5e7e7a52b310) )
ROM_END
COMP( 1985, d461, 0, 0, terminals, terminals, terminals_state, 0, "Data General", "D461", MACHINE_IS_SKELETON )
/**************************************************************************************************************
Hewlett-Packard HP-700/92.
@ -332,6 +291,70 @@ COMP( 1982, tr175, 0, 0, terminals, terminals, terminals_state, 0, "Relisys", "T
/**************************************************************************************************************
Televideo TVI-912C.
Chips: i8035, TMS9927NL, AY5-1013A (COM2502)
Crystals: 23.814 (divide by 4 for CPU clock)
Other: 1x 8-sw DIP, 1x 10-sw DIP (internal), 2x 10-sw DIP (available to user at the back)
***************************************************************************************************************/
ROM_START( tv912c )
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "a49c1.bin", 0x0000, 0x1000, CRC(d21851bf) SHA1(28fe77a218a5eee11de376f5d16e9380b616b3ca) ) // last half is all FF
ROM_REGION(0x0800, "chargen", 0)
ROM_LOAD( "a3-2.bin", 0x0000, 0x0800, CRC(bb9a7fbd) SHA1(5f1c4d41b25bd3ca4dbc336873362935daf283da) )
ROM_END
COMP( 1978, tv912c, 0, 0, terminals, terminals, terminals_state, 0, "TeleVideo", "TVI-912C", MACHINE_IS_SKELETON )
/**************************************************************************************************************
Televideo TVI-955
Chips: G65SC02P-3, 3x S6551AP, SCN2674B, AMI 131406-00 (unknown 40-pin DIL), odd round silver thing, might be a battery
Crystals: 19.3396, 31.684, 3.6864
Keyboard: M5L8049-230P-6, 5.7143, Beeper
***************************************************************************************************************/
ROM_START( tv955 )
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "t180002-88d_955.u4", 0x0000, 0x4000, CRC(5767fbe7) SHA1(49a2241612af5c3af09778ffa541ac0bc186e05a) )
ROM_LOAD( "t180002-91a_calc.u5", 0x4000, 0x2000, CRC(f86c103a) SHA1(fa3ada3a5d8913e519e2ea4817e96166c1fedd32) ) // first half is all FF
ROM_REGION(0x1000, "chargen", 0)
ROM_LOAD( "t180002-26b.u45", 0x0000, 0x1000, CRC(69c9ebc7) SHA1(32282c816ec597a7c45e939acb7a4155d35ea584) )
ROM_REGION(0x10000, "keyboard", 0)
ROM_LOAD( "8049.kbd", 0x0000, 0x0800, CRC(bc86e349) SHA1(0b62003ab7931822f1bcac8370517c685849f62c) )
ROM_END
COMP( 1985, tv955, 0, 0, terminals, terminals, terminals_state, 0, "TeleVideo", "TVI-955", MACHINE_IS_SKELETON )
/**************************************************************************************************************
Televideo TVI-965
Chips: G65SC816P-5, SCN2672TC5N40, 271582-00 (unknown square chip), 2x UM6551A, Beeper
Crystals: 44.4528, 26.9892, 3.6864
***************************************************************************************************************/
ROM_START( tv965 )
ROM_REGION(0x20000, "maincpu", 0)
ROM_LOAD( "180003-30h.u8", 0x00000, 0x010000, CRC(c7b9ca39) SHA1(1d95a8b0a4ea5caf3fb628c44c7a3567700a0b59) )
ROM_LOAD( "180003-38h.u9", 0x10000, 0x008000, CRC(30fae408) SHA1(f05bb2a9ce2df60b046733f746d8d8a1eb3ac8bc) )
ROM_END
COMP( 1989, tv965, 0, 0, terminals, terminals, terminals_state, 0, "TeleVideo", "TVI-965", MACHINE_IS_SKELETON )
/**************************************************************************************************************
Visual 100. (VT-100 clone)

2
src/mame/drivers/tmaster.cpp
View File

@ -364,7 +364,7 @@ static MACHINE_CONFIG_START( tm )
MCFG_CPU_PROGRAM_MAP(tmaster_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", tmaster_state, scanline_interrupt, "screen", 0, 1)
MCFG_MC68681_ADD( "duart68681", XTAL_8_664MHz / 2 /*??*/)
MCFG_DEVICE_ADD( "duart68681", MC68681, XTAL_8_664MHz / 2 /*??*/)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(tmaster_state, duart_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_device, rx))

4
src/mame/drivers/tv950.cpp
View File

@ -50,7 +50,7 @@
#define RS232A_TAG "rs232a"
#define RS232B_TAG "rs232b"
#define MASTER_CLOCK (23814000)
#define MASTER_CLOCK XTAL_23_814MHz
class tv950_state : public driver_device
{
@ -329,4 +329,4 @@ ROM_END
/* Driver */
// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
COMP( 1981, tv950, 0, 0, tv950, tv950, tv950_state, 0, "TeleVideo", "TV950", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
COMP( 1981, tv950, 0, 0, tv950, tv950, tv950_state, 0, "TeleVideo", "Model 950 Video Display Terminal", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )

6
src/mame/drivers/vk100.cpp
View File

@ -422,7 +422,7 @@ TIMER_CALLBACK_MEMBER(vk100_state::execute_vg)
m_vgPAT_Mask >>= 1; // shift the mask
if (m_vgPAT_Mask == 0) m_vgPAT_Mask = 0x80; // reset mask if it hits 0
}
if (m_vgGO) timer_set(attotime::from_hz(XTAL_45_6192Mhz/3/12/2), TIMER_EXECUTE_VG); // /3/12/2 is correct. the sync counter is clocked by the dot clock, despite the error on figure 5-21
if (m_vgGO) timer_set(attotime::from_hz(XTAL_45_6192MHz/3/12/2), TIMER_EXECUTE_VG); // /3/12/2 is correct. the sync counter is clocked by the dot clock, despite the error on figure 5-21
}
/* ports 0x40 and 0x41: load low and high bytes of vector gen X register */
@ -1040,10 +1040,10 @@ static MACHINE_CONFIG_START( vk100 )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL_45_6192Mhz/3, 882, 0, 720, 370, 0, 350 ) // fake screen timings for startup until 6845 sets real ones
MCFG_SCREEN_RAW_PARAMS(XTAL_45_6192MHz/3, 882, 0, 720, 370, 0, 350 ) // fake screen timings for startup until 6845 sets real ones
MCFG_SCREEN_UPDATE_DEVICE( "crtc", mc6845_device, screen_update )
MCFG_MC6845_ADD( "crtc", H46505, "screen", XTAL_45_6192Mhz/3/12)
MCFG_MC6845_ADD( "crtc", H46505, "screen", XTAL_45_6192MHz/3/12)
MCFG_MC6845_SHOW_BORDER_AREA(false)
MCFG_MC6845_CHAR_WIDTH(12)
MCFG_MC6845_UPDATE_ROW_CB(vk100_state, crtc_update_row)

6
src/mame/drivers/vlc.cpp
View File

@ -624,15 +624,15 @@ static MACHINE_CONFIG_START( nevada )
MCFG_SOUND_ADD("aysnd", AY8912, SOUND_CLOCK)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
MCFG_MC68681_ADD( "duart18_68681", XTAL_3_6864MHz ) // UARTA = Modem 1200Baud
MCFG_DEVICE_ADD("duart18_68681", MC68681, XTAL_3_6864MHz) // UARTA = Modem 1200Baud
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(nevada_state, duart18_irq_handler))
MCFG_MC68681_INPORT_CALLBACK(IOPORT("DSW1"))
MCFG_MC68681_ADD( "duart39_68681", XTAL_3_6864MHz ) // UARTA = Printer
MCFG_DEVICE_ADD("duart39_68681", MC68681, XTAL_3_6864MHz) // UARTA = Printer
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(nevada_state, duart39_irq_handler))
MCFG_MC68681_INPORT_CALLBACK(IOPORT("DSW2"))
MCFG_MC68681_ADD( "duart40_68681", XTAL_3_6864MHz ) // UARTA = Touch , UARTB = Bill Acceptor
MCFG_DEVICE_ADD("duart40_68681", MC68681, XTAL_3_6864MHz) // UARTA = Touch , UARTB = Bill Acceptor
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(nevada_state, duart40_irq_handler))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_device, rx))
MCFG_MC68681_INPORT_CALLBACK(IOPORT("DSW3"))

4
src/mame/drivers/vt220.cpp
View File

@ -13,6 +13,7 @@
#include "emu.h"
#include "cpu/mcs51/mcs51.h"
#include "machine/mc68681.h"
#include "machine/ram.h"
#include "screen.h"
@ -38,6 +39,8 @@ static ADDRESS_MAP_START(vt220_mem, AS_PROGRAM, 8, vt220_state)
ADDRESS_MAP_END
static ADDRESS_MAP_START(vt220_io, AS_IO, 8, vt220_state)
AM_RANGE(0x2000, 0x2fff) AM_MIRROR(0xc000) AM_RAM
AM_RANGE(0x3000, 0x300f) AM_MIRROR(0xc7f0) AM_DEVREADWRITE("duart", scn2681_device, read, write)
ADDRESS_MAP_END
/* Input ports */
@ -65,6 +68,7 @@ static MACHINE_CONFIG_START( vt220 )
MCFG_CPU_PROGRAM_MAP(vt220_mem)
MCFG_CPU_IO_MAP(vt220_io)
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

14
src/mame/drivers/vt240.cpp
View File

@ -57,7 +57,7 @@ public:
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_i8085;
required_device<i8251_device> m_i8251;
required_device<mc68681_device> m_duart;
required_device<scn2681_device> m_duart;
required_device<rs232_port_device> m_host;
required_device<upd7220_device> m_hgdc;
required_device<address_map_bank_device> m_bank;
@ -672,7 +672,7 @@ static MACHINE_CONFIG_START( vt240 )
MCFG_UPD7220_BLANK_CALLBACK(INPUTLINE("charcpu", I8085_RST55_LINE))
MCFG_VIDEO_SET_SCREEN("screen")
MCFG_MC68681_ADD("duart", XTAL_3_6864MHz) /* 2681 duart (not 68681!) */
MCFG_DEVICE_ADD("duart", SCN2681, XTAL_3_6864MHz)
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(vt240_state, irq13_w))
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("host", rs232_port_device, write_txd))
MCFG_MC68681_B_TX_CALLBACK(DEVWRITELINE("printer", rs232_port_device, write_txd))
@ -691,13 +691,13 @@ static MACHINE_CONFIG_START( vt240 )
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(vt240_state, write_keyboard_clock))
MCFG_RS232_PORT_ADD("host", default_rs232_devices, "null_modem")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", mc68681_device, rx_a_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("duart", mc68681_device, ip5_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("duart", mc68681_device, ip0_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_a_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("duart", scn2681_device, ip5_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("duart", scn2681_device, ip0_w))
MCFG_RS232_PORT_ADD("printer", default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", mc68681_device, rx_b_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("duart", mc68681_device, ip1_w))
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("duart", scn2681_device, rx_b_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("duart", scn2681_device, ip1_w))
MCFG_X2212_ADD("x2212")
MACHINE_CONFIG_END

4
src/mame/drivers/wildpkr.cpp
View File

@ -456,7 +456,7 @@ static MACHINE_CONFIG_START( wildpkr )
MCFG_CPU_PROGRAM_MAP(wildpkr_map)
//MCFG_CPU_VBLANK_INT_DRIVER("screen", wildpkr_state, irq2_line_hold) // guess
MCFG_MC68681_ADD("duart", SEC_CLOCK)
MCFG_DEVICE_ADD("duart", MC68681, SEC_CLOCK)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -490,7 +490,7 @@ static MACHINE_CONFIG_START( tabpkr )
MCFG_NVRAM_ADD_1FILL("nvram") // DS1220Y
MCFG_MC68681_ADD("duart", 3686400)
MCFG_DEVICE_ADD("duart", MC68681, 3686400)
MCFG_MC68681_IRQ_CALLBACK(ASSERTLINE("maincpu", M68K_IRQ_2))
MCFG_DEVICE_ADD("id", DS2401, 0)

2
src/mame/drivers/zac_2.cpp
View File

@ -185,7 +185,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(zac_2_state::zac_2_inttimer)
{
// a pulse is sent via a capacitor (similar to what one finds at a reset pin)
if (m_t_c > 0x80)
m_maincpu->pulse_input_line_and_vector(INPUT_LINE_IRQ0, 0xbf, 2);
m_maincpu->pulse_input_line_and_vector(INPUT_LINE_IRQ0, 0xbf, 2 * m_maincpu->minimum_quantum_time());
else
m_t_c++;
}

3
src/mame/includes/apollo.h
View File

@ -327,7 +327,7 @@ void apollo_csr_set_status_register(uint16_t mask, uint16_t data);
#define MCFG_APOLLO_SIO_OUTPORT_CALLBACK(_cb) \
devcb = &apollo_sio::set_outport_cb(*device, DEVCB_##_cb);
class apollo_sio: public mc68681_base_device
class apollo_sio: public duart_base_device
{
public:
apollo_sio(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -340,7 +340,6 @@ protected:
private:
uint8_t m_csrb;
uint8_t m_ip6;
};
DECLARE_DEVICE_TYPE(APOLLO_SIO, apollo_sio)

2
src/mame/includes/metro.h
View File

@ -13,6 +13,7 @@
#include "video/imagetek_i4100.h"
#include "machine/eepromser.h"
#include "machine/gen_latch.h"
#include "machine/timer.h"
#include "screen.h"
class metro_state : public driver_device
@ -102,6 +103,7 @@ public:
uint32_t screen_update_psac_vdp2_mix(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(metro_vblank_interrupt);
INTERRUPT_GEN_MEMBER(metro_periodic_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(bangball_scanline);
INTERRUPT_GEN_MEMBER(karatour_interrupt);
INTERRUPT_GEN_MEMBER(puzzlet_interrupt);
IRQ_CALLBACK_MEMBER(metro_irq_callback);

2
src/mame/machine/3do.cpp
View File

@ -121,7 +121,7 @@ void _3do_state::m_3do_request_fiq(uint32_t irq_req, uint8_t type)
if((m_clio.irq0 & m_clio.irq0_enable) || (m_clio.irq1 & m_clio.irq1_enable))
{
//printf("Go irq %08x & %08x %08x & %08x\n",m_clio.irq0, m_clio.irq0_enable, m_clio.irq1, m_clio.irq1_enable);
m_maincpu->pulse_input_line(ARM7_FIRQ_LINE, 1);
m_maincpu->pulse_input_line(ARM7_FIRQ_LINE, m_maincpu->minimum_quantum_time());
}
}

20
src/mame/machine/apollo.cpp
View File

@ -713,9 +713,8 @@ TIMER_CALLBACK_MEMBER( apollo_state::apollo_rtc_timer )
#define VERBOSE 0
apollo_sio::apollo_sio(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
mc68681_base_device(mconfig, APOLLO_SIO, tag, owner, clock),
m_csrb(0),
m_ip6(0)
duart_base_device(mconfig, APOLLO_SIO, tag, owner, clock),
m_csrb(0)
{
}
@ -728,10 +727,7 @@ void apollo_sio::device_reset()
ip3_w((input_data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
ip4_w((input_data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
ip5_w((input_data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
// ip6_w((input_data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
// MC2681 has IP[6] (instead of /IACK on MC68681)
m_ip6 = (input_data & 0x40) ? ASSERT_LINE : CLEAR_LINE;
ip6_w((input_data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER( apollo_sio::read )
@ -744,7 +740,7 @@ READ8_MEMBER( apollo_sio::read )
"1X/16X Test", "RHRB", "IVR", "Input Ports", "Start Counter",
"Stop Counter" };
int data = mc68681_base_device::read(space, offset/2, mem_mask);
int data = duart_base_device::read(space, offset/2, mem_mask);
switch (offset / 2)
{
@ -761,10 +757,6 @@ READ8_MEMBER( apollo_sio::read )
data = 0xff;
}
break;
case 0x0d: /* IP */
// MC2681 has IP[6] (instead of /IACK on MC68681)
data = (data & ~0x40) | (m_ip6 ? 0x40 : 0);
break;
}
// omit logging if sio is being polled from the boot rom
@ -804,11 +796,11 @@ WRITE8_MEMBER( apollo_sio::write )
break;
#endif
}
mc68681_base_device::write(space, offset/2, data, mem_mask);
duart_base_device::write(space, offset/2, data, mem_mask);
}
// device type definition
DEFINE_DEVICE_TYPE(APOLLO_SIO, apollo_sio, "apollo_sio", "DN3000/DS3500 SIO")
DEFINE_DEVICE_TYPE(APOLLO_SIO, apollo_sio, "apollo_sio", "DN3000/DS3500 SIO (MC2681)")
WRITE_LINE_MEMBER(apollo_state::sio_irq_handler)
{

2
src/mame/machine/archimds.cpp
View File

@ -67,7 +67,7 @@ void archimedes_state::archimedes_request_fiq(int mask)
if (m_ioc_regs[FIQ_STATUS] & m_ioc_regs[FIQ_MASK])
{
m_maincpu->pulse_input_line(ARM_FIRQ_LINE, 1);
m_maincpu->pulse_input_line(ARM_FIRQ_LINE, m_maincpu->minimum_quantum_time());
//m_maincpu->set_input_line(ARM_FIRQ_LINE, CLEAR_LINE);
//m_maincpu->set_input_line(ARM_FIRQ_LINE, ASSERT_LINE);

2
src/mame/machine/galaxold.cpp
View File

@ -171,7 +171,7 @@ DRIVER_INIT_MEMBER(galaxold_state,4in1)
INTERRUPT_GEN_MEMBER(galaxold_state::hunchbks_vh_interrupt)
{
device.execute().pulse_input_line_and_vector(0, 0x03, 1);
device.execute().pulse_input_line_and_vector(0, 0x03, device.execute().minimum_quantum_time());
}
DRIVER_INIT_MEMBER(galaxold_state,bullsdrtg)

2
src/mame/machine/namcos2.cpp
View File

@ -504,7 +504,7 @@ WRITE8_MEMBER( namcos2_shared_state::namcos2_mcu_analog_ctrl_w )
/* If the interrupt enable bit is set trigger an A/D IRQ */
if(data & 0x20)
{
m_mcu->pulse_input_line(HD63705_INT_ADCONV, 1);
m_mcu->pulse_input_line(HD63705_INT_ADCONV, m_mcu->minimum_quantum_time());
}
}
}

2
src/mame/machine/pgmprot_igs027a_type3.cpp
View File

@ -90,7 +90,7 @@ READ16_MEMBER(pgm_arm_type3_state::svg_68k_nmi_r )
WRITE16_MEMBER(pgm_arm_type3_state::svg_68k_nmi_w )
{
m_prot->pulse_input_line(ARM7_FIRQ_LINE, 1);
m_prot->pulse_input_line(ARM7_FIRQ_LINE, m_prot->minimum_quantum_time());
}
WRITE16_MEMBER(pgm_arm_type3_state::svg_latch_68k_w )

14
src/mame/mame.lst
View File

@ -2285,6 +2285,9 @@ at386sx // 19?? AT VGA 386sx
c386sx16 // 1990 Commodore 386SX-16
pc30iii // Commodore PC 30-III
pc40iii // Commodore PC 40-III
mbc28 // Sanyo MBC-28
comportiii // Compaq Portable III
pcd2 // Siemens PCD-2
ct386sx //
ec1842 //
ec1849 //
@ -9713,6 +9716,9 @@ f1gpstr2 // (c) 1993 Jaleco
scudhamm // (c) 1994 Jaleco
wildplt // (c) 1992 Jaleco
@source:cit220.cpp
cit220p // (c) 1984 C. Itoh
@source:citycon.cpp
citycon // (c) 1985 Jaleco
citycona // (c) 1985 Jaleco
@ -10722,6 +10728,9 @@ skydest // PD0 (c) 1985 Taito Corporation
@source:czk80.cpp
czk80 //
@source:d400.cpp
d461 //
@source:d6800.cpp
d6800 // Dream 6800
@ -36313,8 +36322,6 @@ t4490 // Terco 4490 Mill CNC Control (c) 1986
@source:terminals.cpp
aaa
att630
cit220p
d461
hp700_92
hp2622a
qvt70
@ -36323,6 +36330,9 @@ qvt103
qvt190
qvt201
tr175
tv912c
tv955
tv965
v100
v102
vp60

2
src/mame/mess.flt
View File

@ -125,6 +125,7 @@ channelf.cpp
chaos.cpp
chessmst.cpp
chesstrv.cpp
cit220.cpp
clcd.cpp
cm1800.cpp
cmi.cpp
@ -150,6 +151,7 @@ cxgz80.cpp
cxhumax.cpp
cybiko.cpp
czk80.cpp
d400.cpp
d6800.cpp
d6809.cpp
dai.cpp

21
src/mame/video/tmc600.cpp
View File

@ -69,18 +69,19 @@ CDP1869_PCB_READ_MEMBER( tmc600_state::tmc600_pcb_r )
WRITE_LINE_MEMBER( tmc600_state::prd_w )
{
if (state) {
if (!state) {
m_frame++;
switch (m_frame) {
case 8:
m_maincpu->int_w(CLEAR_LINE);
break;
switch (m_frame)
{
case 31:
m_frame = 0;
m_blink = !m_blink;
// fallthru
case 15:
m_maincpu->int_w(m_rtc_int);
break;
case 16:
m_maincpu->int_w(m_rtc_int);
m_blink = !m_blink;
m_frame = 0;
break;
}
}
}