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synced 2025-07-03 17:08:39 +03:00
(MESS) apollo: fixed disk and tape DMA, improved logging [Hans Ostermeyer]
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@ -336,8 +336,18 @@ inline void am9517a_device::dma_advance()
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inline void am9517a_device::end_of_process()
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{
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// terminal count
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if (COMMAND_MEM_TO_MEM)
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{
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m_status |= 1 << 0;
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m_status |= 1 << 1;
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m_request &= ~(1 << 0);
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m_request &= ~(1 << 1);
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}
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else
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{
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m_status |= 1 << m_current_channel;
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m_request &= ~(1 << m_current_channel);
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}
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if (MODE_AUTOINITIALIZE)
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{
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@ -519,6 +529,12 @@ void am9517a_device::execute_run()
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m_state = STATE_S0;
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break;
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}
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else if (COMMAND_MEM_TO_MEM && BIT(m_request, channel) && ((m_channel[channel].m_mode & 0xc0) == MODE_SINGLE))
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{
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m_current_channel = m_last_channel = priority[channel];
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m_state = STATE_S0;
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break;
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}
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}
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}
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if(m_state == STATE_SI)
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@ -633,6 +649,18 @@ void am9517a_device::execute_run()
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case STATE_S24:
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dma_write();
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dma_advance();
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m_current_channel = 0;
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m_channel[m_current_channel].m_count--;
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if (MODE_ADDRESS_DECREMENT)
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{
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m_channel[m_current_channel].m_address--;
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}
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else
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{
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m_channel[m_current_channel].m_address++;
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}
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break;
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}
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@ -767,6 +795,10 @@ WRITE8_MEMBER( am9517a_device::write )
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if (BIT(data, 2))
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{
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m_request |= (1 << (channel + 4));
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if (COMMAND_MEM_TO_MEM)
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{
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m_request |= (1 << channel);
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}
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}
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else
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{
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@ -34,6 +34,9 @@
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#define LOG(x) { logerror x; logerror ("\n"); apollo_check_log(); }
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#define LOG1(x) { if (VERBOSE > 0) LOG(x) }
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#define LOG2(x) { if (VERBOSE > 1) LOG(x) }
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#define CLOG(x) { logerror ("%s - %s: ", apollo_cpu_context(machine().device(MAINCPU)), tag()); LOG(x) }
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#define CLOG1(x) { if (VERBOSE > 0) CLOG(x) }
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#define CLOG2(x) { if (VERBOSE > 1) CLOG(x) }
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#define DLOG(x) { logerror ("%s - %s: ", apollo_cpu_context(device->machine().device(MAINCPU)), device->tag()); LOG(x) }
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#define DLOG1(x) { if (VERBOSE > 0) DLOG(x) }
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#define DLOG2(x) { if (VERBOSE > 1) DLOG(x) }
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@ -375,6 +375,21 @@ WRITE8_MEMBER(apollo_state::apollo_dma_2_w){
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}
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READ8_MEMBER(apollo_state::apollo_dma_2_r){
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// Nasty hack (13-06-15 - ost):
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// MD self_test will test wrong DMA register and
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// mem-to-mem DMA in am9517a.c is often starting much too late (for MD self_test)
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// (8237dma.c was always fast enough to omit these problems)
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if (offset == 8)
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{
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switch (space.device().safe_pcbase())
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{
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case 0x00102e22: // DN3000
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case 0x01002f3c: // DN3500
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case 0x010029a6: // DN5500
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offset = 16;
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break;
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}
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}
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UINT8 data = get_device_dma8237_2(&space.device())->read(space, offset / 2);
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SLOG1(("apollo_dma_2_r: reading DMA Controller 2 at offset %02x = %02x", offset/2, data));
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return data;
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@ -495,7 +510,7 @@ WRITE8_MEMBER(apollo_state::apollo_dma_write_word){
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READ8_MEMBER(apollo_state::apollo_dma8237_ctape_dack_r ) {
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UINT8 data = sc499_dack_r(&space.machine());
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// DLOG2(("dma ctape dack read %02x",data));
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CLOG2(("dma ctape dack read %02x",data));
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// hack for DN3000: select appropriate DMA channel No.
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dn3000_dma_channel1 = 1; // 1 = ctape, 2 = floppy dma channel
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@ -504,7 +519,7 @@ READ8_MEMBER(apollo_state::apollo_dma8237_ctape_dack_r ) {
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}
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WRITE8_MEMBER(apollo_state::apollo_dma8237_ctape_dack_w ) {
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// DLOG2(("dma ctape dack write %02x", data));
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CLOG2(("dma ctape dack write %02x", data));
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sc499_dack_w(&space.machine(), data);
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// hack for DN3000: select appropriate DMA channel No.
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@ -515,7 +530,7 @@ WRITE8_MEMBER(apollo_state::apollo_dma8237_ctape_dack_w ) {
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READ8_MEMBER(apollo_state::apollo_dma8237_fdc_dack_r ) {
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pc_fdc_at_device *fdc = space.machine().device<pc_fdc_at_device>(APOLLO_FDC_TAG);
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UINT8 data = fdc->dma_r();
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// DLOG2(("dma fdc dack read %02x",data));
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CLOG2(("dma fdc dack read %02x",data));
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// hack for DN3000: select appropriate DMA channel No.
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dn3000_dma_channel1 = 2; // 1 = ctape, 2 = floppy dma channel
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@ -525,7 +540,7 @@ READ8_MEMBER(apollo_state::apollo_dma8237_fdc_dack_r ) {
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WRITE8_MEMBER(apollo_state::apollo_dma8237_fdc_dack_w ) {
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pc_fdc_at_device *fdc = space.machine().device<pc_fdc_at_device>(APOLLO_FDC_TAG);
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// DLOG2(("dma fdc dack write %02x", data));
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CLOG2(("dma fdc dack write %02x", data));
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fdc->dma_w(data);
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// hack for DN3000: select appropriate DMA channel No.
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@ -535,35 +550,35 @@ WRITE8_MEMBER(apollo_state::apollo_dma8237_fdc_dack_w ) {
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READ8_MEMBER(apollo_state::apollo_dma8237_wdc_dack_r ) {
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UINT8 data = 0xff; // omti8621_dack_r(device->machine);
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//DLOG1(("dma wdc dack read %02x (not used, not emulated!)",data));
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CLOG1(("dma wdc dack read %02x (not used, not emulated!)",data));
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return data;
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}
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WRITE8_MEMBER(apollo_state::apollo_dma8237_wdc_dack_w ) {
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//DLOG1(("dma wdc dack write %02x (not used, not emulated!)", data));
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CLOG1(("dma wdc dack write %02x (not used, not emulated!)", data));
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// omti8621_dack_w(machine, data);
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}
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WRITE_LINE_MEMBER(apollo_state::apollo_dma8237_out_eop ) {
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pc_fdc_at_device *fdc = machine().device<pc_fdc_at_device>(APOLLO_FDC_TAG);
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//DLOG1(("dma out eop state %02x", state));
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CLOG1(("dma out eop state %02x", state));
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fdc->tc_w(!state);
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sc499_set_tc_state(&machine(), state);
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}
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WRITE_LINE_MEMBER(apollo_state::apollo_dma_1_hrq_changed ) {
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// DLOG2(("dma 1 hrq changed state %02x", state));
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m_dma8237_2->dreq0_w(state);
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CLOG2(("dma 1 hrq changed state %02x", state));
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m_dma8237_1->dreq0_w(state);
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/* Assert HLDA */
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//m_dma8237_1->hack_w(state);
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m_dma8237_1->hack_w(state);
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// cascade mode?
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// i8237_hlda_w(get_device_dma8237_2(device), state);
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}
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WRITE_LINE_MEMBER(apollo_state::apollo_dma_2_hrq_changed ) {
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// DLOG2(("dma 2 hrq changed state %02x", state));
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CLOG2(("dma 2 hrq changed state %02x", state));
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m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
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/* Assert HLDA */
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