Plug and Play sync for TeamEurope (VT1682, nes_vt, iqunlim) (#6094)

* vt1682 work (nw)

* looking at stability (nw)

* new NOT WORKING machines
----
InterAct Complete Video Game - 111 Games & 42 Songs (G5410) [TeamEurope]
Let's Play! Game Machine 240 in 1 [TeamEurope]

new NOT WORKING Software List
----
iqunlim_cart.xml: Englisch für Anfänger [TeamEurope]

the vt1682 based InterAct Complete Video Game is basically playable, apart from the 'Shooting games' because I haven't mapped the guns, and some issues with player 2 / alt control schemes in some titles.   want to address these (and maybe look for a better solution to some stability issues) before promoting it.

* (unrelated typo fix for clickstart software list) (nw)

* new WORKING machine
---
MiWi2 7-in-1 Sports [David Shah]

* don't printf (nw)
This commit is contained in:
David Haywood 2019-12-24 20:36:02 +00:00 committed by R. Belmont
parent 6f97b7535e
commit 6b13952587
9 changed files with 409 additions and 40 deletions

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@ -33,8 +33,8 @@
</part>
</software>
<software name="backyardingans" supported="no">
<description>Nick Jr. The Backyardingans (UK)</description>
<software name="backyardigans" supported="no">
<description>Nick Jr. The Backyardigans (UK)</description>
<year>2007</year>
<publisher>LeapFrog / VIACOM</publisher>
<part name="cart" interface="clickstart_cart">
@ -42,7 +42,7 @@
<feature name="pcbtype" value="LF300-10485-0A" />
<feature name="pcbdate" value="03262007" />
<dataarea name="rom" size="0x400000">
<rom name="500-12892-a - the backyardingans (uk).bin" size="0x400000" crc="d33777fd" sha1="3245cd4f86cf7d1e59f9484eeb61078981fcf6e8"/>
<rom name="500-12892-a - the backyardigans (uk).bin" size="0x400000" crc="d33777fd" sha1="3245cd4f86cf7d1e59f9484eeb61078981fcf6e8"/>
</dataarea>
</part>
</software>

73
hash/iqunlim_cart.xml Normal file
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@ -0,0 +1,73 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<!--
Cartridge pinout
01|GND
02|NC
03|D10
04|D11
05|D4
06|D3
07|D12
08|D2
09|D5
10|D9
11|D13
12|D1
13|D6
14|D8
15|D14
16|D0
17|D7
18|OE
19|D15
20|A4
21|A0
22|A16
23|A1
24|A15
25|A2
26|A14
27|A3
28|A13
29|A12
30|A11
31|A10
32|A9
33|A5
34|A8
35|WE??
36|A19
37|A20
38|->JUMPER R4
39|NC
40|CE
41|A18
42|A17
43|A7
44|A6
45|VCC
-->
<softwarelist name="iqunlim_cart" description="VTech IQ Unlimited cartridges">
<!-- upper half of the ROM contains the English for Beginners game (in German) the lower half of the ROM contains Entertainment Trivia (in English) -->
<!-- different carts would have been sold with the upper address line fixed high/low to select the correct game -->
<software name="efb" supported="no">
<description>Englisch für Anfänger</description>
<year>200?</year>
<publisher>VTech</publisher>
<part name="cart" interface="iqunlim_cart">
<dataarea name="rom" size="0x80000">
<rom name="27-06260-0-0.u2" size="0x80000" crc="dffcaca3" sha1="e513f4b83b067adb965cb4a4ba0c003b747f1dc7" />
</dataarea>
</part>
</software>
</softwarelist>

View File

@ -2893,6 +2893,8 @@ files {
MAME_DIR .. "src/mame/drivers/vt1682.cpp",
MAME_DIR .. "src/mame/machine/vt1682_io.h",
MAME_DIR .. "src/mame/machine/vt1682_io.cpp",
MAME_DIR .. "src/mame/machine/vt1682_uio.h",
MAME_DIR .. "src/mame/machine/vt1682_uio.cpp",
MAME_DIR .. "src/mame/machine/vt1682_alu.h",
MAME_DIR .. "src/mame/machine/vt1682_alu.cpp",
MAME_DIR .. "src/mame/machine/vt1682_timer.h",

View File

@ -55,19 +55,27 @@ A4 = MAX232
#include "emu.h"
#include "screen.h"
#include "cpu/m68000/m68000.h"
#include "bus/generic/slot.h"
#include "bus/generic/carts.h"
class iqunlim_state : public driver_device
{
public:
iqunlim_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu")
iqunlim_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_cart(*this, "cartslot"),
m_cart_region(nullptr)
{ }
void iqunlim(machine_config &config);
private:
required_device<cpu_device> m_maincpu;
required_device<generic_slot_device> m_cart;
memory_region *m_cart_region;
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load);
virtual uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void iqunlim_mem(address_map &map);
@ -87,6 +95,17 @@ void iqunlim_state::iqunlim_mem(address_map &map)
static INPUT_PORTS_START( iqunlim )
INPUT_PORTS_END
DEVICE_IMAGE_LOAD_MEMBER(iqunlim_state::cart_load)
{
uint32_t size = m_cart->common_get_size("rom");
m_cart->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_BIG);
m_cart->common_load_rom(m_cart->get_rom_base(), size, "rom");
return image_init_result::PASS;
}
void iqunlim_state::iqunlim(machine_config &config)
{
/* basic machine hardware */
@ -100,6 +119,12 @@ void iqunlim_state::iqunlim(machine_config &config)
screen.set_size(512, 256);
screen.set_visarea(0, 512-1, 0, 256-1);
screen.set_screen_update(FUNC(iqunlim_state::screen_update));
GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "iqunlim_cart");
m_cart->set_width(GENERIC_ROM16_WIDTH);
m_cart->set_device_load(FUNC(iqunlim_state::cart_load));
SOFTWARE_LIST(config, "cart_list").set_original("iqunlim_cart");
}
ROM_START( iqunlim )

View File

@ -2068,6 +2068,11 @@ ROM_START( silv35 )
ROM_LOAD( "silverlit35.bin", 0x00000, 0x400000, CRC(7540e350) SHA1(a0cb456136560fa4d8a365dd44d815ec0e9fc2e7) )
ROM_END
ROM_START( lpgm240 )
ROM_REGION( 0x800000, "mainrom", 0 )
ROM_LOAD( "w25q64jv.u1", 0x00000, 0x800000, CRC(b973e65b) SHA1(36ff137068ea56b4679c2db386ac0067de0a9eaf) )
ROM_END
ROM_START( pjoyn50 )
ROM_REGION( 0x400000, "mainrom", 0 )
ROM_LOAD( "power joy navigator 50-in-1.prg", 0x00000, 0x400000, CRC(d1bbadd4) SHA1(2186c71bcedf6c2eedf58233faa26fca9586aa40) )
@ -2369,6 +2374,8 @@ CONS( 2015, dgun2573, 0, 0, nes_vt_fp, nes_vt, nes_vt_hh_state, empty_init, "
CONS( 200?, polmega, 0, 0, nes_vt_vh2009, nes_vt, nes_vt_vh2009_state, empty_init, "Polaroid", "Megamax GPD001SDG", MACHINE_NOT_WORKING )
CONS( 200?, silv35, 0, 0, nes_vt_vh2009, nes_vt, nes_vt_vh2009_state, empty_init, "SilverLit", "35 in 1 Super Twins", MACHINE_NOT_WORKING )
// same encryption as above, but seems like newer hardware (or the above aren't using most of the features)
CONS( 200?, lpgm240, 0, 0, nes_vt_vh2009, nes_vt, nes_vt_vh2009_state, empty_init, "<unknown>", "Let's Play! Game Machine 240 in 1", MACHINE_NOT_WORKING ) // mini 'retro-arcade' style cabinet
// this has 'Shark' and 'Octopus' etc. like mc_dgear but uses scrambled bank registers
CONS( 200?, mc_sp69, 0, 0, nes_vt, nes_vt, nes_vt_sp69_state, empty_init, "<unknown>", "Sports Game 69 in 1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND)

View File

@ -54,6 +54,7 @@
#include "emu.h"
#include "machine/m6502_vt1682.h"
#include "machine/vt1682_io.h"
#include "machine/vt1682_uio.h"
#include "machine/vt1682_alu.h"
#include "machine/vt1682_timer.h"
#include "machine/bankdev.h"
@ -96,6 +97,7 @@ public:
vt_vt1682_state(const machine_config& mconfig, device_type type, const char* tag) :
driver_device(mconfig, type, tag),
m_io(*this, "io"),
m_uio(*this, "uio"),
m_leftdac(*this, "leftdac"),
m_rightdac(*this, "rightdac"),
m_maincpu(*this, "maincpu"),
@ -125,6 +127,7 @@ protected:
virtual void video_start() override;
required_device<vrt_vt1682_io_device> m_io;
required_device<vrt_vt1682_uio_device> m_uio;
required_device<dac_12bit_r2r_device> m_leftdac;
required_device<dac_12bit_r2r_device> m_rightdac;
required_device<cpu_device> m_maincpu;
@ -468,6 +471,8 @@ private:
DECLARE_READ8_MEMBER(soundcpu_irq_vector_hack_r);
DECLARE_READ8_MEMBER(maincpu_irq_vector_hack_r);
DECLARE_WRITE8_MEMBER(vt1682_sound_reset_hack_w);
bool m_scpu_is_in_reset;
/* System Helpers */
@ -618,18 +623,18 @@ public:
DECLARE_WRITE8_MEMBER(portc_w) { LOGMASKED(LOG_OTHER, "%s: portc_w writing: %1x\n", machine().describe_context(), data & 0xf); };
DECLARE_WRITE8_MEMBER(portd_w) { LOGMASKED(LOG_OTHER, "%s: portd_w writing: %1x\n", machine().describe_context(), data & 0xf); };
DECLARE_WRITE8_MEMBER(ext_rombank_w);
protected:
virtual void machine_start() override;
virtual void machine_reset() override;
void vt_vt1682_map_bank(address_map& map);
private:
DECLARE_WRITE8_MEMBER(inteact_2129_bank_w);
uint8_t m_previous_port_b;
int m_input_sense;
int m_input_pos;
int m_current_bank;
required_ioport m_io_p1;
required_ioport m_io_p2;
@ -857,6 +862,7 @@ void vt_vt1682_state::machine_reset()
m_bank->set_entry(0);
m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
m_scpu_is_in_reset = true;
}
/*
@ -2544,17 +2550,19 @@ READ8_MEMBER(vt_vt1682_state::vt1682_2106_enable_regs_r)
WRITE8_MEMBER(vt_vt1682_state::vt1682_2106_enable_regs_w)
{
// COMR6 is used for banking
LOGMASKED(LOG_OTHER, "%s: vt1682_2106_enable_regs_w writing: %02x (scpurn:%1x scpuon:%1x spion:%1x uarton:%1x tvon:%1x lcdon:%1x)\n", machine().describe_context(), data,
LOGMASKED(LOG_OTHER, "%s: vt1682_2106_enable_regs_w writing: %02x (scpurn:%1x scpuon:%1x spion:%1x uarton:%1x tvon:%1x lcdon:%1x)\n", machine().describe_context().c_str(), data,
(data & 0x20) >> 5, (data & 0x10) >> 4, (data & 0x08) >> 3, (data & 0x04) >> 2, (data & 0x02) >> 1, (data & 0x01));
m_2106_enable_reg = data;
if (data & 0x20)
{
m_soundcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
m_scpu_is_in_reset = false;
}
else
{
m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
m_scpu_is_in_reset = true;
}
}
@ -3084,7 +3092,8 @@ WRITE8_MEMBER(vt_vt1682_state::vt1682_211c_regs_ext2421_w)
if (data & 0x10)
{
printf("Sound CPU IRQ Request\n");
// not seen used
logerror("Sound CPU IRQ Request\n");
}
}
@ -3974,7 +3983,14 @@ WRITE8_MEMBER(vt_vt1682_state::vt1682_soundcpu_211c_reg_irqctrl_w)
if (data & 0x10)
{
printf("Main CPU IRQ Request from Sound CPU\n");
// not seen used
logerror("Main CPU IRQ Request from Sound CPU\n");
}
if (data & 0x08)
{
// documentation indicates that Sleep mode is buggy, so this probably never gets used
popmessage("SCU Sleep\n");
}
}
@ -5009,6 +5025,7 @@ void vt_vt1682_state::vt_vt1682_map(address_map &map)
{
map(0x0000, 0x0fff).ram();
map(0x1000, 0x1fff).ram().share("sound_share");
map(0x1ff4, 0x1fff).w(FUNC(vt_vt1682_state::vt1682_sound_reset_hack_w));
/* Video */
map(0x2000, 0x2000).rw(FUNC(vt_vt1682_state::vt1682_2000_r), FUNC(vt_vt1682_state::vt1682_2000_w));
@ -5108,9 +5125,9 @@ void vt_vt1682_state::vt_vt1682_map(address_map &map)
map(0x2126, 0x2126).rw(FUNC(vt_vt1682_state::vt1682_2126_dma_sr_bank_addr_22_15_r), FUNC(vt_vt1682_state::vt1682_2126_dma_sr_bank_addr_22_15_w));
map(0x2127, 0x2127).rw(FUNC(vt_vt1682_state::vt1682_2127_dma_status_r), FUNC(vt_vt1682_state::vt1682_2127_dma_size_trigger_w));
map(0x2128, 0x2128).rw(FUNC(vt_vt1682_state::vt1682_2128_dma_sr_bank_addr_24_23_r), FUNC(vt_vt1682_state::vt1682_2128_dma_sr_bank_addr_24_23_w));
// 2129 UIO
// 212a UIO
// 212b UIO
map(0x2129, 0x2129).rw(m_uio, FUNC(vrt_vt1682_uio_device::inteact_2129_uio_a_data_r), FUNC(vrt_vt1682_uio_device::inteact_2129_uio_a_data_w)); // 2129 UIO A
map(0x212a, 0x212a).rw(m_uio, FUNC(vrt_vt1682_uio_device::inteact_212a_uio_a_direction_r), FUNC(vrt_vt1682_uio_device::inteact_212a_uio_a_direction_w)); // 212a UIO A
map(0x212b, 0x212b).rw(m_uio, FUNC(vrt_vt1682_uio_device::inteact_212b_uio_a_attribute_r), FUNC(vrt_vt1682_uio_device::inteact_212b_uio_a_attribute_w)); // 2129 UIO A
map(0x212c, 0x212c).rw(FUNC(vt_vt1682_state::vt1682_212c_prng_r), FUNC(vt_vt1682_state::vt1682_212c_prng_seed_w));
// 212d PLL
// 212e unused
@ -5124,6 +5141,11 @@ void vt_vt1682_state::vt_vt1682_map(address_map &map)
map(0x2136, 0x2136).w(m_maincpu_alu, FUNC(vrt_vt1682_alu_device::alu_oprand_5_div_w));
map(0x2137, 0x2137).w(m_maincpu_alu, FUNC(vrt_vt1682_alu_device::alu_oprand_6_div_w));
map(0x2149, 0x2149).rw(m_uio, FUNC(vrt_vt1682_uio_device::inteact_2149_uio_b_data_r), FUNC(vrt_vt1682_uio_device::inteact_2149_uio_b_data_w)); // 2129 UIO A
map(0x214a, 0x214a).rw(m_uio, FUNC(vrt_vt1682_uio_device::inteact_214a_uio_b_direction_r), FUNC(vrt_vt1682_uio_device::inteact_214a_uio_b_direction_w)); // 212a UIO A
map(0x214b, 0x214b).rw(m_uio, FUNC(vrt_vt1682_uio_device::inteact_214b_uio_b_attribute_r), FUNC(vrt_vt1682_uio_device::inteact_214b_uio_b_attribute_w)); // 2129 UIO A
// 3000-3fff internal ROM if enabled
map(0x4000, 0x7fff).r(FUNC(vt_vt1682_state::rom_4000_to_7fff_r));
map(0x8000, 0xffff).r(FUNC(vt_vt1682_state::rom_8000_to_ffff_r));
@ -5131,17 +5153,6 @@ void vt_vt1682_state::vt_vt1682_map(address_map &map)
map(0xfffe, 0xffff).r(FUNC(vt_vt1682_state::maincpu_irq_vector_hack_r)); // probably need custom IRQ support in the core instead...
}
void intec_interact_state::vt_vt1682_map_bank(address_map& map)
{
vt_vt1682_map(map);
map(0x2129, 0x2129).w(FUNC(intec_interact_state::inteact_2129_bank_w)); // 2129 UIO
}
WRITE8_MEMBER(intec_interact_state::inteact_2129_bank_w)
{
m_bank->set_entry(data & 0x01);
}
/*
Vectors / IRQ Levels
@ -5180,10 +5191,17 @@ READ8_MEMBER(vt_vt1682_state::maincpu_irq_vector_hack_r)
return rom_8000_to_ffff_r(space, (0xfff8 - 0x8000)+offset);
}
// intg5410 writes a new program without resetting the CPU when selecting from the 'arcade' game main menu, this is problematic
// it does appear to rewrite the vectors first, so maybe there is some hardware side-effect of this putting the CPU in reset state??
WRITE8_MEMBER(vt_vt1682_state::vt1682_sound_reset_hack_w)
{
m_sound_share[0x0ff4 + offset] = data;
m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
}
WRITE_LINE_MEMBER(vt_vt1682_state::soundcpu_timera_irq)
{
if (state)
if (state && !m_scpu_is_in_reset)
m_soundcpu->set_input_line(0, ASSERT_LINE);
else
m_soundcpu->set_input_line(0, CLEAR_LINE);
@ -5242,7 +5260,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(vt_vt1682_state::scanline)
if (m_2000 & 0x01)
{
m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
m_soundcpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); // same enable? (NMI_EN on sub is 'wakeup NMI')
if (!m_scpu_is_in_reset)
m_soundcpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); // same enable? (NMI_EN on sub is 'wakeup NMI')
}
}
}
@ -5348,6 +5367,7 @@ void vt_vt1682_state::vt_vt1682(machine_config &config)
GFXDECODE(config, m_gfxdecode, m_palette, gfx_test);
VT_VT1682_IO(config, m_io, 0);
VT_VT1682_UIO(config, m_uio, 0);
/* video hardware */
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
@ -5378,6 +5398,7 @@ void intec_interact_state::machine_start()
save_item(NAME(m_previous_port_b));
save_item(NAME(m_input_sense));
save_item(NAME(m_input_pos));
save_item(NAME(m_current_bank));
}
void intec_interact_state::machine_reset()
@ -5386,8 +5407,30 @@ void intec_interact_state::machine_reset()
m_previous_port_b = 0x0;
m_input_sense = 0;
m_input_pos = 0;
m_current_bank = 0;
if (m_bank)
m_bank->set_entry(m_current_bank & 0x03);
}
WRITE8_MEMBER(intec_interact_state::ext_rombank_w)
{
LOGMASKED(LOG_OTHER, "%s: ext_rombank_w writing: %1x\n", machine().describe_context(), data);
// Seems no way to unset a bank once set? program will write 0 here, and even taking into account direction
// registers that would result in the bank bits being cleared, when running from a higher bank, which
// crashes the program. The game offers no 'back' option, so maybe this really is the correct logic.
if (data & 0x01)
m_current_bank |= 1;
if (data & 0x02)
m_current_bank |= 2;
m_bank->set_entry(m_current_bank & 0x03);
};
WRITE8_MEMBER(intec_interact_state::porta_w)
{
if (data != 0xf)
@ -5574,7 +5617,7 @@ void intec_interact_state::intech_interact_bank(machine_config& config)
{
intech_interact(config);
m_maincpu->set_addrmap(AS_PROGRAM, &intec_interact_state::vt_vt1682_map_bank);
m_uio->porta_out().set(FUNC(intec_interact_state::ext_rombank_w));
}
void vt_vt1682_state::regular_init()
@ -5585,8 +5628,11 @@ void vt_vt1682_state::regular_init()
void intec_interact_state::banked_init()
{
m_bank->configure_entry(0, memregion("mainrom")->base() + 0x0000000);
m_bank->configure_entry(1, memregion("mainrom")->base() + 0x2000000);
int size = memregion("mainrom")->bytes();
for (int i = 0; i < 4; i++)
{
m_bank->configure_entry(i, memregion("mainrom")->base() + ((i*0x2000000) & (size-1)));
}
}
@ -5610,11 +5656,20 @@ ROM_START( miwi2_16 )
ROM_LOAD( "miwi 2 16 arcade games and drum master vt168.bin", 0x00000, 0x1000000, CRC(00c115c5) SHA1(fa5fdb448dd9b963351d71fe94e2072f5c872a18) )
ROM_END
ROM_START( miwi2_7 )
ROM_REGION( 0x2000000, "mainrom", ROMREGION_ERASE00 )
ROM_LOAD( "miwi 2 sports 7 in 1 vt168.bin", 0x00000, 0x1000000, CRC(fcefb956) SHA1(fea8f041d42bcbae3716ce8b942a01e64504061e) )
ROM_END
ROM_START( intact89 )
ROM_REGION( 0x4000000, "mainrom", 0 )
ROM_LOAD( "89n1.bin", 0x00000, 0x4000000, CRC(bbcba068) SHA1(0ec1ecc55e9a7050ca20b1349b9712319fd21629) )
ROM_END
ROM_START( intg5410 )
ROM_REGION( 0x8000000, "mainrom", 0 )
ROM_LOAD( "interact_intg5410_111games_plus_42songs.bin", 0x00000, 0x8000000, CRC(d32dc914) SHA1(269fa262bb036ad5246dee9f83ee33dbb1543210) )
ROM_END
// TODO: this is a cartridge based system (actually, verify this, it seems some versions simply had built in games) move these to SL if verified as from cartridge config
// actually it appears that for the cart based systems these are 'fake systems' anyway, where the base unit is just a Famiclone but as soon as you plug in a cart none of
@ -5624,13 +5679,28 @@ CONS( 200?, ii8in1, 0, 0, intech_interact, intec, intec_interact_state,
CONS( 200?, ii32in1, 0, 0, intech_interact, intec, intec_interact_state, regular_init, "Intec", "InterAct 32-in-1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
// a 40-in-1 also exists which combines the above
CONS( 200?, miwi2_16, 0, 0, intech_interact, miwi2, intec_interact_state, regular_init, "<unknown>", "MiWi2 16-in-1 + Drum Master", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
// miwi2 7-in-1 Sports
CONS( 200?, intact89, 0, 0, intech_interact_bank, miwi2, intec_interact_state, banked_init, "Intec", "InterAct Complete Video Game 89-in-1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
// Intec Interact Infrazone 15 Shooting Games, 42 Mi kara, 96 Arcade Games + more should run here too
// Other standalone Mi Kara units should fit here as well
CONS( 200?, miwi2_16, 0, 0, intech_interact, miwi2, intec_interact_state, regular_init, "<unknown>", "MiWi2 16-in-1 + Drum Master", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // clearly older code, Highway has uncensored title screen, selection screen has 'Arcase' instead of 'Arcade'
CONS( 200?, miwi2_7, 0, 0, intech_interact, miwi2, intec_interact_state, regular_init, "<unknown>", "MiWi2 7-in-1 Sports", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
// ViMax seems to be identical software to MiWi2
// some older versions of these show 'Arcase' instead of 'Arcade' on the menu.
CONS( 200?, intact89, 0, 0, intech_interact_bank, miwi2, intec_interact_state, banked_init, "Intec", "InterAct Complete Video Game - 89-in-1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
/*
Box shows
InterAct
Complete Video Game System
Sistema Completo De Video Juegos
111 Games & 42 Songs
96 Arcade Games:
8 of them are Sports Games,
& 3 of the are Drum Master Games.
Plus 15 Shooting Games
Unit has 'InfraZone' text on it, but this isn't used anywhere in product description.
*/
CONS( 200?, intg5410, 0, 0, intech_interact_bank, miwi2, intec_interact_state, banked_init, "Intec", "InterAct Complete Video Game - 111 Games & 42 Songs (G5410)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // need to hook up gun controls etc. and verify others, also sometimes crashes on game change (due to crashing sound CPU?)
// Other standalone Mi Kara units should fit here as well

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// license:BSD-3-Clause
// copyright-holders:David Haywood
// UIO seems to be a different IO module to the vt1682_io.cpp one, 8-bit ports instead of 4-bit
#include "emu.h"
#include "machine/vt1682_uio.h"
#define LOG_UIO (1U << 1)
#define LOG_ALL ( LOG_UIO )
#define VERBOSE (0)
#include "logmacro.h"
DEFINE_DEVICE_TYPE(VT_VT1682_UIO, vrt_vt1682_uio_device, "vt1682uio", "VRT VT1682 UIO")
vrt_vt1682_uio_device::vrt_vt1682_uio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, VT_VT1682_UIO, tag, owner, clock),
m_porta_out(*this),
m_porta_in(*this),
m_portb_out(*this),
m_portb_in(*this)
{
}
READ8_MEMBER(vrt_vt1682_uio_device::inteact_2129_uio_a_data_r)
{
// TODO, use direction register etc.
uint8_t dat = m_porta_in();
//logerror("%s: bankswitch inteact_2129_uio_a_data_r %02x\n", machine().describe_context(), m_2129_uio_a_data);
return dat;
}
WRITE8_MEMBER(vrt_vt1682_uio_device::inteact_2129_uio_a_data_w)
{
// TODO, use direction register etc.
LOGMASKED(LOG_UIO, "%s: inteact_2129_uio_a_data_w %02x\n", machine().describe_context(), data);
m_2129_uio_a_data = data;
m_porta_out(m_2129_uio_a_data);
}
READ8_MEMBER(vrt_vt1682_uio_device::inteact_212a_uio_a_direction_r)
{
return m_212a_uio_a_direction;
}
WRITE8_MEMBER(vrt_vt1682_uio_device::inteact_212a_uio_a_direction_w)
{
LOGMASKED(LOG_UIO, "%s: inteact_212a_uio_a_direction_w %02x\n", machine().describe_context(), data);
m_212a_uio_a_direction = data;
}
READ8_MEMBER(vrt_vt1682_uio_device::inteact_212b_uio_a_attribute_r)
{
return m_212b_uio_a_attribute;
}
WRITE8_MEMBER(vrt_vt1682_uio_device::inteact_212b_uio_a_attribute_w)
{
LOGMASKED(LOG_UIO, "%s: inteact_212b_uio_a_attribute_w %02x\n", machine().describe_context(), data);
m_212b_uio_a_attribute = data;
}
READ8_MEMBER(vrt_vt1682_uio_device::inteact_2149_uio_b_data_r)
{
// TODO, use direction register etc.
uint8_t dat = m_portb_in();
//logerror("%s: bankswitch inteact_2149_uio_b_data_r %02x\n", machine().describe_context(), m_2149_uio_b_data);
return dat;
}
WRITE8_MEMBER(vrt_vt1682_uio_device::inteact_2149_uio_b_data_w)
{
// TODO, use direction register etc.
LOGMASKED(LOG_UIO, "%s: inteact_2149_uio_b_data_w %02x\n", machine().describe_context(), data);
m_2149_uio_b_data = data;
m_portb_out(m_2149_uio_b_data);
}
READ8_MEMBER(vrt_vt1682_uio_device::inteact_214a_uio_b_direction_r)
{
return m_214a_uio_b_direction;
}
WRITE8_MEMBER(vrt_vt1682_uio_device::inteact_214a_uio_b_direction_w)
{
LOGMASKED(LOG_UIO, "%s: inteact_214a_uio_b_direction_w %02x\n", machine().describe_context(), data);
m_214a_uio_b_direction = data;
}
READ8_MEMBER(vrt_vt1682_uio_device::inteact_214b_uio_b_attribute_r)
{
return m_214b_uio_b_attribute;
}
WRITE8_MEMBER(vrt_vt1682_uio_device::inteact_214b_uio_b_attribute_w)
{
LOGMASKED(LOG_UIO, "%s: inteact_214b_uio_b_attribute_w %02x\n", machine().describe_context(), data);
m_214b_uio_b_attribute = data;
}
void vrt_vt1682_uio_device::device_start()
{
m_porta_out.resolve_safe();
m_porta_in.resolve_safe(0);
m_portb_out.resolve_safe();
m_portb_in.resolve_safe(0);
save_item(NAME(m_2129_uio_a_data));
save_item(NAME(m_212a_uio_a_direction));
save_item(NAME(m_212b_uio_a_attribute));
save_item(NAME(m_2149_uio_b_data));
save_item(NAME(m_214a_uio_b_direction));
save_item(NAME(m_214b_uio_b_attribute));
}
void vrt_vt1682_uio_device::device_reset()
{
m_2129_uio_a_data = 0;
m_212a_uio_a_direction = 0;
m_212b_uio_a_attribute = 0;
m_2149_uio_b_data = 0;
m_214a_uio_b_direction = 0;
m_214b_uio_b_attribute = 0;
}

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@ -0,0 +1,56 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
#ifndef MAME_MACHINE_VT1682_UIO_H
#define MAME_MACHINE_VT1682_UIO_H
#pragma once
DECLARE_DEVICE_TYPE(VT_VT1682_UIO, vrt_vt1682_uio_device)
class vrt_vt1682_uio_device : public device_t
{
public:
// construction/destruction
vrt_vt1682_uio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
auto porta_out() { return m_porta_out.bind(); }
auto porta_in() { return m_porta_in.bind(); }
auto portb_out() { return m_portb_out.bind(); }
auto portb_in() { return m_portb_in.bind(); }
DECLARE_READ8_MEMBER(inteact_2129_uio_a_data_r);
DECLARE_WRITE8_MEMBER(inteact_2129_uio_a_data_w);
DECLARE_READ8_MEMBER(inteact_212a_uio_a_direction_r);
DECLARE_WRITE8_MEMBER(inteact_212a_uio_a_direction_w);
DECLARE_READ8_MEMBER(inteact_212b_uio_a_attribute_r);
DECLARE_WRITE8_MEMBER(inteact_212b_uio_a_attribute_w);
DECLARE_READ8_MEMBER(inteact_2149_uio_b_data_r);
DECLARE_WRITE8_MEMBER(inteact_2149_uio_b_data_w);
DECLARE_READ8_MEMBER(inteact_214a_uio_b_direction_r);
DECLARE_WRITE8_MEMBER(inteact_214a_uio_b_direction_w);
DECLARE_READ8_MEMBER(inteact_214b_uio_b_attribute_r);
DECLARE_WRITE8_MEMBER(inteact_214b_uio_b_attribute_w);
protected:
virtual void device_start() override;
virtual void device_reset() override;
private:
devcb_write8 m_porta_out;
devcb_read8 m_porta_in;
devcb_write8 m_portb_out;
devcb_read8 m_portb_in;
uint8_t m_2129_uio_a_data;
uint8_t m_212a_uio_a_direction;
uint8_t m_212b_uio_a_attribute;
uint8_t m_2149_uio_b_data;
uint8_t m_214a_uio_b_direction;
uint8_t m_214b_uio_b_attribute;
};
#endif // MAME_MACHINE_VT1682_UIO_H

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@ -31161,6 +31161,7 @@ mc_105te
mc_sp69
polmega
silv35
lpgm240
mc_dcat8
mc_dcat8a
pjoyn50
@ -31207,7 +31208,9 @@ ts_handy11
ii8in1
ii32in1
miwi2_16
miwi2_7
intact89
intg5410
@source:newbrain.cpp
newbrain //