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Added a preliminary implementation for the SLEEP opcode in SH-4 cpu. This fixes Quiz Keitai Q Mode booting [Angelo Salese]

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This commit is contained in:
Angelo Salese 2009-03-24 14:00:22 +00:00
parent af6522fe8a
commit 6b27889b99
3 changed files with 16 additions and 3 deletions
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11
src/emu/cpu/sh4/sh4.c
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@ -1546,9 +1546,17 @@ INLINE void SHLR16(SH4 *sh4, UINT32 n)
/* SLEEP */ /* SLEEP */
INLINE void SLEEP(SH4 *sh4) INLINE void SLEEP(SH4 *sh4)
{ {
sh4->pc -= 2; /* 0 = normal mode */
/* 1 = enters into power-down mode */
/* 2 = go out the power-down mode after an exception */
if(sh4->sleep_mode != 2)
sh4->pc -= 2;
sh4->sh4_icount -= 2; sh4->sh4_icount -= 2;
/* Wait_for_exception; */ /* Wait_for_exception; */
if(sh4->sleep_mode == 0)
sh4->sleep_mode = 1;
else if(sh4->sleep_mode == 2)
sh4->sleep_mode = 0;
} }
/* STC SR,Rn */ /* STC SR,Rn */
@ -3317,6 +3325,7 @@ static CPU_RESET( sh4 )
sh4->internal_irq_level = -1; sh4->internal_irq_level = -1;
sh4->irln = 15; sh4->irln = 15;
sh4->sleep_mode = 0;
} }
/* Execute cycles - returns number of cycles actually run */ /* Execute cycles - returns number of cycles actually run */

6
src/emu/cpu/sh4/sh4comn.c
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@ -212,6 +212,8 @@ void sh4_exception(SH4 *sh4, const char *message, int exception) // handle excep
/* fetch PC */ /* fetch PC */
sh4->pc = sh4->vbr + vector; sh4->pc = sh4->vbr + vector;
/* wake up if a sleep opcode is triggered */
if(sh4->sleep_mode == 1) { sh4->sleep_mode = 2; }
} }
static UINT32 compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor) static UINT32 compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor)
@ -644,9 +646,9 @@ WRITE32_HANDLER( sh4_internal_w )
case MMUCR: // MMU Control case MMUCR: // MMU Control
if (data & 1) if (data & 1)
fatalerror("SH4: MMUCR write enables MMU\n"); fatalerror("SH4: MMUCR write enables MMU\n");
break; break;
// Memory refresh // Memory refresh
case RTCSR: case RTCSR:
sh4->m[RTCSR] &= 255; sh4->m[RTCSR] &= 255;

2
src/emu/cpu/sh4/sh4comn.h
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@ -68,6 +68,8 @@ typedef struct
UINT32 *m; UINT32 *m;
INT8 nmi_line_state; INT8 nmi_line_state;
UINT8 sleep_mode;
int frt_input; int frt_input;
int irln; int irln;
int internal_irq_level; int internal_irq_level;