diff --git a/hash/dragon_cart.xml b/hash/dragon_cart.xml index 52edb614a47..196756567a5 100644 --- a/hash/dragon_cart.xml +++ b/hash/dragon_cart.xml @@ -9,11 +9,11 @@ license:CC0-1.0 Nearly all of the cartridges on this Dragon software list will also run on the CoCo 2/3, CP400. ROMs dumped from RAM and marked as "bad dumps": - Cumana DOS v2.0 + Cumana DOS v2.0 TODO: - Most cartridges with two EPROMs have been dumped as one single file, such entries should be marked as "bad dump" until proper split dumps exist. - Add compatibility tags where needed. + Most cartridges with two EPROMs have been dumped as one single file, such entries should be marked as "bad dump" until proper split dumps exist. + Add compatibility tags where needed. --> @@ -424,8 +424,8 @@ license:CC0-1.0 Belrampa Servicios, SA - - + + diff --git a/hash/specpls3_flop.xml b/hash/specpls3_flop.xml index a5b9ebb5f95..2ffb65bc6cb 100644 --- a/hash/specpls3_flop.xml +++ b/hash/specpls3_flop.xml @@ -1837,7 +1837,7 @@ Side B has a copy of Hardball for the Amstrad CPC, was this edition accidentally - + Aztec Assault 1992 @@ -16833,7 +16833,7 @@ The floppy disks don't load after choosing the "Loader" option menu. - + The Duel - Test Drive II (Dro Soft) 1990 diff --git a/hash/tx0_ptp.xml b/hash/tx0_ptp.xml index 4a8d47622f2..d8e7635c1a7 100644 --- a/hash/tx0_ptp.xml +++ b/hash/tx0_ptp.xml @@ -45,11 +45,11 @@ license:CC0-1.0 - + - + - + diff --git a/src/devices/bus/a2bus/cards.cpp b/src/devices/bus/a2bus/cards.cpp index 10357935263..1ffd8c904bd 100644 --- a/src/devices/bus/a2bus/cards.cpp +++ b/src/devices/bus/a2bus/cards.cpp @@ -76,9 +76,9 @@ void apple2_slot0_cards(device_slot_interface &device) { device.option_add("lang", A2BUS_RAMCARD16K); // Apple II RAM Language Card device.option_add("ssram", A2BUS_RAMCARD128K); // Saturn Systems 128K extended language card - device.option_add("romcard", A2BUS_ROMCARDUSER); // Apple II ROM Card that loads a custom ROM image - device.option_add("romcardfp", A2BUS_ROMCARDFP); // Apple II ROM Card with Autostart Monitor + Applesoft BASIC - device.option_add("romcardint", A2BUS_ROMCARDINT); // Apple II ROM Card with Autostart Monitor + Integer BASIC + device.option_add("romcard", A2BUS_ROMCARDUSER); // Apple II ROM Card that loads a custom ROM image + device.option_add("romcardfp", A2BUS_ROMCARDFP); // Apple II ROM Card with Autostart Monitor + Applesoft BASIC + device.option_add("romcardint", A2BUS_ROMCARDINT); // Apple II ROM Card with Autostart Monitor + Integer BASIC } void apple2_cards(device_slot_interface &device) diff --git a/src/devices/bus/a800/a5200_supercart.cpp b/src/devices/bus/a800/a5200_supercart.cpp index 35db704533f..563095f6b59 100644 --- a/src/devices/bus/a800/a5200_supercart.cpp +++ b/src/devices/bus/a800/a5200_supercart.cpp @@ -61,7 +61,7 @@ u8 a5200_rom_supercart_device::bank_r(offs_t offset) m_bank &= m_bank_mask; } - + return m_rom[(offset & 0x3f) + (m_bank * 0x8000) + 0x7fc0]; } diff --git a/src/devices/bus/a800/a800_slot.cpp b/src/devices/bus/a800/a800_slot.cpp index 1e9cd5e9acd..f780392d3cb 100644 --- a/src/devices/bus/a800/a800_slot.cpp +++ b/src/devices/bus/a800/a800_slot.cpp @@ -642,7 +642,7 @@ int a5200_cart_slot_device::identify_cart_type(const uint8_t *header) const std::string a800_cart_slot_device::get_default_card_software(get_default_card_software_hook &hook) const { // Nope, will crash when mounting the SDX subslot -// std::string slot_default_option = default_option(); +// std::string slot_default_option = default_option(); const bool is_xegs = m_is_xegs; if (hook.image_file()) diff --git a/src/devices/bus/isa/isa_cards.cpp b/src/devices/bus/isa/isa_cards.cpp index 957a2a388ac..a5b480737c9 100644 --- a/src/devices/bus/isa/isa_cards.cpp +++ b/src/devices/bus/isa/isa_cards.cpp @@ -216,7 +216,7 @@ void pc_isa16_cards(device_slot_interface &device) device.option_add("gfxultra", ISA16_VGA_GFXULTRA); device.option_add("gfxultrap", ISA16_SVGA_GFXULTRAPRO); device.option_add("tvga9000", ISA16_SVGA_TVGA9000); -// device.option_add("tgui9680",ISA16_SVGA_TGUI9680); +// device.option_add("tgui9680",ISA16_SVGA_TGUI9680); device.option_add("3c505", ISA16_3C505); device.option_add("mach64", ISA16_SVGA_MACH64); device.option_add("sb16_lle", ISA16_SB16); diff --git a/src/devices/bus/isa/svga_trident.cpp b/src/devices/bus/isa/svga_trident.cpp index 2d818d76735..0c5024d08ba 100644 --- a/src/devices/bus/isa/svga_trident.cpp +++ b/src/devices/bus/isa/svga_trident.cpp @@ -145,7 +145,7 @@ void isa16_svga_tgui9680_device::device_start() // m_isa->install_memory(0x4400000, 0x45fffff, read8sm_delegate(*m_vga, FUNC(trident_vga_device::vram_r)), write8sm_delegate(*m_vga, FUNC(trident_vga_device::vram_w))); // win95 drivers -// m_isa->install_memory(0x4000000, 0x41fffff, read8sm_delegate(*m_vga, FUNC(trident_vga_device::vram_r)), write8sm_delegate(*m_vga, FUNC(trident_vga_device::vram_w))); +// m_isa->install_memory(0x4000000, 0x41fffff, read8sm_delegate(*m_vga, FUNC(trident_vga_device::vram_r)), write8sm_delegate(*m_vga, FUNC(trident_vga_device::vram_w))); // acceleration ports m_isa->install_device(0x2120, 0x21ff, read8sm_delegate(*m_vga, FUNC(trident_vga_device::accel_r)), write8sm_delegate(*m_vga, FUNC(trident_vga_device::accel_w))); diff --git a/src/devices/cpu/h8/h8_dma.cpp b/src/devices/cpu/h8/h8_dma.cpp index 25f96212374..33b277c38e4 100644 --- a/src/devices/cpu/h8/h8_dma.cpp +++ b/src/devices/cpu/h8/h8_dma.cpp @@ -72,7 +72,7 @@ void h8gen_dma_device::start_stop_test() if(BIT(chnmap, i)) { if(!(m_dmach[i >> 1]->m_state[i & 1].m_flags & h8_dma_state::ACTIVE)) m_dmach[i >> 1]->start(i & 1); - + } else { if(m_dmach[i >> 1] && (m_dmach[i >> 1]->m_state[i & 1].m_flags & h8_dma_state::ACTIVE)) { logerror("forced abort %d\n", i); @@ -138,7 +138,7 @@ void h8gen_dma_channel_device::set_dreq(int state) return; m_dreq = state; - + // Only subchannel B/1 can react to dreq. if(m_dreq) { @@ -317,7 +317,7 @@ void h8gen_dma_channel_device::start(int submodule) int step = m_state[submodule].m_flags & h8_dma_state::MODE_16 ? 2 : 1; m_state[submodule].m_incs = m_state[submodule].m_flags & h8_dma_state::SOURCE_IDLE ? 0 : m_state[submodule].m_flags & h8_dma_state::SOURCE_DECREMENT ? -step : step; - m_state[submodule].m_incd = m_state[submodule].m_flags & h8_dma_state::DEST_IDLE ? 0 : m_state[submodule].m_flags & h8_dma_state::DEST_DECREMENT ? -step : step; + m_state[submodule].m_incd = m_state[submodule].m_flags & h8_dma_state::DEST_IDLE ? 0 : m_state[submodule].m_flags & h8_dma_state::DEST_DECREMENT ? -step : step; logerror("%c: setup src=%s%s dst=%s%s count=%x bcount=%x trigger=%s%s%s%s%s%s%s%s%s\n", 'A' + submodule, @@ -597,7 +597,7 @@ u16 h8h_dma_channel_device::channel_flags(int submodule) const res |= h8_dma_state::MAR_IS_DEST | h8_dma_state::SOURCE_IDLE; else res |= h8_dma_state::DEST_IDLE; - + if(BIT(m_dtcr[submodule], 5)) res |= (res & h8_dma_state::MAR_IS_DEST) ? h8_dma_state::DEST_DECREMENT : h8_dma_state::SOURCE_DECREMENT; @@ -725,7 +725,7 @@ u16 h8s_dma_channel_device::channel_flags(int submodule) const res |= h8_dma_state::MAR_IS_DEST | h8_dma_state::SOURCE_IDLE; else res |= h8_dma_state::DEST_IDLE; - + if(BIT(cr, 6)) res |= (res & h8_dma_state::MAR_IS_DEST) ? h8_dma_state::DEST_DECREMENT : h8_dma_state::SOURCE_DECREMENT; diff --git a/src/devices/cpu/h8/h8_dma.h b/src/devices/cpu/h8/h8_dma.h index 87e69d68765..3ad1d731b2a 100644 --- a/src/devices/cpu/h8/h8_dma.h +++ b/src/devices/cpu/h8/h8_dma.h @@ -205,7 +205,7 @@ protected: class h8h_dma_channel_device : public h8gen_dma_channel_device { public: - h8h_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); + h8h_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template h8h_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&dma, V &&intc, bool has_adc, bool targets_sci1) @@ -243,10 +243,10 @@ protected: class h8s_dma_channel_device : public h8gen_dma_channel_device { public: - h8s_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); + h8s_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template h8s_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, - T &&cpu, U &&dma, V &&intc) + T &&cpu, U &&dma, V &&intc) : h8s_dma_channel_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); diff --git a/src/devices/cpu/h8/h8_intc.h b/src/devices/cpu/h8/h8_intc.h index c0839c713e9..b1571fc64c9 100644 --- a/src/devices/cpu/h8/h8_intc.h +++ b/src/devices/cpu/h8/h8_intc.h @@ -23,7 +23,7 @@ public: h8_intc_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); - } + } int interrupt_taken(int vector); void internal_interrupt(int vector); @@ -72,7 +72,7 @@ public: gt913_intc_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); - } + } void clear_interrupt(int vector); @@ -87,7 +87,7 @@ public: h8h_intc_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); - } + } uint8_t isr_r(); void isr_w(uint8_t data); @@ -121,7 +121,7 @@ public: h8s_intc_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); - } + } uint8_t ipr_r(offs_t offset); void ipr_w(offs_t offset, uint8_t data); diff --git a/src/devices/cpu/m6502/om6502.lst b/src/devices/cpu/m6502/om6502.lst index 428a71f2079..1dca3d918a8 100644 --- a/src/devices/cpu/m6502/om6502.lst +++ b/src/devices/cpu/m6502/om6502.lst @@ -2204,7 +2204,7 @@ asr_imm arr_imm TMP = read_pc(); PC++; - A &= TMP; + A &= TMP; do_arr(); prefetch(); diff --git a/src/devices/machine/pc87306.cpp b/src/devices/machine/pc87306.cpp index 6150023fe66..4b8c94f2422 100644 --- a/src/devices/machine/pc87306.cpp +++ b/src/devices/machine/pc87306.cpp @@ -37,12 +37,12 @@ pc87306_device::pc87306_device(const machine_config &mconfig, const char *tag, d , m_irq1_callback(*this) , m_irq8_callback(*this) , m_irq9_callback(*this) -// , m_txd1_callback(*this) -// , m_ndtr1_callback(*this) -// , m_nrts1_callback(*this) -// , m_txd2_callback(*this) -// , m_ndtr2_callback(*this) -// , m_nrts2_callback(*this) +// , m_txd1_callback(*this) +// , m_ndtr1_callback(*this) +// , m_nrts1_callback(*this) +// , m_txd2_callback(*this) +// , m_ndtr2_callback(*this) +// , m_nrts2_callback(*this) { } @@ -74,9 +74,9 @@ void pc87306_device::device_add_mconfig(machine_config &config) { // TODO: can bank thru bit 5 of KRR DS12885(config, m_rtc, 32.768_kHz_XTAL); -// m_rtc->irq().set(FUNC(pc87306_device::irq_rtc_w)); +// m_rtc->irq().set(FUNC(pc87306_device::irq_rtc_w)); m_rtc->set_century_index(0x32); - + KBDC8042(config, m_kbdc); m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_PS2); m_kbdc->set_interrupt_type(kbdc8042_device::KBDC8042_SINGLE); @@ -135,35 +135,35 @@ void pc87306_device::write(offs_t offset, u8 data) void pc87306_device::config_map(address_map &map) { -// map(0x00, 0x00) FER Function Enable Register -// map(0x01, 0x01) FAR Function Address Register -// map(0x02, 0x02) PTR Power and Test Register -// map(0x03, 0x03) FCR Function Control Register -// map(0x04, 0x04) PCR Printer Control Register +// map(0x00, 0x00) FER Function Enable Register +// map(0x01, 0x01) FAR Function Address Register +// map(0x02, 0x02) PTR Power and Test Register +// map(0x03, 0x03) FCR Function Control Register +// map(0x04, 0x04) PCR Printer Control Register map(0x05, 0x05).rw(FUNC(pc87306_device::krr_r), FUNC(pc87306_device::krr_w)); -// map(0x06, 0x06) PMC Power Management Control Register -// map(0x07, 0x07) TUP Tape, UART and Parallel Port Configuration Register +// map(0x06, 0x06) PMC Power Management Control Register +// map(0x07, 0x07) TUP Tape, UART and Parallel Port Configuration Register // SID Super I/O Identification Register // bits 7-3 -> 01110 TL/C/12379-27 // bits 2-0 -> map(0x08, 0x08).lr8( NAME([] (offs_t offset) { return 0x70; }) ); -// map(0x09, 0x09) ASC Advanced Super I/O Configuration Register -// map(0x0a, 0x0a) CS0LA Chip Select 0 Low Address -// map(0x0b, 0x0b) CS0CF Chip Select 0 Configuration Address -// map(0x0c, 0x0c) CS1LA Chip Select 1 Low Address -// map(0x0d, 0x0d) CS1CF Chip Select 1 Configuration Address -// map(0x0e, 0x0e) IRC InfraRed Configuration Register -// map(0x0f, 0x0f) GPBA General Purpose I/O Port Base Address -// map(0x10, 0x10) CS0HA Chip Select 0 High Address -// map(0x11, 0x11) CS1HA Chip Select 1 High Address -// map(0x12, 0x12) SCF0 Super I/O Configuration Register 0 -// map(0x18, 0x18) SCF1 Super I/O Configuration Register 1 -// map(0x19, 0x19) LPTBA LPT Base Address +// map(0x09, 0x09) ASC Advanced Super I/O Configuration Register +// map(0x0a, 0x0a) CS0LA Chip Select 0 Low Address +// map(0x0b, 0x0b) CS0CF Chip Select 0 Configuration Address +// map(0x0c, 0x0c) CS1LA Chip Select 1 Low Address +// map(0x0d, 0x0d) CS1CF Chip Select 1 Configuration Address +// map(0x0e, 0x0e) IRC InfraRed Configuration Register +// map(0x0f, 0x0f) GPBA General Purpose I/O Port Base Address +// map(0x10, 0x10) CS0HA Chip Select 0 High Address +// map(0x11, 0x11) CS1HA Chip Select 1 High Address +// map(0x12, 0x12) SCF0 Super I/O Configuration Register 0 +// map(0x18, 0x18) SCF1 Super I/O Configuration Register 1 +// map(0x19, 0x19) LPTBA LPT Base Address -// map(0x1b, 0x1b) PNP0 Plug and Play Configuration 0 Register -// map(0x1c, 0x1c) PNP1 Plug and Play Configuration 1 Register +// map(0x1b, 0x1b) PNP0 Plug and Play Configuration 0 Register +// map(0x1c, 0x1c) PNP1 Plug and Play Configuration 1 Register } // [0x05] KRR KBC and RTC Control Register diff --git a/src/devices/machine/pc87306.h b/src/devices/machine/pc87306.h index a9c4aeb9c59..f6aea07cd37 100644 --- a/src/devices/machine/pc87306.h +++ b/src/devices/machine/pc87306.h @@ -10,9 +10,9 @@ #include "machine/8042kbdc.h" #include "machine/ds128x.h" -class pc87306_device : public device_t, - public device_isa16_card_interface, - public device_memory_interface +class pc87306_device : public device_t, + public device_isa16_card_interface, + public device_memory_interface { public: pc87306_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -25,12 +25,12 @@ public: auto irq1() { return m_irq1_callback.bind(); } auto irq8() { return m_irq8_callback.bind(); } auto irq9() { return m_irq9_callback.bind(); } -// auto txd1() { return m_txd1_callback.bind(); } -// auto ndtr1() { return m_ndtr1_callback.bind(); } -// auto nrts1() { return m_nrts1_callback.bind(); } -// auto txd2() { return m_txd2_callback.bind(); } -// auto ndtr2() { return m_ndtr2_callback.bind(); } -// auto nrts2() { return m_nrts2_callback.bind(); } +// auto txd1() { return m_txd1_callback.bind(); } +// auto ndtr1() { return m_ndtr1_callback.bind(); } +// auto nrts1() { return m_nrts1_callback.bind(); } +// auto txd2() { return m_txd2_callback.bind(); } +// auto ndtr2() { return m_ndtr2_callback.bind(); } +// auto nrts2() { return m_nrts2_callback.bind(); } protected: virtual void device_start() override; @@ -44,19 +44,19 @@ private: required_device m_kbdc; required_device m_rtc; -// memory_view m_logical_view; +// memory_view m_logical_view; devcb_write_line m_gp20_reset_callback; devcb_write_line m_gp25_gatea20_callback; devcb_write_line m_irq1_callback; devcb_write_line m_irq8_callback; devcb_write_line m_irq9_callback; -// devcb_write_line m_txd1_callback; -// devcb_write_line m_ndtr1_callback; -// devcb_write_line m_nrts1_callback; -// devcb_write_line m_txd2_callback; -// devcb_write_line m_ndtr2_callback; -// devcb_write_line m_nrts2_callback; +// devcb_write_line m_txd1_callback; +// devcb_write_line m_ndtr1_callback; +// devcb_write_line m_nrts1_callback; +// devcb_write_line m_txd2_callback; +// devcb_write_line m_ndtr2_callback; +// devcb_write_line m_nrts2_callback; void request_irq(int irq, int state); diff --git a/src/devices/machine/w83977tf.cpp b/src/devices/machine/w83977tf.cpp index 4a7a66d8b86..c37c44c1e3d 100644 --- a/src/devices/machine/w83977tf.cpp +++ b/src/devices/machine/w83977tf.cpp @@ -33,12 +33,12 @@ w83977tf_device::w83977tf_device(const machine_config &mconfig, const char *tag, , m_irq1_callback(*this) , m_irq8_callback(*this) , m_irq9_callback(*this) -// , m_txd1_callback(*this) -// , m_ndtr1_callback(*this) -// , m_nrts1_callback(*this) -// , m_txd2_callback(*this) -// , m_ndtr2_callback(*this) -// , m_nrts2_callback(*this) +// , m_txd1_callback(*this) +// , m_ndtr1_callback(*this) +// , m_nrts1_callback(*this) +// , m_txd2_callback(*this) +// , m_ndtr2_callback(*this) +// , m_nrts2_callback(*this) { } void w83977tf_device::device_start() @@ -72,7 +72,7 @@ void w83977tf_device::device_add_mconfig(machine_config &config) DS12885(config, m_rtc, 32.768_kHz_XTAL); m_rtc->irq().set(FUNC(w83977tf_device::irq_rtc_w)); m_rtc->set_century_index(0x32); - + KBDC8042(config, m_kbdc); m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_PS2); m_kbdc->set_interrupt_type(kbdc8042_device::KBDC8042_DOUBLE); @@ -125,7 +125,7 @@ void w83977tf_device::write(offs_t offset, u8 data) { m_lock_sequence --; //if (m_lock_sequence == 0) - // LOG("Config unlocked\n"); + // LOG("Config unlocked\n"); } } else @@ -148,20 +148,20 @@ void w83977tf_device::write(offs_t offset, u8 data) void w83977tf_device::config_map(address_map &map) { -// map(0x02, 0x02) configuration control (bit 0 soft reset) +// map(0x02, 0x02) configuration control (bit 0 soft reset) map(0x07, 0x07).lr8(NAME([this] () { return m_logical_index; })).w(FUNC(w83977tf_device::logical_device_select_w)); map(0x20, 0x20).lr8(NAME([] () { return 0x97; })); // device ID map(0x21, 0x21).lr8(NAME([] () { return 0x73; })); // revision -// map(0x22, 0x22) device power down control -// map(0x23, 0x23) global immediate power down -// map(0x24, 0x24) -// map(0x25, 0x25) +// map(0x22, 0x22) device power down control +// map(0x23, 0x23) global immediate power down +// map(0x24, 0x24) +// map(0x25, 0x25) map(0x26, 0x26).rw(FUNC(w83977tf_device::cr26_r), FUNC(w83977tf_device::cr26_w)); -// map(0x28, 0x28) -// map(0x2a, 0x2a) -// map(0x2b, 0x2b) -// map(0x2c, 0x2c) -// map(0x2d, 0x2f) Test Modes +// map(0x28, 0x28) +// map(0x2a, 0x2a) +// map(0x2b, 0x2b) +// map(0x2c, 0x2c) +// map(0x2d, 0x2f) Test Modes map(0x30, 0xff).view(m_logical_view); // FDC diff --git a/src/devices/machine/w83977tf.h b/src/devices/machine/w83977tf.h index e34e939e197..ad2ec79c195 100644 --- a/src/devices/machine/w83977tf.h +++ b/src/devices/machine/w83977tf.h @@ -10,8 +10,8 @@ #include "machine/8042kbdc.h" #include "machine/ds128x.h" -class w83977tf_device : public device_t, - public device_isa16_card_interface, +class w83977tf_device : public device_t, + public device_isa16_card_interface, public device_memory_interface { public: @@ -25,12 +25,12 @@ public: auto irq1() { return m_irq1_callback.bind(); } auto irq8() { return m_irq8_callback.bind(); } auto irq9() { return m_irq9_callback.bind(); } -// auto txd1() { return m_txd1_callback.bind(); } -// auto ndtr1() { return m_ndtr1_callback.bind(); } -// auto nrts1() { return m_nrts1_callback.bind(); } -// auto txd2() { return m_txd2_callback.bind(); } -// auto ndtr2() { return m_ndtr2_callback.bind(); } -// auto nrts2() { return m_nrts2_callback.bind(); } +// auto txd1() { return m_txd1_callback.bind(); } +// auto ndtr1() { return m_ndtr1_callback.bind(); } +// auto nrts1() { return m_nrts1_callback.bind(); } +// auto txd2() { return m_txd2_callback.bind(); } +// auto ndtr2() { return m_ndtr2_callback.bind(); } +// auto nrts2() { return m_nrts2_callback.bind(); } protected: virtual void device_start() override; @@ -51,12 +51,12 @@ private: devcb_write_line m_irq1_callback; devcb_write_line m_irq8_callback; devcb_write_line m_irq9_callback; -// devcb_write_line m_txd1_callback; -// devcb_write_line m_ndtr1_callback; -// devcb_write_line m_nrts1_callback; -// devcb_write_line m_txd2_callback; -// devcb_write_line m_ndtr2_callback; -// devcb_write_line m_nrts2_callback; +// devcb_write_line m_txd1_callback; +// devcb_write_line m_ndtr1_callback; +// devcb_write_line m_nrts1_callback; +// devcb_write_line m_txd2_callback; +// devcb_write_line m_ndtr2_callback; +// devcb_write_line m_nrts2_callback; uint8_t read(offs_t offset); void write(offs_t offset, u8 data); diff --git a/src/devices/video/pc_vga_nvidia.cpp b/src/devices/video/pc_vga_nvidia.cpp index 51c51692383..2615b10fab1 100644 --- a/src/devices/video/pc_vga_nvidia.cpp +++ b/src/devices/video/pc_vga_nvidia.cpp @@ -84,16 +84,16 @@ void nvidia_nv3_vga_device::device_start() // Start address ends at 20 bits so 0x1fffff mask / 2,097,151 bytes / 2MB window is (theorically) given // we assume that is really 4 MB, VESA tests extensively tests with 0x7f banks vga.svga_intf.vram_size = 4*1024*1024; - + for (int i = 0; i < 0x100; i++) set_pen_color(i, pal1bit(i & 1), pal1bit((i & 2) >> 1), pal1bit((i & 4) >> 2)); -// vga.miscellaneous_output = 0; +// vga.miscellaneous_output = 0; m_ext_offset = 0; save_item(NAME(m_ext_offset)); } -// TODO: should really calculate the access bit internally +// TODO: should really calculate the access bit internally uint8_t nvidia_nv3_vga_device::port_03b0_r(offs_t offset) { uint8_t res = 0xff; diff --git a/src/devices/video/pc_vga_nvidia.h b/src/devices/video/pc_vga_nvidia.h index 2b75bba2f26..3ce6191c943 100644 --- a/src/devices/video/pc_vga_nvidia.h +++ b/src/devices/video/pc_vga_nvidia.h @@ -22,12 +22,12 @@ public: virtual uint8_t port_03b0_r(offs_t offset) override; virtual void port_03b0_w(offs_t offset, uint8_t data) override; -// virtual uint8_t port_03c0_r(offs_t offset) override; -// virtual void port_03c0_w(offs_t offset, uint8_t data) override; +// virtual uint8_t port_03c0_r(offs_t offset) override; +// virtual void port_03c0_w(offs_t offset, uint8_t data) override; virtual uint8_t port_03d0_r(offs_t offset) override; virtual void port_03d0_w(offs_t offset, uint8_t data) override; -// virtual uint8_t mem_r(offs_t offset) override; -// virtual void mem_w(offs_t offset, uint8_t data) override; +// virtual uint8_t mem_r(offs_t offset) override; +// virtual void mem_w(offs_t offset, uint8_t data) override; protected: virtual void device_start() override; diff --git a/src/devices/video/pc_vga_tseng.cpp b/src/devices/video/pc_vga_tseng.cpp index 4e5ff89a721..6e4f7e8d7d8 100644 --- a/src/devices/video/pc_vga_tseng.cpp +++ b/src/devices/video/pc_vga_tseng.cpp @@ -10,7 +10,7 @@ * \- Unsupported True Color modes; * - ET4000/W32 (2d accelerator) * - ET4000/W32p (PCI version) - * + * */ #include "emu.h" diff --git a/src/devices/video/riva128.cpp b/src/devices/video/riva128.cpp index 5ce8bcb119a..ed8f4cb7744 100644 --- a/src/devices/video/riva128.cpp +++ b/src/devices/video/riva128.cpp @@ -107,11 +107,11 @@ void riva128_device::config_map(address_map &map) pci_device::config_map(map); map(0x34, 0x34).lr8(NAME([] () { return 0x44; })); -// map(0x40, 0x43) subsystem ID alias (writeable) -// map(0x44, 0x4f) AGP i/f -// map(0x50, 0x53) ROM shadow enable +// map(0x40, 0x43) subsystem ID alias (writeable) +// map(0x44, 0x4f) AGP i/f +// map(0x50, 0x53) ROM shadow enable map(0x54, 0x57).lrw8( - NAME([this] (offs_t offset) { return m_vga_legacy_enable; }), + NAME([this] (offs_t offset) { return m_vga_legacy_enable; }), NAME([this] (offs_t offset, u32 data, u32 mem_mask) { if (ACCESSING_BITS_0_7) { @@ -139,33 +139,33 @@ void riva128_device::mmio_map(address_map &map) COMBINE_DATA(&m_main_scratchpad_id); }) ); -// map(0x00000000, 0x00000fff) PMC card master control -// map(0x00001000, 0x00001fff) PBUS bus control -// map(0x00002000, 0x00003fff) PFIFO -// map(0x00007000, 0x00007***) PRMA real mode BAR Access -// map(0x00009000, 0x00009***) PTIMER -// map(0x000a0000, 0x000bffff) PRMFB legacy VGA memory -// map(0x000c0000, 0x000c****) PRMVIO VGA sequencer & VGA gfx regs (multiple on NV40+) -// map(0x00100000, 0x0010*fff) PFB memory interface -// map(0x00110000, 0x0011ffff) PROM ROM access window -// map(0x00120000, 0x0012ffff) PALT External memory access window -// map(0x00400000, 0x00400fff) PGRAPH 2d/3d graphics engine -// map(0x00401000, 0x00401***) PDMA system memory DMA engine (NV3/NV4 only) -// map(0x00600000, 0x00600***) PCRTC CRTC controls (on NV4+ only?) -// map(0x00601000, 0x0060****) PRMCIO VGA CRTC controls -// map(0x00680000, 0x0068****) PRAMDAC -// map(0x00681000, 0x00681***) VGA DAC registers -// map(0x00800000, 0x00******) PFIFO MMIO submission area +// map(0x00000000, 0x00000fff) PMC card master control +// map(0x00001000, 0x00001fff) PBUS bus control +// map(0x00002000, 0x00003fff) PFIFO +// map(0x00007000, 0x00007***) PRMA real mode BAR Access +// map(0x00009000, 0x00009***) PTIMER +// map(0x000a0000, 0x000bffff) PRMFB legacy VGA memory +// map(0x000c0000, 0x000c****) PRMVIO VGA sequencer & VGA gfx regs (multiple on NV40+) +// map(0x00100000, 0x0010*fff) PFB memory interface +// map(0x00110000, 0x0011ffff) PROM ROM access window +// map(0x00120000, 0x0012ffff) PALT External memory access window +// map(0x00400000, 0x00400fff) PGRAPH 2d/3d graphics engine +// map(0x00401000, 0x00401***) PDMA system memory DMA engine (NV3/NV4 only) +// map(0x00600000, 0x00600***) PCRTC CRTC controls (on NV4+ only?) +// map(0x00601000, 0x0060****) PRMCIO VGA CRTC controls +// map(0x00680000, 0x0068****) PRAMDAC +// map(0x00681000, 0x00681***) VGA DAC registers +// map(0x00800000, 0x00******) PFIFO MMIO submission area } void riva128_device::vram_aperture_map(address_map &map) { - + } void riva128_device::indirect_io_map(address_map &map) { - + } u32 riva128_device::unmap_log_r(offs_t offset, u32 mem_mask) diff --git a/src/devices/video/zr36110.cpp b/src/devices/video/zr36110.cpp index b119061e55f..6b7ee862af9 100644 --- a/src/devices/video/zr36110.cpp +++ b/src/devices/video/zr36110.cpp @@ -299,7 +299,7 @@ void zr36110_device::cmdx_w(u16 data) void zr36110_device::dma8_w(u8 data) { - // logerror("dma %02x\n", data); + // logerror("dma %02x\n", data); } void zr36110_device::dma_w(u16 data) diff --git a/src/mame/atari/atari400.cpp b/src/mame/atari/atari400.cpp index 1f0a3bba003..703a6d568c9 100644 --- a/src/mame/atari/atari400.cpp +++ b/src/mame/atari/atari400.cpp @@ -359,7 +359,7 @@ public: void a800pal(machine_config &config); protected: -// virtual void machine_start() override; +// virtual void machine_start() override; virtual void machine_reset() override; private: @@ -514,12 +514,12 @@ private: void a400_state::hw_iomap(address_map &map) { map(0x0000, 0x00ff).rw(m_gtia, FUNC(gtia_device::read), FUNC(gtia_device::write)); -// map(0x0100, 0x01ff).noprw(); +// map(0x0100, 0x01ff).noprw(); map(0x0200, 0x02ff).rw(m_pokey, FUNC(pokey_device::read), FUNC(pokey_device::write)); map(0x0300, 0x03ff).rw(m_pia, FUNC(pia6821_device::read_alt), FUNC(pia6821_device::write_alt)); map(0x0400, 0x04ff).rw(m_antic, FUNC(antic_device::read), FUNC(antic_device::write)); map(0x0500, 0x05ff).rw(m_cartleft, FUNC(a800_cart_slot_device::read_cctl), FUNC(a800_cart_slot_device::write_cctl)); -// map(0x0600, 0x07ff).noprw(); +// map(0x0600, 0x07ff).noprw(); } void a400_state::area_8000_map(address_map &map) @@ -2228,7 +2228,7 @@ void xegs_state::xegs(machine_config &config) // not installable unless with DIY mods config.device_remove("ram"); -// m_cartleft->set_default_option("xegs"); +// m_cartleft->set_default_option("xegs"); m_cartleft->set_is_xegs(true); // uses exact same slot connector diff --git a/src/mame/commodore/clcd.cpp b/src/mame/commodore/clcd.cpp index 6bd8069c161..c2895fb11ea 100644 --- a/src/mame/commodore/clcd.cpp +++ b/src/mame/commodore/clcd.cpp @@ -804,10 +804,10 @@ ROM_START( clcd ) ROMX_FILL(0x1c217, 1, 0x07, ROM_BIOS(0)) ROM_SYSTEM_BIOS( 1, "may85", "Jeff Porter prototype" ) - ROMX_LOAD( "s 3-24-85.u108", 0x000000, 0x008000, CRC(52db0ee9) SHA1(bea1e04fb88d205ebac7a1dbe2f5e98f84e7a3a7), ROM_BIOS(1) ) - ROMX_LOAD( "calc.u107", 0x008000, 0x008000, CRC(c1a09460) SHA1(5fe08cd7a075e33164edef60e18f090163bbf35c), ROM_BIOS(1) ) - ROMX_LOAD( "term,wp 5-30.u106", 0x010000, 0x008000, CRC(8dfabe3c) SHA1(da7f65edb0613ae10f702ed479b68ce17cf4ef97), ROM_BIOS(1) ) - ROMX_LOAD( "k5-28 newi_o.u105", 0x018000, 0x008000, CRC(5a8728ad) SHA1(64fd82ab51fe51758d6df9abe826a10dafdc63a5), ROM_BIOS(1) ) + ROMX_LOAD( "s 3-24-85.u108", 0x000000, 0x008000, CRC(52db0ee9) SHA1(bea1e04fb88d205ebac7a1dbe2f5e98f84e7a3a7), ROM_BIOS(1) ) + ROMX_LOAD( "calc.u107", 0x008000, 0x008000, CRC(c1a09460) SHA1(5fe08cd7a075e33164edef60e18f090163bbf35c), ROM_BIOS(1) ) + ROMX_LOAD( "term,wp 5-30.u106", 0x010000, 0x008000, CRC(8dfabe3c) SHA1(da7f65edb0613ae10f702ed479b68ce17cf4ef97), ROM_BIOS(1) ) + ROMX_LOAD( "k5-28 newi_o.u105", 0x018000, 0x008000, CRC(5a8728ad) SHA1(64fd82ab51fe51758d6df9abe826a10dafdc63a5), ROM_BIOS(1) ) ROM_REGION( 0x800, "lcd_char_rom", 0 ) ROMX_LOAD( "lcd-char-rom.u16", 0x000000, 0x000800, CRC(7b6d3867) SHA1(cb594801438849f933ddc3e64b03b56f42f59f09), ROM_BIOS(0) ) diff --git a/src/mame/edevices/stlforce.cpp b/src/mame/edevices/stlforce.cpp index c2479e9a144..fab48a60036 100644 --- a/src/mame/edevices/stlforce.cpp +++ b/src/mame/edevices/stlforce.cpp @@ -578,7 +578,7 @@ ROM_END GAME( 1994, stlforce, 0, stlforce, stlforce, stlforce_state, empty_init, ROT0, "Electronic Devices Italy / Ecogames S.L. Spain", "Steel Force", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, mortalr, 0, mortalr, stlforce, stlforce_state, empty_init, ROT0, "New Dream Games", "Mortal Race", MACHINE_SUPPORTS_SAVE ) // based on the same rough codebase as Top Driving tch/topdrive.cpp but not the same game, so not a clone +GAME( 1995, mortalr, 0, mortalr, stlforce, stlforce_state, empty_init, ROT0, "New Dream Games", "Mortal Race", MACHINE_SUPPORTS_SAVE ) // based on the same rough codebase as Top Driving tch/topdrive.cpp but not the same game, so not a clone GAME( 1995, twinbrat, 0, twinbrat, stlforce, twinbrat_state, empty_init, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, twinbrata, twinbrat, twinbrat, stlforce, twinbrat_state, empty_init, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 2)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index 5aa52ee74e6..94d3049795a 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -36,7 +36,7 @@ TODO: - - abcenix panics while booting after commit 78661e9aa92c7e43c9a96039e7dfb3dabc79a287 + - abcenix panics while booting after commit 78661e9aa92c7e43c9a96039e7dfb3dabc79a287 - systest1600 failures - CIO timer - RTC (seconds advance too slowly) diff --git a/src/mame/misc/coinmvga.cpp b/src/mame/misc/coinmvga.cpp index bf64d0b05f7..7114281c1f5 100644 --- a/src/mame/misc/coinmvga.cpp +++ b/src/mame/misc/coinmvga.cpp @@ -305,17 +305,17 @@ uint32_t coinmvga_state::screen_update_coinmvga(screen_device &screen, bitmap_rg for (int y = 0; y < 64; y++) { - const u16 y_offs = y * 128; + const u16 y_offs = y * 128; for (int x = 0; x < 128; x++) { - const u16 tile_offset = y_offs + x; + const u16 tile_offset = y_offs + x; - // background layer + // background layer u16 tile = (m_vram[tile_offset] & 0xffff); //int colour = tile>>12; gfx_8bpp->opaque(bitmap, cliprect, tile, 0, 0, 0, x*8, y*8); - // foreground layer + // foreground layer tile = (m_vram[tile_offset + (0x4000/2)] & 0xffff); //int colour = tile>>12; gfx_4bpp->transpen(bitmap, cliprect, tile, 0, 0, 0, x*8, y*8, 0); @@ -657,7 +657,7 @@ void coinmvga_state::coinmvga(machine_config &config) { // basic machine hardware // could be either H8/3002 or H8/3007 -// H83007(config, m_maincpu, CPU_CLOCK); +// H83007(config, m_maincpu, CPU_CLOCK); h83002_device &maincpu(H83002(config, m_maincpu, CPU_CLOCK)); maincpu.set_addrmap(AS_PROGRAM, &coinmvga_state::coinmvga_map); maincpu.read_port6().set(FUNC(coinmvga_state::i2c_r)); diff --git a/src/mame/misc/ez2d.cpp b/src/mame/misc/ez2d.cpp index 69033cfb14a..6e954b85682 100644 --- a/src/mame/misc/ez2d.cpp +++ b/src/mame/misc/ez2d.cpp @@ -127,17 +127,17 @@ void ez2d_state::winbond_superio_config(device_t *device) { // TODO: Winbond w83977ef w83977tf_device &fdc = *downcast(device); -// fdc.set_sysopt_pin(1); +// fdc.set_sysopt_pin(1); fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET); fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20); fdc.irq1().set(":pci:07.0", FUNC(i82371eb_isa_device::pc_irq1_w)); fdc.irq8().set(":pci:07.0", FUNC(i82371eb_isa_device::pc_irq8n_w)); -// fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); -// fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); -// fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); -// fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); -// fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); -// fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); +// fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); +// fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); } void ez2d_state::ez2d(machine_config &config) @@ -203,7 +203,7 @@ void ez2d_state::ez2d(machine_config &config) ROM_START( ez2d2m ) ROM_REGION32_LE(0x40000, "pci:07.0", 0) ROM_LOAD("ez2dancer2ndmove_motherboard_v29c51002t_award_bios", 0x00000, 0x40000, BAD_DUMP CRC(02a5e84b) SHA1(94b341d268ce9d42597c68bc98c3b8b62e137205) ) // 29f020 -// ROM_LOAD("cubx1007.awd", 0x00000, 0x40000, CRC(42a35507) SHA1(4e428e8419e533424d9564b290e2d7f4931744ff) ) +// ROM_LOAD("cubx1007.awd", 0x00000, 0x40000, CRC(42a35507) SHA1(4e428e8419e533424d9564b290e2d7f4931744ff) ) ROM_REGION( 0x10000, "vbios", 0 ) // nVidia TNT2 Model 64 video BIOS (not from provided dump) diff --git a/src/mame/misc/gammagic.cpp b/src/mame/misc/gammagic.cpp index 6f27df6b3b5..fea109d8305 100644 --- a/src/mame/misc/gammagic.cpp +++ b/src/mame/misc/gammagic.cpp @@ -80,7 +80,7 @@ private: void gammagic_state::gammagic_map(address_map &map) { map(0x00000000, 0x0009ffff).ram(); -// map(0x000a0000, 0x000bffff).rw("vga", FUNC(vga_device::mem_r), FUNC(vga_device::mem_w)); +// map(0x000a0000, 0x000bffff).rw("vga", FUNC(vga_device::mem_r), FUNC(vga_device::mem_w)); map(0x000e0000, 0x000fffff).rom().region("isa", 0x20000);/* System BIOS */ map(0x00100000, 0x07ffffff).ram(); map(0x08000000, 0xfffdffff).noprw(); @@ -93,9 +93,9 @@ void gammagic_state::gammagic_io(address_map &map) map(0x00e8, 0x00ef).noprw(); // map(0x00f0, 0x01ef).noprw(); // map(0x01f8, 0x03af).noprw(); -// map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w)); -// map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w)); -// map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w)); +// map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w)); +// map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w)); +// map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w)); // map(0x03e0, 0x03ef).noprw(); // map(0x0cf8, 0x0cff).rw("pcibus", FUNC(pci_bus_device::read), FUNC(pci_bus_device::write)); // map(0x0400, 0xffff).noprw(); diff --git a/src/mame/misc/odyssey.cpp b/src/mame/misc/odyssey.cpp index 4e95fb1786e..239d42a2410 100644 --- a/src/mame/misc/odyssey.cpp +++ b/src/mame/misc/odyssey.cpp @@ -144,14 +144,14 @@ void odyssey_state::national_superio_config(device_t *device) #if 0 static void isa_com(device_slot_interface &device) { -// device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE); -// device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE); -// device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE); -// device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); -// device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE); -// device.option_add("terminal", SERIAL_TERMINAL); -// device.option_add("null_modem", NULL_MODEM); -// device.option_add("sun_kbd", SUN_KBD_ADAPTOR); +// device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE); +// device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE); +// device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE); +// device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); +// device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE); +// device.option_add("terminal", SERIAL_TERMINAL); +// device.option_add("null_modem", NULL_MODEM); +// device.option_add("sun_kbd", SUN_KBD_ADAPTOR); } #endif diff --git a/src/mame/misc/silverball.cpp b/src/mame/misc/silverball.cpp index 8401044523e..7ccf4cf100e 100644 --- a/src/mame/misc/silverball.cpp +++ b/src/mame/misc/silverball.cpp @@ -94,17 +94,17 @@ void silverball_state::i440zx_superio_config(device_t *device) { // TODO: unknown sub-type w83977tf_device &fdc = *downcast(device); -// fdc.set_sysopt_pin(1); +// fdc.set_sysopt_pin(1); fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET); fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20); fdc.irq1().set(":pci:07.0", FUNC(i82371eb_isa_device::pc_irq1_w)); fdc.irq8().set(":pci:07.0", FUNC(i82371eb_isa_device::pc_irq8n_w)); -// fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); -// fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); -// fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); -// fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); -// fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); -// fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); +// fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); +// fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); } // SY-7IZB+ @@ -203,7 +203,7 @@ void silverball_state::silverball_i440zx(machine_config &config) ROM_START(slvrball806) SILVERBALL_BIOS -// ROM_DEFAULT_BIOS("bios29") // The one dumped from the actual machine +// ROM_DEFAULT_BIOS("bios29") // The one dumped from the actual machine ROM_DEFAULT_BIOS("bios33") DISK_REGION( PCI_IDE_ID"ide:0:hdd" ) // 16383 cylinders, 16 heads, 63 sectors @@ -212,7 +212,7 @@ ROM_END ROM_START(slvrball720) SILVERBALL_BIOS -// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from +// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from ROM_DEFAULT_BIOS("bios33") DISK_REGION( PCI_IDE_ID"ide:0:hdd" ) @@ -221,7 +221,7 @@ ROM_END ROM_START(slvrball632) SILVERBALL_BIOS -// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from +// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from ROM_DEFAULT_BIOS("bios33") DISK_REGION( PCI_IDE_ID"ide:0:hdd" ) @@ -231,7 +231,7 @@ ROM_END // SilverBall V4.09 BULOVA: Windows 3.1, HardLock parallel dongle and two VGA drivers loaded, S3 Trio and Chips and Technologies 6555x (mm55x16) Accelerator ROM_START(slvrballbu409) SILVERBALL_BIOS -// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from +// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from ROM_DEFAULT_BIOS("bios33") DISK_REGION( PCI_IDE_ID"ide:0:hdd" ) @@ -242,7 +242,7 @@ ROM_END // Probably the same as set 1, just with different operator data / configuration ROM_START(slvrballbu409b) SILVERBALL_BIOS -// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from +// ROM_DEFAULT_BIOS("bios29") // Not sure what PCB this HD was dumped from ROM_DEFAULT_BIOS("bios33") DISK_REGION( PCI_IDE_ID"ide:0:hdd" ) diff --git a/src/mame/misc/voyager.cpp b/src/mame/misc/voyager.cpp index 2d62667a69e..c4ee9bec216 100644 --- a/src/mame/misc/voyager.cpp +++ b/src/mame/misc/voyager.cpp @@ -66,8 +66,8 @@ void voyager_state::voyager(machine_config &config) { PENTIUM3(config, m_maincpu, 133000000); // actually AMD Duron CPU of unknown clock m_maincpu->set_addrmap(AS_PROGRAM, &voyager_state::voyager_map); -// m_maincpu->set_addrmap(AS_IO, &voyager_state::voyager_io); -// m_maincpu->set_irq_acknowledge_callback("pic8259_1", FUNC(pic8259_device::inta_cb)); +// m_maincpu->set_addrmap(AS_IO, &voyager_state::voyager_io); +// m_maincpu->set_irq_acknowledge_callback("pic8259_1", FUNC(pic8259_device::inta_cb)); PCI_ROOT(config, "pci", 0); // ... diff --git a/src/mame/namco/namcos12.cpp b/src/mame/namco/namcos12.cpp index 890232b0fbf..014c91cf462 100644 --- a/src/mame/namco/namcos12.cpp +++ b/src/mame/namco/namcos12.cpp @@ -1897,7 +1897,7 @@ void namcos12_boothack_state::aplarail(machine_config &config) m_sub->read_porta().set(FUNC(namcos12_boothack_state::s12_mcu_pa_r)); m_sub->write_porta().set(FUNC(namcos12_boothack_state::s12_mcu_pa_w)); m_sub->read_portb().set(FUNC(namcos12_boothack_state::s12_mcu_portB_r)); - m_sub->write_portb().set(FUNC(namcos12_boothack_state::s12_mcu_portB_w)); + m_sub->write_portb().set(FUNC(namcos12_boothack_state::s12_mcu_portB_w)); h83334_device &iocpu(H83334(config, "iocpu", JVSCLOCK)); iocpu.set_addrmap(AS_PROGRAM, &namcos12_boothack_state::plarailjvsmap); diff --git a/src/mame/nichibutsu/hrdvd.cpp b/src/mame/nichibutsu/hrdvd.cpp index c058b9c6255..d92836e1bd6 100644 --- a/src/mame/nichibutsu/hrdvd.cpp +++ b/src/mame/nichibutsu/hrdvd.cpp @@ -149,7 +149,7 @@ void hrdvd_state::p6_w(uint16_t data) m_mpeg->reset(); m_subcpu->set_input_line(H8_INPUT_LINE_DREQ0, m_mpeg_dreq && !(m_p6 & 0x04)); - + logerror("p6 %02x\n", m_p6); } diff --git a/src/mame/pc/paokaipc.cpp b/src/mame/pc/paokaipc.cpp index 487d0ec765b..f10ad66b390 100644 --- a/src/mame/pc/paokaipc.cpp +++ b/src/mame/pc/paokaipc.cpp @@ -53,7 +53,7 @@ private: void paokaipc_state::main_map(address_map &map) { map(0x00000000, 0x0009ffff).ram(); -// map(0x000a0000, 0x000bffff).rw("vga", FUNC(vga_device::mem_r), FUNC(vga_device::mem_w)); // VGA VRAM +// map(0x000a0000, 0x000bffff).rw("vga", FUNC(vga_device::mem_r), FUNC(vga_device::mem_w)); // VGA VRAM map(0x000e0000, 0x000fffff).rom().region("bios", 0x20000); map(0x00100000, 0x008fffff).ram(); map(0x02000000, 0x28ffffff).noprw(); @@ -64,9 +64,9 @@ void paokaipc_state::main_io(address_map &map) { pcat32_io_common(map); map(0x01f0, 0x01f7).rw("ide", FUNC(ide_controller_device::cs0_r), FUNC(ide_controller_device::cs0_w)); -// map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w)); -// map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w)); -// map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w)); +// map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w)); +// map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w)); +// map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w)); map(0x03f0, 0x03f7).rw("ide", FUNC(ide_controller_device::cs1_r), FUNC(ide_controller_device::cs1_w)); // map(0x0880, 0x0880) extensively accessed at POST, hangs if returns wrong values // map(0x0cf8, 0x0cff).rw(m_pcibus, FUNC(pci_bus_device::read), FUNC(pci_bus_device::write)); diff --git a/src/mame/pc/pcipc.cpp b/src/mame/pc/pcipc.cpp index e275b5f84ca..c5f5066efb1 100644 --- a/src/mame/pc/pcipc.cpp +++ b/src/mame/pc/pcipc.cpp @@ -526,17 +526,17 @@ void pcipc_state::smc_superio_config(device_t *device) void pcipc_state::winbond_superio_config(device_t *device) { w83977tf_device &fdc = *downcast(device); -// fdc.set_sysopt_pin(1); +// fdc.set_sysopt_pin(1); fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET); fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20); fdc.irq1().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq1_w)); fdc.irq8().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq8n_w)); -// fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); -// fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); -// fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); -// fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); -// fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); -// fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); +// fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); +// fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); } diff --git a/src/mame/pc/pcipc_sis.cpp b/src/mame/pc/pcipc_sis.cpp index 6ba86dc4acd..45da5fc044d 100644 --- a/src/mame/pc/pcipc_sis.cpp +++ b/src/mame/pc/pcipc_sis.cpp @@ -4,7 +4,7 @@ * Sandbox for SiS based x86 PCs, targeting the new PCI model * * Notes: - * - sis85c471 doesn't belong here, it + * - sis85c471 doesn't belong here, it * * TODO: * - Identify motherboard name(s) @@ -49,7 +49,7 @@ void sis496_state::sis496(machine_config &config) I486DX4(config, m_maincpu, 75000000); // I486DX4, 75 or 100 Mhz m_maincpu->set_addrmap(AS_PROGRAM, &sis496_state::main_map); m_maincpu->set_addrmap(AS_IO, &sis496_state::main_io); -// m_maincpu->set_irq_acknowledge_callback("pci:01.0:pic_master", FUNC(pic8259_device::inta_cb)); +// m_maincpu->set_irq_acknowledge_callback("pci:01.0:pic_master", FUNC(pic8259_device::inta_cb)); PCI_ROOT(config, "pci", 0); SIS85C496_HOST(config, "pci:00.0", 0, "maincpu", 32*1024*1024); diff --git a/src/mame/pc/queen.cpp b/src/mame/pc/queen.cpp index 1c877cdba1f..f19f1be74a0 100644 --- a/src/mame/pc/queen.cpp +++ b/src/mame/pc/queen.cpp @@ -248,7 +248,7 @@ void queen_state::bios_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask) void queen_state::queen_map(address_map &map) { map(0x00000000, 0x0009ffff).ram(); -// map(0x000a0000, 0x000bffff).rw("vga", FUNC(vga_device::mem_r), FUNC(vga_device::mem_w)); +// map(0x000a0000, 0x000bffff).rw("vga", FUNC(vga_device::mem_r), FUNC(vga_device::mem_w)); map(0x000e0000, 0x000effff).bankr("bios_ext").w(FUNC(queen_state::bios_ext_ram_w)); map(0x000f0000, 0x000fffff).bankr("bios_bank").w(FUNC(queen_state::bios_ram_w)); map(0x00100000, 0x01ffffff).ram(); @@ -263,9 +263,9 @@ void queen_state::queen_io(address_map &map) map(0x0170, 0x0177).rw("ide2", FUNC(ide_controller_32_device::cs0_r), FUNC(ide_controller_32_device::cs0_w)); map(0x01f0, 0x01f7).rw("ide", FUNC(ide_controller_device::cs0_r), FUNC(ide_controller_device::cs0_w)); map(0x0370, 0x0377).rw("ide2", FUNC(ide_controller_32_device::cs1_r), FUNC(ide_controller_32_device::cs1_w)); -// map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w)); -// map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w)); -// map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w)); +// map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w)); +// map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w)); +// map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w)); map(0x03f0, 0x03f7).rw("ide", FUNC(ide_controller_device::cs1_r), FUNC(ide_controller_device::cs1_w)); map(0x0cf8, 0x0cff).rw("pcibus", FUNC(pci_bus_legacy_device::read), FUNC(pci_bus_legacy_device::write)); diff --git a/src/mame/pc/sis630.cpp b/src/mame/pc/sis630.cpp index e07ae57693f..ee582acce7c 100644 --- a/src/mame/pc/sis630.cpp +++ b/src/mame/pc/sis630.cpp @@ -337,8 +337,8 @@ ROM_START(zidav630e) ROM_SYSTEM_BIOS(0, "award_v108", "Award BIOS v1.08") ROMX_LOAD( "v630108e.bin", 0x040000, 0x040000, CRC(25c91274) SHA1(95ff37ad0cfb39bb4ceff2db1cd47f13849ea53a), ROM_BIOS(0) ) // Corrupt file -// ROM_SYSTEM_BIOS(1, "award_v104", "Award BIOS v1.04") -// ROMX_LOAD( "V630e104.bin", 0x040000, 0x040000, CRC(?) SHA1(?), ROM_BIOS(1) ) +// ROM_SYSTEM_BIOS(1, "award_v104", "Award BIOS v1.04") +// ROMX_LOAD( "V630e104.bin", 0x040000, 0x040000, CRC(?) SHA1(?), ROM_BIOS(1) ) ROM_END /* diff --git a/src/mame/seta/downtown.cpp b/src/mame/seta/downtown.cpp index 49191b854ce..30eaa19edd8 100644 --- a/src/mame/seta/downtown.cpp +++ b/src/mame/seta/downtown.cpp @@ -588,10 +588,10 @@ u32 downtown_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, c /* the hardware wants different scroll values when flipped */ /* bg x scroll flip - metafox 0000 025d = 0, $400-$1a3 = $400 - $190 - $13 - eightfrc ffe8 0272 - fff0 0260 = -$10, $400-$190 -$10 - ffe8 0272 = -$18, $400-$190 -$18 + $1a */ + metafox 0000 025d = 0, $400-$1a3 = $400 - $190 - $13 + eightfrc ffe8 0272 + fff0 0260 = -$10, $400-$190 -$10 + ffe8 0272 = -$18, $400-$190 -$18 + $1a */ m_tiles->update_scroll(vis_dimy, flip);