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(nw) c10 : notes ; m79152pc : devices

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Robbbert 2017-11-17 02:54:03 +11:00
parent 4409ea615b
commit 6ba48440ba
2 changed files with 50 additions and 15 deletions
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24
src/mame/drivers/c10.cpp
View File

@ -1,16 +1,20 @@
// license:BSD-3-Clause
// copyright-holders:Robbbert
/***************************************************************************
/*****************************************************************************************************
Cromemco C-10 Personal Computer
Cromemco C-10 Personal Computer
30/08/2010 Skeleton driver
2010-08-30 Skeleton driver
Driver currently gets to a loop where it waits for an interrupt.
The interrupt routine presumably writes to FE69 which the loop is
constantly looking at.
Photos show: Intersil 74954-1, Mostek MK3880N-4 (Z80A), CROMEMCO 011-0082-01, CROMEMCO 011-0095,
Intel P8275-2, AM92128BPC (16K ROM), NEC D8257C-5, CROMEMCO 011-0083, WDC FD1793B-02,
2x 8251. Crystals: 8MHz, 13.028MHz
****************************************************************************/
Driver currently gets to a loop where it waits for an interrupt.
The interrupt routine presumably writes to FE69 which the loop is
constantly looking at.
*****************************************************************************************************/
#include "emu.h"
#include "cpu/z80/z80.h"
@ -151,7 +155,7 @@ GFXDECODE_END
static MACHINE_CONFIG_START( c10 )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz / 4)
MCFG_CPU_ADD("maincpu", Z80, XTAL_8MHz / 2)
MCFG_CPU_PROGRAM_MAP(c10_mem)
MCFG_CPU_IO_MAP(c10_io)
@ -176,10 +180,10 @@ DRIVER_INIT_MEMBER(c10_state,c10)
/* ROM definition */
ROM_START( c10 )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
ROM_LOAD( "c10_cros.bin", 0x8000, 0x4000, CRC(2ccf5983) SHA1(52f7c497f5284bf5df9eb0d6e9142bb1869d8c24))
ROM_LOAD( "502-0055.ic16", 0x8000, 0x4000, CRC(2ccf5983) SHA1(52f7c497f5284bf5df9eb0d6e9142bb1869d8c24))
ROM_REGION( 0x2000, "chargen", 0 )
ROM_LOAD( "c10_char.bin", 0x0000, 0x2000, CRC(cb530b6f) SHA1(95590bbb433db9c4317f535723b29516b9b9fcbf))
ROM_LOAD( "c10_char.ic9", 0x0000, 0x2000, CRC(cb530b6f) SHA1(95590bbb433db9c4317f535723b29516b9b9fcbf))
ROM_END
/* Driver */

41
src/mame/drivers/m79152pc.cpp
View File

@ -12,6 +12,10 @@
#include "emu.h"
#include "cpu/z80/z80.h"
#include "machine/z80ctc.h"
#include "machine/z80sio.h"
#include "machine/clock.h"
#include "bus/rs232/rs232.h"
#include "screen.h"
@ -24,6 +28,7 @@ public:
, m_p_attributes(*this, "attributes")
, m_maincpu(*this, "maincpu")
, m_p_chargen(*this, "chargen")
, m_uart(*this, "uart")
{ }
uint32_t screen_update_m79152pc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -34,9 +39,10 @@ private:
required_shared_ptr<uint8_t> m_p_attributes;
required_device<cpu_device> m_maincpu;
required_region_ptr<u8> m_p_chargen;
required_device<z80sio_device> m_uart;
};
static ADDRESS_MAP_START(m79152pc_mem, AS_PROGRAM, 8, m79152pc_state)
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, m79152pc_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x47ff) AM_RAM
@ -44,9 +50,11 @@ static ADDRESS_MAP_START(m79152pc_mem, AS_PROGRAM, 8, m79152pc_state)
AM_RANGE(0x9000, 0x9fff) AM_RAM AM_SHARE("attributes")
ADDRESS_MAP_END
static ADDRESS_MAP_START( m79152pc_io, AS_IO, 8, m79152pc_state)
static ADDRESS_MAP_START( io_map, AS_IO, 8, m79152pc_state )
//ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("uart", z80sio_device, cd_ba_r, cd_ba_w)
AM_RANGE(0x44, 0x47) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
ADDRESS_MAP_END
/* Input ports */
@ -56,6 +64,7 @@ INPUT_PORTS_END
void m79152pc_state::machine_reset()
{
m_uart->ctsb_w(1); // this is checked before writing to port 47.
}
uint32_t m79152pc_state::screen_update_m79152pc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
@ -113,9 +122,8 @@ GFXDECODE_END
static MACHINE_CONFIG_START( m79152pc )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",Z80, XTAL_4MHz)
MCFG_CPU_PROGRAM_MAP(m79152pc_mem)
MCFG_CPU_IO_MAP(m79152pc_io)
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -127,6 +135,29 @@ static MACHINE_CONFIG_START( m79152pc )
MCFG_SCREEN_PALETTE("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", m79152pc)
MCFG_PALETTE_ADD_MONOCHROME("palette")
MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("uart", z80sio_device, txca_w))
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("uart", z80sio_device, rxca_w))
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_4MHz)
//MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("uart", Z80SIO, XTAL_4MHz)
//MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
//MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs232a", rs232_port_device, write_txd))
//MCFG_Z80SIO_OUT_DTRB_CB(DEVWRITELINE("rs232a", rs232_port_device, write_dtr))
//MCFG_Z80SIO_OUT_RTSB_CB(DEVWRITELINE("rs232a", rs232_port_device, write_rts))
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "keyboard")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", z80sio_device, rxa_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart", z80sio_device, ctsa_w))
//MCFG_RS232_PORT_ADD("rs232a", default_rs232_devices, "terminal")
//MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", z80sio_device, rxb_w))
//MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart", z80sio_device, ctsb_w))
MACHINE_CONFIG_END
/* ROM definition */