mirror of
https://github.com/holub/mame
synced 2025-05-29 17:13:05 +03:00
-mips, rsp: Removed MCFG, nw
-aleck64, hng64, kinst, namcops2, namcos23, ps2sony, pyson, vp101: Removed MACHINE_CONFIG_*, nw
This commit is contained in:
mooglyguy
parent
bac960a725
commit
6ba8b0f1ae
@ -264,16 +264,6 @@ struct mips3_tlb_entry {
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#define MIPS3_MAX_TLB_ENTRIES 48
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#define MCFG_MIPS3_ICACHE_SIZE(_size) \
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downcast<mips3_device &>(*device).set_icache_size(_size);
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#define MCFG_MIPS3_DCACHE_SIZE(_size) \
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downcast<mips3_device &>(*device).set_dcache_size(_size);
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#define MCFG_MIPS3_SYSTEM_CLOCK(_clock) \
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downcast<mips3_device &>(*device).set_system_clock(_clock);
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class mips3_frontend;
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class mips3_device : public cpu_device, public device_vtlb_interface {
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@ -83,21 +83,6 @@ enum
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#define RSPDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
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#define MCFG_RSP_DP_REG_R_CB(_devcb) \
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downcast<rsp_device &>(*device).set_dp_reg_r_callback(DEVCB_##_devcb);
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#define MCFG_RSP_DP_REG_W_CB(_devcb) \
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downcast<rsp_device &>(*device).set_dp_reg_w_callback(DEVCB_##_devcb);
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#define MCFG_RSP_SP_REG_R_CB(_devcb) \
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downcast<rsp_device &>(*device).set_sp_reg_r_callback(DEVCB_##_devcb);
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#define MCFG_RSP_SP_REG_W_CB(_devcb) \
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downcast<rsp_device &>(*device).set_sp_reg_w_callback(DEVCB_##_devcb);
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#define MCFG_RSP_SP_SET_STATUS_CB(_devcb) \
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downcast<rsp_device &>(*device).set_status_callback(DEVCB_##_devcb);
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class rsp_device : public cpu_device
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{
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@ -111,11 +96,11 @@ public:
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virtual ~rsp_device() override;
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void resolve_cb();
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template <class Object> devcb_base &set_dp_reg_r_callback(Object &&cb) { return m_dp_reg_r_func.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_dp_reg_w_callback(Object &&cb) { return m_dp_reg_w_func.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_sp_reg_r_callback(Object &&cb) { return m_sp_reg_r_func.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_sp_reg_w_callback(Object &&cb) { return m_sp_reg_w_func.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_status_callback(Object &&cb) { return m_sp_set_status_func.set_callback(std::forward<Object>(cb)); }
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auto dp_reg_r() { return m_dp_reg_r_func.bind(); }
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auto dp_reg_w() { return m_dp_reg_w_func.bind(); }
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auto sp_reg_r() { return m_sp_reg_r_func.bind(); }
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auto sp_reg_w() { return m_sp_reg_w_func.bind(); }
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auto status_set() { return m_sp_set_status_func.bind(); }
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void rspdrc_flush_drc_cache();
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void rspdrc_set_options(uint32_t options);
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@ -25,7 +25,7 @@ class harddisk_image_device : public device_t,
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{
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public:
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// construction/destruction
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harddisk_image_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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harddisk_image_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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virtual ~harddisk_image_device();
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template <typename Object> void set_device_load(Object &&cb) { m_device_image_load = std::forward<Object>(cb); }
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@ -14,15 +14,12 @@
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#pragma once
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#define MCFG_IOP_TIMER_IRQ_CALLBACK(_write) \
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downcast<iop_timer_device &>(*device).set_int_cb(DEVCB_##_write);
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class iop_timer_device : public device_t
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{
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public:
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iop_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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template <class Object> devcb_base &set_int_cb(Object &&cb) { return m_int_cb.set_callback(std::forward<Object>(cb)); }
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auto irq() { return m_int_cb.bind(); }
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DECLARE_READ32_MEMBER(read);
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DECLARE_WRITE32_MEMBER(write);
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@ -187,10 +187,11 @@ class aleck64_state : public n64_state
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{
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public:
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aleck64_state(const machine_config &mconfig, device_type type, const char *tag)
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: n64_state(mconfig, type, tag),
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m_e90_vram(*this,"e90vram"),
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m_e90_pal(*this,"e90pal"),
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m_dip_read_offset(0) { }
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: n64_state(mconfig, type, tag)
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, m_e90_vram(*this,"e90vram")
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, m_e90_pal(*this,"e90pal")
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, m_dip_read_offset(0)
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{ }
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void aleck64(machine_config &config);
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void a64_e90(machine_config &config);
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@ -972,45 +973,43 @@ static INPUT_PORTS_START( srmvs )
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INPUT_PORTS_END
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MACHINE_CONFIG_START(aleck64_state::aleck64)
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void aleck64_state::aleck64(machine_config &config)
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{
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/* basic machine hardware */
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MCFG_DEVICE_ADD("maincpu", VR4300BE, 93750000)
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MCFG_MIPS3_ICACHE_SIZE(16384)
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MCFG_MIPS3_DCACHE_SIZE(8192)
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MCFG_MIPS3_SYSTEM_CLOCK(62500000)
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MCFG_DEVICE_PROGRAM_MAP(n64_map)
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MCFG_CPU_FORCE_NO_DRC()
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VR4300BE(config, m_vr4300, 93750000);
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m_vr4300->set_icache_size(16384);
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m_vr4300->set_dcache_size(8192);
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m_vr4300->set_system_clock(62500000);
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m_vr4300->set_addrmap(AS_PROGRAM, &aleck64_state::n64_map);
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m_vr4300->set_force_no_drc(true);
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MCFG_DEVICE_ADD("rsp", RSP, 62500000)
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MCFG_RSP_DP_REG_R_CB(READ32("rcp",n64_periphs, dp_reg_r))
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MCFG_RSP_DP_REG_W_CB(WRITE32("rcp",n64_periphs, dp_reg_w))
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MCFG_RSP_SP_REG_R_CB(READ32("rcp",n64_periphs, sp_reg_r))
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MCFG_RSP_SP_REG_W_CB(WRITE32("rcp",n64_periphs, sp_reg_w))
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MCFG_RSP_SP_SET_STATUS_CB(WRITE32("rcp",n64_periphs, sp_set_status))
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MCFG_DEVICE_PROGRAM_MAP(rsp_map)
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MCFG_CPU_FORCE_NO_DRC()
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RSP(config, m_rsp, 62500000);
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m_rsp->dp_reg_r().set(m_rcp_periphs, FUNC(n64_periphs::dp_reg_r));
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m_rsp->dp_reg_w().set(m_rcp_periphs, FUNC(n64_periphs::dp_reg_w));
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m_rsp->sp_reg_r().set(m_rcp_periphs, FUNC(n64_periphs::sp_reg_r));
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m_rsp->sp_reg_w().set(m_rcp_periphs, FUNC(n64_periphs::sp_reg_w));
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m_rsp->status_set().set(m_rcp_periphs, FUNC(n64_periphs::sp_set_status));
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m_rsp->set_addrmap(AS_PROGRAM, &aleck64_state::rsp_map);
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m_rsp->set_force_no_drc(true);
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
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MCFG_SCREEN_SIZE(640, 525)
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MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 239)
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MCFG_SCREEN_UPDATE_DRIVER(aleck64_state, screen_update_n64)
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MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, aleck64_state, screen_vblank_n64))
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_refresh_hz(60);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
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screen.set_size(640, 525);
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screen.set_visarea(0, 639, 0, 239);
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screen.set_screen_update(FUNC(aleck64_state::screen_update_n64));
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screen.screen_vblank().set(FUNC(aleck64_state::screen_vblank_n64));
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MCFG_PALETTE_ADD("palette", 0x1000)
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PALETTE(config, "palette", 0x1000);
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SPEAKER(config, "lspeaker").front_left();
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SPEAKER(config, "rspeaker").front_right();
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MCFG_DEVICE_ADD("dac1", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
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MCFG_DEVICE_ADD("dac2", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
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DMADAC(config, "dac1").add_route(ALL_OUTPUTS, "lspeaker", 1.0);
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DMADAC(config, "dac2").add_route(ALL_OUTPUTS, "rspeaker", 1.0);
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N64PERIPH(config, "rcp", 0);
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MACHINE_CONFIG_END
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N64PERIPH(config, m_rcp_periphs, 0);
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}
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uint32_t aleck64_state::screen_update_e90(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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@ -1087,14 +1086,13 @@ uint32_t aleck64_state::screen_update_e90(screen_device &screen, bitmap_rgb32 &b
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return 0;
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}
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MACHINE_CONFIG_START(aleck64_state::a64_e90)
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void aleck64_state::a64_e90(machine_config &config)
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{
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aleck64(config);
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MCFG_DEVICE_MODIFY("maincpu")
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MCFG_DEVICE_PROGRAM_MAP(e90_map)
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m_vr4300->set_addrmap(AS_PROGRAM, &aleck64_state::e90_map);
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MCFG_SCREEN_MODIFY("screen")
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MCFG_SCREEN_UPDATE_DRIVER(aleck64_state, screen_update_e90)
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MACHINE_CONFIG_END
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subdevice<screen_device>("screen")->set_screen_update(FUNC(aleck64_state::screen_update_e90));
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}
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void aleck64_state::init_aleck64()
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{
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@ -2108,25 +2108,25 @@ void hng64_state::init_io()
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MACHINE_CONFIG_START(hng64_state::hng64)
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/* basic machine hardware */
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MCFG_DEVICE_ADD("maincpu", VR4300BE, HNG64_MASTER_CLOCK) // actually R4300
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MCFG_MIPS3_ICACHE_SIZE(16384)
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MCFG_MIPS3_DCACHE_SIZE(16384)
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MCFG_DEVICE_PROGRAM_MAP(hng_map)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hng64_state, hng64_irq, "screen", 0, 1)
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VR4300BE(config, m_maincpu, HNG64_MASTER_CLOCK); // actually R4300
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m_maincpu->set_icache_size(16384);
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m_maincpu->set_dcache_size(16384);
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m_maincpu->set_addrmap(AS_PROGRAM, &hng64_state::hng_map);
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TIMER(config, "scantimer", 0).configure_scanline(FUNC(hng64_state::hng64_irq), "screen", 0, 1);
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NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
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MCFG_DEVICE_ADD("rtc", RTC62423, XTAL(32'768))
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RTC62423(config, m_rtc, XTAL(32'768));
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MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_hng64)
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GFXDECODE(config, m_gfxdecode, m_palette, gfx_hng64);
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART)
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MCFG_SCREEN_UPDATE_DRIVER(hng64_state, screen_update_hng64)
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MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, hng64_state, screen_vblank_hng64))
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SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
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m_screen->set_raw(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART);
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m_screen->set_screen_update(FUNC(hng64_state::screen_update_hng64));
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m_screen->screen_vblank().set(FUNC(hng64_state::screen_vblank_hng64));
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MCFG_PALETTE_ADD("palette", 0x1000)
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MCFG_PALETTE_FORMAT(XRGB)
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PALETTE(config, m_palette, 0x1000).set_format(PALETTE_FORMAT_XRGB);
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hng64_audio(config);
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hng64_network(config);
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@ -2161,11 +2161,12 @@ MACHINE_CONFIG_START(hng64_state::hng64)
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iomcu.serial0_out_cb().set(FUNC(hng64_state::sio0_w));
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//iomcu.serial1_out_cb().set(FUNC(hng64_state::sio1_w)); // not initialized / used
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MCFG_DEVICE_ADD("dt71321_dpram", IDT71321, 0)
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IDT71321(config, "dt71321_dpram", 0);
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//MCFG_MB8421_INTL_AN0R(INPUTLINE("xxx", 0)) // I don't think the IRQs are connected
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MACHINE_CONFIG_END
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}
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MACHINE_CONFIG_START(hng64_state::hng64_default)
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void hng64_state::hng64_default(machine_config &config)
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{
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hng64(config);
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hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
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@ -2177,31 +2178,34 @@ MACHINE_CONFIG_START(hng64_state::hng64_default)
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lamps.lamps5_out_cb().set(FUNC(hng64_state::hng64_default_lamps5_w));
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lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_default_lamps6_w));
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lamps.lamps7_out_cb().set(FUNC(hng64_state::hng64_default_lamps7_w));
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MACHINE_CONFIG_END
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}
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MACHINE_CONFIG_START(hng64_state::hng64_drive)
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void hng64_state::hng64_drive(machine_config &config)
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{
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hng64(config);
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hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
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lamps.lamps5_out_cb().set(FUNC(hng64_state::hng64_drive_lamps5_w)); // force feedback steering
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lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_drive_lamps6_w)); // lamps + coin counter
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lamps.lamps7_out_cb().set(FUNC(hng64_state::hng64_drive_lamps7_w)); // lamps
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MACHINE_CONFIG_END
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}
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MACHINE_CONFIG_START(hng64_state::hng64_shoot)
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void hng64_state::hng64_shoot(machine_config &config)
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{
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hng64(config);
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hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
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lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_shoot_lamps6_w)); // start lamps (some misisng?!)
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lamps.lamps7_out_cb().set(FUNC(hng64_state::hng64_shoot_lamps7_w)); // gun lamps
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MACHINE_CONFIG_END
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}
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MACHINE_CONFIG_START(hng64_state::hng64_fight)
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void hng64_state::hng64_fight(machine_config &config)
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{
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hng64(config);
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hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
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lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_fight_lamps6_w)); // coin counters
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MACHINE_CONFIG_END
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}
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#define ROM_LOAD_HNG64_BIOS(bios,name,offset,length,hash) \
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@ -718,33 +718,33 @@ INPUT_PORTS_END
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*
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*************************************/
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MACHINE_CONFIG_START(kinst_state::kinst)
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void kinst_state::kinst(machine_config &config)
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{
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/* basic machine hardware */
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MCFG_DEVICE_ADD(m_maincpu, R4600LE, MASTER_CLOCK*2)
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MCFG_MIPS3_ICACHE_SIZE(16384)
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MCFG_MIPS3_DCACHE_SIZE(16384)
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MCFG_DEVICE_PROGRAM_MAP(main_map)
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MCFG_DEVICE_VBLANK_INT_DRIVER("screen", kinst_state, irq0_start)
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R4600LE(config, m_maincpu, MASTER_CLOCK*2);
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m_maincpu->set_icache_size(16384);
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m_maincpu->set_dcache_size(16384);
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m_maincpu->set_addrmap(AS_PROGRAM, &kinst_state::main_map);
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m_maincpu->set_vblank_int("screen", FUNC(kinst_state::irq0_start));
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ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, true);
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m_ata->irq_handler().set_inputline("maincpu", 1);
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
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MCFG_SCREEN_SIZE(320, 240)
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MCFG_SCREEN_VISIBLE_AREA(0, 319, 0, 239)
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MCFG_SCREEN_UPDATE_DRIVER(kinst_state, screen_update)
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MCFG_SCREEN_PALETTE("palette")
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
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screen.set_refresh_hz(60);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
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screen.set_size(320, 240);
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screen.set_visarea(0, 319, 0, 239);
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screen.set_screen_update(FUNC(kinst_state::screen_update));
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screen.set_palette("palette");
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MCFG_PALETTE_ADD_BBBBBGGGGGRRRRR("palette")
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PALETTE(config, "palette", 32768).set_init("palette", FUNC(palette_device::palette_init_BBBBBGGGGGRRRRR));
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/* sound hardware */
|
||||
DCS_AUDIO_2K(config, m_dcs, 0);
|
||||
MACHINE_CONFIG_END
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -159,7 +159,7 @@ public:
|
||||
void magictg(machine_config &config);
|
||||
|
||||
private:
|
||||
required_device<cpu_device> m_mips;
|
||||
required_device<mips3_device> m_mips;
|
||||
required_device<adsp2181_device> m_adsp;
|
||||
required_device<pci_bus_legacy_device> m_pci;
|
||||
|
||||
@ -911,24 +911,21 @@ INPUT_PORTS_END
|
||||
*************************************/
|
||||
|
||||
MACHINE_CONFIG_START(magictg_state::magictg)
|
||||
MCFG_DEVICE_ADD("mips", R5000BE, 150000000) /* TODO: CPU type and clock are unknown */
|
||||
//MCFG_MIPS3_ICACHE_SIZE(16384) /* TODO: Unknown */
|
||||
//MCFG_MIPS3_DCACHE_SIZE(16384) /* TODO: Unknown */
|
||||
MCFG_DEVICE_PROGRAM_MAP(magictg_map)
|
||||
R5000BE(config, m_mips, 150000000); /* TODO: CPU type and clock are unknown */
|
||||
//m_mips->set_icache_size(16384); /* TODO: Unknown */
|
||||
//m_mips->set_dcache_size(16384); /* TODO: Unknown */
|
||||
m_mips->set_addrmap(AS_PROGRAM, &magictg_state::magictg_map);
|
||||
|
||||
MCFG_DEVICE_ADD("adsp", ADSP2181, 16000000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(adsp_program_map)
|
||||
MCFG_DEVICE_DATA_MAP(adsp_data_map)
|
||||
MCFG_DEVICE_IO_MAP(adsp_io_map)
|
||||
ADSP2181(config, m_adsp, 16000000);
|
||||
m_adsp->set_addrmap(AS_PROGRAM, &magictg_state::adsp_program_map);
|
||||
m_adsp->set_addrmap(AS_DATA, &magictg_state::adsp_data_map);
|
||||
m_adsp->set_addrmap(AS_IO, &magictg_state::adsp_io_map);
|
||||
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("dac1", DMADAC)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
|
||||
MCFG_DEVICE_ADD("dac2", DMADAC)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
DMADAC(config, "dac1").add_route(ALL_OUTPUTS, "rspeaker", 1.0);
|
||||
DMADAC(config, "dac2").add_route(ALL_OUTPUTS, "lspeaker", 1.0);
|
||||
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, DEVICE_SELF, magictg_state, pci_dev0_r, pci_dev0_w)
|
||||
|
||||
@ -430,78 +430,70 @@ INTERRUPT_GEN_MEMBER(n64_mess_state::n64_reset_poll)
|
||||
MACHINE_CONFIG_START(n64_mess_state::n64)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", VR4300BE, 93750000)
|
||||
MCFG_CPU_FORCE_NO_DRC()
|
||||
//MCFG_MIPS3_ICACHE_SIZE(16384) /* ?? */
|
||||
//MCFG_MIPS3_DCACHE_SIZE(8192) /* ?? */
|
||||
//MCFG_MIPS3_SYSTEM_CLOCK(62500000) /* ?? */
|
||||
MCFG_DEVICE_PROGRAM_MAP(n64_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", n64_mess_state, n64_reset_poll)
|
||||
VR4300BE(config, m_vr4300, 93750000);
|
||||
m_vr4300->set_force_no_drc(true);
|
||||
//m_vr4300->set_icache_size(16384);
|
||||
//m_vr4300->set_dcache_size(8192);
|
||||
//m_vr4300->set_system_clock(62500000);
|
||||
m_vr4300->set_addrmap(AS_PROGRAM, &n64_mess_state::n64_map);
|
||||
m_vr4300->set_vblank_int("screen", FUNC(n64_mess_state::n64_reset_poll));
|
||||
|
||||
MCFG_DEVICE_ADD("rsp", RSP, 62500000)
|
||||
MCFG_CPU_FORCE_NO_DRC()
|
||||
MCFG_RSP_DP_REG_R_CB(READ32("rcp",n64_periphs, dp_reg_r))
|
||||
MCFG_RSP_DP_REG_W_CB(WRITE32("rcp",n64_periphs, dp_reg_w))
|
||||
MCFG_RSP_SP_REG_R_CB(READ32("rcp",n64_periphs, sp_reg_r))
|
||||
MCFG_RSP_SP_REG_W_CB(WRITE32("rcp",n64_periphs, sp_reg_w))
|
||||
MCFG_RSP_SP_SET_STATUS_CB(WRITE32("rcp",n64_periphs, sp_set_status))
|
||||
MCFG_DEVICE_PROGRAM_MAP(rsp_map)
|
||||
RSP(config, m_rsp, 62500000);
|
||||
m_rsp->set_force_no_drc(true);
|
||||
m_rsp->dp_reg_r().set(m_rcp_periphs, FUNC(n64_periphs::dp_reg_r));
|
||||
m_rsp->dp_reg_w().set(m_rcp_periphs, FUNC(n64_periphs::dp_reg_w));
|
||||
m_rsp->sp_reg_r().set(m_rcp_periphs, FUNC(n64_periphs::sp_reg_r));
|
||||
m_rsp->sp_reg_w().set(m_rcp_periphs, FUNC(n64_periphs::sp_reg_w));
|
||||
m_rsp->status_set().set(m_rcp_periphs, FUNC(n64_periphs::sp_set_status));
|
||||
m_rsp->set_addrmap(AS_PROGRAM, &n64_mess_state::rsp_map);
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(500000))
|
||||
//MCFG_QUANTUM_TIME(attotime::from_hz(1200))
|
||||
config.m_minimum_quantum = attotime::from_hz(500000);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
/* Video DACRATE is for quarter pixels, so the horizontal is also given in quarter pixels. However, the horizontal and vertical timing and sizing is adjustable by register and will be reset when the registers are written. */
|
||||
MCFG_SCREEN_RAW_PARAMS(DACRATE_NTSC*2,3093,0,3093,525,0,525)
|
||||
//MCFG_SCREEN_REFRESH_RATE(60)
|
||||
//MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
//MCFG_SCREEN_SIZE(640, 525)
|
||||
//MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(n64_state, screen_update_n64)
|
||||
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, n64_state, screen_vblank_n64))
|
||||
screen.set_raw(DACRATE_NTSC*2,3093,0,3093,525,0,525);
|
||||
screen.set_screen_update(FUNC(n64_state::screen_update_n64));
|
||||
screen.screen_vblank().set(FUNC(n64_state::screen_vblank_n64));
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x1000)
|
||||
PALETTE(config, "palette", 0x1000);
|
||||
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("dac2", DMADAC)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
MCFG_DEVICE_ADD("dac1", DMADAC)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
DMADAC(config, "dac2").add_route(ALL_OUTPUTS, "lspeaker", 1.0);
|
||||
DMADAC(config, "dac1").add_route(ALL_OUTPUTS, "rspeaker", 1.0);
|
||||
|
||||
N64PERIPH(config, "rcp", 0);
|
||||
N64PERIPH(config, m_rcp_periphs, 0);
|
||||
|
||||
/* cartridge */
|
||||
MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "n64_cart")
|
||||
MCFG_GENERIC_EXTENSIONS("v64,z64,rom,n64,bin")
|
||||
MCFG_GENERIC_MANDATORY
|
||||
MCFG_GENERIC_LOAD(n64_mess_state, n64_cart)
|
||||
generic_cartslot_device &cartslot(GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, "n64_cart"));
|
||||
cartslot.set_extensions("v64,z64,rom,n64,bin");
|
||||
cartslot.set_must_be_loaded(true);
|
||||
cartslot.set_device_load(device_image_load_delegate(&n64_mess_state::device_image_load_n64_cart, this));
|
||||
|
||||
/* software lists */
|
||||
MCFG_SOFTWARE_LIST_ADD("cart_list", "n64")
|
||||
MACHINE_CONFIG_END
|
||||
SOFTWARE_LIST(config, "cart_list").set_original("n64");
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(n64_mess_state::n64dd)
|
||||
void n64_mess_state::n64dd(machine_config &config)
|
||||
{
|
||||
n64(config);
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP(n64dd_map)
|
||||
m_vr4300->set_addrmap(AS_PROGRAM, &n64_mess_state::n64dd_map);
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(n64_mess_state, n64dd)
|
||||
|
||||
MCFG_DEVICE_REMOVE("cartslot")
|
||||
MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "n64_cart")
|
||||
MCFG_GENERIC_EXTENSIONS("v64,z64,rom,n64,bin")
|
||||
MCFG_GENERIC_LOAD(n64_mess_state, n64_cart)
|
||||
generic_cartslot_device &cartslot(GENERIC_CARTSLOT(config.replace(), "cartslot", generic_plain_slot, "n64_cart"));
|
||||
cartslot.set_extensions("v64,z64,rom,n64,bin");
|
||||
cartslot.set_device_load(device_image_load_delegate(&n64_mess_state::device_image_load_n64_cart, this));
|
||||
|
||||
MCFG_HARDDISK_ADD("n64disk")
|
||||
MCFG_HARDDISK_LOAD(n64_mess_state,n64dd)
|
||||
MCFG_HARDDISK_UNLOAD(n64_mess_state,n64dd)
|
||||
MCFG_HARDDISK_INTERFACE("n64dd_disk")
|
||||
harddisk_image_device &hdd(HARDDISK(config, "n64disk"));
|
||||
hdd.set_device_load(device_image_load_delegate(&n64_mess_state::device_image_load_n64dd, this));
|
||||
hdd.set_device_unload(device_image_func_delegate(&n64_mess_state::device_image_unload_n64dd, this));
|
||||
hdd.set_interface("n64dd_disk");
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("dd_list", "n64dd")
|
||||
MACHINE_CONFIG_END
|
||||
SOFTWARE_LIST(config, "dd_list").set_original("n64dd");
|
||||
}
|
||||
|
||||
ROM_START( n64 )
|
||||
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASEFF ) /* dummy region for R4300 */
|
||||
|
||||
@ -894,7 +894,7 @@ private:
|
||||
void ps2_map(address_map &map);
|
||||
|
||||
// devices
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<mips3_device> m_maincpu;
|
||||
|
||||
// driver_device overrides
|
||||
virtual void video_start() override;
|
||||
@ -919,25 +919,27 @@ void namcops2_state::ps2_map(address_map &map)
|
||||
static INPUT_PORTS_START( system246 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
MACHINE_CONFIG_START(namcops2_state::system246)
|
||||
MCFG_DEVICE_ADD("maincpu", R5000LE, 294000000) // actually R5900 @ 294 MHz
|
||||
MCFG_MIPS3_ICACHE_SIZE(16384)
|
||||
MCFG_MIPS3_DCACHE_SIZE(16384)
|
||||
MCFG_DEVICE_PROGRAM_MAP(ps2_map)
|
||||
void namcops2_state::system246(machine_config &config)
|
||||
{
|
||||
R5000LE(config, m_maincpu, 294000000); // actually R5900 @ 294 MHz
|
||||
m_maincpu->set_icache_size(16384);
|
||||
m_maincpu->set_dcache_size(16384);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &namcops2_state::ps2_map);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(namcops2_state, screen_update)
|
||||
MCFG_SCREEN_SIZE(640, 480)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_screen_update(FUNC(namcops2_state::screen_update));
|
||||
screen.set_size(640, 480);
|
||||
screen.set_visarea(0, 639, 0, 479);
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 65536)
|
||||
MACHINE_CONFIG_END
|
||||
PALETTE(config, "palette", 65536);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(namcops2_state::system256)
|
||||
void namcops2_state::system256(machine_config &config)
|
||||
{
|
||||
system246(config);
|
||||
MACHINE_CONFIG_END
|
||||
}
|
||||
|
||||
#define SYSTEM246_BIOS \
|
||||
ROM_LOAD( "r27v1602f.7d", 0x000000, 0x200000, CRC(2b2e41a2) SHA1(f0a74bbcaf801f3fd0b7002ebd0118564aae3528) )
|
||||
|
||||
@ -3594,33 +3594,30 @@ static GFXDECODE_START( gfx_namcos23 )
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(namcos23_state::gorgon)
|
||||
|
||||
void namcos23_state::gorgon(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD(m_maincpu, R4650BE, BUSCLOCK*4)
|
||||
MCFG_MIPS3_ICACHE_SIZE(8192) // VERIFIED
|
||||
MCFG_MIPS3_DCACHE_SIZE(8192) // VERIFIED
|
||||
MCFG_DEVICE_PROGRAM_MAP(gorgon_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos23_state, interrupt)
|
||||
R4650BE(config, m_maincpu, BUSCLOCK*4);
|
||||
m_maincpu->set_icache_size(8192); // VERIFIED
|
||||
m_maincpu->set_dcache_size(8192); // VERIFIED
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &namcos23_state::gorgon_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(namcos23_state::interrupt));
|
||||
|
||||
MCFG_DEVICE_ADD(m_subcpu, H83002, H8CLOCK)
|
||||
MCFG_DEVICE_PROGRAM_MAP( s23h8rwmap )
|
||||
MCFG_DEVICE_IO_MAP( s23h8iomap )
|
||||
H83002(config, m_subcpu, H8CLOCK);
|
||||
m_subcpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23h8rwmap);
|
||||
m_subcpu->set_addrmap(AS_IO, &namcos23_state::s23h8iomap);
|
||||
|
||||
// Timer at 115200*16 for the jvs serial clock
|
||||
MCFG_DEVICE_MODIFY("subcpu:sci0")
|
||||
MCFG_H8_SCI_SET_EXTERNAL_CLOCK_PERIOD(attotime::from_hz(JVSCLOCK/8))
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
|
||||
|
||||
MCFG_DEVICE_ADD(m_iocpu, H83334, JVSCLOCK )
|
||||
MCFG_DEVICE_PROGRAM_MAP( s23iobrdmap )
|
||||
MCFG_DEVICE_IO_MAP( s23iobrdiomap )
|
||||
H83334(config, m_iocpu, JVSCLOCK);
|
||||
m_iocpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23iobrdmap);
|
||||
m_iocpu->set_addrmap(AS_IO, &namcos23_state::s23iobrdiomap);
|
||||
|
||||
MCFG_DEVICE_MODIFY("iocpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("subcpu:sci0", h8_sci_device, rx_w))
|
||||
MCFG_DEVICE_MODIFY("subcpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("iocpu:sci0", h8_sci_device, rx_w))
|
||||
m_iocpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("subcpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(2*115200))
|
||||
config.m_minimum_quantum = attotime::from_hz(2*115200);
|
||||
|
||||
NAMCO_SETTINGS(config, m_settings, 0);
|
||||
|
||||
@ -3636,17 +3633,17 @@ MACHINE_CONFIG_START(namcos23_state::gorgon)
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(VSYNC1)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // Not in any way accurate
|
||||
MCFG_SCREEN_SIZE(640, 480)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(namcos23_state, screen_update)
|
||||
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, namcos23_state, sub_irq))
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(VSYNC1);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // Not in any way accurate
|
||||
m_screen->set_size(640, 480);
|
||||
m_screen->set_visarea(0, 639, 0, 479);
|
||||
m_screen->set_screen_update(FUNC(namcos23_state::screen_update));
|
||||
m_screen->screen_vblank().set(FUNC(namcos23_state::sub_irq));
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x8000)
|
||||
PALETTE(config, m_palette, 0x8000);
|
||||
|
||||
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos23)
|
||||
GFXDECODE(config, m_gfxdecode, m_palette, gfx_namcos23);
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(namcos23_state,s23)
|
||||
|
||||
@ -3654,41 +3651,38 @@ MACHINE_CONFIG_START(namcos23_state::gorgon)
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("c352", C352, C352CLOCK, C352DIV)
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(2, "lspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(3, "rspeaker", 1.00)
|
||||
MACHINE_CONFIG_END
|
||||
c352_device &c352(C352(config, "c352", C352CLOCK, C352DIV));
|
||||
c352.add_route(0, "lspeaker", 1.00);
|
||||
c352.add_route(1, "rspeaker", 1.00);
|
||||
c352.add_route(2, "lspeaker", 1.00);
|
||||
c352.add_route(3, "rspeaker", 1.00);
|
||||
}
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(namcos23_state::s23)
|
||||
|
||||
void namcos23_state::s23(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD(m_maincpu, R4650BE, BUSCLOCK*4)
|
||||
MCFG_MIPS3_ICACHE_SIZE(8192) // VERIFIED
|
||||
MCFG_MIPS3_DCACHE_SIZE(8192) // VERIFIED
|
||||
MCFG_DEVICE_PROGRAM_MAP(s23_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos23_state, interrupt)
|
||||
R4650BE(config, m_maincpu, BUSCLOCK*4);
|
||||
m_maincpu->set_icache_size(8192); // VERIFIED
|
||||
m_maincpu->set_dcache_size(8192); // VERIFIED
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(namcos23_state::interrupt));
|
||||
|
||||
MCFG_DEVICE_ADD(m_subcpu, H83002, H8CLOCK)
|
||||
MCFG_DEVICE_PROGRAM_MAP( s23h8rwmap )
|
||||
MCFG_DEVICE_IO_MAP( s23h8iomap )
|
||||
H83002(config, m_subcpu, H8CLOCK);
|
||||
m_subcpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23h8rwmap);
|
||||
m_subcpu->set_addrmap(AS_IO, &namcos23_state::s23h8iomap);
|
||||
|
||||
// Timer at 115200*16 for the jvs serial clock
|
||||
MCFG_DEVICE_MODIFY("subcpu:sci0")
|
||||
MCFG_H8_SCI_SET_EXTERNAL_CLOCK_PERIOD(attotime::from_hz(JVSCLOCK/8))
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
|
||||
|
||||
MCFG_DEVICE_ADD(m_iocpu, H83334, JVSCLOCK )
|
||||
MCFG_DEVICE_PROGRAM_MAP( s23iobrdmap )
|
||||
MCFG_DEVICE_IO_MAP( s23iobrdiomap )
|
||||
H83334(config, m_iocpu, JVSCLOCK);
|
||||
m_iocpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23iobrdmap);
|
||||
m_iocpu->set_addrmap(AS_IO, &namcos23_state::s23iobrdiomap);
|
||||
|
||||
MCFG_DEVICE_MODIFY("iocpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("subcpu:sci0", h8_sci_device, rx_w))
|
||||
MCFG_DEVICE_MODIFY("subcpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("iocpu:sci0", h8_sci_device, rx_w))
|
||||
m_iocpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("subcpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(2*115200))
|
||||
config.m_minimum_quantum = attotime::from_hz(2*115200);
|
||||
|
||||
NAMCO_SETTINGS(config, m_settings, 0);
|
||||
|
||||
@ -3704,17 +3698,17 @@ MACHINE_CONFIG_START(namcos23_state::s23)
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(VSYNC1)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // Not in any way accurate
|
||||
MCFG_SCREEN_SIZE(640, 480)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(namcos23_state, screen_update)
|
||||
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, namcos23_state, sub_irq))
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(VSYNC1);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // Not in any way accurate
|
||||
m_screen->set_size(640, 480);
|
||||
m_screen->set_visarea(0, 639, 0, 479);
|
||||
m_screen->set_screen_update(FUNC(namcos23_state::screen_update));
|
||||
m_screen->screen_vblank().set(FUNC(namcos23_state::sub_irq));
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x8000)
|
||||
PALETTE(config, m_palette, 0x8000);
|
||||
|
||||
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos23)
|
||||
GFXDECODE(config, m_gfxdecode, m_palette, gfx_namcos23);
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(namcos23_state,s23)
|
||||
|
||||
@ -3722,54 +3716,52 @@ MACHINE_CONFIG_START(namcos23_state::s23)
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("c352", C352, C352CLOCK, C352DIV)
|
||||
MCFG_SOUND_ROUTE(0, "rspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(1, "lspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(2, "rspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(3, "lspeaker", 1.00)
|
||||
MACHINE_CONFIG_END
|
||||
c352_device &c352(C352(config, "c352", C352CLOCK, C352DIV));
|
||||
c352.add_route(0, "rspeaker", 1.00);
|
||||
c352.add_route(1, "lspeaker", 1.00);
|
||||
c352.add_route(2, "rspeaker", 1.00);
|
||||
c352.add_route(3, "lspeaker", 1.00);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(namcos23_state::timecrs2)
|
||||
void namcos23_state::timecrs2(machine_config &config)
|
||||
{
|
||||
s23(config);
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_MODIFY("iocpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP( timecrs2iobrdmap )
|
||||
MACHINE_CONFIG_END
|
||||
m_iocpu->set_addrmap(AS_PROGRAM, &namcos23_state::timecrs2iobrdmap);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(namcos23_state::gmen)
|
||||
void namcos23_state::gmen(machine_config &config)
|
||||
{
|
||||
s23(config);
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_CLOCK(BUSCLOCK*5)
|
||||
MCFG_DEVICE_PROGRAM_MAP(gmen_mips_map)
|
||||
m_maincpu->set_clock(BUSCLOCK*5);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &namcos23_state::gmen_mips_map);
|
||||
|
||||
MCFG_DEVICE_ADD("gmen_sh2", SH2, XTAL(28'700'000))
|
||||
MCFG_DEVICE_PROGRAM_MAP(gmen_sh2_map)
|
||||
SH2(config, m_gmen_sh2, XTAL(28'700'000));
|
||||
m_gmen_sh2->set_addrmap(AS_PROGRAM, &namcos23_state::gmen_sh2_map);
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(namcos23_state,gmen)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(namcos23_state::ss23)
|
||||
}
|
||||
|
||||
void namcos23_state::ss23(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD(m_maincpu, R4650BE, BUSCLOCK*5)
|
||||
MCFG_MIPS3_ICACHE_SIZE(8192) // VERIFIED
|
||||
MCFG_MIPS3_DCACHE_SIZE(8192) // VERIFIED
|
||||
MCFG_DEVICE_PROGRAM_MAP(s23_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos23_state, interrupt)
|
||||
R4650BE(config, m_maincpu, BUSCLOCK*5);
|
||||
m_maincpu->set_icache_size(8192); // VERIFIED
|
||||
m_maincpu->set_dcache_size(8192); // VERIFIED
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(namcos23_state::interrupt));
|
||||
|
||||
MCFG_DEVICE_ADD(m_subcpu, H83002, H8CLOCK)
|
||||
MCFG_DEVICE_PROGRAM_MAP( s23h8rwmap )
|
||||
MCFG_DEVICE_IO_MAP( s23h8iomap )
|
||||
H83002(config, m_subcpu, H8CLOCK);
|
||||
m_subcpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23h8rwmap);
|
||||
m_subcpu->set_addrmap(AS_IO, &namcos23_state::s23h8iomap);
|
||||
|
||||
// Timer at 115200*16 for the jvs serial clock
|
||||
MCFG_DEVICE_MODIFY("subcpu:sci0")
|
||||
MCFG_H8_SCI_SET_EXTERNAL_CLOCK_PERIOD(attotime::from_hz(JVSCLOCK/8))
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(2*115200))
|
||||
config.m_minimum_quantum = attotime::from_hz(2*115200);
|
||||
|
||||
NAMCO_SETTINGS(config, m_settings, 0);
|
||||
|
||||
@ -3785,17 +3777,17 @@ MACHINE_CONFIG_START(namcos23_state::ss23)
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(VSYNC1)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // Not in any way accurate
|
||||
MCFG_SCREEN_SIZE(640, 480)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(namcos23_state, screen_update)
|
||||
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, namcos23_state, sub_irq))
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(VSYNC1);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // Not in any way accurate
|
||||
m_screen->set_size(640, 480);
|
||||
m_screen->set_visarea(0, 639, 0, 479);
|
||||
m_screen->set_screen_update(FUNC(namcos23_state::screen_update));
|
||||
m_screen->screen_vblank().set(FUNC(namcos23_state::sub_irq));
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x8000)
|
||||
PALETTE(config, m_palette, 0x8000);
|
||||
|
||||
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos23)
|
||||
GFXDECODE(config, m_gfxdecode, m_palette, gfx_namcos23);
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(namcos23_state,s23)
|
||||
|
||||
@ -3803,42 +3795,39 @@ MACHINE_CONFIG_START(namcos23_state::ss23)
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("c352", C352, C352CLOCK, C352DIV)
|
||||
MCFG_SOUND_ROUTE(0, "rspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(1, "lspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(2, "rspeaker", 1.00)
|
||||
MCFG_SOUND_ROUTE(3, "lspeaker", 1.00)
|
||||
MACHINE_CONFIG_END
|
||||
c352_device &c352(C352(config, "c352", C352CLOCK, C352DIV));
|
||||
c352.add_route(0, "rspeaker", 1.00);
|
||||
c352.add_route(1, "lspeaker", 1.00);
|
||||
c352.add_route(2, "rspeaker", 1.00);
|
||||
c352.add_route(3, "lspeaker", 1.00);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(namcos23_state::timecrs2v4a)
|
||||
void namcos23_state::timecrs2v4a(machine_config &config)
|
||||
{
|
||||
ss23(config);
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("iocpu", H83334, JVSCLOCK )
|
||||
MCFG_DEVICE_PROGRAM_MAP( timecrs2iobrdmap )
|
||||
MCFG_DEVICE_IO_MAP( s23iobrdiomap )
|
||||
H83334(config, m_iocpu, JVSCLOCK);
|
||||
m_iocpu->set_addrmap(AS_PROGRAM, &namcos23_state::timecrs2iobrdmap);
|
||||
m_iocpu->set_addrmap(AS_IO, &namcos23_state::s23iobrdiomap);
|
||||
|
||||
MCFG_DEVICE_MODIFY("iocpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("subcpu:sci0", h8_sci_device, rx_w))
|
||||
MCFG_DEVICE_MODIFY("subcpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("iocpu:sci0", h8_sci_device, rx_w))
|
||||
MACHINE_CONFIG_END
|
||||
m_iocpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("subcpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(namcos23_state::ss23e2)
|
||||
void namcos23_state::ss23e2(machine_config &config)
|
||||
{
|
||||
ss23(config);
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_CLOCK(BUSCLOCK*6)
|
||||
m_maincpu->set_clock(BUSCLOCK*6);
|
||||
|
||||
MCFG_DEVICE_ADD("iocpu", H83334, JVSCLOCK )
|
||||
MCFG_DEVICE_PROGRAM_MAP( s23iobrdmap )
|
||||
MCFG_DEVICE_IO_MAP( s23iobrdiomap )
|
||||
H83334(config, m_iocpu, JVSCLOCK);
|
||||
m_iocpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23iobrdmap);
|
||||
m_iocpu->set_addrmap(AS_IO, &namcos23_state::s23iobrdiomap);
|
||||
|
||||
MCFG_DEVICE_MODIFY("iocpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("subcpu:sci0", h8_sci_device, rx_w))
|
||||
MCFG_DEVICE_MODIFY("subcpu:sci0")
|
||||
MCFG_H8_SCI_TX_CALLBACK(WRITELINE("iocpu:sci0", h8_sci_device, rx_w))
|
||||
MACHINE_CONFIG_END
|
||||
m_iocpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("subcpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -252,7 +252,7 @@ protected:
|
||||
void mem_map(address_map &map);
|
||||
void iop_map(address_map &map);
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<r5900le_device> m_maincpu;
|
||||
required_device<iop_device> m_iop;
|
||||
required_device_array<ps2_timer_device, 4> m_timer;
|
||||
required_device<ps2_dmac_device> m_dmac;
|
||||
@ -734,54 +734,54 @@ void ps2sony_state::iop_map(address_map &map)
|
||||
static INPUT_PORTS_START( ps2sony )
|
||||
INPUT_PORTS_END
|
||||
|
||||
MACHINE_CONFIG_START(ps2sony_state::ps2sony)
|
||||
MCFG_DEVICE_ADD(m_maincpu, R5900LE, 294'912'000, m_vu0)
|
||||
MCFG_CPU_FORCE_NO_DRC()
|
||||
MCFG_MIPS3_ICACHE_SIZE(16384)
|
||||
MCFG_MIPS3_DCACHE_SIZE(16384)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mem_map)
|
||||
void ps2sony_state::ps2sony(machine_config &config)
|
||||
{
|
||||
R5900LE(config, m_maincpu, 294'912'000, m_vu0);
|
||||
m_maincpu->set_force_no_drc(true);
|
||||
m_maincpu->set_icache_size(16384);
|
||||
m_maincpu->set_dcache_size(16384);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &ps2sony_state::mem_map);
|
||||
|
||||
MCFG_DEVICE_ADD(m_vu0, SONYPS2_VU0, 294'912'000, m_vu1)
|
||||
MCFG_DEVICE_ADD(m_vu1, SONYPS2_VU1, 294'912'000, m_gs)
|
||||
SONYPS2_VU0(config, m_vu0, 294'912'000, m_vu1);
|
||||
SONYPS2_VU1(config, m_vu1, 294'912'000, m_gs);
|
||||
|
||||
MCFG_DEVICE_ADD(m_timer[0], SONYPS2_TIMER, 294912000/2, true)
|
||||
MCFG_DEVICE_ADD(m_timer[1], SONYPS2_TIMER, 294912000/2, true)
|
||||
MCFG_DEVICE_ADD(m_timer[2], SONYPS2_TIMER, 294912000/2, false)
|
||||
MCFG_DEVICE_ADD(m_timer[3], SONYPS2_TIMER, 294912000/2, false)
|
||||
SONYPS2_TIMER(config, m_timer[0], 294912000/2, true);
|
||||
SONYPS2_TIMER(config, m_timer[1], 294912000/2, true);
|
||||
SONYPS2_TIMER(config, m_timer[2], 294912000/2, false);
|
||||
SONYPS2_TIMER(config, m_timer[3], 294912000/2, false);
|
||||
|
||||
MCFG_DEVICE_ADD(m_intc, SONYPS2_INTC, m_maincpu)
|
||||
MCFG_DEVICE_ADD(m_gs, SONYPS2_GS, 294912000/2, m_intc, m_vu1)
|
||||
MCFG_DEVICE_ADD(m_dmac, SONYPS2_DMAC, 294912000/2, m_maincpu, m_ram, m_sif, m_gs, m_vu1)
|
||||
MCFG_DEVICE_ADD(m_sif, SONYPS2_SIF, m_intc)
|
||||
SONYPS2_INTC(config, m_intc, m_maincpu);
|
||||
SONYPS2_GS(config, m_gs, 294912000/2, m_intc, m_vu1);
|
||||
SONYPS2_DMAC(config, m_dmac, 294912000/2, m_maincpu, m_ram, m_sif, m_gs, m_vu1);
|
||||
SONYPS2_SIF(config, m_sif, m_intc);
|
||||
|
||||
MCFG_DEVICE_ADD(m_iop, SONYPS2_IOP, XTAL(67'737'600)/2)
|
||||
MCFG_DEVICE_PROGRAM_MAP(iop_map)
|
||||
SONYPS2_IOP(config, m_iop, XTAL(67'737'600)/2);
|
||||
m_iop->set_addrmap(AS_PROGRAM, &ps2sony_state::iop_map);
|
||||
|
||||
MCFG_QUANTUM_PERFECT_CPU("maincpu")
|
||||
MCFG_QUANTUM_PERFECT_CPU("iop")
|
||||
config.m_perfect_cpu_quantum = subtag("iop");
|
||||
|
||||
MCFG_DEVICE_ADD(m_pad[0], SONYPS2_PAD)
|
||||
MCFG_DEVICE_ADD(m_pad[1], SONYPS2_PAD)
|
||||
MCFG_DEVICE_ADD(m_mc, SONYPS2_MC)
|
||||
SONYPS2_PAD(config, m_pad[0]);
|
||||
SONYPS2_PAD(config, m_pad[1]);
|
||||
SONYPS2_MC(config, m_mc);
|
||||
|
||||
MCFG_DEVICE_ADD(m_iop_intc, SONYIOP_INTC, m_iop)
|
||||
MCFG_DEVICE_ADD(m_iop_sio2, SONYIOP_SIO2, m_iop_intc, m_pad[0], m_pad[1], m_mc)
|
||||
MCFG_DEVICE_ADD(m_iop_cdvd, SONYIOP_CDVD, m_iop_intc)
|
||||
MCFG_DEVICE_ADD(m_iop_timer, SONYIOP_TIMER, XTAL(67'737'600)/2)
|
||||
MCFG_IOP_TIMER_IRQ_CALLBACK(WRITELINE(*this, ps2sony_state, iop_timer_irq))
|
||||
MCFG_DEVICE_ADD(m_iop_spu, SONYIOP_SPU, XTAL(67'737'600)/2, m_iop, m_iop_intc)
|
||||
SONYIOP_INTC(config, m_iop_intc, m_iop);
|
||||
SONYIOP_SIO2(config, m_iop_sio2, m_iop_intc, m_pad[0], m_pad[1], m_mc);
|
||||
SONYIOP_CDVD(config, m_iop_cdvd, m_iop_intc);
|
||||
SONYIOP_TIMER(config, m_iop_timer, XTAL(67'737'600)/2);
|
||||
m_iop_timer->irq().set(FUNC(ps2sony_state::iop_timer_irq));
|
||||
SONYIOP_SPU(config, m_iop_spu, XTAL(67'737'600)/2, m_iop, m_iop_intc);
|
||||
|
||||
MCFG_DEVICE_ADD(m_iop_dma, SONYIOP_DMA, XTAL(67'737'600)/2, m_iop_intc, m_iop_ram, m_sif, m_iop_spu, m_iop_sio2)
|
||||
SONYIOP_DMA(config, m_iop_dma, XTAL(67'737'600)/2, m_iop_intc, m_iop_ram, m_sif, m_iop_spu, m_iop_sio2);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(ps2sony_state, screen_update)
|
||||
MCFG_SCREEN_SIZE(640, 256)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 223)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_screen_update(FUNC(ps2sony_state::screen_update));
|
||||
screen.set_size(640, 256);
|
||||
screen.set_visarea(0, 639, 0, 223);
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 65536)
|
||||
MACHINE_CONFIG_END
|
||||
PALETTE(config, "palette", 65536);
|
||||
}
|
||||
|
||||
|
||||
ROM_START( ps2 )
|
||||
|
||||
@ -173,7 +173,7 @@ private:
|
||||
void ps2_map(address_map &map);
|
||||
|
||||
// devices
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<mips3_device> m_maincpu;
|
||||
|
||||
// driver_device overrides
|
||||
virtual void video_start() override;
|
||||
@ -198,21 +198,22 @@ void pyson_state::ps2_map(address_map &map)
|
||||
static INPUT_PORTS_START( pyson )
|
||||
INPUT_PORTS_END
|
||||
|
||||
MACHINE_CONFIG_START(pyson_state::pyson)
|
||||
MCFG_DEVICE_ADD("maincpu", R5000LE, 294000000) // imported from namcops2.c driver
|
||||
MCFG_MIPS3_ICACHE_SIZE(16384)
|
||||
MCFG_MIPS3_DCACHE_SIZE(16384)
|
||||
MCFG_DEVICE_PROGRAM_MAP(ps2_map)
|
||||
void pyson_state::pyson(machine_config &config)
|
||||
{
|
||||
R5000LE(config, m_maincpu, 294000000); // imported from namcops2.c driver
|
||||
m_maincpu->set_icache_size(16384);
|
||||
m_maincpu->set_dcache_size(16384);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &pyson_state::ps2_map);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(pyson_state, screen_update)
|
||||
MCFG_SCREEN_SIZE(640, 480)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_screen_update(FUNC(pyson_state::screen_update));
|
||||
screen.set_size(640, 480);
|
||||
screen.set_visarea(0, 639, 0, 479);
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 65536)
|
||||
MACHINE_CONFIG_END
|
||||
PALETTE(config, "palette", 65536);
|
||||
}
|
||||
|
||||
#define PYSON_BIOS \
|
||||
ROM_LOAD( "b22a01.u42", 0x000000, 0x080000, CRC(98de405e) SHA1(4bc268a996825c1bdf6ae277d331fe7bdc0cc00c) )
|
||||
|
||||
@ -253,19 +253,14 @@ void vp10x_state::video_start()
|
||||
|
||||
uint32_t vp10x_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
const uint32_t *video_ram;
|
||||
uint32_t word;
|
||||
uint32_t *line;
|
||||
int y, x;
|
||||
|
||||
for (y = 0; y < 240; y++)
|
||||
for (int y = 0; y < 240; y++)
|
||||
{
|
||||
line = &bitmap.pix32(y);
|
||||
video_ram = (const uint32_t *) &m_mainram[(0x7400000/4) + (y * (0x1000/4)) + 4];
|
||||
uint32_t *line = &bitmap.pix32(y);
|
||||
const uint32_t *video_ram = (const uint32_t *) &m_mainram[(0x7400000/4) + (y * (0x1000/4)) + 4];
|
||||
|
||||
for (x = 0; x < 320; x++)
|
||||
for (int x = 0; x < 320; x++)
|
||||
{
|
||||
word = *(video_ram++);
|
||||
uint32_t word = *(video_ram++);
|
||||
video_ram++;
|
||||
*line++ = word;
|
||||
}
|
||||
@ -276,23 +271,19 @@ uint32_t vp10x_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
|
||||
// TODO: Palette is not at 0, where is it?
|
||||
uint32_t vp10x_state::vp50_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
const uint8_t *video_ram;
|
||||
uint32_t *line;
|
||||
int y, x;
|
||||
int r,g,b;
|
||||
const uint16_t *pal_ram = (const uint16_t *) &m_mainram[0];
|
||||
|
||||
for (y = 0; y < 240; y++)
|
||||
for (int y = 0; y < 240; y++)
|
||||
{
|
||||
line = &bitmap.pix32(y);
|
||||
video_ram = (const uint8_t *) &m_mainram[(0x10000/4)+(y * 100)];
|
||||
uint32_t *line = &bitmap.pix32(y);
|
||||
const uint8_t *video_ram = (const uint8_t *) &m_mainram[(0x10000/4)+(y * 100)];
|
||||
|
||||
for (x = 0; x < 400; x++)
|
||||
for (int x = 0; x < 400; x++)
|
||||
{
|
||||
// assume 565
|
||||
r = pal_ram[video_ram[x]] >> 11;
|
||||
g = (pal_ram[video_ram[x]] >> 5) & 0x3f;
|
||||
b = pal_ram[video_ram[x]] & 0x1f;
|
||||
int r = pal_ram[video_ram[x]] >> 11;
|
||||
int g = (pal_ram[video_ram[x]] >> 5) & 0x3f;
|
||||
int b = pal_ram[video_ram[x]] & 0x1f;
|
||||
|
||||
*line++ = (r << 19) | (g << 10) | (b << 3);
|
||||
}
|
||||
@ -368,42 +359,44 @@ static INPUT_PORTS_START( vp50 )
|
||||
PORT_BIT( 0xfffffff0, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||
INPUT_PORTS_END
|
||||
|
||||
MACHINE_CONFIG_START(vp10x_state::vp101)
|
||||
MCFG_DEVICE_ADD("maincpu", VR5500LE, 400000000)
|
||||
MCFG_MIPS3_DCACHE_SIZE(32768)
|
||||
MCFG_MIPS3_SYSTEM_CLOCK(100000000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(main_map)
|
||||
void vp10x_state::vp101(machine_config &config)
|
||||
{
|
||||
VR5500LE(config, m_maincpu, 400000000);
|
||||
m_maincpu->set_dcache_size(32768);
|
||||
m_maincpu->set_system_clock(100000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vp10x_state::main_map);
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(vp10x_state, screen_update)
|
||||
MCFG_SCREEN_SIZE(320, 240)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 319, 0, 239)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
|
||||
screen.set_screen_update(FUNC(vp10x_state::screen_update));
|
||||
screen.set_size(320, 240);
|
||||
screen.set_visarea(0, 319, 0, 239);
|
||||
|
||||
ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, false);
|
||||
m_ata->dmarq_handler().set(FUNC(vp10x_state::dmarq_w));
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
MACHINE_CONFIG_END
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(vp10x_state::vp50)
|
||||
MCFG_DEVICE_ADD("maincpu", TX4925LE, 200000000)
|
||||
MCFG_MIPS3_DCACHE_SIZE(32768)
|
||||
MCFG_MIPS3_SYSTEM_CLOCK(100000000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vp50_map)
|
||||
void vp10x_state::vp50(machine_config &config)
|
||||
{
|
||||
TX4925LE(config, m_maincpu, 200000000);
|
||||
m_maincpu->set_dcache_size(32768);
|
||||
m_maincpu->set_system_clock(100000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vp10x_state::vp50_map);
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(vp10x_state, vp50_screen_update)
|
||||
MCFG_SCREEN_SIZE(400, 240)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 399, 0, 239)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
|
||||
screen.set_screen_update(FUNC(vp10x_state::vp50_screen_update));
|
||||
screen.set_size(400, 240);
|
||||
screen.set_visarea(0, 399, 0, 239);
|
||||
|
||||
ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, false);
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
MACHINE_CONFIG_END
|
||||
}
|
||||
|
||||
ROM_START(jnero)
|
||||
ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user