Added Macronix 29LV160TMC sub-type to intelfsh.c, used by Sega Dreamcast [Angelo Salese]

This commit is contained in:
Angelo Salese 2013-08-18 21:55:53 +00:00
parent 5e2291ebeb
commit 6bd457bd80
7 changed files with 116 additions and 52 deletions

View File

@ -86,6 +86,8 @@ const device_type FUJITSU_29F016A = &device_creator<fujitsu_29f016a_device>;
const device_type FUJITSU_29DL16X = &device_creator<fujitsu_29dl16x_device>;
const device_type INTEL_E28F400 = &device_creator<intel_e28f400_device>;
const device_type MACRONIX_29L001MC = &device_creator<macronix_29l001mc_device>;
const device_type MACRONIX_29LV160TMC = &device_creator<macronix_29lv160tmc_device>;
const device_type PANASONIC_MN63F805MNP = &device_creator<panasonic_mn63f805mnp_device>;
const device_type SANYO_LE26FV10N1TS = &device_creator<sanyo_le26fv10n1ts_device>;
const device_type SST_28SF040 = &device_creator<sst_28sf040_device>;
@ -159,6 +161,8 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_device_id(0),
m_maker_id(0),
m_sector_is_4k(false),
m_sector_is_16k(false),
m_rmw_type(false),
m_status(0x80),
m_erase_sector(0),
m_flash_mode(FM_NORMAL),
@ -281,6 +285,15 @@ intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type
m_device_id = 0x51;
map = ADDRESS_MAP_NAME( memory_map8_1Mb );
break;
case FLASH_MACRONIX_29LV160TMC:
m_bits = 8;
m_size = 0x20000;
m_maker_id = MFG_MACRONIX;
m_device_id = 0x49;
m_sector_is_16k = true;
m_rmw_type = true;
map = ADDRESS_MAP_NAME( memory_map8_1Mb );
break;
case FLASH_PANASONIC_MN63F805MNP:
m_bits = 8;
m_size = 0x10000;
@ -351,6 +364,9 @@ intel_e28f008sa_device::intel_e28f008sa_device(const machine_config &mconfig, co
macronix_29l001mc_device::macronix_29l001mc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: intelfsh8_device(mconfig, MACRONIX_29L001MC, "Macronix 29L001MC Flash", tag, owner, clock, FLASH_MACRONIX_29L001MC, "macronix_29l001mc", __FILE__) { }
macronix_29lv160tmc_device::macronix_29lv160tmc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: intelfsh8_device(mconfig, MACRONIX_29LV160TMC, "Macronix 29LV160TMC Flash", tag, owner, clock, FLASH_MACRONIX_29LV160TMC, "macronix_29lv160tmc", __FILE__) { }
panasonic_mn63f805mnp_device::panasonic_mn63f805mnp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: intelfsh8_device(mconfig, PANASONIC_MN63F805MNP, "Panasonic MN63F805MNP Flash", tag, owner, clock, FLASH_PANASONIC_MN63F805MNP, "panasonic_mn63f805mnp", __FILE__) { }
@ -820,6 +836,10 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
{
m_timer->adjust( attotime::from_seconds( 1 ) );
}
else if(m_sector_is_16k)
{
m_timer->adjust( attotime::from_seconds( 4 ) );
}
else
{
m_timer->adjust( attotime::from_seconds( 16 ) );
@ -837,6 +857,13 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
m_erase_sector = address & ((m_bits == 16) ? ~0x7ff : ~0xfff);
m_timer->adjust( attotime::from_msec( 125 ) );
}
else if(m_sector_is_16k)
{
for (offs_t offs = 0; offs < 16 * 1024; offs++)
m_addrspace[0]->write_byte((base & ~0x3fff) + offs, 0xff);
m_erase_sector = address & ((m_bits == 16) ? ~0x1fff : ~0x3fff);
m_timer->adjust( attotime::from_msec( 500 ) );
}
else
{
for (offs_t offs = 0; offs < 64 * 1024; offs++)
@ -858,7 +885,10 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
{
case 8:
{
m_addrspace[0]->write_byte(address, data);
if(m_rmw_type == true)
m_addrspace[0]->write_byte(address, m_addrspace[0]->read_byte(address) & data);
else
m_addrspace[0]->write_byte(address, data);
}
break;
default:

View File

@ -40,6 +40,9 @@
#define MCFG_MACRONIX_29L001MC_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, MACRONIX_29L001MC, 0)
#define MCFG_MACRONIX_29LV160TMC_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, MACRONIX_29LV160TMC, 0)
#define MCFG_PANASONIC_MN63F805MNP_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, PANASONIC_MN63F805MNP, 0)
@ -97,6 +100,7 @@ public:
FLASH_SHARP_LH28F016S,
FLASH_INTEL_E28F008SA,
FLASH_MACRONIX_29L001MC,
FLASH_MACRONIX_29LV160TMC,
FLASH_PANASONIC_MN63F805MNP,
FLASH_SANYO_LE26FV10N1TS,
FLASH_SST_28SF040,
@ -140,6 +144,8 @@ protected:
UINT8 m_device_id;
UINT8 m_maker_id;
bool m_sector_is_4k;
bool m_sector_is_16k;
bool m_rmw_type;
UINT8 m_page_size;
// internal state
@ -256,6 +262,12 @@ public:
macronix_29l001mc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class macronix_29lv160tmc_device : public intelfsh8_device
{
public:
macronix_29lv160tmc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class panasonic_mn63f805mnp_device : public intelfsh8_device
{
public:
@ -329,6 +341,8 @@ extern const device_type FUJITSU_29F016A;
extern const device_type FUJITSU_29DL16X;
extern const device_type INTEL_E28F400;
extern const device_type MACRONIX_29L001MC;
extern const device_type MACRONIX_29LV160TMC;
extern const device_type PANASONIC_MN63F805MNP;
extern const device_type SANYO_LE26FV10N1TS;
extern const device_type SST_28SF040;

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@ -67,7 +67,8 @@ TODO (general):
TODO (game-specific):
- 18 Wheeler Deluxe: "MOTOR NETWORK ERR IN 01 OUT FF" msg pops up during gameplay;
- Airline Pilots Deluxe: returns error 03
- Derby Owner Club: if you try to start a game, it moans about something and enters into some kind of JP test mode, pretty bogus behaviour;
- Capcom vs. SNK Pro: doesn't accept start input (REGRESSION)
- Derby Owner Club: if you try to start a game, it moans about something and enters into some kind of JP test mode, pretty bogus behaviour;
- Ferrari 355 Challenge: dies at the network check;
- Giant Gram 2: no VMU emulation;
- Gun Survivor 2: crashes during game loading;
@ -1544,7 +1545,7 @@ static ADDRESS_MAP_START( naomi_map, AS_PROGRAM, 64, naomi_state )
AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff))
AM_RANGE(0x00600000, 0x006007ff) AM_MIRROR(0x02000000) AM_READWRITE(dc_modem_r, dc_modem_w )
AM_RANGE(0x00700000, 0x00707fff) AM_MIRROR(0x02000000) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w )
AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE(dc_rtc_r, dc_rtc_w )
AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE32(dc_rtc_r, dc_rtc_w, U64(0xffffffffffffffff) )
AM_RANGE(0x00800000, 0x00ffffff) AM_MIRROR(0x02000000) AM_READWRITE(naomi_arm_r, naomi_arm_w ) // sound RAM (8 MB)
/* External Device */
@ -1596,7 +1597,7 @@ static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64, naomi_state )
AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff))
AM_RANGE(0x00600000, 0x006007ff) AM_MIRROR(0x02000000) AM_READWRITE(dc_modem_r, dc_modem_w )
AM_RANGE(0x00700000, 0x00707fff) AM_MIRROR(0x02000000) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w )
AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE(dc_rtc_r, dc_rtc_w )
AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE32(dc_rtc_r, dc_rtc_w, U64(0xffffffffffffffff) )
AM_RANGE(0x00800000, 0x00ffffff) AM_MIRROR(0x02000000) AM_READWRITE(naomi_arm_r, naomi_arm_w ) // sound RAM (8 MB)
/* External Device */
@ -1749,7 +1750,7 @@ static ADDRESS_MAP_START( aw_map, AS_PROGRAM, 64, naomi_state )
AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff))
AM_RANGE(0x00600000, 0x006007ff) AM_READWRITE(aw_modem_r, aw_modem_w )
AM_RANGE(0x00700000, 0x00707fff) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w )
AM_RANGE(0x00710000, 0x0071000f) AM_READWRITE(dc_rtc_r, dc_rtc_w )
AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE32(dc_rtc_r, dc_rtc_w, U64(0xffffffffffffffff) )
AM_RANGE(0x00800000, 0x00ffffff) AM_READWRITE(naomi_arm_r, naomi_arm_w ) // sound RAM (8 MB)

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@ -74,8 +74,8 @@ class dc_state : public driver_device
DECLARE_WRITE64_MEMBER( dc_g2_ctrl_w );
DECLARE_READ64_MEMBER( dc_modem_r );
DECLARE_WRITE64_MEMBER( dc_modem_w );
DECLARE_READ64_MEMBER( dc_rtc_r );
DECLARE_WRITE64_MEMBER( dc_rtc_w );
DECLARE_READ32_MEMBER( dc_rtc_r );
DECLARE_WRITE32_MEMBER( dc_rtc_w );
DECLARE_WRITE8_MEMBER( g1_irq );
DECLARE_WRITE8_MEMBER( pvr_irq );

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@ -643,38 +643,29 @@ WRITE64_MEMBER(dc_state::dc_modem_w )
mame_printf_verbose("MODEM: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x600000+reg*4, dat, data, offset, mem_mask);
}
READ64_MEMBER(dc_state::dc_rtc_r )
READ32_MEMBER(dc_state::dc_rtc_r)
{
int reg;
UINT64 shift;
reg = decode_reg3216_64(offset, mem_mask, &shift);
mame_printf_verbose("RTC: Unmapped read %08x\n", 0x710000+reg*4);
return (UINT64)dc_rtcregister[reg] << shift;
return dc_rtcregister[offset];
}
WRITE64_MEMBER(dc_state::dc_rtc_w )
WRITE32_MEMBER(dc_state::dc_rtc_w)
{
int reg;
UINT64 shift;
UINT32 old,dat;
UINT32 old;
reg = decode_reg3216_64(offset, mem_mask, &shift);
dat = (UINT32)(data >> shift);
old = dc_rtcregister[reg];
dc_rtcregister[reg] = dat & 0xFFFF; // 5f6c00+off*4=dat
switch (reg)
old = dc_rtcregister[offset];
COMBINE_DATA(&dc_rtcregister[offset]);
switch (offset)
{
case RTC1:
if (dc_rtcregister[RTC3])
dc_rtcregister[RTC3] = 0;
else
dc_rtcregister[reg] = old;
dc_rtcregister[offset] = old;
break;
case RTC2:
if (dc_rtcregister[RTC3] == 0)
dc_rtcregister[reg] = old;
dc_rtcregister[offset] = old;
else
dc_rtc_timer->adjust(attotime::zero, 0, attotime::from_seconds(1));
break;
@ -682,7 +673,7 @@ WRITE64_MEMBER(dc_state::dc_rtc_w )
dc_rtcregister[RTC3] &= 1;
break;
}
mame_printf_verbose("RTC: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x710000 + reg*4, dat, data, offset, mem_mask);
//mame_printf_verbose("RTC: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x710000 + offset*4, data, offset, mem_mask);
}
TIMER_CALLBACK_MEMBER(dc_state::dc_rtc_increment)

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@ -116,9 +116,19 @@ WRITE64_MEMBER(dc_cons_state::dc_arm_w )
COMBINE_DATA((UINT64 *)dc_sound_ram.target() + offset);
}
READ8_MEMBER(dc_cons_state::dc_flash_r)
{
return m_dcflash->read(offset);
}
WRITE8_MEMBER(dc_cons_state::dc_flash_w)
{
m_dcflash->write(offset,data);
}
static ADDRESS_MAP_START( dc_map, AS_PROGRAM, 64, dc_cons_state )
AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_WRITENOP // BIOS
AM_RANGE(0x00200000, 0x0021ffff) AM_ROM AM_REGION("maincpu", 0x200000) // flash
AM_RANGE(0x00200000, 0x0021ffff) AM_READWRITE8(dc_flash_r,dc_flash_w, U64(0xffffffffffffffff))
AM_RANGE(0x005f6800, 0x005f69ff) AM_READWRITE(dc_sysctrl_r, dc_sysctrl_w )
AM_RANGE(0x005f6c00, 0x005f6cff) AM_DEVICE32( "maple_dc", maple_dc_device, amap, U64(0xffffffffffffffff) )
AM_RANGE(0x005f7000, 0x005f70ff) AM_READWRITE32(dc_mess_gdrom_r, dc_mess_gdrom_w, U64(0xffffffffffffffff) )
@ -128,7 +138,7 @@ static ADDRESS_MAP_START( dc_map, AS_PROGRAM, 64, dc_cons_state )
AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff))
AM_RANGE(0x00600000, 0x006007ff) AM_READWRITE(dc_modem_r, dc_modem_w )
AM_RANGE(0x00700000, 0x00707fff) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w )
AM_RANGE(0x00710000, 0x0071000f) AM_READWRITE(dc_rtc_r, dc_rtc_w )
AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE32(dc_rtc_r, dc_rtc_w, U64(0xffffffffffffffff) )
AM_RANGE(0x00800000, 0x009fffff) AM_READWRITE(dc_arm_r, dc_arm_w )
/* Area 1 */
@ -198,6 +208,8 @@ static MACHINE_CONFIG_START( dc, dc_cons_state )
MCFG_MACHINE_RESET_OVERRIDE(dc_cons_state,dc_console )
MCFG_MACRONIX_29LV160TMC_ADD("dcflash")
MCFG_MAPLE_DC_ADD( "maple_dc", "maincpu", dc_maple_irq )
MCFG_DC_CONTROLLER_ADD("dcctrl0", "maple_dc", 0, ":P1:0", ":P1:1", ":P1:A0", ":P1:A1", ":P1:A2", ":P1:A3", ":P1:A4", ":P1:A5")
MCFG_DC_CONTROLLER_ADD("dcctrl1", "maple_dc", 1, ":P2:0", ":P2:1", ":P2:A0", ":P2:A1", ":P2:A2", ":P2:A3", ":P2:A4", ":P2:A5")
@ -221,37 +233,47 @@ static MACHINE_CONFIG_START( dc, dc_cons_state )
MACHINE_CONFIG_END
ROM_START(dc)
ROM_REGION(0x220000, "maincpu", 0)
ROM_LOAD( "dc101d_us.bin", 0x000000, 0x200000, CRC(89f2b1a1) SHA1(8951d1bb219ab2ff8583033d2119c899cc81f18c) ) // BIOS
ROM_LOAD( "dcus_ntsc.bin", 0x200000, 0x020000, CRC(c611b498) SHA1(94d44d7f9529ec1642ba3771ed3c5f756d5bc872) ) // Flash
ROM_REGION(0x200000, "maincpu", 0)
ROM_LOAD( "dc101d_us.bin", 0x000000, 0x200000, CRC(89f2b1a1) SHA1(8951d1bb219ab2ff8583033d2119c899cc81f18c) ) // BIOS
ROM_REGION(0x020000, "dcflash", 0)
ROM_LOAD( "dcus_ntsc.bin", 0x000000, 0x020000, CRC(c611b498) SHA1(94d44d7f9529ec1642ba3771ed3c5f756d5bc872) ) // Flash
ROM_END
ROM_START( dceu )
ROM_REGION(0x220000, "maincpu", 0)
ROM_SYSTEM_BIOS(0, "101d", "v1.01d")
ROMX_LOAD( "dc101d_eu.bin", 0x000000, 0x200000, CRC(a2564fad) SHA1(edc5d3d70a93c935703d26119b37731fd317d2bf),ROM_BIOS(1)) // BIOS
ROM_SYSTEM_BIOS(1, "101c", "v1.01c")
ROMX_LOAD( "dc101c_eu.bin", 0x000000, 0x200000, CRC(2f551bc5) SHA1(1ede8d5be49116a4c6f3fe0961175469537a0434),ROM_BIOS(2)) // BIOS
ROM_LOAD( "dceu_pal.bin", 0x200000, 0x020000, CRC(b7e5aeeb) SHA1(11e02433e13b793ec7ffe0ae2356750bb8a575b4) ) // Flash
ROM_REGION(0x200000, "maincpu", 0)
ROM_SYSTEM_BIOS(0, "101d", "v1.01d")
ROMX_LOAD( "dc101d_eu.bin", 0x000000, 0x200000, CRC(a2564fad) SHA1(edc5d3d70a93c935703d26119b37731fd317d2bf),ROM_BIOS(1)) // BIOS
ROM_SYSTEM_BIOS(1, "101c", "v1.01c")
ROMX_LOAD( "dc101c_eu.bin", 0x000000, 0x200000, CRC(2f551bc5) SHA1(1ede8d5be49116a4c6f3fe0961175469537a0434),ROM_BIOS(2)) // BIOS
ROM_REGION(0x020000, "dcflash", 0)
ROM_LOAD( "dceu_pal.bin", 0x000000, 0x020000, CRC(b7e5aeeb) SHA1(11e02433e13b793ec7ffe0ae2356750bb8a575b4) ) // Flash
ROM_END
ROM_START( dcjp )
ROM_REGION(0x220000, "maincpu", 0)
ROM_LOAD( "dc1004jp.bin", 0x000000, 0x200000, CRC(5454841f) SHA1(1ea132c0fbbf07ef76789eadc07908045c089bd6) ) // BIOS
/* ROM_LOAD( "dcjp_ntsc.bad", 0x200000, 0x020000, BAD_DUMP CRC(307a7035) SHA1(1411423a9d071340ea52c56e19c1aafc4e1309ee) ) // Hacked Flash */
ROM_LOAD( "dcjp_ntsc.bin", 0x200000, 0x020000, CRC(5F92BF76) SHA1(BE78B834F512AB2CF3D67B96E377C9F3093FF82A) ) // Flash
ROM_REGION(0x200000, "maincpu", 0)
ROM_LOAD( "dc1004jp.bin", 0x000000, 0x200000, CRC(5454841f) SHA1(1ea132c0fbbf07ef76789eadc07908045c089bd6) ) // BIOS
ROM_REGION(0x020000, "dcflash", 0)
/* ROM_LOAD( "dcjp_ntsc.bad", 0x000000, 0x020000, BAD_DUMP CRC(307a7035) SHA1(1411423a9d071340ea52c56e19c1aafc4e1309ee) ) // Hacked Flash */
ROM_LOAD( "dcjp_ntsc.bin", 0x000000, 0x020000, CRC(5F92BF76) SHA1(BE78B834F512AB2CF3D67B96E377C9F3093FF82A) ) // Flash
ROM_END
ROM_START( dcdev )
ROM_REGION(0x220000, "maincpu", 0)
ROM_LOAD( "hkt-0120.bin", 0x000000, 0x200000, CRC(2186E0E5) SHA1(6BD18FB83F8FDB56F1941E079580E5DD672A6DAD) ) // BIOS
ROM_LOAD( "hkt-0120-flash.bin", 0x200000, 0x020000, CRC(7784C304) SHA1(31EF57F550D8CD13E40263CBC657253089E53034) ) // Flash
ROM_REGION(0x200000, "maincpu", 0)
ROM_LOAD( "hkt-0120.bin", 0x000000, 0x200000, CRC(2186E0E5) SHA1(6BD18FB83F8FDB56F1941E079580E5DD672A6DAD) ) // BIOS
ROM_REGION(0x020000, "dcflash", 0)
ROM_LOAD( "hkt-0120-flash.bin", 0x000000, 0x020000, CRC(7784C304) SHA1(31EF57F550D8CD13E40263CBC657253089E53034) ) // Flash
ROM_END
ROM_START( dcprt )
ROM_REGION(0x220000, "maincpu", 0)
ROM_REGION(0x200000, "maincpu", 0)
ROM_LOAD( "katana-set5-v0.41-98-08-27.bin", 0x000000, 0x200000, CRC(485877bd) SHA1(dc1af1f1248ffa87d57bc5ef2ea41aac95ecfc5e) ) // BIOS
ROM_LOAD( "dcjp_ntsc.bin", 0x200000, 0x020000, CRC(5F92BF76) SHA1(BE78B834F512AB2CF3D67B96E377C9F3093FF82A) ) // Flash
ROM_REGION(0x020000, "dcflash", 0)
ROM_LOAD( "dcjp_ntsc.bin", 0x000000, 0x020000, CRC(5F92BF76) SHA1(BE78B834F512AB2CF3D67B96E377C9F3093FF82A) ) // Flash
ROM_END
static INPUT_PORTS_START( dc )

View File

@ -1,13 +1,17 @@
#include "imagedev/chd_cd.h"
#include "machine/gdrom.h"
#include "machine/intelfsh.h"
class dc_cons_state : public dc_state
{
public:
dc_cons_state(const machine_config &mconfig, device_type type, const char *tag)
: dc_state(mconfig, type, tag)
: dc_state(mconfig, type, tag),
m_dcflash(*this, "dcflash")
{ }
required_device<macronix_29lv160tmc_device> m_dcflash;
DECLARE_DRIVER_INIT(dc);
DECLARE_DRIVER_INIT(dcus);
DECLARE_DRIVER_INIT(dcjp);
@ -36,10 +40,12 @@ public:
void dreamcast_atapi_init();
void dreamcast_atapi_reset();
inline int decode_reg32_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift);
READ32_MEMBER( dc_mess_gdrom_r );
WRITE32_MEMBER( dc_mess_gdrom_w );
READ32_MEMBER( dc_mess_g1_ctrl_r );
WRITE32_MEMBER( dc_mess_g1_ctrl_w );
DECLARE_READ32_MEMBER( dc_mess_gdrom_r );
DECLARE_WRITE32_MEMBER( dc_mess_gdrom_w );
DECLARE_READ32_MEMBER( dc_mess_g1_ctrl_r );
DECLARE_WRITE32_MEMBER( dc_mess_g1_ctrl_w );
DECLARE_READ8_MEMBER( dc_flash_r );
DECLARE_WRITE8_MEMBER( dc_flash_w );
private:
UINT64 PDTRA, PCTRA;