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https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
trident: MMIO WIP. To test with Win95, set the card ID to 0xe3.
This commit is contained in:
mahlemiut
parent
db7c71f93a
commit
6c39689691
@ -81,8 +81,8 @@ void isa8_svga_tgui9680_device::device_start()
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m_isa->install_device(0x3b0, 0x3bf, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03b0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03b0_w),m_vga));
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m_isa->install_device(0x3c0, 0x3cf, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03c0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03c0_w),m_vga));
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m_isa->install_device(0x3d0, 0x3df, 0, 0, read8_delegate(FUNC(trident_vga_device::port_03d0_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_03d0_w),m_vga));
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m_isa->install_device(0x83c4, 0x83cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_83c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_83c6_w),m_vga));
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m_isa->install_device(0x43c4, 0x43cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_43c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_43c6_w),m_vga));
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m_isa->install_device(0x83c4, 0x83cb, 0, 0, read8_delegate(FUNC(trident_vga_device::port_83c6_r),m_vga), write8_delegate(FUNC(trident_vga_device::port_83c6_w),m_vga));
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m_isa->install_memory(0xa0000, 0xbffff, 0, 0, read8_delegate(FUNC(trident_vga_device::mem_r),m_vga), write8_delegate(FUNC(trident_vga_device::mem_w),m_vga));
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@ -90,7 +90,7 @@ void isa8_svga_tgui9680_device::device_start()
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// m_isa->install_memory(0x4400000, 0x45fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
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// win95 drivers
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m_isa->install_memory(0x4000000, 0x41fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
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// m_isa->install_memory(0x4000000, 0x41fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
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// acceleration ports
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m_isa->install_device(0x2120, 0x21ff, 0, 0, read8_delegate(FUNC(trident_vga_device::accel_r),m_vga), write8_delegate(FUNC(trident_vga_device::accel_w),m_vga));
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@ -30,7 +30,7 @@ const device_type TRIDENT_VGA = &device_creator<trident_vga_device>;
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#define CRTC_PORT_ADDR ((vga.miscellaneous_output&1)?0x3d0:0x3b0)
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#define LOG (1)
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#define LOG_ACCEL (0)
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#define LOG_ACCEL (1)
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trident_vga_device::trident_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: svga_device(mconfig, TRIDENT_VGA, "Trident TGUI9680", tag, owner, clock, "trident_vga", __FILE__)
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@ -120,6 +120,9 @@ UINT32 trident_vga_device::handle_rop(UINT32 src, UINT32 dst)
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case 0x5a: // XOR PAT
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src = dst ^ src;
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break;
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case 0xb8: // PAT xor (SRC and (DST xor PAT)) (correct?)
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src = src & (dst ^ src);
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break;
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}
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return src;
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}
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@ -140,7 +143,7 @@ UINT32 trident_vga_device::READPIXEL(INT16 x,INT16 y)
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void trident_vga_device::WRITEPIXEL(INT16 x,INT16 y, UINT32 data)
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{
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if(svga.rgb8_en)
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WRITEPIXEL8(x,y,(((data >> 16) & 0xff) | ((data >> 8) & 0xff) | (data & 0xff))); // XFree86 3.3 sets bits 0-7 to 0 when using mono patterns, does it OR each byte?
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WRITEPIXEL8(x,y,(((data >> 8) & 0xff) | (data & 0xff))); // XFree86 3.3 sets bits 0-7 to 0 when using mono patterns, does it OR each byte?
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if(svga.rgb15_en)
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WRITEPIXEL15(x,y,data & 0x7fff);
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if(svga.rgb16_en)
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@ -184,14 +187,15 @@ void trident_vga_device::device_start()
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void trident_vga_device::device_reset()
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{
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svga_device::device_reset();
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svga.id = 0xd3; // identifies at TGUI9660XGi (set to 0xe3 to identify at TGUI9440AGi)
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svga.id = 0xd3; // 0xd3 identifies at TGUI9660XGi (set to 0xe3 to identify at TGUI9440AGi)
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tri.revision = 0x01; // revision identifies as TGUI9680
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tri.new_mode = false; // start up in old mode
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tri.dac_active = false;
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tri.linear_active = false;
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tri.mmio_active = false;
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tri.sr0f = 0x6f;
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tri.sr0c = 0x78;
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tri.sr0c = 0x70;
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tri.cr2a = 0x03; // set ISA interface?
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tri.mem_clock = 0x2c6; // 50MHz default
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tri.vid_clock = 0;
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tri.port_3c3 = true;
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@ -517,6 +521,9 @@ UINT8 trident_vga_device::trident_crtc_reg_read(UINT8 index)
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case 0x1f:
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res = tri.cr1f;
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break;
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case 0x20:
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res = tri.cr20;
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break;
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case 0x21:
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res = tri.cr21;
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break;
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@ -533,6 +540,9 @@ UINT8 trident_vga_device::trident_crtc_reg_read(UINT8 index)
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case 0x29:
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res = tri.cr29;
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break;
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case 0x2a:
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res = tri.cr2a;
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break;
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case 0x38:
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res = tri.pixel_depth;
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break;
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@ -618,12 +628,15 @@ void trident_vga_device::trident_crtc_reg_write(UINT8 index, UINT8 data)
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case 0x1f:
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tri.cr1f = data; // "Software Programming Register" written to by the BIOS
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break;
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case 0x20: // FIFO Control (old MMIO enable? no documentation of this register)
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tri.cr20 = data;
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break;
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case 0x21: // Linear aperture
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tri.cr21 = data;
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tri.linear_address = ((data & 0xc0)<<18) | ((data & 0x0f)<<20);
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tri.linear_active = data & 0x20;
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//if(tri.linear_active)
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//popmessage("Trident: Linear Aperture active - %08x, %s",tri.linear_address,(tri.cr21 & 0x10) ? "2MB" : "1MB" );
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if(tri.linear_active)
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popmessage("Trident: Linear Aperture active - %08x, %s",tri.linear_address,(tri.cr21 & 0x10) ? "2MB" : "1MB" );
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break;
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case 0x27:
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vga.crtc.start_addr = (vga.crtc.start_addr & 0xfff9ffff) | ((data & 0x03)<<17);
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@ -632,6 +645,9 @@ void trident_vga_device::trident_crtc_reg_write(UINT8 index, UINT8 data)
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tri.cr29 = data;
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vga.crtc.offset = (vga.crtc.offset & 0xfeff) | ((data & 0x10)<<4);
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break;
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case 0x2a:
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tri.cr2a = data;
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break;
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case 0x38:
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// bit 0: 16 bit bus
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// bits 2-3: pixel depth (1=15/16bit, 2=24/32bit, 0=anything else)
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@ -1006,8 +1022,36 @@ WRITE8_MEMBER(trident_vga_device::port_83c6_w)
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}
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}
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READ8_MEMBER(trident_vga_device::vram_r)
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{
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if (tri.linear_active)
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return vga.memory[offset % vga.svga_intf.vram_size];
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else
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return 0xff;
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}
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WRITE8_MEMBER(trident_vga_device::vram_w)
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{
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if (tri.linear_active)
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{
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if(tri.accel_memwrite_active)
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{
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tri.accel_transfer = (tri.accel_transfer & (~(0x000000ff << (24-(8*(offset % 4)))))) | (data << (24-(8 * (offset % 4))));
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if(offset % 4 == 3)
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accel_data_write(tri.accel_transfer);
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return;
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}
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vga.memory[offset % vga.svga_intf.vram_size] = data;
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}
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}
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READ8_MEMBER(trident_vga_device::mem_r )
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{
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if((tri.cr20 & 0x10) && (offset >= 0x1ff00)) // correct for old MMIO?
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{
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return old_mmio_r(space,offset-0x1ff00);
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}
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if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb32_en)
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{
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int data;
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@ -1029,6 +1073,12 @@ READ8_MEMBER(trident_vga_device::mem_r )
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WRITE8_MEMBER(trident_vga_device::mem_w)
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{
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if((tri.cr20 & 0x10) && (offset >= 0x1ff00)) // correct for old MMIO?
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{
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old_mmio_w(space,offset-0x1ff00,data);
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return;
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}
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if(tri.accel_memwrite_active)
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{
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tri.accel_transfer = (tri.accel_transfer & (~(0x000000ff << (24-(8*(offset % 4)))))) | (data << (24-(8 * (offset % 4))));
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@ -1054,6 +1104,27 @@ WRITE8_MEMBER(trident_vga_device::mem_w)
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vga_device::mem_w(space,offset,data,mem_mask);
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}
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// Old style MMIO (maps to 0xbff00)
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void trident_vga_device::old_mmio_w(address_space& space, UINT32 offset, UINT8 data)
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{
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if(offset >= 0x20)
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accel_w(space,offset-0x20,data);
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}
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UINT8 trident_vga_device::old_mmio_r(address_space& space, UINT32 offset)
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{
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if(offset == 0x20)
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{
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if(tri.accel_busy)
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return 0x20;
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}
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if(offset > 0x20)
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return accel_r(space,offset-0x20);
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else
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return 0x00;
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}
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// 2D Acceleration functions (very WIP)
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// From XFree86 source:
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@ -1131,6 +1202,8 @@ READ8_MEMBER(trident_vga_device::accel_r)
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else
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res = 0x00;
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break;
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// Operation mode:
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// bit 8: disable clipping if set
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case 0x02: // Operation Mode
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res = tri.accel_opermode & 0x00ff;
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break;
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@ -24,8 +24,8 @@ public:
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DECLARE_WRITE8_MEMBER(port_83c6_w);
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DECLARE_READ8_MEMBER(port_43c6_r);
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DECLARE_WRITE8_MEMBER(port_43c6_w);
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DECLARE_READ8_MEMBER(vram_r) { if (tri.linear_active) return vga.memory[offset % vga.svga_intf.vram_size]; else return 0xff; }
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DECLARE_WRITE8_MEMBER(vram_w) { if (tri.linear_active) vga.memory[offset % vga.svga_intf.vram_size] = data; }
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DECLARE_READ8_MEMBER(vram_r);
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DECLARE_WRITE8_MEMBER(vram_w);
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virtual READ8_MEMBER(mem_r);
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virtual WRITE8_MEMBER(mem_w);
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virtual UINT16 offset();
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@ -52,8 +52,10 @@ protected:
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UINT8 gc2f;
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UINT8 cr1e;
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UINT8 cr1f;
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UINT8 cr20;
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UINT8 cr21;
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UINT8 cr29;
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UINT8 cr2a;
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UINT8 cr39;
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UINT8 dac;
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UINT8 lutdac_reg[0x100];
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@ -120,6 +122,11 @@ private:
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int calculate_clock();
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// old style MMIO (0xBFF00)
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void old_mmio_w(address_space& space, UINT32 offset, UINT8 data);
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UINT8 old_mmio_r(address_space& space, UINT32 offset);
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// 2D acceleration
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void accel_command();
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void accel_bitblt();
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void accel_line();
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