From 88a206a764398a1a8b34a644d42805dd6b25cec2 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Mon, 31 Aug 2015 12:38:29 +0200 Subject: [PATCH 01/10] started work on Motorola MVME-350 --- src/mess/drivers/mvme350.c | 251 +++++++++++++++++++++++++++++++++++++ 1 file changed, 251 insertions(+) create mode 100644 src/mess/drivers/mvme350.c diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c new file mode 100644 index 00000000000..f65005716a5 --- /dev/null +++ b/src/mess/drivers/mvme350.c @@ -0,0 +1,251 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/*************************************************************************** + * + * Motorola MVME-350 6U Intelligent Tape Controller driver, initially derived + * from hk68v10.c + * + * 31/08/2015 + * + * I baught this board from http://www.retrotechnology.com without documentation. + * It has a Motorola 68010 CPU @ 10MHz, 128 Mb RAM and two 2764 EPROMS with + * QIC-02 tape controller firmware. The board also populates a 68230 PIT and loads + * of descrete TTL components. + * + * + * || + * || || + * ||||--|| + * ||||--|| + * || ||____________________________________________________________ ___ + * || |_| | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | |VME| + * || | | | + * || | |P1 | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || |_| | + * || |___| + * || | + * || | + * || | + * || | + * || | + * || | + * || | + * || | + * || |___ + * || _| | + * || | | | + * || | | | + * || | | | + * || | | | + * || | |VME| + * || | | | + * || | |P2 | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || |_| | + * || |___| + * || ||------------------------------------------------------------+-+ + * ||||--|| + * ||||--|| + * || + * + * History of Motorola VME division + *--------------------------------- + * TBD + * + * Misc links about Motorola VME division and this board: + * + * Address Map + * -------------------------------------------------------------------------- + * Local to VME Decscription + * -------------------------------------------------------------------------- + * 0xffffff To of A24 + * 0xfc0000 + * 0x200000 (top of 2 meg RAM) + * 0x100000 (top of 1 meg RAM) + * Exception Vectors + * 0x000000 (bottom of memory) + * -------------------------------------------------------------------------- + * + * Interrupt sources MVME + * ---------------------------------------------------------- + * Description Device Lvl IRQ VME board + * /Board Vector Address + * ---------------------------------------------------------- + * On board Sources + * + * Off board Sources (other VME boards) + * + * ---------------------------------------------------------- + * + * DMAC Channel Assignments + * ---------------------------------------------------------- + * Channel M10 V10 + * ---------------------------------------------------------- + * + * + * TODO: + * - Dump the ROMs (DONE) + * - Setup a working address map + * - Get documentation for VME interface + * - Add VME bus driver + * - Hook up a CPU board that supports boot from tape (ie MVME-162, MVME 147) + * - Get a tape file with a bootable data on it. + * + ****************************************************************************/ + +#include "emu.h" +#include "cpu/m68000/m68000.h" + +#define LOG(x) x + +class mvme350_state : public driver_device +{ +public: +mvme350_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device (mconfig, type, tag), + m_maincpu (*this, "maincpu") +{ +} + + //DECLARE_READ16_MEMBER (bootvect_r); + //DECLARE_WRITE16_MEMBER (bootvect_w); +DECLARE_READ16_MEMBER (vme_a24_r); +DECLARE_WRITE16_MEMBER (vme_a24_w); +DECLARE_READ16_MEMBER (vme_a16_r); +DECLARE_WRITE16_MEMBER (vme_a16_w); +virtual void machine_start (); +virtual void machine_reset (); +protected: + +private: +required_device m_maincpu; + +// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses +// UINT16 *m_sysrom; +// UINT16 m_sysram[4]; +}; + +static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) +ADDRESS_MAP_UNMAP_HIGH +//AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just durin reset */ +//AM_RANGE (0x000000, 0x000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */ +//AM_RANGE (0x000008, 0x0fffff) AM_RAM /* 1 Mb RAM */ +AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ +AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ +//AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ +//AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ +ADDRESS_MAP_END + +/* Input ports */ +static INPUT_PORTS_START (mvme350) +INPUT_PORTS_END + +/* Start it up */ +void mvme350_state::machine_start () +{ + LOG (logerror ("machine_start\n")); + + /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ + // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); +} + +/* Support CPU resets + + TODO: Investigate why the user need two 'softreset' commands for the below to work. + If only one 'softreset' is given the reset PC gets the RAM content, not the intended ROM vector. + Race conditions? Wrong call order in memory system? Debugger prefetch accesses? +*/ +void mvme350_state::machine_reset () +{ + LOG (logerror ("machine_reset\n")); + + /* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */ + // if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */ + // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); +} + +#if 0 +/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xfc0000 to 0x0 at reset*/ +READ16_MEMBER (mvme350_state::bootvect_r){ + //LOG (logerror ("bootvect_r %s\n", m_sysrom != &m_sysram[0] ? "as reset" : "as swapped")); + return m_sysrom [offset]; +} + +WRITE16_MEMBER (mvme350_state::bootvect_w){ + LOG (logerror("bootvect_w offset %08x, mask %08x, data %04x\n", offset, mem_mask, data)); + m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask; + m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask); + m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset. +} + +/* Dummy VME access methods until the VME bus device is ready for use */ +READ16_MEMBER (mvme350_state::vme_a24_r){ + LOG (logerror ("vme_a24_r\n")); + return (UINT16) 0; +} + +WRITE16_MEMBER (mvme350_state::vme_a24_w){ + LOG (logerror ("vme_a24_w\n")); +} + +READ16_MEMBER (mvme350_state::vme_a16_r){ + LOG (logerror ("vme_16_r\n")); + return (UINT16) 0; +} + +WRITE16_MEMBER (mvme350_state::vme_a16_w){ + LOG (logerror ("vme_a16_w\n")); +} +#endif + +/* + * Machine configuration + */ +static MACHINE_CONFIG_START (mvme350, mvme350_state) +/* basic machine hardware */ +MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) +MCFG_CPU_PROGRAM_MAP (mvme350_mem) + +/* Terminal Port config */ + +MACHINE_CONFIG_END + +/* ROM definitions */ +ROM_START (mvme350) +ROM_REGION (0x1000000, "maincpu", 0) + +ROM_LOAD16_BYTE ("hk68kv10U23.bin", 0xFC0001, 0x2000, CRC (632aa026) SHA1 (f2b1ed0cc38dfbeb1602c013e00757015400720d)) +ROM_LOAD16_BYTE ("hk68kv10U12.bin", 0xFC0000, 0x2000, CRC (f2d688e9) SHA1 (e68699965645f0ce53de47625163c3eb02c8b727)) + +/* + * System ROM information + * + * The ROMs known commands from different sources: + * + * TBD + * + */ +ROM_END + +/* Driver */ +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP (1985, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_IS_SKELETON ) From 4d472a55608c0e7b2a27edd0798bd1b63972ce63 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Mon, 31 Aug 2015 23:15:51 +0200 Subject: [PATCH 02/10] System ROM up and running, ROM/RAM adress map ok, started to add PIT --- src/mess/drivers/mvme350.c | 74 ++++++++++++-------------------------- 1 file changed, 22 insertions(+), 52 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index f65005716a5..f5e8e7eb32e 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -71,18 +71,16 @@ *--------------------------------- * TBD * - * Misc links about Motorola VME division and this board: + * Misc links about Motorola VME division and this board: TBD * * Address Map * -------------------------------------------------------------------------- * Local to VME Decscription * -------------------------------------------------------------------------- - * 0xffffff To of A24 - * 0xfc0000 - * 0x200000 (top of 2 meg RAM) - * 0x100000 (top of 1 meg RAM) - * Exception Vectors - * 0x000000 (bottom of memory) + * 0x000000 Up to 128Kb System ROM with RESET vector + * 0x020000 RAM with vectors + * 0x020500 RAM Top of stack + * 0x040000 PIT device * -------------------------------------------------------------------------- * * Interrupt sources MVME @@ -114,6 +112,7 @@ #include "emu.h" #include "cpu/m68000/m68000.h" +#include "machine/68230pit.h" #define LOG(x) x @@ -122,12 +121,11 @@ class mvme350_state : public driver_device public: mvme350_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device (mconfig, type, tag), - m_maincpu (*this, "maincpu") + m_maincpu (*this, "maincpu"), + m_pit(*this, "pit") { } - //DECLARE_READ16_MEMBER (bootvect_r); - //DECLARE_WRITE16_MEMBER (bootvect_w); DECLARE_READ16_MEMBER (vme_a24_r); DECLARE_WRITE16_MEMBER (vme_a24_w); DECLARE_READ16_MEMBER (vme_a16_r); @@ -137,20 +135,16 @@ virtual void machine_reset (); protected: private: -required_device m_maincpu; + required_device m_maincpu; + required_device m_pit; -// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses -// UINT16 *m_sysrom; -// UINT16 m_sysram[4]; }; static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) ADDRESS_MAP_UNMAP_HIGH -//AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just durin reset */ -//AM_RANGE (0x000000, 0x000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */ -//AM_RANGE (0x000008, 0x0fffff) AM_RAM /* 1 Mb RAM */ AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ +//AM_RANGE(0x060000, 0x060035) AM_DEVREADWRITE8("pit", pit68230_device, data_r, data_w, 0x00ff) //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ //AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ ADDRESS_MAP_END @@ -163,40 +157,14 @@ INPUT_PORTS_END void mvme350_state::machine_start () { LOG (logerror ("machine_start\n")); - - /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ - // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); } -/* Support CPU resets - - TODO: Investigate why the user need two 'softreset' commands for the below to work. - If only one 'softreset' is given the reset PC gets the RAM content, not the intended ROM vector. - Race conditions? Wrong call order in memory system? Debugger prefetch accesses? -*/ void mvme350_state::machine_reset () { LOG (logerror ("machine_reset\n")); - - /* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */ - // if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */ - // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); } #if 0 -/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xfc0000 to 0x0 at reset*/ -READ16_MEMBER (mvme350_state::bootvect_r){ - //LOG (logerror ("bootvect_r %s\n", m_sysrom != &m_sysram[0] ? "as reset" : "as swapped")); - return m_sysrom [offset]; -} - -WRITE16_MEMBER (mvme350_state::bootvect_w){ - LOG (logerror("bootvect_w offset %08x, mask %08x, data %04x\n", offset, mem_mask, data)); - m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask; - m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask); - m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset. -} - /* Dummy VME access methods until the VME bus device is ready for use */ READ16_MEMBER (mvme350_state::vme_a24_r){ LOG (logerror ("vme_a24_r\n")); @@ -221,11 +189,11 @@ WRITE16_MEMBER (mvme350_state::vme_a16_w){ * Machine configuration */ static MACHINE_CONFIG_START (mvme350, mvme350_state) -/* basic machine hardware */ -MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) -MCFG_CPU_PROGRAM_MAP (mvme350_mem) - -/* Terminal Port config */ + /* basic machine hardware */ + MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) + MCFG_CPU_PROGRAM_MAP (mvme350_mem) + /* PIT Parallel Interface and Timer device, assuming strapped for on board clock */ + MCFG_DEVICE_ADD("pit", PIT68230, XTAL_16MHz / 2) MACHINE_CONFIG_END @@ -233,16 +201,18 @@ MACHINE_CONFIG_END ROM_START (mvme350) ROM_REGION (0x1000000, "maincpu", 0) -ROM_LOAD16_BYTE ("hk68kv10U23.bin", 0xFC0001, 0x2000, CRC (632aa026) SHA1 (f2b1ed0cc38dfbeb1602c013e00757015400720d)) -ROM_LOAD16_BYTE ("hk68kv10U12.bin", 0xFC0000, 0x2000, CRC (f2d688e9) SHA1 (e68699965645f0ce53de47625163c3eb02c8b727)) +ROM_LOAD16_BYTE ("mvme350U40v2.3.bin", 0x0000, 0x4000, CRC (bcef82ef) SHA1 (e6fdf26e4714cbaeb3e97d7b5acf02d64d8ad744)) +ROM_LOAD16_BYTE ("mvme350U47v2.3.bin", 0x0001, 0x4000, CRC (582ce095) SHA1 (d0929dbfeb0cfda63df6b5bc29ee27fbf665def7)) /* * System ROM information * * The ROMs known commands from different sources: * - * TBD - * + * NONE + * + * This is controller board which sets up the board and then executes a STOP instruction + * awaiting a CPU on the VME bus to request its services. */ ROM_END From 97034c58096cba440c31b7e1dab881598a04b486 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Tue, 1 Sep 2015 21:50:28 +0200 Subject: [PATCH 03/10] Improved address map and filled the PCB outline --- src/mess/drivers/mvme350.c | 104 ++++++++++++++++++++----------------- 1 file changed, 55 insertions(+), 49 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index f5e8e7eb32e..a6b7c224e2d 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -17,51 +17,51 @@ * || || * ||||--|| * ||||--|| - * || ||____________________________________________________________ ___ - * || |_| | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | |VME| - * || | | | - * || | |P1 | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || |_| | - * || |___| - * || | - * || | - * || | - * || | - * || | - * || | - * || | - * || | - * || |___ - * || _| | - * || | | | - * || | | | - * || | | | - * || | | | - * || | |VME| - * || | | | - * || | |P2 | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || |_| | - * || |___| + * || ||__________________________________________________________ ___ + * ||_______________________________________________________ |_| | + * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | | + * || |______|________|_________|___________| ________| | | | + * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | | + * || |______|________|_________|___________| ________| | | | + * || |74LS02| 74LS08||Am25LS251| 74S38 |74LS20|Jumpers | | | + * || |______|_______||_________|_______|______|______| | |VME| + * || |74F04 | 74LS32||74LS374 | 74LS374 |74S244 | | | | + * ||+---+ |______|_______||_________|___________|_________| | |P1 | + * |||CON| |74F04 | 74LS85||74S244 | 74S240 |PAL | | | | + * ||| | |______|_______||_________|___________|_________| | | | + * ||| | |74LS04| | |74S244 | | | | + * ||| | |______| | PIT |_________| | | | + * ||| | |74LS125 | MC68230L10 |74LS145 | | | | + * ||| | |______| __|_______________________|---------| | | | + * ||| | |74LS74| |25LS251 | | RAM |74S244 | |_| | + * ||+---+ ---------- |---------- | HM6264P-12 |---------| |___| + * || | PAL | | 74245 | |______________|74S244 | | + * || +--------- |_________| | U40 27128 |---------| | + * || | 74F32 | | || System ROM |74LS682 | | + * || +-------- | CPU || |-+-------| | + * FAIL ||LED | 74F138| | MC68010 |+--------------+ |DIPSW__| | + * || +-------- | || RAM | |74S38 | | + * HALT ||LED | 74F32 | |__________|| HM6264P-12 | |______ | | + * || +-------+ |74245 |+--------------+ |74F08 | | + * RUN ||LED |XTAL | |__________|| U47 27128 | |______ | |___ + * ||+---+|20MHz | |74244 || System ROM | |74F00 | _| | + * |||CON|--------+___|__________|+--------------+_|_______| | | | + * ||| |74LS08 |74F74 |74LS148| |PAL | | PAL | | | | + * ||| |________|________|_______| |________|_|_________| | | | + * ||| | 74LS138|74F32 | PAL | |74F74 |Am29823 | | | | + * ||| |________|________|_______| |________|-+---------| | |VME| + * ||| | 74LS11 |74F04 |74LS374| |74LS374 | |74S240 | | | | + * ||| |________|________|_______| |________|_|---------| | |P2 | + * ||| | 74F138 |BLANK |74LS374| |74LS374 |74S240 | | | | + * ||| |________|________|_______| +----------+---------| | | | + * ||| | 74LS08 |74F32 |74LS11|74LS393|74LS393|resistors | | | + * ||| |________|________|______|______ |_______|________| | | | + * ||| |DM2585 |74F74 |DM2230| 74LS00| 74F02 |74F32 | | | | + * ||+---+--------+--------+------+-------+---------+------| | | | + * || |74LS74 |74F20 |74S260| 74S74 | 74F08 |74LS02| | | | + * || +------------------------------------------+------| | | | + * || |DM2353 |74F10 |74F32 | 74LS32| 74F08 |DM2353| |_| | + * || +------------------------------------------+------+-+ |___| * || ||------------------------------------------------------------+-+ * ||||--|| * ||||--|| @@ -80,7 +80,9 @@ * 0x000000 Up to 128Kb System ROM with RESET vector * 0x020000 RAM with vectors * 0x020500 RAM Top of stack - * 0x040000 PIT device + * 0x040000 PIT device? + * 0x060000 RAM? + * 0x080000 PIT device? * -------------------------------------------------------------------------- * * Interrupt sources MVME @@ -142,9 +144,13 @@ private: static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) ADDRESS_MAP_UNMAP_HIGH -AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ -AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ -//AM_RANGE(0x060000, 0x060035) AM_DEVREADWRITE8("pit", pit68230_device, data_r, data_w, 0x00ff) + AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ + AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ +#if 1 + AM_RANGE(0x040000, 0x040035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/ + AM_RANGE(0x060000, 0x06001f) AM_RAM /* Area is cleared on start */ + AM_RANGE(0x080000, 0x080035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/ +#endif //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ //AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ ADDRESS_MAP_END From cb4668e0d0c9f3788d061af174a069561a623d72 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joakim=20Larsson=20Edstr=C3=B6m?= Date: Tue, 1 Sep 2015 22:12:06 +0200 Subject: [PATCH 04/10] Added color info of LEDs in PCB overview --- src/mess/drivers/mvme350.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index a6b7c224e2d..2e8c0d2a021 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -38,11 +38,11 @@ * || | PAL | | 74245 | |______________|74S244 | | * || +--------- |_________| | U40 27128 |---------| | * || | 74F32 | | || System ROM |74LS682 | | - * || +-------- | CPU || |-+-------| | + * Red || +-------- | CPU || |-+-------| | * FAIL ||LED | 74F138| | MC68010 |+--------------+ |DIPSW__| | - * || +-------- | || RAM | |74S38 | | + * Red || +-------- | || RAM | |74S38 | | * HALT ||LED | 74F32 | |__________|| HM6264P-12 | |______ | | - * || +-------+ |74245 |+--------------+ |74F08 | | + * Green || +-------+ |74245 |+--------------+ |74F08 | | * RUN ||LED |XTAL | |__________|| U47 27128 | |______ | |___ * ||+---+|20MHz | |74244 || System ROM | |74F00 | _| | * |||CON|--------+___|__________|+--------------+_|_______| | | | From 24b21095e0fbe8d356a0fbd7c30b653d091706e6 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Mon, 21 Sep 2015 23:29:14 +0200 Subject: [PATCH 05/10] cleaning up and adding some historical info about the boards origin --- src/mess/drivers/mvme350.c | 46 +++++++++++++++++++++++++++++++------- 1 file changed, 38 insertions(+), 8 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index 2e8c0d2a021..c93e1900c1c 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -67,11 +67,38 @@ * ||||--|| * || * - * History of Motorola VME division + * History of Motorola VME division (https://en.wikipedia.org/wiki/VMEbus) *--------------------------------- - * TBD + * When Motorola released the 68000 processor 1979 the ambition of the deisgners + * was also to standardize a versatile CPU bus to be able to build computer + * systems without constructing PCB:s from scratch. This become VersaBus but the + * boards was really too big and the computer world already saw the systems shrink + * in size. Motorola's design center in Munich proposed to use the smaller and + * already used Euroboard form factor and call it Versabus-E. This later became + * VME which was standardized in the VITA organization 1981 * - * Misc links about Motorola VME division and this board: TBD + * Misc links about Motorola VME division and this board: + * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf + * + * Description + * ------------ + * Streaming Tape Controller released 1984 with the following feature set + * + * - Double High (6U) VMEmodule + * - QIC-02 Streaming Tape Interface + * - Supports One 01C-02 compatible 1/4-inch Streaming Tape Drive + * - Standard VMEbus Interface + * - Supports 24- or 32-bit DMA Addressing/16-bit Data + * - Generates Seven Levels of VMEbus Interrupts with Programmable Interrupt Vector + * - 10 MHz MC68010 Microprocessor + * - 90Kb/s Continuous Transfer Rate for QIC-02 Interface, 200Kb/s Burst rate + * - Controls Tape Cartridges Offering 20Mb, 45Mb and 60Mb of Formatted Data Storage + * - MC68230 PIT-based Timer + * - 16Kb of Static RAM Provides Buffer Storage and CPU Workspace + * - Multitasking Kernel-based Firmware Package + * - Buffered Pipe Communication Protocol Allows Multiple Hosts to Oueue Commands Without Interlock + * - High Level Command/Status Packets offer efficient Operating System Support + * - Permits Chaining of Host Command * * Address Map * -------------------------------------------------------------------------- @@ -104,7 +131,7 @@ * * TODO: * - Dump the ROMs (DONE) - * - Setup a working address map + * - Setup a working address map (STARTED) * - Get documentation for VME interface * - Add VME bus driver * - Hook up a CPU board that supports boot from tape (ie MVME-162, MVME 147) @@ -215,13 +242,16 @@ ROM_LOAD16_BYTE ("mvme350U47v2.3.bin", 0x0001, 0x4000, CRC (582ce095) SHA1 (d092 * * The ROMs known commands from different sources: * - * NONE + * It communicates with the master through data buffers in shared memory and VME bus interrupts + * as desribed in + * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf * - * This is controller board which sets up the board and then executes a STOP instruction - * awaiting a CPU on the VME bus to request its services. + * The board is pretty boring as stand alone, it initializes everything and then executes a STOP instruction + * awaiting a CPU on the VME bus to request its services. However, it enables boot from tape devices, we just + * need a MVME-131 and a dump of a VersaDOS or Motorola UNIX System V system tape and some work. */ ROM_END /* Driver */ /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP (1985, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_IS_SKELETON ) +COMP (1984, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER ) From 00bfb01e9bc8757329b68274692211d24b60240b Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Mon, 31 Aug 2015 12:38:29 +0200 Subject: [PATCH 06/10] started work on Motorola MVME-350 --- src/mess/drivers/mvme350.c | 251 +++++++++++++++++++++++++++++++++++++ 1 file changed, 251 insertions(+) create mode 100644 src/mess/drivers/mvme350.c diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c new file mode 100644 index 00000000000..f65005716a5 --- /dev/null +++ b/src/mess/drivers/mvme350.c @@ -0,0 +1,251 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/*************************************************************************** + * + * Motorola MVME-350 6U Intelligent Tape Controller driver, initially derived + * from hk68v10.c + * + * 31/08/2015 + * + * I baught this board from http://www.retrotechnology.com without documentation. + * It has a Motorola 68010 CPU @ 10MHz, 128 Mb RAM and two 2764 EPROMS with + * QIC-02 tape controller firmware. The board also populates a 68230 PIT and loads + * of descrete TTL components. + * + * + * || + * || || + * ||||--|| + * ||||--|| + * || ||____________________________________________________________ ___ + * || |_| | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | |VME| + * || | | | + * || | |P1 | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || |_| | + * || |___| + * || | + * || | + * || | + * || | + * || | + * || | + * || | + * || | + * || |___ + * || _| | + * || | | | + * || | | | + * || | | | + * || | | | + * || | |VME| + * || | | | + * || | |P2 | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || | | | + * || |_| | + * || |___| + * || ||------------------------------------------------------------+-+ + * ||||--|| + * ||||--|| + * || + * + * History of Motorola VME division + *--------------------------------- + * TBD + * + * Misc links about Motorola VME division and this board: + * + * Address Map + * -------------------------------------------------------------------------- + * Local to VME Decscription + * -------------------------------------------------------------------------- + * 0xffffff To of A24 + * 0xfc0000 + * 0x200000 (top of 2 meg RAM) + * 0x100000 (top of 1 meg RAM) + * Exception Vectors + * 0x000000 (bottom of memory) + * -------------------------------------------------------------------------- + * + * Interrupt sources MVME + * ---------------------------------------------------------- + * Description Device Lvl IRQ VME board + * /Board Vector Address + * ---------------------------------------------------------- + * On board Sources + * + * Off board Sources (other VME boards) + * + * ---------------------------------------------------------- + * + * DMAC Channel Assignments + * ---------------------------------------------------------- + * Channel M10 V10 + * ---------------------------------------------------------- + * + * + * TODO: + * - Dump the ROMs (DONE) + * - Setup a working address map + * - Get documentation for VME interface + * - Add VME bus driver + * - Hook up a CPU board that supports boot from tape (ie MVME-162, MVME 147) + * - Get a tape file with a bootable data on it. + * + ****************************************************************************/ + +#include "emu.h" +#include "cpu/m68000/m68000.h" + +#define LOG(x) x + +class mvme350_state : public driver_device +{ +public: +mvme350_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device (mconfig, type, tag), + m_maincpu (*this, "maincpu") +{ +} + + //DECLARE_READ16_MEMBER (bootvect_r); + //DECLARE_WRITE16_MEMBER (bootvect_w); +DECLARE_READ16_MEMBER (vme_a24_r); +DECLARE_WRITE16_MEMBER (vme_a24_w); +DECLARE_READ16_MEMBER (vme_a16_r); +DECLARE_WRITE16_MEMBER (vme_a16_w); +virtual void machine_start (); +virtual void machine_reset (); +protected: + +private: +required_device m_maincpu; + +// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses +// UINT16 *m_sysrom; +// UINT16 m_sysram[4]; +}; + +static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) +ADDRESS_MAP_UNMAP_HIGH +//AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just durin reset */ +//AM_RANGE (0x000000, 0x000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */ +//AM_RANGE (0x000008, 0x0fffff) AM_RAM /* 1 Mb RAM */ +AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ +AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ +//AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ +//AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ +ADDRESS_MAP_END + +/* Input ports */ +static INPUT_PORTS_START (mvme350) +INPUT_PORTS_END + +/* Start it up */ +void mvme350_state::machine_start () +{ + LOG (logerror ("machine_start\n")); + + /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ + // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); +} + +/* Support CPU resets + + TODO: Investigate why the user need two 'softreset' commands for the below to work. + If only one 'softreset' is given the reset PC gets the RAM content, not the intended ROM vector. + Race conditions? Wrong call order in memory system? Debugger prefetch accesses? +*/ +void mvme350_state::machine_reset () +{ + LOG (logerror ("machine_reset\n")); + + /* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */ + // if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */ + // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); +} + +#if 0 +/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xfc0000 to 0x0 at reset*/ +READ16_MEMBER (mvme350_state::bootvect_r){ + //LOG (logerror ("bootvect_r %s\n", m_sysrom != &m_sysram[0] ? "as reset" : "as swapped")); + return m_sysrom [offset]; +} + +WRITE16_MEMBER (mvme350_state::bootvect_w){ + LOG (logerror("bootvect_w offset %08x, mask %08x, data %04x\n", offset, mem_mask, data)); + m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask; + m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask); + m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset. +} + +/* Dummy VME access methods until the VME bus device is ready for use */ +READ16_MEMBER (mvme350_state::vme_a24_r){ + LOG (logerror ("vme_a24_r\n")); + return (UINT16) 0; +} + +WRITE16_MEMBER (mvme350_state::vme_a24_w){ + LOG (logerror ("vme_a24_w\n")); +} + +READ16_MEMBER (mvme350_state::vme_a16_r){ + LOG (logerror ("vme_16_r\n")); + return (UINT16) 0; +} + +WRITE16_MEMBER (mvme350_state::vme_a16_w){ + LOG (logerror ("vme_a16_w\n")); +} +#endif + +/* + * Machine configuration + */ +static MACHINE_CONFIG_START (mvme350, mvme350_state) +/* basic machine hardware */ +MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) +MCFG_CPU_PROGRAM_MAP (mvme350_mem) + +/* Terminal Port config */ + +MACHINE_CONFIG_END + +/* ROM definitions */ +ROM_START (mvme350) +ROM_REGION (0x1000000, "maincpu", 0) + +ROM_LOAD16_BYTE ("hk68kv10U23.bin", 0xFC0001, 0x2000, CRC (632aa026) SHA1 (f2b1ed0cc38dfbeb1602c013e00757015400720d)) +ROM_LOAD16_BYTE ("hk68kv10U12.bin", 0xFC0000, 0x2000, CRC (f2d688e9) SHA1 (e68699965645f0ce53de47625163c3eb02c8b727)) + +/* + * System ROM information + * + * The ROMs known commands from different sources: + * + * TBD + * + */ +ROM_END + +/* Driver */ +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP (1985, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_IS_SKELETON ) From ac9da1ef31ad04974d91eec405eeb22aa2a7b6c9 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Mon, 31 Aug 2015 23:15:51 +0200 Subject: [PATCH 07/10] System ROM up and running, ROM/RAM adress map ok, started to add PIT --- src/mess/drivers/mvme350.c | 74 ++++++++++++-------------------------- 1 file changed, 22 insertions(+), 52 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index f65005716a5..f5e8e7eb32e 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -71,18 +71,16 @@ *--------------------------------- * TBD * - * Misc links about Motorola VME division and this board: + * Misc links about Motorola VME division and this board: TBD * * Address Map * -------------------------------------------------------------------------- * Local to VME Decscription * -------------------------------------------------------------------------- - * 0xffffff To of A24 - * 0xfc0000 - * 0x200000 (top of 2 meg RAM) - * 0x100000 (top of 1 meg RAM) - * Exception Vectors - * 0x000000 (bottom of memory) + * 0x000000 Up to 128Kb System ROM with RESET vector + * 0x020000 RAM with vectors + * 0x020500 RAM Top of stack + * 0x040000 PIT device * -------------------------------------------------------------------------- * * Interrupt sources MVME @@ -114,6 +112,7 @@ #include "emu.h" #include "cpu/m68000/m68000.h" +#include "machine/68230pit.h" #define LOG(x) x @@ -122,12 +121,11 @@ class mvme350_state : public driver_device public: mvme350_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device (mconfig, type, tag), - m_maincpu (*this, "maincpu") + m_maincpu (*this, "maincpu"), + m_pit(*this, "pit") { } - //DECLARE_READ16_MEMBER (bootvect_r); - //DECLARE_WRITE16_MEMBER (bootvect_w); DECLARE_READ16_MEMBER (vme_a24_r); DECLARE_WRITE16_MEMBER (vme_a24_w); DECLARE_READ16_MEMBER (vme_a16_r); @@ -137,20 +135,16 @@ virtual void machine_reset (); protected: private: -required_device m_maincpu; + required_device m_maincpu; + required_device m_pit; -// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses -// UINT16 *m_sysrom; -// UINT16 m_sysram[4]; }; static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) ADDRESS_MAP_UNMAP_HIGH -//AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just durin reset */ -//AM_RANGE (0x000000, 0x000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */ -//AM_RANGE (0x000008, 0x0fffff) AM_RAM /* 1 Mb RAM */ AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ +//AM_RANGE(0x060000, 0x060035) AM_DEVREADWRITE8("pit", pit68230_device, data_r, data_w, 0x00ff) //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ //AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ ADDRESS_MAP_END @@ -163,40 +157,14 @@ INPUT_PORTS_END void mvme350_state::machine_start () { LOG (logerror ("machine_start\n")); - - /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ - // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); } -/* Support CPU resets - - TODO: Investigate why the user need two 'softreset' commands for the below to work. - If only one 'softreset' is given the reset PC gets the RAM content, not the intended ROM vector. - Race conditions? Wrong call order in memory system? Debugger prefetch accesses? -*/ void mvme350_state::machine_reset () { LOG (logerror ("machine_reset\n")); - - /* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */ - // if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */ - // m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x0fc0000); } #if 0 -/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xfc0000 to 0x0 at reset*/ -READ16_MEMBER (mvme350_state::bootvect_r){ - //LOG (logerror ("bootvect_r %s\n", m_sysrom != &m_sysram[0] ? "as reset" : "as swapped")); - return m_sysrom [offset]; -} - -WRITE16_MEMBER (mvme350_state::bootvect_w){ - LOG (logerror("bootvect_w offset %08x, mask %08x, data %04x\n", offset, mem_mask, data)); - m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask; - m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask); - m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset. -} - /* Dummy VME access methods until the VME bus device is ready for use */ READ16_MEMBER (mvme350_state::vme_a24_r){ LOG (logerror ("vme_a24_r\n")); @@ -221,11 +189,11 @@ WRITE16_MEMBER (mvme350_state::vme_a16_w){ * Machine configuration */ static MACHINE_CONFIG_START (mvme350, mvme350_state) -/* basic machine hardware */ -MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) -MCFG_CPU_PROGRAM_MAP (mvme350_mem) - -/* Terminal Port config */ + /* basic machine hardware */ + MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) + MCFG_CPU_PROGRAM_MAP (mvme350_mem) + /* PIT Parallel Interface and Timer device, assuming strapped for on board clock */ + MCFG_DEVICE_ADD("pit", PIT68230, XTAL_16MHz / 2) MACHINE_CONFIG_END @@ -233,16 +201,18 @@ MACHINE_CONFIG_END ROM_START (mvme350) ROM_REGION (0x1000000, "maincpu", 0) -ROM_LOAD16_BYTE ("hk68kv10U23.bin", 0xFC0001, 0x2000, CRC (632aa026) SHA1 (f2b1ed0cc38dfbeb1602c013e00757015400720d)) -ROM_LOAD16_BYTE ("hk68kv10U12.bin", 0xFC0000, 0x2000, CRC (f2d688e9) SHA1 (e68699965645f0ce53de47625163c3eb02c8b727)) +ROM_LOAD16_BYTE ("mvme350U40v2.3.bin", 0x0000, 0x4000, CRC (bcef82ef) SHA1 (e6fdf26e4714cbaeb3e97d7b5acf02d64d8ad744)) +ROM_LOAD16_BYTE ("mvme350U47v2.3.bin", 0x0001, 0x4000, CRC (582ce095) SHA1 (d0929dbfeb0cfda63df6b5bc29ee27fbf665def7)) /* * System ROM information * * The ROMs known commands from different sources: * - * TBD - * + * NONE + * + * This is controller board which sets up the board and then executes a STOP instruction + * awaiting a CPU on the VME bus to request its services. */ ROM_END From d8f5649a25b404923785a4103bae780fa65e5dd8 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Tue, 1 Sep 2015 21:50:28 +0200 Subject: [PATCH 08/10] Improved address map and filled the PCB outline --- src/mess/drivers/mvme350.c | 104 ++++++++++++++++++++----------------- 1 file changed, 55 insertions(+), 49 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index f5e8e7eb32e..a6b7c224e2d 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -17,51 +17,51 @@ * || || * ||||--|| * ||||--|| - * || ||____________________________________________________________ ___ - * || |_| | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | |VME| - * || | | | - * || | |P1 | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || |_| | - * || |___| - * || | - * || | - * || | - * || | - * || | - * || | - * || | - * || | - * || |___ - * || _| | - * || | | | - * || | | | - * || | | | - * || | | | - * || | |VME| - * || | | | - * || | |P2 | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || |_| | - * || |___| + * || ||__________________________________________________________ ___ + * ||_______________________________________________________ |_| | + * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | | + * || |______|________|_________|___________| ________| | | | + * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | | + * || |______|________|_________|___________| ________| | | | + * || |74LS02| 74LS08||Am25LS251| 74S38 |74LS20|Jumpers | | | + * || |______|_______||_________|_______|______|______| | |VME| + * || |74F04 | 74LS32||74LS374 | 74LS374 |74S244 | | | | + * ||+---+ |______|_______||_________|___________|_________| | |P1 | + * |||CON| |74F04 | 74LS85||74S244 | 74S240 |PAL | | | | + * ||| | |______|_______||_________|___________|_________| | | | + * ||| | |74LS04| | |74S244 | | | | + * ||| | |______| | PIT |_________| | | | + * ||| | |74LS125 | MC68230L10 |74LS145 | | | | + * ||| | |______| __|_______________________|---------| | | | + * ||| | |74LS74| |25LS251 | | RAM |74S244 | |_| | + * ||+---+ ---------- |---------- | HM6264P-12 |---------| |___| + * || | PAL | | 74245 | |______________|74S244 | | + * || +--------- |_________| | U40 27128 |---------| | + * || | 74F32 | | || System ROM |74LS682 | | + * || +-------- | CPU || |-+-------| | + * FAIL ||LED | 74F138| | MC68010 |+--------------+ |DIPSW__| | + * || +-------- | || RAM | |74S38 | | + * HALT ||LED | 74F32 | |__________|| HM6264P-12 | |______ | | + * || +-------+ |74245 |+--------------+ |74F08 | | + * RUN ||LED |XTAL | |__________|| U47 27128 | |______ | |___ + * ||+---+|20MHz | |74244 || System ROM | |74F00 | _| | + * |||CON|--------+___|__________|+--------------+_|_______| | | | + * ||| |74LS08 |74F74 |74LS148| |PAL | | PAL | | | | + * ||| |________|________|_______| |________|_|_________| | | | + * ||| | 74LS138|74F32 | PAL | |74F74 |Am29823 | | | | + * ||| |________|________|_______| |________|-+---------| | |VME| + * ||| | 74LS11 |74F04 |74LS374| |74LS374 | |74S240 | | | | + * ||| |________|________|_______| |________|_|---------| | |P2 | + * ||| | 74F138 |BLANK |74LS374| |74LS374 |74S240 | | | | + * ||| |________|________|_______| +----------+---------| | | | + * ||| | 74LS08 |74F32 |74LS11|74LS393|74LS393|resistors | | | + * ||| |________|________|______|______ |_______|________| | | | + * ||| |DM2585 |74F74 |DM2230| 74LS00| 74F02 |74F32 | | | | + * ||+---+--------+--------+------+-------+---------+------| | | | + * || |74LS74 |74F20 |74S260| 74S74 | 74F08 |74LS02| | | | + * || +------------------------------------------+------| | | | + * || |DM2353 |74F10 |74F32 | 74LS32| 74F08 |DM2353| |_| | + * || +------------------------------------------+------+-+ |___| * || ||------------------------------------------------------------+-+ * ||||--|| * ||||--|| @@ -80,7 +80,9 @@ * 0x000000 Up to 128Kb System ROM with RESET vector * 0x020000 RAM with vectors * 0x020500 RAM Top of stack - * 0x040000 PIT device + * 0x040000 PIT device? + * 0x060000 RAM? + * 0x080000 PIT device? * -------------------------------------------------------------------------- * * Interrupt sources MVME @@ -142,9 +144,13 @@ private: static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) ADDRESS_MAP_UNMAP_HIGH -AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ -AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ -//AM_RANGE(0x060000, 0x060035) AM_DEVREADWRITE8("pit", pit68230_device, data_r, data_w, 0x00ff) + AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ + AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ +#if 1 + AM_RANGE(0x040000, 0x040035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/ + AM_RANGE(0x060000, 0x06001f) AM_RAM /* Area is cleared on start */ + AM_RANGE(0x080000, 0x080035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/ +#endif //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ //AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ ADDRESS_MAP_END From 474bdd8763544d927d93e099891c13b9f3bc6962 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joakim=20Larsson=20Edstr=C3=B6m?= Date: Tue, 1 Sep 2015 22:12:06 +0200 Subject: [PATCH 09/10] Added color info of LEDs in PCB overview --- src/mess/drivers/mvme350.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index a6b7c224e2d..2e8c0d2a021 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -38,11 +38,11 @@ * || | PAL | | 74245 | |______________|74S244 | | * || +--------- |_________| | U40 27128 |---------| | * || | 74F32 | | || System ROM |74LS682 | | - * || +-------- | CPU || |-+-------| | + * Red || +-------- | CPU || |-+-------| | * FAIL ||LED | 74F138| | MC68010 |+--------------+ |DIPSW__| | - * || +-------- | || RAM | |74S38 | | + * Red || +-------- | || RAM | |74S38 | | * HALT ||LED | 74F32 | |__________|| HM6264P-12 | |______ | | - * || +-------+ |74245 |+--------------+ |74F08 | | + * Green || +-------+ |74245 |+--------------+ |74F08 | | * RUN ||LED |XTAL | |__________|| U47 27128 | |______ | |___ * ||+---+|20MHz | |74244 || System ROM | |74F00 | _| | * |||CON|--------+___|__________|+--------------+_|_______| | | | From 0b59f14336fff7f4c11a69137ec690ceb7e067fe Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Mon, 21 Sep 2015 23:29:14 +0200 Subject: [PATCH 10/10] cleaning up and adding some historical info about the boards origin --- src/mess/drivers/mvme350.c | 46 +++++++++++++++++++++++++++++++------- 1 file changed, 38 insertions(+), 8 deletions(-) diff --git a/src/mess/drivers/mvme350.c b/src/mess/drivers/mvme350.c index 2e8c0d2a021..c93e1900c1c 100644 --- a/src/mess/drivers/mvme350.c +++ b/src/mess/drivers/mvme350.c @@ -67,11 +67,38 @@ * ||||--|| * || * - * History of Motorola VME division + * History of Motorola VME division (https://en.wikipedia.org/wiki/VMEbus) *--------------------------------- - * TBD + * When Motorola released the 68000 processor 1979 the ambition of the deisgners + * was also to standardize a versatile CPU bus to be able to build computer + * systems without constructing PCB:s from scratch. This become VersaBus but the + * boards was really too big and the computer world already saw the systems shrink + * in size. Motorola's design center in Munich proposed to use the smaller and + * already used Euroboard form factor and call it Versabus-E. This later became + * VME which was standardized in the VITA organization 1981 * - * Misc links about Motorola VME division and this board: TBD + * Misc links about Motorola VME division and this board: + * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf + * + * Description + * ------------ + * Streaming Tape Controller released 1984 with the following feature set + * + * - Double High (6U) VMEmodule + * - QIC-02 Streaming Tape Interface + * - Supports One 01C-02 compatible 1/4-inch Streaming Tape Drive + * - Standard VMEbus Interface + * - Supports 24- or 32-bit DMA Addressing/16-bit Data + * - Generates Seven Levels of VMEbus Interrupts with Programmable Interrupt Vector + * - 10 MHz MC68010 Microprocessor + * - 90Kb/s Continuous Transfer Rate for QIC-02 Interface, 200Kb/s Burst rate + * - Controls Tape Cartridges Offering 20Mb, 45Mb and 60Mb of Formatted Data Storage + * - MC68230 PIT-based Timer + * - 16Kb of Static RAM Provides Buffer Storage and CPU Workspace + * - Multitasking Kernel-based Firmware Package + * - Buffered Pipe Communication Protocol Allows Multiple Hosts to Oueue Commands Without Interlock + * - High Level Command/Status Packets offer efficient Operating System Support + * - Permits Chaining of Host Command * * Address Map * -------------------------------------------------------------------------- @@ -104,7 +131,7 @@ * * TODO: * - Dump the ROMs (DONE) - * - Setup a working address map + * - Setup a working address map (STARTED) * - Get documentation for VME interface * - Add VME bus driver * - Hook up a CPU board that supports boot from tape (ie MVME-162, MVME 147) @@ -215,13 +242,16 @@ ROM_LOAD16_BYTE ("mvme350U47v2.3.bin", 0x0001, 0x4000, CRC (582ce095) SHA1 (d092 * * The ROMs known commands from different sources: * - * NONE + * It communicates with the master through data buffers in shared memory and VME bus interrupts + * as desribed in + * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf * - * This is controller board which sets up the board and then executes a STOP instruction - * awaiting a CPU on the VME bus to request its services. + * The board is pretty boring as stand alone, it initializes everything and then executes a STOP instruction + * awaiting a CPU on the VME bus to request its services. However, it enables boot from tape devices, we just + * need a MVME-131 and a dump of a VersaDOS or Motorola UNIX System V system tape and some work. */ ROM_END /* Driver */ /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP (1985, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_IS_SKELETON ) +COMP (1984, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )