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https://github.com/holub/mame
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dma device read/write callbacks
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c27ee979cb
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@ -463,9 +463,10 @@ static MACHINE_CONFIG_START(ip2800, interpro_state)
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MCFG_INTERPRO_IOGA_ADD(INTERPRO_IOGA_TAG)
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MCFG_INTERPRO_IOGA_ADD(INTERPRO_IOGA_TAG)
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MCFG_INTERPRO_IOGA_NMI_CB(INPUTLINE(INTERPRO_CPU_TAG, INPUT_LINE_NMI))
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MCFG_INTERPRO_IOGA_NMI_CB(INPUTLINE(INTERPRO_CPU_TAG, INPUT_LINE_NMI))
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MCFG_INTERPRO_IOGA_IRQ_CB(INPUTLINE(INTERPRO_CPU_TAG, INPUT_LINE_IRQ0))
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MCFG_INTERPRO_IOGA_IRQ_CB(INPUTLINE(INTERPRO_CPU_TAG, INPUT_LINE_IRQ0))
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//MCFG_INTERPRO_IOGA_DMA_CB(IOGA_DMA_CHANNEL_PLOTTER, unknown)
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// use callbacks to tell the ioga what the dma read and write methods of each device are
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//MCFG_INTERPRO_IOGA_DMA_CB(IOGA_DMA_CHANNEL_SCSI, DEVREAD8(INTERPRO_SCSI_TAG, ncr539x_device, dma_read_data), DEVWRITE8(INTERPRO_SCSI_TAG, ncr539x_device, dma_write_data))
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// MCFG_INTERPRO_IOGA_DMA_CALLBACK(channel, n82077aa_device, dma_r, dma_w)
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MCFG_INTERPRO_IOGA_DMA_CB(IOGA_DMA_CHANNEL_FLOPPY, DEVREAD8(INTERPRO_FDC_TAG, n82077aa_device, mdma_r), DEVWRITE8(INTERPRO_FDC_TAG, n82077aa_device, mdma_w))
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MCFG_INTERPRO_IOGA_DMA_CB(IOGA_DMA_CHANNEL_SERIAL, DEVREAD8(INTERPRO_SCC1_TAG, z80scc_device, da_r), DEVWRITE8(INTERPRO_SCC1_TAG, z80scc_device, da_w))
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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@ -35,17 +35,25 @@ const device_type INTERPRO_IOGA = &device_creator<interpro_ioga_device>;
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interpro_ioga_device::interpro_ioga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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interpro_ioga_device::interpro_ioga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: device_t(mconfig, INTERPRO_IOGA, "InterPro IOGA", tag, owner, clock, "ioga", __FILE__),
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: device_t(mconfig, INTERPRO_IOGA, "InterPro IOGA", tag, owner, clock, "ioga", __FILE__),
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m_out_nmi_func(*this),
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m_out_nmi_func(*this),
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m_out_int_func(*this)
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m_out_int_func(*this),
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{
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m_dma_r_func{ { *this }, { *this }, { *this }, { *this } },
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m_dma_w_func{ { *this }, { *this }, { *this }, { *this } }
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{
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}
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}
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void interpro_ioga_device::device_start()
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void interpro_ioga_device::device_start()
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{
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{
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// resolve callbacks
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// resolve callbacks
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m_out_nmi_func.resolve();
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m_out_int_func.resolve();
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m_out_int_func.resolve();
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for (auto & r : m_dma_r_func)
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r.resolve_safe(0xff);
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for (auto & w : m_dma_w_func)
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w.resolve();
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m_cpu = machine().device<cpu_device>("cpu");
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m_cpu = machine().device<cpu_device>("cpu");
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m_fdc = machine().device<upd765_family_device>("fdc");
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// allocate ioga timers
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// allocate ioga timers
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m_timer[0] = timer_alloc(IOGA_TIMER_0);
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m_timer[0] = timer_alloc(IOGA_TIMER_0);
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@ -164,7 +172,7 @@ void interpro_ioga_device::device_timer(emu_timer &timer, device_timer_id id, in
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{
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{
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address_space &space = m_cpu->space(AS_PROGRAM);
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address_space &space = m_cpu->space(AS_PROGRAM);
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space.write_byte(m_fdc_dma[0]++, m_fdc->dma_r());
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space.write_byte(m_fdc_dma[0]++, m_dma_r_func[IOGA_DMA_CHANNEL_FLOPPY]());
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if (--m_fdc_dma[2])
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if (--m_fdc_dma[2])
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m_dma_timer->adjust(attotime::from_usec(10));
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m_dma_timer->adjust(attotime::from_usec(10));
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else
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else
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@ -7,7 +7,6 @@
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#define INTERPRO_IOGA_H_
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#define INTERPRO_IOGA_H_
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#include "emu.h"
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#include "emu.h"
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#include "machine/upd765.h"
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#define MCFG_INTERPRO_IOGA_ADD(_tag) \
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#define MCFG_INTERPRO_IOGA_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, INTERPRO_IOGA, 0)
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MCFG_DEVICE_ADD(_tag, INTERPRO_IOGA, 0)
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@ -18,6 +17,10 @@
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#define MCFG_INTERPRO_IOGA_IRQ_CB(_out_int) \
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#define MCFG_INTERPRO_IOGA_IRQ_CB(_out_int) \
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devcb = &interpro_ioga_device::static_set_out_int_callback(*device, DEVCB_##_out_int);
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devcb = &interpro_ioga_device::static_set_out_int_callback(*device, DEVCB_##_out_int);
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#define MCFG_INTERPRO_IOGA_DMA_CB(_channel, _dma_r, _dma_w) \
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devcb = &interpro_ioga_device::static_set_dma_r_callback(*device, _channel, DEVCB_##_dma_r); \
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devcb = &interpro_ioga_device::static_set_dma_w_callback(*device, _channel, DEVCB_##_dma_w);
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// timer 0 seem to be a 60Hz cycle
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// timer 0 seem to be a 60Hz cycle
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#define IOGA_TIMER0_IRQ 14
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#define IOGA_TIMER0_IRQ 14
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@ -42,6 +45,12 @@
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// FIXME: hack for forced interrupts
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// FIXME: hack for forced interrupts
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#define IOGA_INTERRUPT_FORCED 0x8000
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#define IOGA_INTERRUPT_FORCED 0x8000
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#define IOGA_DMA_CHANNELS 4
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#define IOGA_DMA_CHANNEL_PLOTTER 0
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#define IOGA_DMA_CHANNEL_SCSI 1
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#define IOGA_DMA_CHANNEL_FLOPPY 2
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#define IOGA_DMA_CHANNEL_SERIAL 3
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class interpro_ioga_device : public device_t
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class interpro_ioga_device : public device_t
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{
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{
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public:
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public:
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@ -51,6 +60,9 @@ public:
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template<class _Object> static devcb_base &static_set_out_nmi_callback(device_t &device, _Object object) { return downcast<interpro_ioga_device &>(device).m_out_nmi_func.set_callback(object); }
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template<class _Object> static devcb_base &static_set_out_nmi_callback(device_t &device, _Object object) { return downcast<interpro_ioga_device &>(device).m_out_nmi_func.set_callback(object); }
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template<class _Object> static devcb_base &static_set_out_int_callback(device_t &device, _Object object) { return downcast<interpro_ioga_device &>(device).m_out_int_func.set_callback(object); }
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template<class _Object> static devcb_base &static_set_out_int_callback(device_t &device, _Object object) { return downcast<interpro_ioga_device &>(device).m_out_int_func.set_callback(object); }
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template<class _Object> static devcb_base &static_set_dma_r_callback(device_t &device, int channel, _Object object) { return downcast<interpro_ioga_device &>(device).m_dma_r_func[channel].set_callback(object); }
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template<class _Object> static devcb_base &static_set_dma_w_callback(device_t &device, int channel, _Object object) { return downcast<interpro_ioga_device &>(device).m_dma_w_func[channel].set_callback(object); }
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virtual DECLARE_ADDRESS_MAP(map, 8);
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virtual DECLARE_ADDRESS_MAP(map, 8);
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// external interrupt lines
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// external interrupt lines
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@ -122,8 +134,8 @@ private:
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devcb_write_line m_out_nmi_func;
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devcb_write_line m_out_nmi_func;
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devcb_write_line m_out_int_func;
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devcb_write_line m_out_int_func;
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// a hack to get hold of the dma devices
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devcb_read8 m_dma_r_func[IOGA_DMA_CHANNELS];
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upd765_family_device *m_fdc;
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devcb_write8 m_dma_w_func[IOGA_DMA_CHANNELS];
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bool m_irq_active;
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bool m_irq_active;
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uint32_t m_irq_current;
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uint32_t m_irq_current;
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