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v25.cpp: made it use devcb instead of a memory map for the ports (nw)

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This commit is contained in:
Ivan Vangelista 2016-06-21 18:48:02 +02:00
parent d5ce793a1d
commit 6e90cb5a82
5 changed files with 83 additions and 61 deletions
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18
src/devices/cpu/nec/v25.cpp
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@ -52,9 +52,16 @@ const device_type V35 = &device_creator<v35_device>;
v25_common_device::v25_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, bool is_16bit, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, is_16bit ? 16 : 8, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, is_16bit ? 16 : 8, 16+1, 0)
, m_io_config("io", ENDIANNESS_LITTLE, is_16bit ? 16 : 8, 16, 0)
, m_fetch_xor(fetch_xor)
, m_PCK(8)
, m_pt_in(*this)
, m_p0_in(*this)
, m_p1_in(*this)
, m_p2_in(*this)
, m_p0_out(*this)
, m_p1_out(*this)
, m_p2_out(*this)
, m_prefetch_size(prefetch_size)
, m_prefetch_cycles(prefetch_cycles)
, m_chip_type(chip_type)
@ -501,6 +508,15 @@ void v25_common_device::device_start()
m_direct = &m_program->direct();
m_io = &space(AS_IO);
m_pt_in.resolve_safe(0xff);
m_p0_in.resolve_safe(0xff);
m_p1_in.resolve_safe(0xff);
m_p2_in.resolve_safe(0xff);
m_p0_out.resolve_safe();
m_p1_out.resolve_safe();
m_p2_out.resolve_safe();
state_add( V25_PC, "PC", m_debugger_temp).callimport().callexport().formatstr("%05X");
state_add( V25_IP, "IP", m_ip).formatstr("%04X");
state_add( V25_SP, "SP", m_debugger_temp).callimport().callexport().formatstr("%04X");

46
src/devices/cpu/nec/v25.h
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@ -10,11 +10,6 @@
#define NEC_INPUT_LINE_INTP2 12
#define NEC_INPUT_LINE_POLL 20
#define V25_PORT_P0 0x10000
#define V25_PORT_P1 0x10002
#define V25_PORT_P2 0x10004
#define V25_PORT_PT 0x10006
enum
{
V25_PC=0,
@ -28,6 +23,28 @@ enum
v25_common_device::set_decryption_table(*device, _table);
#define MCFG_V25_PORT_PT_READ_CB(_devcb) \
devcb = &v25_common_device::set_pt_in_cb(*device, DEVCB_##_devcb);
#define MCFG_V25_PORT_P0_READ_CB(_devcb) \
devcb = &v25_common_device::set_p0_in_cb(*device, DEVCB_##_devcb);
#define MCFG_V25_PORT_P1_READ_CB(_devcb) \
devcb = &v25_common_device::set_p1_in_cb(*device, DEVCB_##_devcb);
#define MCFG_V25_PORT_P2_READ_CB(_devcb) \
devcb = &v25_common_device::set_p2_in_cb(*device, DEVCB_##_devcb);
#define MCFG_V25_PORT_P0_WRITE_CB(_devcb) \
devcb = &v25_common_device::set_p0_out_cb(*device, DEVCB_##_devcb);
#define MCFG_V25_PORT_P1_WRITE_CB(_devcb) \
devcb = &v25_common_device::set_p1_out_cb(*device, DEVCB_##_devcb);
#define MCFG_V25_PORT_P2_WRITE_CB(_devcb) \
devcb = &v25_common_device::set_p2_out_cb(*device, DEVCB_##_devcb);
class v25_common_device : public cpu_device
{
public:
@ -37,6 +54,15 @@ public:
// static configuration helpers
static void set_decryption_table(device_t &device, const UINT8 *decryption_table) { downcast<v25_common_device &>(device).m_v25v35_decryptiontable = decryption_table; }
template<class _Object> static devcb_base & set_pt_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_pt_in.set_callback(object); }
template<class _Object> static devcb_base & set_p0_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p0_in.set_callback(object); }
template<class _Object> static devcb_base & set_p1_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p1_in.set_callback(object); }
template<class _Object> static devcb_base & set_p2_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p2_in.set_callback(object); }
template<class _Object> static devcb_base & set_p0_out_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p0_out.set_callback(object); }
template<class _Object> static devcb_base & set_p1_out_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p1_out.set_callback(object); }
template<class _Object> static devcb_base & set_p2_out_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p2_out.set_callback(object); }
TIMER_CALLBACK_MEMBER(v25_timer_callback);
protected:
@ -118,6 +144,16 @@ union internalram
address_space *m_io;
int m_icount;
/* callbacks */
devcb_read8 m_pt_in;
devcb_read8 m_p0_in;
devcb_read8 m_p1_in;
devcb_read8 m_p2_in;
devcb_write8 m_p0_out;
devcb_write8 m_p1_out;
devcb_write8 m_p2_out;
UINT8 m_prefetch_size;
UINT8 m_prefetch_cycles;
INT8 m_prefetch_count;

14
src/devices/cpu/nec/v25sfr.cpp
View File

@ -25,21 +25,21 @@ UINT8 v25_common_device::read_sfr(unsigned o)
switch(o)
{
case 0x00: /* P0 */
ret = m_io->read_byte(V25_PORT_P0);
ret = m_p0_in();
break;
case 0x08: /* P1 */
/* P1 is combined with the interrupt lines */
ret = ((m_io->read_byte(V25_PORT_P1) & 0xF0)
ret = ((m_p1_in() & 0xF0)
| (m_nmi_state ? 0x00 : 0x01)
| (m_intp_state[0] ? 0x00 : 0x02)
| (m_intp_state[1] ? 0x00 : 0x04)
| (m_intp_state[2] ? 0x00 : 0x08));
break;
case 0x10: /* P2 */
ret = m_io->read_byte(V25_PORT_P2);
ret = m_p2_in();
break;
case 0x38: /* PT */
ret = m_io->read_byte(V25_PORT_PT);
ret = m_pt_in();
break;
case 0x4C: /* EXIC0 */
ret = read_irqcontrol(INTP0, m_priority_intp);
@ -169,14 +169,14 @@ void v25_common_device::write_sfr(unsigned o, UINT8 d)
switch(o)
{
case 0x00: /* P0 */
m_io->write_byte(V25_PORT_P0, d);
m_p0_out(d);
break;
case 0x08: /* P1 */
/* only the upper four bits of P1 can be used as output */
m_io->write_byte(V25_PORT_P1, d & 0xF0);
m_p1_out(d & 0xF0);
break;
case 0x10: /* P2 */
m_io->write_byte(V25_PORT_P2, d);
m_p2_out(d);
break;
case 0x4C: /* EXIC0 */
write_irqcontrol(INTP0, d);

63
src/mame/drivers/toaplan2.cpp
View File

@ -776,25 +776,6 @@ WRITE16_MEMBER(toaplan2_state::fixeightbl_oki_bankswitch_w)
}
}
READ8_MEMBER(toaplan2_state::v25_dswa_r)
{
return ioport("DSWA")->read() ^ 0xff;
}
READ8_MEMBER(toaplan2_state::v25_dswb_r)
{
return ioport("DSWB")->read() ^ 0xff;
}
READ8_MEMBER(toaplan2_state::v25_jmpr_r)
{
return ioport("JMPR")->read() ^ 0xff;
}
READ8_MEMBER(toaplan2_state::fixeight_region_r)
{
// this must match the eeprom region!
@ -1497,27 +1478,6 @@ static ADDRESS_MAP_START( vfive_v25_mem, AS_PROGRAM, 8, toaplan2_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( v25_port, AS_IO, 8, toaplan2_state )
AM_RANGE(V25_PORT_PT, V25_PORT_PT) AM_READ(v25_dswa_r)
AM_RANGE(V25_PORT_P0, V25_PORT_P0) AM_READ(v25_dswb_r)
AM_RANGE(V25_PORT_P1, V25_PORT_P1) AM_READ(v25_jmpr_r)
AM_RANGE(V25_PORT_P2, V25_PORT_P2) AM_WRITENOP // bit 0 is FAULT according to kbash schematic
ADDRESS_MAP_END
static ADDRESS_MAP_START( dogyuun_v25_port, AS_IO, 8, toaplan2_state )
AM_RANGE(V25_PORT_PT, V25_PORT_PT) AM_READ(v25_dswb_r)
AM_RANGE(V25_PORT_P0, V25_PORT_P0) AM_READ(v25_dswa_r)
AM_RANGE(V25_PORT_P1, V25_PORT_P1) AM_READ(v25_jmpr_r)
AM_RANGE(V25_PORT_P2, V25_PORT_P2) AM_WRITENOP // bit 0 is FAULT according to kbash schematic
ADDRESS_MAP_END
static ADDRESS_MAP_START( fixeight_v25_port, AS_IO, 8, toaplan2_state )
AM_RANGE(V25_PORT_P0, V25_PORT_P0) AM_READWRITE_PORT("EEPROM")
ADDRESS_MAP_END
static ADDRESS_MAP_START( fixeightbl_oki, AS_0, 8, toaplan2_state )
AM_RANGE(0x00000, 0x2ffff) AM_ROM
AM_RANGE(0x30000, 0x3ffff) AM_ROMBANK("bank1")
@ -3219,8 +3179,11 @@ static MACHINE_CONFIG_START( dogyuun, toaplan2_state )
MCFG_CPU_ADD("audiocpu", V25, XTAL_25MHz/2) /* NEC V25 type Toaplan marked CPU ??? */
MCFG_CPU_PROGRAM_MAP(v25_mem)
MCFG_CPU_IO_MAP(dogyuun_v25_port)
MCFG_V25_CONFIG(nitro_decryption_table)
MCFG_V25_PORT_PT_READ_CB(IOPORT("DSWB")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P0_READ_CB(IOPORT("DSWA")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P1_READ_CB(IOPORT("JMPR")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P2_WRITE_CB(NOOP) // bit 0 is FAULT according to kbash schematic
MCFG_MACHINE_START_OVERRIDE(toaplan2_state,toaplan2)
@ -3264,8 +3227,11 @@ static MACHINE_CONFIG_START( kbash, toaplan2_state )
/* ROM based v25 */
MCFG_CPU_ADD("audiocpu", V25, XTAL_16MHz) /* NEC V25 type Toaplan marked CPU ??? */
MCFG_CPU_PROGRAM_MAP(kbash_v25_mem)
MCFG_CPU_IO_MAP(v25_port)
MCFG_V25_CONFIG(nitro_decryption_table)
MCFG_V25_PORT_PT_READ_CB(IOPORT("DSWA")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P0_READ_CB(IOPORT("DSWB")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P1_READ_CB(IOPORT("JMPR")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P2_WRITE_CB(NOOP) // bit 0 is FAULT according to kbash schematic
MCFG_MACHINE_START_OVERRIDE(toaplan2_state,toaplan2)
@ -3519,8 +3485,9 @@ static MACHINE_CONFIG_START( fixeight, toaplan2_state )
MCFG_CPU_ADD("audiocpu", V25, XTAL_16MHz) /* NEC V25 type Toaplan marked CPU ??? */
MCFG_CPU_PROGRAM_MAP(fixeight_v25_mem)
MCFG_CPU_IO_MAP(fixeight_v25_port)
MCFG_V25_CONFIG(ts001turbo_decryption_table)
MCFG_V25_PORT_P0_READ_CB(IOPORT("EEPROM"))
MCFG_V25_PORT_P0_WRITE_CB(IOPORT("EEPROM"))
MCFG_MACHINE_START_OVERRIDE(toaplan2_state,toaplan2)
@ -3601,8 +3568,11 @@ static MACHINE_CONFIG_START( vfive, toaplan2_state )
MCFG_CPU_ADD("audiocpu", V25, XTAL_20MHz/2) /* Verified on pcb, NEC V25 type Toaplan mark scratched out */
MCFG_CPU_PROGRAM_MAP(vfive_v25_mem)
MCFG_CPU_IO_MAP(v25_port)
MCFG_V25_CONFIG(nitro_decryption_table)
MCFG_V25_PORT_PT_READ_CB(IOPORT("DSWA")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P0_READ_CB(IOPORT("DSWB")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P1_READ_CB(IOPORT("JMPR")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P2_WRITE_CB(NOOP) // bit 0 is FAULT according to kbash schematic
MCFG_MACHINE_START_OVERRIDE(toaplan2_state,toaplan2)
@ -3639,7 +3609,10 @@ static MACHINE_CONFIG_START( batsugun, toaplan2_state )
MCFG_CPU_ADD("audiocpu", V25, XTAL_32MHz/2) /* NEC V25 type Toaplan marked CPU ??? */
MCFG_CPU_PROGRAM_MAP(v25_mem)
MCFG_CPU_IO_MAP(v25_port)
MCFG_V25_PORT_PT_READ_CB(IOPORT("DSWA")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P0_READ_CB(IOPORT("DSWB")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P1_READ_CB(IOPORT("JMPR")) MCFG_DEVCB_XOR(0xff)
MCFG_V25_PORT_P2_WRITE_CB(NOOP) // bit 0 is FAULT according to kbash schematic
MCFG_MACHINE_START_OVERRIDE(toaplan2_state,toaplan2)

3
src/mame/includes/toaplan2.h
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@ -100,9 +100,6 @@ public:
DECLARE_WRITE16_MEMBER(ghox_shared_ram_w);
DECLARE_WRITE16_MEMBER(fixeight_subcpu_ctrl_w);
DECLARE_WRITE16_MEMBER(fixeightbl_oki_bankswitch_w);
DECLARE_READ8_MEMBER(v25_dswa_r);
DECLARE_READ8_MEMBER(v25_dswb_r);
DECLARE_READ8_MEMBER(v25_jmpr_r);
DECLARE_READ8_MEMBER(fixeight_region_r);
DECLARE_WRITE8_MEMBER(raizing_z80_bankswitch_w);
DECLARE_WRITE8_MEMBER(raizing_oki_bankswitch_w);