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Refactored 74715 to one device layout. Removed subdevice. (nw)

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This commit is contained in:
couriersud 2017-04-09 02:42:38 +02:00
parent 49d50c3045
commit 6e9637196d
2 changed files with 32 additions and 66 deletions
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96
src/lib/netlist/devices/nld_74175.cpp
View File

@ -12,99 +12,65 @@ namespace netlist
{
namespace devices
{
NETLIB_OBJECT(74175_sub)
NETLIB_OBJECT(74175)
{
NETLIB_CONSTRUCTOR(74175_sub)
, m_CLK(*this, "CLK")
NETLIB_CONSTRUCTOR(74175)
, m_D(*this, {{"D1", "D2", "D3", "D4"}})
, m_CLRQ(*this, "CLRQ")
, m_CLK(*this, "CLK", NETLIB_DELEGATE(74175, clk))
, m_Q(*this, {{"Q1", "Q2", "Q3", "Q4"}})
, m_QQ(*this, {{"Q1Q", "Q2Q", "Q3Q", "Q4Q"}})
, m_clrq(*this, "m_clr", 0)
, m_data(*this, "m_data", 0)
{
}
NETLIB_RESETI();
NETLIB_UPDATEI();
NETLIB_HANDLERI(clk);
protected:
object_array_t<logic_input_t, 4> m_D;
logic_input_t m_CLRQ;
public:
logic_input_t m_CLK;
object_array_t<logic_output_t, 4> m_Q;
object_array_t<logic_output_t, 4> m_QQ;
state_var<netlist_sig_t> m_clrq;
state_var<unsigned> m_data;
};
NETLIB_OBJECT(74175)
{
NETLIB_CONSTRUCTOR(74175)
, m_sub(*this, "sub")
, m_D(*this, {{"D1", "D2", "D3", "D4"}})
, m_CLRQ(*this, "CLRQ")
{
register_subalias("CLK", m_sub.m_CLK);
register_subalias("Q1", m_sub.m_Q[0]);
register_subalias("Q1Q", m_sub.m_QQ[0]);
register_subalias("Q2", m_sub.m_Q[1]);
register_subalias("Q2Q", m_sub.m_QQ[1]);
register_subalias("Q3", m_sub.m_Q[2]);
register_subalias("Q3Q", m_sub.m_QQ[2]);
register_subalias("Q4", m_sub.m_Q[3]);
register_subalias("Q4Q", m_sub.m_QQ[3]);
}
NETLIB_RESETI();
NETLIB_UPDATEI();
protected:
NETLIB_SUB(74175_sub) m_sub;
object_array_t<logic_input_t, 4> m_D;
logic_input_t m_CLRQ;
};
NETLIB_OBJECT_DERIVED(74175_dip, 74175)
{
NETLIB_CONSTRUCTOR_DERIVED(74175_dip, 74175)
{
register_subalias("9", m_sub.m_CLK);
register_subalias("9", m_CLK);
register_subalias("1", m_CLRQ);
register_subalias("4", m_D[0]);
register_subalias("2", m_sub.m_Q[0]);
register_subalias("3", m_sub.m_QQ[0]);
register_subalias("2", m_Q[0]);
register_subalias("3", m_QQ[0]);
register_subalias("5", m_D[1]);
register_subalias("7", m_sub.m_Q[1]);
register_subalias("6", m_sub.m_QQ[1]);
register_subalias("7", m_Q[1]);
register_subalias("6", m_QQ[1]);
register_subalias("12", m_D[2]);
register_subalias("10", m_sub.m_Q[2]);
register_subalias("11", m_sub.m_QQ[2]);
register_subalias("10", m_Q[2]);
register_subalias("11", m_QQ[2]);
register_subalias("13", m_D[3]);
register_subalias("15", m_sub.m_Q[3]);
register_subalias("14", m_sub.m_QQ[3]);
register_subalias("15", m_Q[3]);
register_subalias("14", m_QQ[3]);
}
};
constexpr const netlist_time delay[2] = { NLTIME_FROM_NS(25), NLTIME_FROM_NS(25) };
constexpr const netlist_time delay_clear[2] = { NLTIME_FROM_NS(40), NLTIME_FROM_NS(25) };
NETLIB_RESET(74175_sub)
NETLIB_HANDLER(74175, clk)
{
m_CLK.set_state(logic_t::STATE_INP_LH);
m_clrq = 0;
m_data = 0xFF;
}
NETLIB_UPDATE(74175_sub)
{
if (m_clrq)
if (m_CLRQ())
{
for (std::size_t i=0; i<4; i++)
{
@ -123,26 +89,26 @@ namespace netlist
{
d |= (m_D[i]() << i);
}
m_sub.m_clrq = m_CLRQ();
if (!m_sub.m_clrq)
if (!m_CLRQ())
{
for (std::size_t i=0; i<4; i++)
{
m_sub.m_Q[i].push(0, delay_clear[0]);
m_sub.m_QQ[i].push(1, delay_clear[1]);
m_Q[i].push(0, delay_clear[0]);
m_QQ[i].push(1, delay_clear[1]);
}
m_sub.m_data = 0;
} else if (d != m_sub.m_data)
m_data = 0;
} else if (d != m_data)
{
m_sub.m_data = d;
m_sub.m_CLK.activate_lh();
m_data = d;
m_CLK.activate_lh();
}
}
NETLIB_RESET(74175)
{
//m_sub.do_reset();
m_CLK.set_state(logic_t::STATE_INP_LH);
m_data = 0xFF;
}
NETLIB_DEVICE_IMPL(74175)

2
src/mame/machine/nl_breakout.cpp
View File

@ -90,7 +90,7 @@ CIRCUIT_LAYOUT( breakout )
#if (SLOW_BUT_ACCURATE)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-8) // less accuracy and diode will not work
PARAM(Solver.ACCURACY, 1e-7) // less accuracy and diode will not work
PARAM(Solver.METHOD, "MAT_CR")
#else
SOLVER(Solver, 48000)