mirror of
https://github.com/holub/mame
synced 2025-04-20 15:32:45 +03:00
pmac6100: Connect SCSI
This commit is contained in:
Olivier Galibert
parent
516b085368
commit
6ea142efb8
@ -4,15 +4,14 @@
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#include "emu.h"
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#include "bus/nubus/nubus.h"
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#include "bus/scsi/scsi.h"
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#include "bus/scsi/scsihd.h"
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#include "bus/nscsi/devices.h"
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#include "cpu/powerpc/ppc.h"
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#include "machine/6522via.h"
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#include "machine/8530scc.h"
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#include "machine/cuda.h"
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#include "machine/macadb.h"
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#include "machine/mv_sonora.h"
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#include "machine/ncr5380.h"
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#include "machine/ncr5390.h"
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#include "machine/ram.h"
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#include "machine/swim3.h"
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#include "machine/timer.h"
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@ -41,7 +40,8 @@ private:
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required_device<macadb_device> m_macadb;
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required_device<ram_device> m_ram;
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required_device<scc8530_legacy_device> m_scc;
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required_device<ncr5380_device> m_ncr5380;
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required_device<nscsi_bus_device> m_scsibus;
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required_device<ncr53c94_device> m_ncr53c94;
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required_device<applefdintf_device> m_fdc;
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required_device_array<floppy_connector, 2> m_floppy;
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required_device<mac_video_sonora_device> m_video;
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@ -56,13 +56,22 @@ private:
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uint8_t m_via2_ier, m_via2_ifr, m_via2_sier, m_via2_sifr;
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uint64_t m_dma_scsi_buffer;
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uint32_t m_dma_badr, m_dma_floppy_adr;
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uint16_t m_dma_berr_en, m_dma_berr_flag;
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uint8_t m_dma_scsi_ctrl, m_dma_floppy_ctrl;
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uint32_t m_dma_scsi_a_base_adr, m_dma_scsi_b_base_adr;
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uint32_t m_dma_scsi_a_cur_offset, m_dma_scsi_b_cur_offset;
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uint8_t m_dma_scsi_a_ctrl, m_dma_scsi_b_ctrl, m_dma_floppy_ctrl;
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uint8_t m_dma_scsi_buffer_byte_count;
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uint8_t m_dma_scc_txa_ctrl, m_dma_scc_rxa_ctrl, m_dma_scc_txb_ctrl, m_dma_scc_rxb_ctrl;
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uint8_t m_dma_enet_rx_ctrl, m_dma_enet_tx_ctrl;
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bool m_dma_scsi_a_in_step;
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void pdm_map(address_map &map);
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DECLARE_WRITE_LINE_MEMBER(nmi_irq);
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@ -72,16 +81,16 @@ private:
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DECLARE_WRITE_LINE_MEMBER(via1_irq);
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DECLARE_WRITE_LINE_MEMBER(bus_err_irq);
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DECLARE_WRITE_LINE_MEMBER(fdc_irq);
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DECLARE_WRITE_LINE_MEMBER(etx_irq);
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DECLARE_WRITE_LINE_MEMBER(erx_irq);
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DECLARE_WRITE_LINE_MEMBER(txa_irq);
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DECLARE_WRITE_LINE_MEMBER(rxa_irq);
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DECLARE_WRITE_LINE_MEMBER(txb_irq);
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DECLARE_WRITE_LINE_MEMBER(rxb_irq);
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DECLARE_WRITE_LINE_MEMBER(fdc_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(etx_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(erx_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(txa_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(rxa_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(txb_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(rxb_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(sndo_irq);
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DECLARE_WRITE_LINE_MEMBER(sndi_irq);
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DECLARE_WRITE_LINE_MEMBER(sndo_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(sndi_dma_irq);
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DECLARE_WRITE_LINE_MEMBER(fdc_err_irq);
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DECLARE_WRITE_LINE_MEMBER(etx_err_irq);
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@ -95,6 +104,16 @@ private:
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DECLARE_WRITE_LINE_MEMBER(sndo_err_irq);
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DECLARE_WRITE_LINE_MEMBER(sndi_err_irq);
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DECLARE_WRITE_LINE_MEMBER(vblank_irq);
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DECLARE_WRITE_LINE_MEMBER(slot2_irq);
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DECLARE_WRITE_LINE_MEMBER(slot1_irq);
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DECLARE_WRITE_LINE_MEMBER(slot0_irq);
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DECLARE_WRITE_LINE_MEMBER(fdc_irq);
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DECLARE_WRITE_LINE_MEMBER(sound_irq);
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DECLARE_WRITE_LINE_MEMBER(scsi_irq);
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DECLARE_WRITE_LINE_MEMBER(scsi_drq);
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void phases_w(uint8_t phases);
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void sel35_w(int sel35);
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void devsel_w(uint8_t devsel);
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@ -139,6 +158,8 @@ private:
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uint8_t irq_control_r();
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void irq_control_w(uint8_t data);
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void irq_main_set(uint8_t mask, int state);
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void via2_irq_main_set(uint8_t mask, int state);
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void via2_irq_slot_set(uint8_t mask, int state);
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uint32_t dma_badr_r();
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void dma_badr_w(offs_t, uint32_t data, uint32_t mem_mask);
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@ -147,8 +168,17 @@ private:
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uint16_t dma_berr_flag_r();
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void dma_berr_flag_w(offs_t, uint16_t data, uint16_t mem_mask);
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uint8_t dma_scsi_ctrl_r();
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void dma_scsi_ctrl_w(uint8_t data);
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void dma_scsi_a_step();
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uint32_t dma_scsi_a_base_adr_r();
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void dma_scsi_a_base_adr_w(offs_t, uint32_t data, uint32_t mem_mask);
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uint32_t dma_scsi_b_base_adr_r();
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void dma_scsi_b_base_adr_w(offs_t, uint32_t data, uint32_t mem_mask);
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uint8_t dma_scsi_a_ctrl_r();
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void dma_scsi_a_ctrl_w(uint8_t data);
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uint8_t dma_scsi_b_ctrl_r();
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void dma_scsi_b_ctrl_w(uint8_t data);
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uint32_t dma_scsi_a_cur_adr_r();
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uint32_t dma_scsi_b_cur_adr_r();
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uint8_t dma_floppy_ctrl_r();
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void dma_floppy_ctrl_w(uint8_t data);
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@ -181,7 +211,8 @@ macpdm_state::macpdm_state(const machine_config &mconfig, device_type type, cons
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m_macadb(*this, "macadb"),
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m_ram(*this, RAM_TAG),
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m_scc(*this, "scc"),
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m_ncr5380(*this, "ncr5380"),
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m_scsibus(*this, "scsibus"),
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m_ncr53c94(*this, "scsibus:7:ncr53c94"),
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m_fdc(*this, "fdc"),
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m_floppy(*this, "fdc:%d", 0U),
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m_video(*this, "video")
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@ -213,7 +244,15 @@ void macpdm_state::driver_init()
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save_item(NAME(m_dma_badr));
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save_item(NAME(m_dma_berr_en));
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save_item(NAME(m_dma_berr_flag));
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save_item(NAME(m_dma_scsi_ctrl));
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save_item(NAME(m_dma_scsi_buffer));
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save_item(NAME(m_dma_scsi_buffer_byte_count));
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save_item(NAME(m_dma_scsi_a_in_step));
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save_item(NAME(m_dma_scsi_a_base_adr));
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save_item(NAME(m_dma_scsi_b_base_adr));
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save_item(NAME(m_dma_scsi_a_ctrl));
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save_item(NAME(m_dma_scsi_b_ctrl));
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save_item(NAME(m_dma_scsi_a_cur_offset));
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save_item(NAME(m_dma_scsi_b_cur_offset));
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save_item(NAME(m_dma_floppy_ctrl));
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save_item(NAME(m_dma_scc_txa_ctrl));
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save_item(NAME(m_dma_scc_rxa_ctrl));
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@ -257,7 +296,15 @@ void macpdm_state::driver_reset()
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m_dma_badr = 0;
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m_dma_berr_en = 0;
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m_dma_berr_flag = 0;
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m_dma_scsi_ctrl = 0;
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m_dma_scsi_buffer = 0;
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m_dma_scsi_buffer_byte_count = 0;
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m_dma_scsi_a_in_step = false;
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m_dma_scsi_a_base_adr = 0;
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m_dma_scsi_b_base_adr = 0;
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m_dma_scsi_a_ctrl = 0;
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m_dma_scsi_b_ctrl = 0;
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m_dma_scsi_a_cur_offset = 0;
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m_dma_scsi_b_cur_offset = 0;
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m_dma_floppy_ctrl = 0;
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m_dma_scc_txa_ctrl = 0;
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m_dma_scc_rxa_ctrl = 0;
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@ -308,6 +355,28 @@ void macpdm_state::irq_main_set(uint8_t mask, int state)
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m_maincpu->set_input_line(PPC_IRQ, CLEAR_LINE);
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}
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}
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// logerror("irq control %02x\n", m_irq_control);
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}
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void macpdm_state::via2_irq_main_set(uint8_t mask, int state)
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{
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if(((m_via2_ifr & mask) != 0) == state)
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return;
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m_via2_ifr ^= mask;
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logerror("via2 main %02x / %02x -> %02x\n", m_via2_ifr, m_via2_ier, m_via2_ifr & m_via2_ier);
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irq_main_set(0x02, (m_via2_ifr & m_via2_ier) != 0);
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}
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void macpdm_state::via2_irq_slot_set(uint8_t mask, int state)
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{
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if(((m_via2_sifr & mask) != 0) == state)
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return;
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m_via2_sifr ^= mask;
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via2_irq_main_set(0x02, (m_via2_sifr & m_via2_sier) != 0);
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}
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@ -383,15 +452,18 @@ uint8_t macpdm_state::via2_ier_r()
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void macpdm_state::via2_ier_w(uint8_t data)
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{
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if(data & 0x80)
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m_via2_ier |= data & 0x29;
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m_via2_ier |= data & 0x3b;
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else
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m_via2_ier &= ~data;
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logerror("via2 ier %s %s %s %s\n",
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m_via2_ier & 0x20 ? "fdc" : "-",
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m_via2_ier & 0x20 ? "sound" : "-",
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m_via2_ier & 0x08 ? "scsi" : "-",
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m_via2_ier & 0x02 ? "slot" : "-",
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m_via2_ier & 0x01 ? "scsidrq" : "-");
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irq_main_set(0x02, (m_via2_ifr & m_via2_ier) != 0);
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}
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uint8_t macpdm_state::via2_ifr_r()
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@ -407,15 +479,17 @@ uint8_t macpdm_state::via2_sier_r()
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void macpdm_state::via2_sier_w(uint8_t data)
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{
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if(data & 0x80)
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m_via2_sier |= data & 0x38;
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m_via2_sier |= data & 0x78;
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else
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m_via2_sier &= ~data;
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logerror("via2 sier %s %s %s %s\n",
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m_via2_ier & 0x40 ? "vbl" : "-",
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m_via2_ier & 0x20 ? "slot2" : "-",
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m_via2_ier & 0x10 ? "slot1" : "-",
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m_via2_ier & 0x08 ? "slot0" : "-");
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m_via2_sier & 0x40 ? "vbl" : "-",
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m_via2_sier & 0x20 ? "slot2" : "-",
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m_via2_sier & 0x10 ? "slot1" : "-",
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m_via2_sier & 0x08 ? "slot0" : "-");
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via2_irq_main_set(0x02, (m_via2_sifr & m_via2_sier) != 0);
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}
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uint8_t macpdm_state::via2_sifr_r()
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@ -454,12 +528,12 @@ void macpdm_state::fdc_w(offs_t offset, uint8_t data)
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uint8_t macpdm_state::scsi_r(offs_t offset)
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{
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return m_ncr5380->ncr5380_read_reg(offset >> 4);
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return m_ncr53c94->read(offset >> 4);
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}
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void macpdm_state::scsi_w(offs_t offset, uint8_t data)
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{
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return m_ncr5380->ncr5380_write_reg(offset >> 4, data);
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m_ncr53c94->write(offset >> 4, data);
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}
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uint8_t macpdm_state::hmc_r(offs_t offset)
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@ -555,6 +629,36 @@ WRITE_LINE_MEMBER(macpdm_state::via1_irq)
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irq_main_set(0x01, state);
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}
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WRITE_LINE_MEMBER(macpdm_state::fdc_irq)
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{
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via2_irq_main_set(0x20, state);
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}
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WRITE_LINE_MEMBER(macpdm_state::sound_irq)
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{
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via2_irq_main_set(0x20, state);
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}
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WRITE_LINE_MEMBER(macpdm_state::vblank_irq)
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{
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via2_irq_slot_set(0x40, state);
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}
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WRITE_LINE_MEMBER(macpdm_state::slot2_irq)
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{
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via2_irq_slot_set(0x20, state);
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}
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WRITE_LINE_MEMBER(macpdm_state::slot1_irq)
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{
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via2_irq_slot_set(0x10, state);
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}
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WRITE_LINE_MEMBER(macpdm_state::slot0_irq)
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{
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via2_irq_slot_set(0x08, state);
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}
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uint32_t macpdm_state::dma_badr_r()
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{
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return m_dma_badr;
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@ -593,17 +697,134 @@ void macpdm_state::dma_berr_flag_w(offs_t, uint16_t data, uint16_t mem_mask)
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}
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uint8_t macpdm_state::dma_scsi_ctrl_r()
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// SCSI management
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void macpdm_state::dma_scsi_a_step()
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{
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return m_dma_scsi_ctrl;
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m_dma_scsi_a_in_step = true;
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if(m_dma_scsi_a_ctrl & 0x40) {
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fatalerror("scsi dma write\n");
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} else {
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while(m_via2_ifr & 0x01) {
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uint8_t b = m_ncr53c94->dma_r();
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m_dma_scsi_buffer = (m_dma_scsi_buffer & ~(u64(0xff) << (56 - 8*m_dma_scsi_buffer_byte_count))) | (u64(b) << (56 - 8*m_dma_scsi_buffer_byte_count));
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m_dma_scsi_buffer_byte_count ++;
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if(m_dma_scsi_buffer_byte_count == 8) {
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m_dma_scsi_buffer_byte_count = 0;
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m_maincpu->space().write_qword(m_dma_scsi_a_base_adr + m_dma_scsi_a_cur_offset, m_dma_scsi_buffer);
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m_dma_scsi_a_cur_offset += 8;
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}
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}
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}
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m_dma_scsi_a_in_step = false;
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}
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void macpdm_state::dma_scsi_ctrl_w(uint8_t data)
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WRITE_LINE_MEMBER(macpdm_state::scsi_irq)
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{
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m_dma_scsi_ctrl = data;
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logerror("dma_scsi_ctrl_w %02x\n", m_dma_scsi_ctrl);
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via2_irq_main_set(0x08, state);
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}
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WRITE_LINE_MEMBER(macpdm_state::scsi_drq)
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{
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via2_irq_main_set(0x01, state);
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if((m_dma_scsi_a_ctrl & 0x02) && (m_via2_ifr & 0x01) && !m_dma_scsi_a_in_step)
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dma_scsi_a_step();
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}
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uint32_t macpdm_state::dma_scsi_a_base_adr_r()
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{
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return m_dma_scsi_a_base_adr;
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}
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void macpdm_state::dma_scsi_a_base_adr_w(offs_t, uint32_t data, uint32_t mem_mask)
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{
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COMBINE_DATA(&m_dma_scsi_a_base_adr);
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m_dma_scsi_a_base_adr &= ~7;
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m_dma_scsi_a_cur_offset = 0;
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m_dma_scsi_buffer_byte_count = 0;
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logerror("dma_scsi_a_base_adr_w %08x\n", m_dma_scsi_a_base_adr);
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}
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uint32_t macpdm_state::dma_scsi_b_base_adr_r()
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{
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return m_dma_scsi_b_base_adr;
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}
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void macpdm_state::dma_scsi_b_base_adr_w(offs_t, uint32_t data, uint32_t mem_mask)
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{
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COMBINE_DATA(&m_dma_scsi_b_base_adr);
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m_dma_scsi_b_base_adr &= ~7;
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m_dma_scsi_a_cur_offset = 0;
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logerror("dma_scsi_b_base_adr_w %08x\n", m_dma_scsi_b_base_adr);
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}
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uint8_t macpdm_state::dma_scsi_a_ctrl_r()
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{
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return m_dma_scsi_a_ctrl;
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}
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void macpdm_state::dma_scsi_a_ctrl_w(uint8_t data)
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{
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m_dma_scsi_a_ctrl = data & 0x42;
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if(data & 1) {
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m_dma_scsi_a_ctrl &= 0x40;
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m_dma_scsi_a_cur_offset = 0;
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m_dma_scsi_buffer_byte_count = 0;
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}
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if(data & 0x10) {
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while(m_via2_ifr & 0x01) {
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uint8_t b = m_ncr53c94->dma_r();
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m_dma_scsi_buffer = (m_dma_scsi_buffer & ~(u64(0xff) << (56 - 8*m_dma_scsi_buffer_byte_count))) | (u64(b) << (56 - 8*m_dma_scsi_buffer_byte_count));
|
||||
m_dma_scsi_buffer_byte_count ++;
|
||||
if(m_dma_scsi_buffer_byte_count == 8) {
|
||||
m_dma_scsi_buffer_byte_count = 0;
|
||||
m_maincpu->space().write_qword(m_dma_scsi_a_base_adr + m_dma_scsi_a_cur_offset, m_dma_scsi_buffer);
|
||||
m_dma_scsi_a_cur_offset += 8;
|
||||
}
|
||||
}
|
||||
if(m_dma_scsi_buffer_byte_count) {
|
||||
m_maincpu->space().write_qword(m_dma_scsi_a_base_adr + m_dma_scsi_a_cur_offset, m_dma_scsi_buffer);
|
||||
m_dma_scsi_buffer_byte_count = 0;
|
||||
}
|
||||
}
|
||||
|
||||
if((m_dma_scsi_a_ctrl & 0x02) && (m_via2_ifr & 0x01) && !m_dma_scsi_a_in_step)
|
||||
dma_scsi_a_step();
|
||||
|
||||
logerror("dma_scsi_a_ctrl_w %02x\n", m_dma_scsi_a_ctrl);
|
||||
}
|
||||
|
||||
uint8_t macpdm_state::dma_scsi_b_ctrl_r()
|
||||
{
|
||||
return m_dma_scsi_b_ctrl;
|
||||
}
|
||||
|
||||
void macpdm_state::dma_scsi_b_ctrl_w(uint8_t data)
|
||||
{
|
||||
// Channel B is not actually connected to anything
|
||||
m_dma_scsi_b_ctrl = data & 0x42;
|
||||
if(data & 1) {
|
||||
m_dma_scsi_b_ctrl &= 0x40;
|
||||
m_dma_scsi_b_cur_offset = 0;
|
||||
}
|
||||
logerror("dma_scsi_b_ctrl_w %02x\n", m_dma_scsi_b_ctrl);
|
||||
}
|
||||
|
||||
uint32_t macpdm_state::dma_scsi_a_cur_adr_r()
|
||||
{
|
||||
return m_dma_scsi_a_base_adr + m_dma_scsi_a_cur_offset;
|
||||
}
|
||||
|
||||
uint32_t macpdm_state::dma_scsi_b_cur_adr_r()
|
||||
{
|
||||
return m_dma_scsi_b_base_adr + m_dma_scsi_b_cur_offset;
|
||||
}
|
||||
|
||||
|
||||
// Floppy management
|
||||
|
||||
uint8_t macpdm_state::dma_floppy_ctrl_r()
|
||||
{
|
||||
@ -629,6 +850,8 @@ void macpdm_state::dma_floppy_adr_w(offs_t, uint32_t data, uint32_t mem_mask)
|
||||
}
|
||||
|
||||
|
||||
// SCC management
|
||||
|
||||
uint8_t macpdm_state::dma_scc_txa_ctrl_r()
|
||||
{
|
||||
return m_dma_scc_txa_ctrl;
|
||||
@ -706,16 +929,18 @@ void macpdm_state::pdm_map(address_map &map)
|
||||
// 50f08000 = ethernet ID PROM
|
||||
// 50f0a000 = MACE ethernet controller
|
||||
map(0x50f10000, 0x50f10000).rw(FUNC(macpdm_state::scsi_r), FUNC(macpdm_state::scsi_w)).select(0xf0);
|
||||
map(0x50f10100, 0x50f10101).r(m_ncr53c94, FUNC(ncr53c94_device::dma16_r));
|
||||
|
||||
// 50f14000 = sound registers (AWACS)
|
||||
map(0x50f14000, 0x50f1401f).rw(m_awacs, FUNC(awacs_device::read), FUNC(awacs_device::write));
|
||||
map(0x50f16000, 0x50f16000).rw(FUNC(macpdm_state::fdc_r), FUNC(macpdm_state::fdc_w)).select(0x1e00);
|
||||
|
||||
map(0x50f24000, 0x50f24003).w(m_video, FUNC(mac_video_sonora_device::dac_w));
|
||||
|
||||
map(0x50f26002, 0x50f26002).rw(FUNC(macpdm_state::via2_sifr_r), FUNC(macpdm_state::via2_sifr_w));
|
||||
map(0x50f26003, 0x50f26003).r(FUNC(macpdm_state::via2_ifr_r));
|
||||
map(0x50f26012, 0x50f26012).rw(FUNC(macpdm_state::via2_sier_r), FUNC(macpdm_state::via2_sier_w));
|
||||
map(0x50f26013, 0x50f26013).rw(FUNC(macpdm_state::via2_ier_r), FUNC(macpdm_state::via2_ier_w));
|
||||
map(0x50f26002, 0x50f26002).rw(FUNC(macpdm_state::via2_sifr_r), FUNC(macpdm_state::via2_sifr_w)).mirror(0x1fe0);
|
||||
map(0x50f26003, 0x50f26003).r(FUNC(macpdm_state::via2_ifr_r)).mirror(0x1fe0);
|
||||
map(0x50f26012, 0x50f26012).rw(FUNC(macpdm_state::via2_sier_r), FUNC(macpdm_state::via2_sier_w)).mirror(0x1fe0);
|
||||
map(0x50f26013, 0x50f26013).rw(FUNC(macpdm_state::via2_ier_r), FUNC(macpdm_state::via2_ier_w)).mirror(0x1fe0);
|
||||
|
||||
map(0x50f28000, 0x50f28007).rw(m_video, FUNC(mac_video_sonora_device::vctrl_r), FUNC(mac_video_sonora_device::vctrl_w));
|
||||
|
||||
@ -725,10 +950,19 @@ void macpdm_state::pdm_map(address_map &map)
|
||||
|
||||
map(0x50f31000, 0x50f31003).rw(FUNC(macpdm_state::dma_badr_r), FUNC(macpdm_state::dma_badr_w));
|
||||
map(0x50f31c20, 0x50f31c20).rw(FUNC(macpdm_state::dma_enet_tx_ctrl_r), FUNC(macpdm_state::dma_enet_tx_ctrl_w));
|
||||
map(0x50f32008, 0x50f32008).rw(FUNC(macpdm_state::dma_scsi_ctrl_r), FUNC(macpdm_state::dma_scsi_ctrl_w));
|
||||
|
||||
map(0x50f32000, 0x50f32003).rw(FUNC(macpdm_state::dma_scsi_a_base_adr_r), FUNC(macpdm_state::dma_scsi_a_base_adr_w));
|
||||
map(0x50f32004, 0x50f32007).rw(FUNC(macpdm_state::dma_scsi_b_base_adr_r), FUNC(macpdm_state::dma_scsi_b_base_adr_w));
|
||||
map(0x50f32008, 0x50f32008).rw(FUNC(macpdm_state::dma_scsi_a_ctrl_r), FUNC(macpdm_state::dma_scsi_a_ctrl_w));
|
||||
map(0x50f32009, 0x50f32009).rw(FUNC(macpdm_state::dma_scsi_b_ctrl_r), FUNC(macpdm_state::dma_scsi_b_ctrl_w));
|
||||
map(0x50f32010, 0x50f32013).r(FUNC(macpdm_state::dma_scsi_a_cur_adr_r));
|
||||
map(0x50f32014, 0x50f32017).r(FUNC(macpdm_state::dma_scsi_b_cur_adr_r));
|
||||
|
||||
map(0x50f32028, 0x50f32028).rw(FUNC(macpdm_state::dma_enet_rx_ctrl_r), FUNC(macpdm_state::dma_enet_rx_ctrl_w));
|
||||
|
||||
map(0x50f32060, 0x50f32063).rw(FUNC(macpdm_state::dma_floppy_adr_r), FUNC(macpdm_state::dma_floppy_adr_w));
|
||||
map(0x50f32068, 0x50f32068).rw(FUNC(macpdm_state::dma_floppy_ctrl_r), FUNC(macpdm_state::dma_floppy_ctrl_w));
|
||||
|
||||
map(0x50f32088, 0x50f32088).rw(FUNC(macpdm_state::dma_scc_txa_ctrl_r), FUNC(macpdm_state::dma_scc_txa_ctrl_w));
|
||||
map(0x50f32098, 0x50f32098).rw(FUNC(macpdm_state::dma_scc_rxa_ctrl_r), FUNC(macpdm_state::dma_scc_rxa_ctrl_w));
|
||||
map(0x50f320a8, 0x50f320a8).rw(FUNC(macpdm_state::dma_scc_txb_ctrl_r), FUNC(macpdm_state::dma_scc_txb_ctrl_w));
|
||||
@ -756,12 +990,20 @@ void macpdm_state::macpdm(machine_config &config)
|
||||
m_awacs->add_route(0, "lspeaker", 1.0);
|
||||
m_awacs->add_route(1, "rspeaker", 1.0);
|
||||
|
||||
scsi_port_device &scsibus(SCSI_PORT(config, "scsi"));
|
||||
scsibus.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_6));
|
||||
scsibus.set_slot_device(2, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_5));
|
||||
|
||||
NCR5380(config, m_ncr5380, ENET_CLOCK/2);
|
||||
m_ncr5380->set_scsi_port("scsi");
|
||||
NSCSI_BUS(config, m_scsibus);
|
||||
NSCSI_CONNECTOR(config, "scsibus:0", default_scsi_devices, nullptr);
|
||||
NSCSI_CONNECTOR(config, "scsibus:1", default_scsi_devices, nullptr);
|
||||
NSCSI_CONNECTOR(config, "scsibus:2", default_scsi_devices, nullptr);
|
||||
NSCSI_CONNECTOR(config, "scsibus:3", default_scsi_devices, nullptr);
|
||||
NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr);
|
||||
NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, "harddisk");
|
||||
NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, "harddisk");
|
||||
NSCSI_CONNECTOR(config, "scsibus:7").option_set("ncr53c94", NCR53C94).machine_config([this] (device_t *device) {
|
||||
auto &ctrl = downcast<ncr53c94_device &>(*device);
|
||||
ctrl.set_clock(ENET_CLOCK/2);
|
||||
ctrl.drq_handler_cb().set(*this, FUNC(macpdm_state::scsi_drq));
|
||||
ctrl.irq_handler_cb().set(*this, FUNC(macpdm_state::scsi_irq));
|
||||
});
|
||||
|
||||
SOFTWARE_LIST(config, "hdd_list").set_original("mac_hdd");
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user