diff --git a/src/emu/cpu/z8000/8000dasm.c b/src/emu/cpu/z8000/8000dasm.c
index 85b0a16f635..adc1c0e8814 100644
--- a/src/emu/cpu/z8000/8000dasm.c
+++ b/src/emu/cpu/z8000/8000dasm.c
@@ -88,7 +88,7 @@ CPU_DISASSEMBLE( z8000 )
 
 	/* already initialized? */
 	if(z8000_exec == NULL)
-		z8002_init_tables();
+		z8000_init_tables();
 
     GET_OP(oprom, 0, new_pc - pc);
 	new_pc += 2;
diff --git a/src/emu/cpu/z8000/z8000.c b/src/emu/cpu/z8000/z8000.c
index a10dda7a199..06fb99e3333 100644
--- a/src/emu/cpu/z8000/z8000.c
+++ b/src/emu/cpu/z8000/z8000.c
@@ -68,16 +68,19 @@ union _z8000_reg_file
 /* In z8000cpu.h: typedef struct _z8000_state z8000_state; */
 struct _z8000_state
 {
-    UINT16  op[4];      /* opcodes/data of current instruction */
+    UINT32  op[4];      /* opcodes/data of current instruction */
 	UINT32	ppc;		/* previous program counter */
     UINT32  pc;         /* program counter */
-    UINT16  psap;       /* program status pointer */
+    UINT16  psapseg;    /* program status pointer, segment (Z8001 only) */
+    UINT16  psapoff;    /* program status pointer, offset */
     UINT16  fcw;        /* flags and control word */
     UINT16  refresh;    /* refresh timer/counter */
-    UINT16  nsp;        /* system stack pointer */
+    UINT16  nspseg;     /* system stack pointer, segment (Z8001 only) */
+    UINT16  nspoff;     /* system stack pointer, offset */
     UINT16  irq_req;    /* CPU is halted, interrupt or trap request */
     UINT16  irq_srv;    /* serviced interrupt request */
     UINT16  irq_vec;    /* interrupt vector */
+    unsigned int op_valid;  /* bit field indicating if given op[] field is already initialized */
     z8000_reg_file regs;/* registers */
 	int nmi_state;		/* NMI line state */
 	int irq_state[2];	/* IRQ line states (NVI, VI) */
@@ -104,6 +107,29 @@ Z8000_exec *z8000_exec = NULL;
 /* zero, sign and parity flags for logical byte operations */
 static UINT8 z8000_zsp[256];
 
+INLINE int segmented_mode(z8000_state *cpustate)
+{
+  if (cpustate->device->type() == Z8001 && (cpustate->fcw & F_SEG))
+    return 1;
+  return 0;
+}
+
+INLINE UINT32 addr_add(z8000_state *cpustate, UINT32 addr, UINT32 addend)
+{
+    if (segmented_mode(cpustate))
+        return (addr & 0xffff0000) | ((addr + addend) & 0xffff);
+    else
+        return (addr + addend) & 0xffff;
+}
+
+INLINE UINT32 addr_sub(z8000_state *cpustate, UINT32 addr, UINT32 subtrahend)
+{
+    if (segmented_mode(cpustate))
+        return (addr & 0xffff0000) | ((addr - subtrahend) & 0xffff);
+    else
+        return (addr - subtrahend) & 0xffff;
+}
+
 /* conversion table for Z8000 DAB opcode */
 #include "z8000dab.h"
 
@@ -114,6 +140,53 @@ INLINE UINT16 RDOP(z8000_state *cpustate)
     return res;
 }
 
+INLINE UINT32 get_operand (z8000_state *cpustate, int opnum)
+{
+    int i;
+    assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
+
+    for (i = 0; i < opnum; i++)
+        assert (cpustate->op_valid & (1 << i));
+
+    if (! (cpustate->op_valid & (1 << opnum)))
+    {
+        cpustate->op[opnum] = cpustate->direct->read_decrypted_word(cpustate->pc);
+        cpustate->pc += 2;
+        cpustate->op_valid |= (1 << opnum);
+    }
+    return cpustate->op[opnum];
+}
+
+INLINE UINT32 get_addr_operand (z8000_state *cpustate, int opnum)
+{
+    int i;
+    assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
+
+    for (i = 0; i < opnum; i++)
+        assert (cpustate->op_valid & (1 << i));
+
+    if (! (cpustate->op_valid & (1 << opnum)))
+    {
+        UINT32 seg = cpustate->direct->read_decrypted_word(cpustate->pc);
+        cpustate->pc += 2;
+        if (segmented_mode(cpustate))
+        {
+            if (seg & 0x8000)
+            {
+                cpustate->op[opnum] = ((seg & 0x7f00) << 8) | cpustate->direct->read_decrypted_word(cpustate->pc);
+                cpustate->pc += 2;
+            }
+            else
+                cpustate->op[opnum] = ((seg & 0x7f00) << 8) | (seg & 0xff);
+        }
+        else
+            cpustate->op[opnum] = seg;
+        cpustate->op_valid |= (1 << opnum);
+    }
+    return cpustate->op[opnum];
+}
+
+
 INLINE UINT8 RDMEM_B(z8000_state *cpustate, UINT32 addr)
 {
 	return cpustate->program->read_byte(addr);
@@ -130,7 +203,7 @@ INLINE UINT32 RDMEM_L(z8000_state *cpustate, UINT32 addr)
 	UINT32 result;
 	addr &= ~1;
 	result = cpustate->program->read_word(addr) << 16;
-	return result + cpustate->program->read_word(addr + 2);
+	return result + cpustate->program->read_word(addr_add(cpustate, addr, 2));
 }
 
 INLINE void WRMEM_B(z8000_state *cpustate, UINT32 addr, UINT8 value)
@@ -148,7 +221,7 @@ INLINE void WRMEM_L(z8000_state *cpustate, UINT32 addr, UINT32 value)
 {
 	addr &= ~1;
 	cpustate->program->write_word(addr, value >> 16);
-	cpustate->program->write_word((UINT16)(addr + 2), value & 0xffff);
+	cpustate->program->write_word(addr_add(cpustate, addr, 2), value & 0xffff);
 }
 
 INLINE UINT8 RDPORT_B(z8000_state *cpustate, int mode, UINT16 addr)
@@ -203,15 +276,6 @@ INLINE void WRPORT_W(z8000_state *cpustate, int mode, UINT16 addr, UINT16 value)
     }
 }
 
-INLINE UINT16 fetch(z8000_state *cpustate)
-{
-	UINT16 data = cpustate->direct->read_decrypted_word(cpustate->pc);
-
-	cpustate->pc+=2;
-
-	return data;
-}
-
 INLINE void cycles(z8000_state *cpustate, int cycles)
 {
 	cpustate->icount -= cycles;
@@ -261,6 +325,15 @@ INLINE void set_irq(z8000_state *cpustate, int type)
     cpustate->irq_req = type & ~Z8000_HALT;
 }
 
+#define PUSH_PC() do { \
+if (cpustate->device->type() == Z8001) \
+    PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));        /* save current cpustate->pc */ \
+ else \
+    PUSHW(cpustate, SP, cpustate->pc);        /* save current cpustate->pc */ \
+} while (0)
+
+#define SET_PC(VEC) (cpustate->device->type() == Z8001 ? segmented_addr(RDMEM_L(cpustate, VEC)) : (RDMEM_W(cpustate, VEC)))
+
 
 INLINE void Interrupt(z8000_state *cpustate)
 {
@@ -282,80 +355,80 @@ INLINE void Interrupt(z8000_state *cpustate)
     if (cpustate->irq_req & Z8000_TRAP)
     {
         CHANGE_FCW(cpustate, fcw | F_S_N);/* swap to system stack */
-        PUSHW(cpustate, SP, cpustate->pc);        /* save current cpustate->pc */
+        PUSH_PC();
         PUSHW(cpustate, SP, fcw);       /* save current cpustate->fcw */
         PUSHW(cpustate, SP, cpustate->irq_req);   /* save interrupt/trap type tag */
         cpustate->irq_srv = cpustate->irq_req;
         cpustate->irq_req &= ~Z8000_TRAP;
-        cpustate->pc = TRAP;
+        cpustate->pc = SET_PC(TRAP);
         LOG(("Z8K '%s' trap $%04x\n", cpustate->device->tag(), cpustate->pc));
     }
     else
     if (cpustate->irq_req & Z8000_SYSCALL)
     {
         CHANGE_FCW(cpustate, fcw | F_S_N);/* swap to system stack */
-        PUSHW(cpustate, SP, cpustate->pc);        /* save current cpustate->pc */
+        PUSH_PC();
         PUSHW(cpustate, SP, fcw);       /* save current cpustate->fcw */
         PUSHW(cpustate, SP, cpustate->irq_req);   /* save interrupt/trap type tag */
         cpustate->irq_srv = cpustate->irq_req;
         cpustate->irq_req &= ~Z8000_SYSCALL;
-        cpustate->pc = SYSCALL;
+        cpustate->pc = SET_PC(SYSCALL);
         LOG(("Z8K '%s' syscall $%04x\n", cpustate->device->tag(), cpustate->pc));
     }
     else
     if (cpustate->irq_req & Z8000_SEGTRAP)
     {
         CHANGE_FCW(cpustate, fcw | F_S_N);/* swap to system stack */
-        PUSHW(cpustate, SP, cpustate->pc);        /* save current cpustate->pc */
+        PUSH_PC();
         PUSHW(cpustate, SP, fcw);       /* save current cpustate->fcw */
         PUSHW(cpustate, SP, cpustate->irq_req);   /* save interrupt/trap type tag */
         cpustate->irq_srv = cpustate->irq_req;
         cpustate->irq_req &= ~Z8000_SEGTRAP;
-        cpustate->pc = SEGTRAP;
+        cpustate->pc = SET_PC(SEGTRAP);
         LOG(("Z8K '%s' segtrap $%04x\n", cpustate->device->tag(), cpustate->pc));
     }
     else
     if (cpustate->irq_req & Z8000_NMI)
     {
         CHANGE_FCW(cpustate, fcw | F_S_N);/* swap to system stack */
-        PUSHW(cpustate, SP, cpustate->pc);        /* save current cpustate->pc */
+        PUSH_PC();
         PUSHW(cpustate, SP, fcw);       /* save current cpustate->fcw */
         PUSHW(cpustate, SP, cpustate->irq_req);   /* save interrupt/trap type tag */
         cpustate->irq_srv = cpustate->irq_req;
         fcw = RDMEM_W(cpustate,  NMI);
-        cpustate->pc = RDMEM_W(cpustate,  NMI + 2);
+       cpustate->pc = RDMEM_W(cpustate,  NMI + 2);
         cpustate->irq_req &= ~Z8000_NMI;
-        CHANGE_FCW(cpustate, fcw);
-        cpustate->pc = NMI;
+       CHANGE_FCW(cpustate, fcw);
+        cpustate->pc = SET_PC(NMI);
         LOG(("Z8K '%s' NMI $%04x\n", cpustate->device->tag(), cpustate->pc));
     }
     else
     if ((cpustate->irq_req & Z8000_NVI) && (cpustate->fcw & F_NVIE))
     {
         CHANGE_FCW(cpustate, fcw | F_S_N);/* swap to system stack */
-        PUSHW(cpustate, SP, cpustate->pc);        /* save current cpustate->pc */
+        PUSH_PC();
         PUSHW(cpustate, SP, fcw);       /* save current cpustate->fcw */
         PUSHW(cpustate, SP, cpustate->irq_req);   /* save interrupt/trap type tag */
         cpustate->irq_srv = cpustate->irq_req;
         fcw = RDMEM_W(cpustate,  NVI);
-        cpustate->pc = RDMEM_W(cpustate,  NVI + 2);
+        cpustate->pc = SET_PC(NVI + 2); //RDMEM_W(cpustate,  NVI + 2);
         cpustate->irq_req &= ~Z8000_NVI;
-        CHANGE_FCW(cpustate, fcw);
+       CHANGE_FCW(cpustate, fcw);
         LOG(("Z8K '%s' NVI $%04x\n", cpustate->device->tag(), cpustate->pc));
     }
     else
     if ((cpustate->irq_req & Z8000_VI) && (cpustate->fcw & F_VIE))
     {
         CHANGE_FCW(cpustate, fcw | F_S_N);/* swap to system stack */
-        PUSHW(cpustate, SP, cpustate->pc);        /* save current cpustate->pc */
+        PUSH_PC();
         PUSHW(cpustate, SP, fcw);       /* save current cpustate->fcw */
         PUSHW(cpustate, SP, cpustate->irq_req);   /* save interrupt/trap type tag */
         cpustate->irq_srv = cpustate->irq_req;
         fcw = RDMEM_W(cpustate,  cpustate->irq_vec);
-        cpustate->pc = RDMEM_W(cpustate,  VEC00 + 2 * (cpustate->irq_req & 0xff));
+        cpustate->pc = SET_PC(VEC00 + (cpustate->device->type() == Z8001 ? 4 : 2) * (cpustate->irq_req & 0xff)); //RDMEM_W(cpustate,  VEC00 + 2 * (cpustate->irq_req & 0xff));
         cpustate->irq_req &= ~Z8000_VI;
-        CHANGE_FCW(cpustate, fcw);
-        LOG(("Z8K '%s' VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", cpustate->device->tag(), cpustate->irq_vec, VEC00 + VEC00 + 2 * (cpustate->irq_req & 0xff), cpustate->fcw, cpustate->pc));
+       CHANGE_FCW(cpustate, fcw);
+        LOG(("Z8K '%s' VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", cpustate->device->tag(), cpustate->irq_vec, VEC00 + 2 * (cpustate->irq_req & 0xff), cpustate->fcw, cpustate->pc));
     }
 }
 
@@ -371,7 +444,7 @@ static CPU_INIT( z8001 )
 
 	/* already initialized? */
 	if(z8000_exec == NULL)
-		z8001_init_tables();
+		z8000_init_tables();
 }
 
 static CPU_INIT( z8002 )
@@ -386,7 +459,7 @@ static CPU_INIT( z8002 )
 
 	/* already initialized? */
 	if(z8000_exec == NULL)
-		z8002_init_tables();
+		z8000_init_tables();
 }
 
 static CPU_RESET( z8001 )
@@ -451,15 +524,12 @@ static CPU_EXECUTE( z8000 )
         {
             Z8000_exec *exec;
             cpustate->op[0] = RDOP(cpustate);
+            cpustate->op_valid = 1;
             exec = &z8000_exec[cpustate->op[0]];
 
-            if (exec->size > 1)
-                cpustate->op[1] = RDOP(cpustate);
-            if (exec->size > 2)
-                cpustate->op[2] = RDOP(cpustate);
-
             cpustate->icount -= exec->cycles;
             (*exec->opcode)(cpustate);
+            cpustate->op_valid = 0;
         }
     } while (cpustate->icount > 0);
 
@@ -534,9 +604,9 @@ static CPU_SET_INFO( z8002 )
 		case CPUINFO_INT_PC:							cpustate->pc = info->i; 							break;
 		case CPUINFO_INT_REGISTER + Z8000_PC:			cpustate->pc = info->i;							break;
 		case CPUINFO_INT_SP:
-		case CPUINFO_INT_REGISTER + Z8000_NSP:			cpustate->nsp = info->i;							break;
+		case CPUINFO_INT_REGISTER + Z8000_NSP:			cpustate->nspoff = info->i;							break;
 		case CPUINFO_INT_REGISTER + Z8000_FCW:			cpustate->fcw = info->i;							break;
-		case CPUINFO_INT_REGISTER + Z8000_PSAP:			cpustate->psap = info->i;							break;
+		case CPUINFO_INT_REGISTER + Z8000_PSAP:			cpustate->psapoff = info->i;							break;
 		case CPUINFO_INT_REGISTER + Z8000_REFRESH:		cpustate->refresh = info->i;						break;
 		case CPUINFO_INT_REGISTER + Z8000_IRQ_REQ:		cpustate->irq_req = info->i;						break;
 		case CPUINFO_INT_REGISTER + Z8000_IRQ_SRV:		cpustate->irq_srv = info->i;						break;
@@ -603,9 +673,9 @@ CPU_GET_INFO( z8002 )
 		case CPUINFO_INT_PC:
 		case CPUINFO_INT_REGISTER + Z8000_PC:			info->i = cpustate->pc;							break;
 		case CPUINFO_INT_SP:
-        case CPUINFO_INT_REGISTER + Z8000_NSP:			info->i = cpustate->nsp;							break;
+        case CPUINFO_INT_REGISTER + Z8000_NSP:			info->i = cpustate->nspoff;							break;
         case CPUINFO_INT_REGISTER + Z8000_FCW:			info->i = cpustate->fcw;							break;
-		case CPUINFO_INT_REGISTER + Z8000_PSAP:			info->i = cpustate->psap;							break;
+		case CPUINFO_INT_REGISTER + Z8000_PSAP:			info->i = cpustate->psapoff;							break;
 		case CPUINFO_INT_REGISTER + Z8000_REFRESH:		info->i = cpustate->refresh;						break;
 		case CPUINFO_INT_REGISTER + Z8000_IRQ_REQ:		info->i = cpustate->irq_req;						break;
 		case CPUINFO_INT_REGISTER + Z8000_IRQ_SRV:		info->i = cpustate->irq_srv;						break;
@@ -665,9 +735,9 @@ CPU_GET_INFO( z8002 )
             break;
 
 		case CPUINFO_STR_REGISTER + Z8000_PC:			sprintf(info->s, "pc :%08X", cpustate->pc);		break;
-		case CPUINFO_STR_REGISTER + Z8000_NSP:			sprintf(info->s, "SP :%04X", cpustate->nsp);	break;
+		case CPUINFO_STR_REGISTER + Z8000_NSP:			sprintf(info->s, "SP :%04X", cpustate->nspoff);	break;
 		case CPUINFO_STR_REGISTER + Z8000_FCW:			sprintf(info->s, "fcw:%04X", cpustate->fcw);	break;
-		case CPUINFO_STR_REGISTER + Z8000_PSAP:			sprintf(info->s, "nsp:%04X", cpustate->psap);	break;
+		case CPUINFO_STR_REGISTER + Z8000_PSAP:			sprintf(info->s, "psapoff:%04X", cpustate->psapoff);	break;
 		case CPUINFO_STR_REGISTER + Z8000_REFRESH:		sprintf(info->s, "REFR:%04X", cpustate->refresh); break;
 		case CPUINFO_STR_REGISTER + Z8000_IRQ_REQ:		sprintf(info->s, "IRQR:%04X", cpustate->irq_req); break;
 		case CPUINFO_STR_REGISTER + Z8000_IRQ_SRV:		sprintf(info->s, "IRQS:%04X", cpustate->irq_srv); break;
diff --git a/src/emu/cpu/z8000/z8000cpu.h b/src/emu/cpu/z8000/z8000cpu.h
index 36f81371e3f..7cf4eff66d5 100644
--- a/src/emu/cpu/z8000/z8000cpu.h
+++ b/src/emu/cpu/z8000/z8000cpu.h
@@ -55,18 +55,20 @@
 #define RQ(n)   regs.Q[(n) >> 2]
 
 /* the register used as stack pointer */
-#define SP      15
+#define SP      (segmented_mode(cpustate) ? 14 : 15)
 
-/* these vectors are based on cpustate->psap */
-#define RST 	(cpustate->psap + 0x0000)	/* start up cpustate->fcw and cpustate->pc */
-#define EPU 	(cpustate->psap + 0x0004)	/* extension processor unit? trap */
-#define TRAP	(cpustate->psap + 0x0008)	/* privilege violation trap */
-#define SYSCALL (cpustate->psap + 0x000c)	/* system call SC */
-#define SEGTRAP (cpustate->psap + 0x0010)	/* segment trap */
-#define NMI 	(cpustate->psap + 0x0014)	/* non maskable interrupt */
-#define NVI 	(cpustate->psap + 0x0018)	/* non vectored interrupt */
-#define VI		(cpustate->psap + 0x001c)	/* vectored interrupt */
-#define VEC00	(cpustate->psap + 0x001e)	/* vector n cpustate->pc value */
+#define PSA_ADDR (cpustate->device->type() == Z8001 ? segmented_addr((cpustate->psapseg << 16) | cpustate->psapoff) : cpustate->psapoff)
+
+/* these vectors are based on cpustate->psap @@@*/
+#define RST 	(PSA_ADDR + 0)	/* start up cpustate->fcw and cpustate->pc */
+#define EPU 	(PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0008 : 0x0004))	/* extension processor unit? trap */
+#define TRAP	(PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0010 : 0x0008))	/* privilege violation trap */
+#define SYSCALL (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0018 : 0x000c))	/* system call SC */
+#define SEGTRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0020 : 0x0010))	/* segment trap */
+#define NMI 	(PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0028 : 0x0014))	/* non maskable interrupt */
+#define NVI 	(PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0030 : 0x0018))	/* non vectored interrupt */
+#define VI		(PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0038 : 0x001c))	/* vectored interrupt */
+#define VEC00	(PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x003c : 0x001e))	/* vector n cpustate->pc value */
 
 /* bits of the cpustate->fcw */
 #define F_SEG	0x8000				/* segmented mode (Z8001 only) */
@@ -163,28 +165,28 @@
 /* get data from the opcode words */
 /* o is the opcode word offset    */
 /* s is a nibble shift factor     */
-#define GET_BIT(o)      UINT16 bit = 1 << (cpustate->op[o] & 15)
-#define GET_CCC(o,s)	UINT8 cc = (cpustate->op[o] >> (s)) & 15
+#define GET_BIT(o)      UINT16 bit = 1 << (get_operand(cpustate, o) & 15)
+#define GET_CCC(o,s)	UINT8 cc = (get_operand(cpustate, o) >> (s)) & 15
 
-#define GET_DST(o,s)	UINT8 dst = (cpustate->op[o] >> (s)) & 15
-#define GET_SRC(o,s)	UINT8 src = (cpustate->op[o] >> (s)) & 15
-#define GET_IDX(o,s)	UINT8 idx = (cpustate->op[o] >> (s)) & 15
-#define GET_CNT(o,s)	INT8 cnt = (cpustate->op[o] >> (s)) & 15
-#define GET_IMM4(o,s)	UINT8 imm4 = (cpustate->op[o] >> (s)) & 15
+#define GET_DST(o,s)	UINT8 dst = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_SRC(o,s)	UINT8 src = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_IDX(o,s)	UINT8 idx = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_CNT(o,s)	INT8 cnt = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_IMM4(o,s)	UINT8 imm4 = (get_operand(cpustate, o) >> (s)) & 15
 
-#define GET_I4M1(o,s)	UINT8 i4p1 = ((cpustate->op[o] >> (s)) & 15) + 1
-#define GET_IMM1(o,s)	UINT8 imm1 = (cpustate->op[o] >> (s)) & 2
-#define GET_IMM2(o,s)	UINT8 imm2 = (cpustate->op[o] >> (s)) & 3
-#define GET_IMM3(o,s)	UINT8 imm3 = (cpustate->op[o] >> (s)) & 7
+#define GET_I4M1(o,s)	UINT8 i4p1 = ((get_operand(cpustate, o) >> (s)) & 15) + 1
+#define GET_IMM1(o,s)	UINT8 imm1 = (get_operand(cpustate, o) >> (s)) & 2
+#define GET_IMM2(o,s)	UINT8 imm2 = (get_operand(cpustate, o) >> (s)) & 3
+#define GET_IMM3(o,s)	UINT8 imm3 = (get_operand(cpustate, o) >> (s)) & 7
 
-#define GET_IMM8(o) 	UINT8 imm8 = (UINT8)cpustate->op[o]
+#define GET_IMM8(o) 	UINT8 imm8 = (UINT8)get_operand(cpustate, o)
 
-#define GET_IMM16(o)	UINT16 imm16 = cpustate->op[o]
-#define GET_IMM32		UINT32 imm32 = cpustate->op[2] + (cpustate->op[1] << 16)
-#define GET_DSP7		UINT8 dsp7 = cpustate->op[0] & 127
-#define GET_DSP8		INT8 dsp8 = (INT8)cpustate->op[0]
-#define GET_DSP16		UINT16 dsp16 = cpustate->pc + (INT16)cpustate->op[1]
-#define GET_ADDR(o) 	UINT16 addr = (UINT16)cpustate->op[o]
+#define GET_IMM16(o)	UINT16 imm16 = get_operand(cpustate, o)
+#define GET_IMM32		UINT32 imm32 = (get_operand(cpustate, 1) << 16) + get_operand(cpustate, 2)
+#define GET_DSP7		UINT8 dsp7 = get_operand(cpustate, 0) & 127
+#define GET_DSP8		INT8 dsp8 = (INT8)get_operand(cpustate, 0)
+#define GET_DSP16		UINT32 dsp16 = addr_add(cpustate, cpustate->pc, (INT16)get_operand(cpustate, 1))
+#define GET_ADDR(o) 	UINT32 addr = (UINT32)get_addr_operand(cpustate, o)
 
 typedef struct _z8000_state z8000_state;
 
@@ -209,7 +211,5 @@ typedef struct {
 /* opcode execution table */
 extern Z8000_exec *z8000_exec;
 
-extern void z8001_init_tables(void);
-extern void z8002_init_tables(void);
+extern void z8000_init_tables(void);
 extern void z8000_deinit_tables(void);
-
diff --git a/src/emu/cpu/z8000/z8000ops.c b/src/emu/cpu/z8000/z8000ops.c
index bdbc673e4a1..33367b375f7 100644
--- a/src/emu/cpu/z8000/z8000ops.c
+++ b/src/emu/cpu/z8000/z8000ops.c
@@ -33,15 +33,35 @@ INLINE void CHANGE_FCW(z8000_state *cpustate, UINT16 fcw)
 {
 	if (fcw & F_S_N) {			/* system mode now? */
 		if (!(cpustate->fcw & F_S_N)) {	/* and not before? */
-			UINT16 tmp = cpustate->RW(SP);
-			cpustate->RW(SP) = cpustate->nsp;
-			cpustate->nsp = tmp;
+            if (cpustate->device->type() == Z8001) {
+                UINT16 tmp = cpustate->RW(15);
+                cpustate->RW(15) = cpustate->nspoff;
+                cpustate->nspoff = tmp;
+                tmp = cpustate->RW(14);
+                cpustate->RW(14) = cpustate->nspseg;
+                cpustate->nspseg = tmp;
+            }
+            else {
+                UINT16 tmp = cpustate->RW(SP);
+                cpustate->RW(SP) = cpustate->nspoff;
+                cpustate->nspoff = tmp;
+            }
 		}
 	} else {					/* user mode now */
 		if (cpustate->fcw & F_S_N) {		/* and not before? */
-			UINT16 tmp = cpustate->RW(SP);
-			cpustate->RW(SP) = cpustate->nsp;
-			cpustate->nsp = tmp;
+            if (cpustate->device->type() == Z8001) {
+                UINT16 tmp = cpustate->RW(15);
+                cpustate->RW(15) = cpustate->nspoff;
+                cpustate->nspoff = tmp;
+                tmp = cpustate->RW(14);
+                cpustate->RW(14) = cpustate->nspseg;
+                cpustate->nspseg = tmp;
+            }
+            else {
+                UINT16 tmp = cpustate->RW(SP);
+                cpustate->RW(SP) = cpustate->nspoff;
+                cpustate->nspoff = tmp;
+            }
         }
     }
     if (!(cpustate->fcw & F_NVIE) && (fcw & F_NVIE) && (cpustate->irq_state[0] != CLEAR_LINE))
@@ -51,29 +71,67 @@ INLINE void CHANGE_FCW(z8000_state *cpustate, UINT16 fcw)
     cpustate->fcw = fcw;  /* set new cpustate->fcw */
 }
 
+INLINE UINT32 make_segmented_addr(UINT32 addr)
+{
+    return ((addr & 0xffff0000) << 8) | (addr & 0xffff);
+}
+
+INLINE UINT32 segmented_addr(UINT32 addr)
+{
+    return ((addr & 0x7f000000) >> 8) | (addr & 0xffff);
+}
+
+INLINE UINT32 addr_from_reg(z8000_state *cpustate, int regno)
+{
+    if (segmented_mode(cpustate))
+        return segmented_addr(cpustate->RL(regno));
+    else
+        return cpustate->RW(regno);
+}
+
+INLINE void addr_to_reg(z8000_state *cpustate, int regno, UINT32 addr)
+{
+    if (segmented_mode(cpustate))
+        cpustate->RL(regno) = /*(cpustate->RL(regno) & 0x00ff0000) |*/ make_segmented_addr(addr);
+    else
+        cpustate->RW(regno) = addr;
+}
+
 INLINE void PUSHW(z8000_state *cpustate, UINT8 dst, UINT16 value)
 {
-    cpustate->RW(dst) -= 2;
-	WRMEM_W(cpustate,  cpustate->RW(dst), value);
+    if (segmented_mode(cpustate))
+        cpustate->RW(dst | 1) -= 2;
+    else
+        cpustate->RW(dst) -= 2;
+	WRMEM_W(cpustate, addr_from_reg(cpustate, dst), value);
 }
 
 INLINE UINT16 POPW(z8000_state *cpustate, UINT8 src)
 {
-	UINT16 result = RDMEM_W(cpustate,  cpustate->RW(src));
-    cpustate->RW(src) += 2;
+	UINT16 result = RDMEM_W(cpustate, addr_from_reg(cpustate, src));
+    if (segmented_mode(cpustate))
+        cpustate->RW(src | 1) += 2;
+    else
+        cpustate->RW(src) += 2;
 	return result;
 }
 
 INLINE void PUSHL(z8000_state *cpustate, UINT8 dst, UINT32 value)
 {
-	cpustate->RW(dst) -= 4;
-	WRMEM_L(cpustate,  cpustate->RW(dst), value);
+    if (segmented_mode(cpustate))
+        cpustate->RW(dst | 1) -= 4;
+    else
+        cpustate->RW(dst) -= 4;
+	WRMEM_L(cpustate,  addr_from_reg(cpustate, dst), value);
 }
 
 INLINE UINT32 POPL(z8000_state *cpustate, UINT8 src)
 {
-	UINT32 result = RDMEM_L(cpustate,  cpustate->RW(src));
-    cpustate->RW(src) += 4;
+	UINT32 result = RDMEM_L(cpustate, addr_from_reg(cpustate, src));
+    if (segmented_mode(cpustate))
+        cpustate->RW(src | 1) += 4;
+    else
+        cpustate->RW(src) += 4;
 	return result;
 }
 
@@ -1121,7 +1179,7 @@ static void Z00_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RB(dst) = ADDB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	cpustate->RB(dst) = ADDB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1143,7 +1201,7 @@ static void Z01_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RW(dst) = ADDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	cpustate->RW(dst) = ADDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1165,7 +1223,7 @@ static void Z02_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RB(dst) = SUBB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src))); /* EHC */
+	cpustate->RB(dst) = SUBB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src))); /* EHC */
 }
 
 /******************************************
@@ -1187,7 +1245,7 @@ static void Z03_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RW(dst) = SUBW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	cpustate->RW(dst) = SUBW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1209,7 +1267,7 @@ static void Z04_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RB(dst) = ORB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	cpustate->RB(dst) = ORB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1231,7 +1289,7 @@ static void Z05_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RW(dst) = ORW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	cpustate->RW(dst) = ORW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1253,7 +1311,7 @@ static void Z06_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RB(dst) = ANDB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	cpustate->RB(dst) = ANDB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1275,7 +1333,7 @@ static void Z07_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RW(dst) = ANDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	cpustate->RW(dst) = ANDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1297,7 +1355,7 @@ static void Z08_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RB(dst) = XORB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	cpustate->RB(dst) = XORB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1319,7 +1377,7 @@ static void Z09_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RW(dst) = XORW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	cpustate->RW(dst) = XORW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1341,7 +1399,7 @@ static void Z0A_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1363,7 +1421,7 @@ static void Z0B_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate,src)));
 }
 
 /******************************************
@@ -1373,7 +1431,7 @@ static void Z0B_ssN0_dddd(z8000_state *cpustate)
 static void Z0C_ddN0_0000(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
-	WRMEM_B(cpustate,  cpustate->RW(dst), COMB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst))));
+	WRMEM_B(cpustate,  cpustate->RW(dst), COMB(cpustate, RDMEM_B(cpustate, addr_from_reg(cpustate, dst))));
 }
 
 /******************************************
@@ -1384,7 +1442,7 @@ static void Z0C_ddN0_0001_imm8(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_IMM8(OP1);
-	CPB(cpustate, cpustate->RB(dst), imm8);
+	CPB(cpustate, RDMEM_B(cpustate, addr_from_reg(cpustate, dst)), imm8); // @@@done
 }
 
 /******************************************
@@ -1394,7 +1452,8 @@ static void Z0C_ddN0_0001_imm8(z8000_state *cpustate)
 static void Z0C_ddN0_0010(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	WRMEM_B(cpustate,  cpustate->RW(dst), NEGB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst))));
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_B(cpustate,  addr, NEGB(cpustate, RDMEM_B(cpustate, addr)));
 }
 
 /******************************************
@@ -1404,7 +1463,7 @@ static void Z0C_ddN0_0010(z8000_state *cpustate)
 static void Z0C_ddN0_0100(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	TESTB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst)));
+	TESTB(cpustate, RDMEM_B(cpustate, addr_from_reg(cpustate, dst)));
 }
 
 /******************************************
@@ -1415,7 +1474,7 @@ static void Z0C_ddN0_0101_imm8(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_IMM8(OP1);
-	WRMEM_B(cpustate,  cpustate->RW(dst), imm8);
+	WRMEM_B(cpustate,  addr_from_reg(cpustate, dst), imm8);
 }
 
 /******************************************
@@ -1425,8 +1484,9 @@ static void Z0C_ddN0_0101_imm8(z8000_state *cpustate)
 static void Z0C_ddN0_0110(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-    if (RDMEM_B(cpustate, cpustate->RW(dst)) & S08) SET_S; else CLR_S;
-    WRMEM_B(cpustate, cpustate->RW(dst), 0xff);
+    UINT32 addr = addr_from_reg(cpustate, dst);
+    if (RDMEM_B(cpustate, addr) & S08) SET_S; else CLR_S;
+    WRMEM_B(cpustate, addr, 0xff);
 }
 
 /******************************************
@@ -1436,7 +1496,7 @@ static void Z0C_ddN0_0110(z8000_state *cpustate)
 static void Z0C_ddN0_1000(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	WRMEM_B(cpustate,  cpustate->RW(dst), 0);
+	WRMEM_B(cpustate,  addr_from_reg(cpustate, dst), 0);
 }
 
 /******************************************
@@ -1446,7 +1506,8 @@ static void Z0C_ddN0_1000(z8000_state *cpustate)
 static void Z0D_ddN0_0000(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate,  cpustate->RW(dst), COMW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst))));
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_W(cpustate, addr, COMW(cpustate, RDMEM_W(cpustate, addr)));
 }
 
 /******************************************
@@ -1457,7 +1518,7 @@ static void Z0D_ddN0_0001_imm16(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_IMM16(OP1);
-	CPW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)), imm16);
+	CPW(cpustate, RDMEM_W(cpustate, addr_from_reg(cpustate, dst)), imm16);
 }
 
 /******************************************
@@ -1467,7 +1528,8 @@ static void Z0D_ddN0_0001_imm16(z8000_state *cpustate)
 static void Z0D_ddN0_0010(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate,  cpustate->RW(dst), NEGW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst))));
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_W(cpustate,  addr, NEGW(cpustate, RDMEM_W(cpustate, addr)));
 }
 
 /******************************************
@@ -1477,7 +1539,7 @@ static void Z0D_ddN0_0010(z8000_state *cpustate)
 static void Z0D_ddN0_0100(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	TESTW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)));
+	TESTW(cpustate, RDMEM_W(cpustate, addr_from_reg(cpustate, dst)));
 }
 
 /******************************************
@@ -1488,7 +1550,7 @@ static void Z0D_ddN0_0101_imm16(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_IMM16(OP1);
-	WRMEM_W(cpustate,  cpustate->RW(dst), imm16);
+	WRMEM_W(cpustate, addr_from_reg(cpustate, dst), imm16);
 }
 
 /******************************************
@@ -1498,8 +1560,9 @@ static void Z0D_ddN0_0101_imm16(z8000_state *cpustate)
 static void Z0D_ddN0_0110(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-    if (RDMEM_W(cpustate, cpustate->RW(dst)) & S16) SET_S; else CLR_S;
-    WRMEM_W(cpustate, cpustate->RW(dst), 0xffff);
+    UINT32 addr = addr_from_reg(cpustate, dst);
+    if (RDMEM_W(cpustate, addr) & S16) SET_S; else CLR_S;
+    WRMEM_W(cpustate, addr, 0xffff);
 }
 
 /******************************************
@@ -1509,7 +1572,7 @@ static void Z0D_ddN0_0110(z8000_state *cpustate)
 static void Z0D_ddN0_1000(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate,  RDMEM_W(cpustate, cpustate->RW(dst)), 0);
+	WRMEM_W(cpustate,  addr_from_reg(cpustate, dst), 0);
 }
 
 /******************************************
@@ -1570,7 +1633,7 @@ static void Z10_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	CPL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, cpustate->RW(src)));
+	CPL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1581,7 +1644,7 @@ static void Z11_ddN0_ssN0(z8000_state *cpustate)
 {
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	PUSHL(cpustate, dst, RDMEM_L(cpustate, cpustate->RW(src)));
+	PUSHL(cpustate, dst, RDMEM_L(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1603,7 +1666,7 @@ static void Z12_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RL(dst) = SUBL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, cpustate->RW(src)));
+	cpustate->RL(dst) = SUBL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1614,7 +1677,7 @@ static void Z13_ddN0_ssN0(z8000_state *cpustate)
 {
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	PUSHW(cpustate, dst, RDMEM_W(cpustate, cpustate->RW(src)));
+	PUSHW(cpustate, dst, RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1636,7 +1699,7 @@ static void Z14_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RL(dst) = RDMEM_L(cpustate,  cpustate->RW(src));
+	cpustate->RL(dst) = RDMEM_L(cpustate,  addr_from_reg(cpustate, src));
 }
 
 /******************************************
@@ -1669,7 +1732,7 @@ static void Z16_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RL(dst) = ADDL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, cpustate->RW(src)));
+	cpustate->RL(dst) = ADDL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1683,6 +1746,17 @@ static void Z17_ssN0_ddN0(z8000_state *cpustate)
 	cpustate->RW(dst) = POPW(cpustate, src);
 }
 
+/******************************************
+ multl   rqd,imm32
+ flags:  CZSV--
+ ******************************************/
+static void Z18_00N0_dddd_imm32(z8000_state *cpustate)
+{
+	GET_DST(OP0,NIB3);
+	GET_IMM32;
+	cpustate->RQ(dst) = MULTL(cpustate, cpustate->RQ(dst), imm32);
+}
+
 /******************************************
  multl   rqd,@rs
  flags:  CZSV--
@@ -1691,7 +1765,7 @@ static void Z18_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RQ(dst) = MULTL(cpustate, cpustate->RQ(dst), cpustate->RL(src));
+	cpustate->RQ(dst) = MULTL(cpustate, cpustate->RQ(dst), cpustate->RL(src)); //@@@
 }
 
 /******************************************
@@ -1713,7 +1787,7 @@ static void Z19_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RL(dst) = MULTW(cpustate, cpustate->RL(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	cpustate->RL(dst) = MULTW(cpustate, cpustate->RL(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1735,7 +1809,7 @@ static void Z1A_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RQ(dst) = DIVL(cpustate, cpustate->RQ(dst), RDMEM_L(cpustate, cpustate->RW(src)));
+	cpustate->RQ(dst) = DIVL(cpustate, cpustate->RQ(dst), RDMEM_L(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1757,7 +1831,7 @@ static void Z1B_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RL(dst) = DIVW(cpustate, cpustate->RL(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	cpustate->RL(dst) = DIVW(cpustate, cpustate->RL(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 }
 
 /******************************************
@@ -1767,7 +1841,7 @@ static void Z1B_ssN0_dddd(z8000_state *cpustate)
 static void Z1C_ddN0_1000(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	TESTL(cpustate, RDMEM_L(cpustate, cpustate->RW(dst)));
+	TESTL(cpustate, RDMEM_L(cpustate, addr_from_reg(cpustate, dst)));
 }
 
 /******************************************
@@ -1812,7 +1886,7 @@ static void Z1D_ddN0_ssss(z8000_state *cpustate)
 {
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	WRMEM_L(cpustate,  cpustate->RW(dst), cpustate->RL(src));
+	WRMEM_L(cpustate,  addr_from_reg(cpustate, dst), cpustate->RL(src));
 }
 
 /******************************************
@@ -1824,22 +1898,22 @@ static void Z1E_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	switch (cc) {
-		case  0: if (CC0) cpustate->pc = cpustate->RW(dst); break;
-		case  1: if (CC1) cpustate->pc = cpustate->RW(dst); break;
-		case  2: if (CC2) cpustate->pc = cpustate->RW(dst); break;
-		case  3: if (CC3) cpustate->pc = cpustate->RW(dst); break;
-		case  4: if (CC4) cpustate->pc = cpustate->RW(dst); break;
-		case  5: if (CC5) cpustate->pc = cpustate->RW(dst); break;
-		case  6: if (CC6) cpustate->pc = cpustate->RW(dst); break;
-		case  7: if (CC7) cpustate->pc = cpustate->RW(dst); break;
-		case  8: if (CC8) cpustate->pc = cpustate->RW(dst); break;
-		case  9: if (CC9) cpustate->pc = cpustate->RW(dst); break;
-		case 10: if (CCA) cpustate->pc = cpustate->RW(dst); break;
-		case 11: if (CCB) cpustate->pc = cpustate->RW(dst); break;
-		case 12: if (CCC) cpustate->pc = cpustate->RW(dst); break;
-		case 13: if (CCD) cpustate->pc = cpustate->RW(dst); break;
-		case 14: if (CCE) cpustate->pc = cpustate->RW(dst); break;
-		case 15: if (CCF) cpustate->pc = cpustate->RW(dst); break;
+		case  0: if (CC0) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  1: if (CC1) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  2: if (CC2) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  3: if (CC3) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  4: if (CC4) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  5: if (CC5) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  6: if (CC6) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  7: if (CC7) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  8: if (CC8) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case  9: if (CC9) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case 10: if (CCA) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case 11: if (CCB) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case 12: if (CCC) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case 13: if (CCD) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case 14: if (CCE) cpustate->pc = addr_from_reg(cpustate, dst); break;
+		case 15: if (CCF) cpustate->pc = addr_from_reg(cpustate, dst); break;
 	}
 }
 
@@ -1850,8 +1924,11 @@ static void Z1E_ddN0_cccc(z8000_state *cpustate)
 static void Z1F_ddN0_0000(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
-	PUSHW(cpustate, SP, cpustate->pc);
-    cpustate->pc = cpustate->RW(dst);
+    if (segmented_mode(cpustate))
+        PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+    else
+        PUSHW(cpustate, SP, cpustate->pc);
+    cpustate->pc = addr_from_reg(cpustate, dst);
 }
 
 /******************************************
@@ -1862,18 +1939,7 @@ static void Z20_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RB(dst) = RDMEM_B(cpustate,  cpustate->RW(src));
-}
-
-static void Z20_ssN0_dddd_seg(z8000_state *cpustate)
-{
-	UINT32 addr;
-	GET_DST(OP0,NIB3);
-	GET_SRC(OP0,NIB2);
-	addr = (cpustate->RW(src) & 0x0007) << 16;
-	addr|= cpustate->RW(src+1) & 0xffff;
-	cpustate->RB(dst) = RDMEM_B(cpustate,  addr);
-	//cycles?
+    cpustate->RB(dst) = RDMEM_B(cpustate,  addr_from_reg(cpustate, src));
 }
 
 /******************************************
@@ -1895,7 +1961,7 @@ static void Z21_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	cpustate->RW(dst) = RDMEM_W(cpustate,  cpustate->RW(src));
+	cpustate->RW(dst) = RDMEM_W(cpustate,  addr_from_reg(cpustate, src));
 }
 
 /******************************************
@@ -1917,11 +1983,12 @@ static void Z22_ddN0_imm4(z8000_state *cpustate)
 {
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
-	WRMEM_B(cpustate, cpustate->RW(dst), RDMEM_B(cpustate, cpustate->RW(dst)) & ~bit);
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_B(cpustate, addr, RDMEM_B(cpustate, addr) & ~bit);
 }
 
 /******************************************
- result     rd,rs
+ res     rd,rs
  flags:  ------
  ******************************************/
 static void Z23_0000_ssss_0000_dddd_0000_0000(z8000_state *cpustate)
@@ -1939,7 +2006,8 @@ static void Z23_ddN0_imm4(z8000_state *cpustate)
 {
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(dst)) & ~bit);
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_W(cpustate, addr, RDMEM_W(cpustate, addr) & ~bit);
 }
 
 /******************************************
@@ -1961,7 +2029,8 @@ static void Z24_ddN0_imm4(z8000_state *cpustate)
 {
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
-	WRMEM_B(cpustate, cpustate->RW(dst), RDMEM_B(cpustate, cpustate->RW(dst)) | bit);
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_B(cpustate, addr, RDMEM_B(cpustate, addr) | bit);
 }
 
 /******************************************
@@ -1983,7 +2052,8 @@ static void Z25_ddN0_imm4(z8000_state *cpustate)
 {
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(dst)) | bit);
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_W(cpustate, addr, RDMEM_W(cpustate, addr) | bit);
 }
 
 /******************************************
@@ -2005,7 +2075,7 @@ static void Z26_ddN0_imm4(z8000_state *cpustate)
 {
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
-	if (RDMEM_B(cpustate, cpustate->RW(dst)) & bit) CLR_Z; else SET_Z;
+	if (RDMEM_B(cpustate, addr_from_reg(cpustate, dst)) & bit) CLR_Z; else SET_Z;
 }
 
 /******************************************
@@ -2027,7 +2097,7 @@ static void Z27_ddN0_imm4(z8000_state *cpustate)
 {
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
-	if (RDMEM_W(cpustate, cpustate->RW(dst)) & bit) CLR_Z; else SET_Z;
+	if (RDMEM_W(cpustate, addr_from_reg(cpustate, dst)) & bit) CLR_Z; else SET_Z;
 }
 
 /******************************************
@@ -2038,7 +2108,8 @@ static void Z28_ddN0_imm4m1(z8000_state *cpustate)
 {
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	WRMEM_B(cpustate,  cpustate->RW(dst), INCB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst)), i4p1));
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_B(cpustate,  addr, INCB(cpustate, RDMEM_B(cpustate, addr), i4p1));
 }
 
 /******************************************
@@ -2049,7 +2120,8 @@ static void Z29_ddN0_imm4m1(z8000_state *cpustate)
 {
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate,  cpustate->RW(dst), INCW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)), i4p1));
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_W(cpustate, addr, INCW(cpustate, RDMEM_W(cpustate, addr), i4p1));
 }
 
 /******************************************
@@ -2060,7 +2132,8 @@ static void Z2A_ddN0_imm4m1(z8000_state *cpustate)
 {
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	WRMEM_B(cpustate,  cpustate->RW(dst), DECB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst)), i4p1));
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_B(cpustate, addr, DECB(cpustate, RDMEM_B(cpustate, addr), i4p1));
 }
 
 /******************************************
@@ -2071,7 +2144,8 @@ static void Z2B_ddN0_imm4m1(z8000_state *cpustate)
 {
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate,  cpustate->RW(dst), DECW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)), i4p1));
+    UINT32 addr = addr_from_reg(cpustate, dst);
+	WRMEM_W(cpustate, addr, DECW(cpustate, RDMEM_W(cpustate, addr), i4p1));
 }
 
 /******************************************
@@ -2082,8 +2156,9 @@ static void Z2C_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	UINT8 tmp = RDMEM_B(cpustate,  cpustate->RW(src));
-	WRMEM_B(cpustate,  cpustate->RW(src), cpustate->RB(dst));
+    UINT32 addr = addr_from_reg(cpustate, src);
+	UINT8 tmp = RDMEM_B(cpustate,  addr);
+	WRMEM_B(cpustate, addr, cpustate->RB(dst));
 	cpustate->RB(dst) = tmp;
 }
 
@@ -2095,8 +2170,9 @@ static void Z2D_ssN0_dddd(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
-	UINT16 tmp = RDMEM_W(cpustate,  cpustate->RW(src));
-	WRMEM_W(cpustate,  cpustate->RW(src), cpustate->RW(dst));
+    UINT32 addr = addr_from_reg(cpustate, src);
+	UINT16 tmp = RDMEM_W(cpustate, addr);
+	WRMEM_W(cpustate, addr, cpustate->RW(dst));
 	cpustate->RW(dst) = tmp;
 }
 
@@ -2108,7 +2184,7 @@ static void Z2E_ddN0_ssss(z8000_state *cpustate)
 {
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	WRMEM_B(cpustate,  cpustate->RW(dst), cpustate->RB(src));
+	WRMEM_B(cpustate,  addr_from_reg(cpustate, dst), cpustate->RB(src));
 }
 
 /******************************************
@@ -2119,7 +2195,7 @@ static void Z2F_ddN0_ssss(z8000_state *cpustate)
 {
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
-	WRMEM_W(cpustate,  cpustate->RW(dst), cpustate->RW(src));
+	WRMEM_W(cpustate,  addr_from_reg(cpustate, dst), cpustate->RW(src));
 }
 
 /******************************************
@@ -2142,7 +2218,7 @@ static void Z30_ssN0_dddd_imm16(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IMM16(OP1);
-	imm16 += cpustate->RW(src);
+	imm16 = addr_add(cpustate, addr_from_reg(cpustate, src), imm16);
 	cpustate->RB(dst) = RDMEM_B(cpustate,  imm16);
 }
 
@@ -2166,7 +2242,7 @@ static void Z31_ssN0_dddd_imm16(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IMM16(OP1);
-	imm16 += cpustate->RW(src);
+	imm16 = addr_add(cpustate, addr_from_reg(cpustate, src), imm16);
 	cpustate->RW(dst) = RDMEM_W(cpustate,  imm16);
 }
 
@@ -2190,7 +2266,7 @@ static void Z32_ddN0_ssss_imm16(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_IMM16(OP1);
-	imm16 += cpustate->RW(dst);
+	imm16 = addr_add(cpustate, addr_from_reg(cpustate, dst), imm16);
 	WRMEM_B(cpustate,  imm16, cpustate->RB(src));
 }
 
@@ -2214,7 +2290,7 @@ static void Z33_ddN0_ssss_imm16(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_IMM16(OP1);
-	imm16 += cpustate->RW(dst);
+	imm16 = addr_add(cpustate, addr_from_reg(cpustate,dst), imm16);
 	WRMEM_W(cpustate,  imm16, cpustate->RW(src));
 }
 
@@ -2226,7 +2302,7 @@ static void Z34_0000_dddd_dsp16(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_DSP16;
-	cpustate->RW(dst) = dsp16;
+	addr_to_reg(cpustate, dst, dsp16);
 }
 
 /******************************************
@@ -2238,8 +2314,8 @@ static void Z34_ssN0_dddd_imm16(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IMM16(OP1);
-	imm16 += cpustate->RW(src);
-	cpustate->RW(dst) = imm16;
+	imm16 = addr_add(cpustate, addr_from_reg(cpustate, src), imm16);
+	addr_to_reg(cpustate, dst, imm16);
 }
 
 /******************************************
@@ -2262,7 +2338,7 @@ static void Z35_ssN0_dddd_imm16(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IMM16(OP1);
-	imm16 += cpustate->RW(src);
+	imm16 = addr_add(cpustate, addr_from_reg(cpustate, src), imm16);
 	cpustate->RL(dst) = RDMEM_L(cpustate,  imm16);
 }
 
@@ -2310,7 +2386,7 @@ static void Z37_ddN0_ssss_imm16(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_IMM16(OP1);
-	imm16 += cpustate->RW(dst);
+	imm16 = addr_add(cpustate, addr_from_reg(cpustate, dst), imm16);
 	WRMEM_L(cpustate,  imm16, cpustate->RL(src));
 }
 
@@ -2336,8 +2412,15 @@ static void Z39_ssN0_0000(z8000_state *cpustate)
 {
 	GET_SRC(OP0,NIB2);
 	UINT16 fcw;
-	fcw = RDMEM_W(cpustate,  cpustate->RW(src));
-	cpustate->pc	= RDMEM_W(cpustate,  (UINT16)(cpustate->RW(src) + 2));
+    if (segmented_mode(cpustate)) {
+        UINT32 addr = addr_from_reg(cpustate, src);
+        fcw = RDMEM_W(cpustate,  addr + 2);
+        cpustate->pc = segmented_addr(RDMEM_L(cpustate, addr + 4));
+    }
+    else {
+        fcw = RDMEM_W(cpustate,  cpustate->RW(src));
+        cpustate->pc = RDMEM_W(cpustate,  (UINT16)(cpustate->RW(src) + 2));
+    }
 	CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
 }
 
@@ -2346,7 +2429,7 @@ static void Z39_ssN0_0000(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3A_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@@
     GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
     GET_DST(OP1,NIB2);
@@ -2363,7 +2446,7 @@ static void Z3A_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3A_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@@
     GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
     GET_DST(OP1,NIB2);
@@ -2380,7 +2463,7 @@ static void Z3A_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3A_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@@
     GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
     GET_DST(OP1,NIB2);
@@ -2397,7 +2480,7 @@ static void Z3A_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3A_ssss_0011_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@@
     GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
     GET_DST(OP1,NIB2);
@@ -2458,7 +2541,7 @@ static void Z3A_ssss_0111_imm16(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3A_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
 	GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2475,7 +2558,7 @@ static void Z3A_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3A_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
 	GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2492,7 +2575,7 @@ static void Z3A_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3A_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
 	GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2509,7 +2592,7 @@ static void Z3A_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3A_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
 	GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2526,7 +2609,7 @@ static void Z3A_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3B_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2543,7 +2626,7 @@ static void Z3B_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3B_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2560,7 +2643,7 @@ static void Z3B_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3B_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2577,7 +2660,7 @@ static void Z3B_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3B_ssss_0011_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2638,7 +2721,7 @@ static void Z3B_ssss_0111_imm16(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3B_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2655,7 +2738,7 @@ static void Z3B_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3B_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2672,7 +2755,7 @@ static void Z3B_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3B_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2689,7 +2772,7 @@ static void Z3B_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3B_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
-{
+{//@@@
 	GET_SRC(OP0,NIB2);
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
@@ -2705,7 +2788,7 @@ static void Z3B_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3C_ssss_dddd(z8000_state *cpustate)
-{
+{//@@@check
 	GET_SRC(OP0,NIB2);
 	GET_DST(OP0,NIB3);
 	cpustate->RB(dst) = RDPORT_B(cpustate,  0, RDMEM_W(cpustate,  cpustate->RW(src)));
@@ -2716,7 +2799,7 @@ static void Z3C_ssss_dddd(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z3D_ssss_dddd(z8000_state *cpustate)
-{
+{//@@@check
 	GET_SRC(OP0,NIB2);
 	GET_DST(OP0,NIB3);
 	cpustate->RW(dst) = RDPORT_W(cpustate,  0, RDMEM_W(cpustate,  cpustate->RW(src)));
@@ -2727,26 +2810,18 @@ static void Z3D_ssss_dddd(z8000_state *cpustate)
  flags:  ---V--
  ******************************************/
 static void Z3E_dddd_ssss(z8000_state *cpustate)
-{
+{//@@@check
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP0,NIB3);
 	WRPORT_B(cpustate,  0, RDMEM_W(cpustate,  cpustate->RW(dst)), cpustate->RB(src));
 }
 
-/* FIXME: aforementioned opcode looks bugged. */
-static void Z3E_dddd_ssss_seg(z8000_state *cpustate)
-{
-	GET_DST(OP0,NIB2);
-	GET_SRC(OP0,NIB3);
-	WRPORT_B(cpustate,  0, cpustate->RW(dst), cpustate->RB(src));
-}
-
 /******************************************
  out     @rd,rs
  flags:  ---V--
  ******************************************/
 static void Z3F_dddd_ssss(z8000_state *cpustate)
-{
+{//check
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP0,NIB3);
 	WRPORT_W(cpustate,  0, RDMEM_W(cpustate,  cpustate->RW(dst)), cpustate->RW(src));
@@ -2772,7 +2847,7 @@ static void Z40_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RB(dst) = ADDB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr));
 }
 
@@ -2796,7 +2871,7 @@ static void Z41_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RW(dst) = ADDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr));	/* ASG */
 }
 
@@ -2820,7 +2895,7 @@ static void Z42_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RB(dst) = SUBB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr));
 }
 
@@ -2844,7 +2919,7 @@ static void Z43_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RW(dst) = SUBW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr));
 }
 
@@ -2868,7 +2943,7 @@ static void Z44_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RB(dst) = ORB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr));
 }
 
@@ -2892,7 +2967,7 @@ static void Z45_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RW(dst) = ORW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr));
 }
 
@@ -2916,7 +2991,7 @@ static void Z46_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RB(dst) = ANDB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr));
 }
 
@@ -2940,7 +3015,7 @@ static void Z47_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RW(dst) = ANDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr));
 }
 
@@ -2964,7 +3039,7 @@ static void Z48_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RB(dst) = XORB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr));
 }
 
@@ -2988,7 +3063,7 @@ static void Z49_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RW(dst) = XORW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr));
 }
 
@@ -3012,7 +3087,7 @@ static void Z4A_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr));
 }
 
@@ -3036,7 +3111,7 @@ static void Z4B_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr));
 }
 
@@ -3113,29 +3188,6 @@ static void Z4C_0000_1000_addr(z8000_state *cpustate)
 	WRMEM_B(cpustate,  addr, 0);
 }
 
-static void Z4C_0000_1000_addr_seg(z8000_state *cpustate)
-{
-	static UINT32 offset;
-	UINT16 operand1 = fetch(cpustate);
-
-	if(operand1 & 0x8000)
-	{
-		UINT16 operand2 = fetch(cpustate);
-
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand2 & 0xffff);
-		WRMEM_B(cpustate,  offset, 0);
-		cycles(cpustate, 14);
-	}
-	else
-	{
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand1 & 0x00ff);
-		WRMEM_B(cpustate,  offset, 0);
-		cycles(cpustate, 12);
-	}
-}
-
 /******************************************
  comb    addr(rd)
  flags:  -ZSP--
@@ -3144,7 +3196,7 @@ static void Z4C_ddN0_0000_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, COMB(cpustate, RDMEM_B(cpustate, addr)));
 }
 
@@ -3157,7 +3209,7 @@ static void Z4C_ddN0_0001_addr_imm8(z8000_state *cpustate)
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
 	GET_IMM8(OP2);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	CPB(cpustate, RDMEM_B(cpustate, addr), imm8);
 }
 
@@ -3169,7 +3221,7 @@ static void Z4C_ddN0_0010_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, NEGB(cpustate, RDMEM_B(cpustate, addr)));
 }
 
@@ -3181,7 +3233,7 @@ static void Z4C_ddN0_0100_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	TESTB(cpustate, RDMEM_B(cpustate, addr));
 }
 
@@ -3194,7 +3246,7 @@ static void Z4C_ddN0_0101_addr_imm8(z8000_state *cpustate)
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
 	GET_IMM8(OP2);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, imm8);
 }
 
@@ -3206,7 +3258,7 @@ static void Z4C_ddN0_0110_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
     if (RDMEM_B(cpustate, addr) & S08) SET_S; else CLR_S;
     WRMEM_B(cpustate, addr, 0xff);
 }
@@ -3219,7 +3271,7 @@ static void Z4C_ddN0_1000_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, 0);
 }
 
@@ -3275,32 +3327,6 @@ static void Z4D_0000_0101_addr_imm16(z8000_state *cpustate)
 	WRMEM_W(cpustate,  addr, imm16);
 }
 
-static void Z4D_0000_0101_addr_imm16_seg(z8000_state *cpustate)
-{
-	static UINT32 offset;
-	UINT16 operand1 = fetch(cpustate);
-
-	if(operand1 & 0x8000)
-	{
-		UINT16 operand2 = fetch(cpustate);
-		UINT16 imm16 = fetch(cpustate);
-
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand2 & 0xffff);
-		WRMEM_W(cpustate,  offset, imm16);
-		cycles(cpustate, 17);
-	}
-	else
-	{
-		UINT16 imm16 = fetch(cpustate);
-
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand1 & 0x00ff);
-		WRMEM_W(cpustate,  offset, imm16);
-		cycles(cpustate, 15);
-	}
-}
-
 /******************************************
  tset    addr
  flags:  --S---
@@ -3322,29 +3348,6 @@ static void Z4D_0000_1000_addr(z8000_state *cpustate)
 	WRMEM_W(cpustate,  addr, 0);
 }
 
-static void Z4D_0000_1000_addr_seg(z8000_state *cpustate)
-{
-	static UINT32 offset;
-	UINT16 operand1 = fetch(cpustate);
-
-	if(operand1 & 0x8000)
-	{
-		UINT16 operand2 = fetch(cpustate);
-
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand2 & 0xffff);
-		WRMEM_W(cpustate,  offset, 0);
-		cycles(cpustate, 15);
-	}
-	else
-	{
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand1 & 0x00ff);
-		WRMEM_W(cpustate,  offset, 0);
-		cycles(cpustate, 12);
-	}
-}
-
 /******************************************
  com     addr(rd)
  flags:  -ZS---
@@ -3353,7 +3356,7 @@ static void Z4D_ddN0_0000_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, COMW(cpustate, RDMEM_W(cpustate, addr)));
 }
 
@@ -3366,7 +3369,7 @@ static void Z4D_ddN0_0001_addr_imm16(z8000_state *cpustate)
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
 	GET_IMM16(OP2);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	CPW(cpustate, RDMEM_W(cpustate, addr), imm16);
 }
 
@@ -3378,7 +3381,7 @@ static void Z4D_ddN0_0010_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, NEGW(cpustate, RDMEM_W(cpustate, addr)));
 }
 
@@ -3390,7 +3393,7 @@ static void Z4D_ddN0_0100_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	TESTW(cpustate, RDMEM_W(cpustate, addr));
 }
 
@@ -3403,7 +3406,7 @@ static void Z4D_ddN0_0101_addr_imm16(z8000_state *cpustate)
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
 	GET_IMM16(OP2);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, imm16);
 }
 
@@ -3415,7 +3418,7 @@ static void Z4D_ddN0_0110_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
     if (RDMEM_W(cpustate, addr) & S16) SET_S; else CLR_S;
     WRMEM_W(cpustate, addr, 0xffff);
 }
@@ -3428,7 +3431,7 @@ static void Z4D_ddN0_1000_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, 0);
 }
 
@@ -3441,7 +3444,7 @@ static void Z4E_ddN0_ssN0_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP0,NIB3);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, cpustate->RB(src));
 }
 
@@ -3465,7 +3468,7 @@ static void Z50_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	CPL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, addr));
 }
 
@@ -3489,7 +3492,7 @@ static void Z51_ddN0_ssN0_addr(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	PUSHL(cpustate, dst, RDMEM_L(cpustate, addr));
 }
 
@@ -3513,7 +3516,7 @@ static void Z52_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RL(dst) = SUBL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, addr));
 }
 
@@ -3537,7 +3540,7 @@ static void Z53_ddN0_ssN0_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP0,NIB3);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	PUSHW(cpustate, dst, RDMEM_W(cpustate, addr));
 }
 
@@ -3561,7 +3564,7 @@ static void Z54_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RL(dst) = RDMEM_L(cpustate,  addr);
 }
 
@@ -3585,7 +3588,7 @@ static void Z55_ssN0_ddN0_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_L(cpustate,  addr, POPL(cpustate, src));
 }
 
@@ -3609,7 +3612,7 @@ static void Z56_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RL(dst) = ADDL(cpustate, cpustate->RL(dst), RDMEM_L(cpustate, addr));
 }
 
@@ -3633,7 +3636,7 @@ static void Z57_ssN0_ddN0_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, POPW(cpustate, src));
 }
 
@@ -3657,7 +3660,7 @@ static void Z58_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RQ(dst) = MULTL(cpustate, cpustate->RQ(dst), RDMEM_L(cpustate, addr));
 }
 
@@ -3681,7 +3684,7 @@ static void Z59_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RL(dst) = MULTW(cpustate, cpustate->RL(dst), RDMEM_W(cpustate, addr));
 }
 
@@ -3705,7 +3708,7 @@ static void Z5A_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RQ(dst) = DIVL(cpustate, cpustate->RQ(dst), RDMEM_L(cpustate, addr));
 }
 
@@ -3729,7 +3732,7 @@ static void Z5B_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RL(dst) = DIVW(cpustate, cpustate->RL(dst), RDMEM_W(cpustate, addr));
 }
 
@@ -3745,7 +3748,7 @@ static void Z5C_0000_0001_0000_dddd_0000_nmin1_addr(z8000_state *cpustate)
 	while (cnt-- >= 0) {
 		cpustate->RW(dst) = RDMEM_W(cpustate, addr);
 		dst = (dst+1) & 15;
-		addr = (addr + 2) & 0xffff;
+        addr = addr_add (cpustate, addr, 2);
 	}
 }
 
@@ -3771,7 +3774,7 @@ static void Z5C_0000_1001_0000_ssss_0000_nmin1_addr(z8000_state *cpustate)
 	while (cnt-- >= 0) {
 		WRMEM_W(cpustate,  addr, cpustate->RW(src));
 		src = (src+1) & 15;
-		addr = (addr + 2) & 0xffff;
+        addr = addr_add (cpustate, addr, 2);
 	}
 }
 
@@ -3783,7 +3786,7 @@ static void Z5C_ddN0_1000_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	TESTL(cpustate, RDMEM_L(cpustate, addr));
 }
 
@@ -3797,11 +3800,11 @@ static void Z5C_ddN0_1001_0000_ssN0_0000_nmin1_addr(z8000_state *cpustate)
 	GET_SRC(OP1,NIB1);
 	GET_CNT(OP1,NIB3);
 	GET_ADDR(OP2);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	while (cnt-- >= 0) {
 		WRMEM_W(cpustate,  addr, cpustate->RW(src));
 		src = (src+1) & 15;
-		addr = (addr + 2) & 0xffff;
+		addr = addr_add(cpustate, addr, 2);
 	}
 }
 
@@ -3815,11 +3818,11 @@ static void Z5C_ssN0_0001_0000_dddd_0000_nmin1_addr(z8000_state *cpustate)
 	GET_DST(OP1,NIB1);
 	GET_CNT(OP1,NIB3);
 	GET_ADDR(OP2);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	while (cnt-- >= 0) {
 		cpustate->RW(dst) = RDMEM_W(cpustate, addr);
 		dst = (dst+1) & 15;
-		addr = (addr + 2) & 0xffff;
+		addr = addr_add(cpustate, addr, 2);
 	}
 }
 
@@ -3843,7 +3846,7 @@ static void Z5D_ddN0_ssss_addr(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_L(cpustate,  addr, cpustate->RL(src));
 }
 
@@ -3884,7 +3887,7 @@ static void Z5E_ddN0_cccc_addr(z8000_state *cpustate)
 	GET_CCC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	switch (cc) {
 		case  0: if (CC0) cpustate->pc = addr; break;
 		case  1: if (CC1) cpustate->pc = addr; break;
@@ -3912,7 +3915,10 @@ static void Z5E_ddN0_cccc_addr(z8000_state *cpustate)
 static void Z5F_0000_0000_addr(z8000_state *cpustate)
 {
 	GET_ADDR(OP1);
-	PUSHW(cpustate, SP, cpustate->pc);
+    if (segmented_mode(cpustate))
+        PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+    else
+        PUSHW(cpustate, SP, cpustate->pc);
 	cpustate->pc = addr;
 }
 
@@ -3924,8 +3930,11 @@ static void Z5F_ddN0_0000_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	PUSHW(cpustate, SP, cpustate->pc);
-	addr += cpustate->RW(dst);
+    if (segmented_mode(cpustate))
+        PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+    else
+        PUSHW(cpustate, SP, cpustate->pc);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	cpustate->pc = addr;
 }
 
@@ -3949,7 +3958,7 @@ static void Z60_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RB(dst) = RDMEM_B(cpustate, addr);
 }
 
@@ -3973,7 +3982,7 @@ static void Z61_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	cpustate->RW(dst) = RDMEM_W(cpustate, addr);
 }
 
@@ -3997,7 +4006,7 @@ static void Z62_ddN0_imm4_addr(z8000_state *cpustate)
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, RDMEM_B(cpustate, addr) & ~bit);
 }
 
@@ -4021,7 +4030,7 @@ static void Z63_ddN0_imm4_addr(z8000_state *cpustate)
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, RDMEM_W(cpustate, addr) & ~bit);
 }
 
@@ -4045,7 +4054,7 @@ static void Z64_ddN0_imm4_addr(z8000_state *cpustate)
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, RDMEM_B(cpustate, addr) | bit);
 }
 
@@ -4069,7 +4078,7 @@ static void Z65_ddN0_imm4_addr(z8000_state *cpustate)
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, RDMEM_W(cpustate, addr) | bit);
 }
 
@@ -4093,7 +4102,7 @@ static void Z66_ddN0_imm4_addr(z8000_state *cpustate)
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-    addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
     if (RDMEM_B(cpustate, addr) & bit) CLR_Z; else SET_Z;
 }
 
@@ -4117,7 +4126,7 @@ static void Z67_ddN0_imm4_addr(z8000_state *cpustate)
 	GET_BIT(OP0);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-    addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	if (RDMEM_W(cpustate, addr) & bit) CLR_Z; else SET_Z;
 }
 
@@ -4141,7 +4150,7 @@ static void Z68_ddN0_imm4m1_addr(z8000_state *cpustate)
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, INCB(cpustate, RDMEM_B(cpustate, addr), i4p1));
 }
 
@@ -4165,7 +4174,7 @@ static void Z69_ddN0_imm4m1_addr(z8000_state *cpustate)
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, INCW(cpustate, RDMEM_W(cpustate, addr), i4p1));
 }
 
@@ -4189,7 +4198,7 @@ static void Z6A_ddN0_imm4m1_addr(z8000_state *cpustate)
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, DECB(cpustate, RDMEM_B(cpustate, addr), i4p1));
 }
 
@@ -4213,7 +4222,7 @@ static void Z6B_ddN0_imm4m1_addr(z8000_state *cpustate)
 	GET_I4M1(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, DECW(cpustate, RDMEM_W(cpustate, addr), i4p1));
 }
 
@@ -4240,7 +4249,7 @@ static void Z6C_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
 	UINT8 tmp;
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	tmp = RDMEM_B(cpustate, addr);
 	WRMEM_B(cpustate, addr, cpustate->RB(dst));
     cpustate->RB(dst) = tmp;
@@ -4269,7 +4278,7 @@ static void Z6D_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
 	UINT16 tmp;
-	addr += cpustate->RW(src);
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
 	tmp = RDMEM_W(cpustate, addr);
 	WRMEM_W(cpustate,  addr, cpustate->RW(dst));
     cpustate->RW(dst) = tmp;
@@ -4295,7 +4304,7 @@ static void Z6E_ddN0_ssss_addr(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_B(cpustate,  addr, cpustate->RB(src));
 }
 
@@ -4319,7 +4328,7 @@ static void Z6F_ddN0_ssss_addr(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(dst);
+	addr = addr_add(cpustate, addr, cpustate->RW(dst));
 	WRMEM_W(cpustate,  addr, cpustate->RW(src));
 }
 
@@ -4332,7 +4341,7 @@ static void Z70_ssN0_dddd_0000_xxxx_0000_0000(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IDX(OP1,NIB1);
-	cpustate->RB(dst) = RDMEM_B(cpustate,  (UINT16)(cpustate->RW(src) + cpustate->RW(idx)));
+	cpustate->RB(dst) = RDMEM_B(cpustate, addr_add(cpustate, addr_from_reg(cpustate, src), cpustate->RW(idx)));
 }
 
 /******************************************
@@ -4344,7 +4353,7 @@ static void Z71_ssN0_dddd_0000_xxxx_0000_0000(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IDX(OP1,NIB1);
-	cpustate->RW(dst) = RDMEM_W(cpustate,  (UINT16)(cpustate->RW(src) + cpustate->RW(idx)));
+	cpustate->RW(dst) = RDMEM_W(cpustate, addr_add(cpustate, addr_from_reg(cpustate, src), cpustate->RW(idx)));
 }
 
 /******************************************
@@ -4356,7 +4365,7 @@ static void Z72_ddN0_ssss_0000_xxxx_0000_0000(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_IDX(OP1,NIB1);
-	WRMEM_B(cpustate,  (UINT16)(cpustate->RW(dst) + cpustate->RW(idx)), cpustate->RB(src));
+	WRMEM_B(cpustate,  addr_add(cpustate, addr_from_reg(cpustate, dst), cpustate->RW(idx)), cpustate->RB(src));
 }
 
 /******************************************
@@ -4368,7 +4377,7 @@ static void Z73_ddN0_ssss_0000_xxxx_0000_0000(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_IDX(OP1,NIB1);
-	WRMEM_W(cpustate,  (UINT16)(cpustate->RW(dst) + cpustate->RW(idx)), cpustate->RW(src));
+	WRMEM_W(cpustate,  addr_add(cpustate, addr_from_reg(cpustate, dst), cpustate->RW(idx)), cpustate->RW(src));
 }
 
 /******************************************
@@ -4380,7 +4389,7 @@ static void Z74_ssN0_dddd_0000_xxxx_0000_0000(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IDX(OP1,NIB1);
-	cpustate->RW(dst) = (UINT16)(cpustate->RW(src) + cpustate->RW(idx));
+	addr_to_reg(cpustate, dst, addr_add(cpustate, addr_from_reg(cpustate, src), cpustate->RW(idx)));
 }
 
 /******************************************
@@ -4392,7 +4401,7 @@ static void Z75_ssN0_dddd_0000_xxxx_0000_0000(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_IDX(OP1,NIB1);
-	cpustate->RL(dst) = RDMEM_L(cpustate,  (UINT16)(cpustate->RW(src) + cpustate->RW(idx)));
+	cpustate->RL(dst) = RDMEM_L(cpustate,  addr_add(cpustate, addr_from_reg(cpustate, src), cpustate->RW(idx)));
 }
 
 /******************************************
@@ -4403,35 +4412,7 @@ static void Z76_0000_dddd_addr(z8000_state *cpustate)
 {
 	GET_DST(OP0,NIB3);
 	GET_ADDR(OP1);
-	cpustate->RW(dst) = addr;
-}
-
-static void Z76_0000_dddd_addr_seg(z8000_state *cpustate)
-{
-	static UINT32 offset;
-	UINT16 operand1;
-
-	GET_DST(OP0,NIB3);
-	operand1 = fetch(cpustate);
-
-	if(operand1 & 0x8000)
-	{
-		UINT16 operand2 = fetch(cpustate);
-
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand2 & 0xffff);
-		cpustate->RW(dst) = (offset & 0x70000) >> 16;
-		cpustate->RW(dst+1) = offset & 0xffff;
-		cycles(cpustate, 15);
-	}
-	else
-	{
-		offset = (operand1 & 0x0700) << 8;
-		offset|= (operand1 & 0x00ff);
-		cpustate->RW(dst) = (offset & 0x70000) >> 16;
-		cpustate->RW(dst+1) = offset & 0x00ff;
-		cycles(cpustate, 13);
-	}
+    addr_to_reg(cpustate, dst, addr);
 }
 
 /******************************************
@@ -4443,8 +4424,8 @@ static void Z76_ssN0_dddd_addr(z8000_state *cpustate)
 	GET_DST(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
-	addr += cpustate->RW(src);
-    cpustate->RW(dst) = addr;
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
+    addr_to_reg(cpustate, dst, addr);
 }
 
 /******************************************
@@ -4456,7 +4437,7 @@ static void Z77_ddN0_ssss_0000_xxxx_0000_0000(z8000_state *cpustate)
 	GET_SRC(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	GET_IDX(OP1,NIB1);
-	WRMEM_L(cpustate,  (UINT16)(cpustate->RW(dst) + cpustate->RW(idx)), cpustate->RL(src));
+	WRMEM_L(cpustate,  addr_add(cpustate, addr_from_reg(cpustate, dst), cpustate->RW(idx)), cpustate->RL(src));
 }
 
 /******************************************
@@ -4481,9 +4462,17 @@ static void Z79_0000_0000_addr(z8000_state *cpustate)
 {
 	GET_ADDR(OP1);
 	UINT16 fcw;
-	fcw = RDMEM_W(cpustate, addr);
-	cpustate->pc	= RDMEM_W(cpustate, (UINT16)(addr + 2));
+    //printf("LDPS from 0x%x: old pc: 0x%x\n", addr, cpustate->pc);
+    if (segmented_mode(cpustate)) {
+        fcw = RDMEM_W(cpustate,  addr + 2);
+        cpustate->pc = segmented_addr(RDMEM_L(cpustate, addr + 4));
+    }
+    else {
+        fcw = RDMEM_W(cpustate, addr);
+        cpustate->pc = RDMEM_W(cpustate, (UINT16)(addr + 2));
+    }
 	CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
+    //printf("LDPS: new pc: 0x%x\n", cpustate->pc);
 }
 
 /******************************************
@@ -4495,9 +4484,15 @@ static void Z79_ssN0_0000_addr(z8000_state *cpustate)
 	GET_SRC(OP0,NIB2);
 	GET_ADDR(OP1);
 	UINT16 fcw;
-	addr += cpustate->RW(src);
-	fcw = RDMEM_W(cpustate, addr);
-	cpustate->pc	= RDMEM_W(cpustate, (UINT16)(addr + 2));
+	addr = addr_add(cpustate, addr, cpustate->RW(src));
+    if (segmented_mode(cpustate)) {
+        fcw = RDMEM_W(cpustate,  addr + 2);
+        cpustate->pc = segmented_addr(RDMEM_L(cpustate, addr + 4));
+    }
+    else {
+        fcw = RDMEM_W(cpustate, addr);
+        cpustate->pc	= RDMEM_W(cpustate, (UINT16)(addr + 2));
+    }
 	CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
 }
 
@@ -4520,7 +4515,10 @@ static void Z7B_0000_0000(z8000_state *cpustate)
 	UINT16 tag, fcw;
 	tag = POPW(cpustate, SP);	/* get type tag */
 	fcw = POPW(cpustate, SP);	/* get cpustate->fcw  */
-	cpustate->pc	= POPW(cpustate, SP);	/* get cpustate->pc   */
+    if (segmented_mode(cpustate))
+        cpustate->pc = segmented_addr(POPL(cpustate, SP));
+    else
+        cpustate->pc	= POPW(cpustate, SP);	/* get cpustate->pc   */
     cpustate->irq_srv &= ~tag;    /* remove IRQ serviced flag */
 	CHANGE_FCW(cpustate, fcw);		 /* check for user/system mode change */
 	LOG(("Z8K '%s' IRET tag $%04x, fcw $%04x, pc $%04x\n", cpustate->device->tag(), tag, fcw, cpustate->pc));
@@ -4591,7 +4589,7 @@ static void Z7C_0000_01ii(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z7D_dddd_0ccc(z8000_state *cpustate)
-{
+{//@@@
 	GET_IMM3(OP0,NIB3);
 	GET_DST(OP0,NIB2);
 	switch (imm3) {
@@ -4601,11 +4599,14 @@ static void Z7D_dddd_0ccc(z8000_state *cpustate)
 		case 3:
 			cpustate->RW(dst) = cpustate->refresh;
 			break;
+		case 4:
+			cpustate->RW(dst) = cpustate->psapseg;
+			break;
 		case 5:
-			cpustate->RW(dst) = cpustate->psap;
+			cpustate->RW(dst) = cpustate->psapoff;
 			break;
 		case 7:
-			cpustate->RW(dst) = cpustate->nsp;
+			cpustate->RW(dst) = cpustate->nspoff;
 			break;
 		default:
 			LOG(("Z8K '%s' LDCTL R%d,%d\n", cpustate->device->tag(), dst, imm3));
@@ -4617,7 +4618,7 @@ static void Z7D_dddd_0ccc(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z7D_ssss_1ccc(z8000_state *cpustate)
-{
+{//@@@
 	GET_IMM3(OP0,NIB3);
 	GET_SRC(OP0,NIB2);
 	switch (imm3) {
@@ -4631,11 +4632,14 @@ static void Z7D_ssss_1ccc(z8000_state *cpustate)
 		case 3:
 			cpustate->refresh = cpustate->RW(src);
 			break;
+		case 4:
+			cpustate->psapseg = cpustate->RW(src);
+			break;
 		case 5:
-			cpustate->psap = cpustate->RW(src);
+			cpustate->psapoff = cpustate->RW(src);
 			break;
 		case 7:
-			cpustate->nsp = cpustate->RW(src);
+			cpustate->nspoff = cpustate->RW(src);
 			break;
 		default:
 			LOG(("Z8K '%s' LDCTL %d,R%d\n", cpustate->device->tag(), imm3, src));
@@ -4841,6 +4845,16 @@ static void Z8C_dddd_0110(z8000_state *cpustate)
     cpustate->RB(dst) = 0xff;
 }
 
+/******************************************
+ ldctlb rbd,flags
+ flags:  CZSVDH
+ ******************************************/
+static void Z8C_dddd_0001(z8000_state *cpustate)
+{
+	GET_DST(OP0,NIB2);
+	cpustate->RB(dst) = cpustate->fcw & 0xfc;
+}
+
 /******************************************
  clrb    rbd
  flags:  ------
@@ -4851,6 +4865,17 @@ static void Z8C_dddd_1000(z8000_state *cpustate)
 	cpustate->RB(dst) = 0;
 }
 
+/******************************************
+ ldctlb flags,rbd
+ flags:  ------
+ ******************************************/
+static void Z8C_dddd_1001(z8000_state *cpustate)
+{
+	GET_DST(OP0,NIB2);
+    cpustate->fcw &= ~0x00fc;
+    cpustate->fcw |= (cpustate->RB(dst) & 0xfc);
+}
+
 /******************************************
  nop
  flags:  ------
@@ -4982,7 +5007,7 @@ static void Z90_ssss_dddd(z8000_state *cpustate)
  flags:  ------
  ******************************************/
 static void Z91_ddN0_ssss(z8000_state *cpustate)
-{
+{//@@@
     GET_SRC(OP0,NIB3);
     GET_DST(OP0,NIB2);
     PUSHL(cpustate, dst, cpustate->RL(src));
@@ -5131,24 +5156,44 @@ static void Z9D_imm8(z8000_state *cpustate)
 static void Z9E_0000_cccc(z8000_state *cpustate)
 {
 	GET_CCC(OP0,NIB3);
-	switch (cc) {
-		case  0: if (CC0) cpustate->pc = POPW(cpustate, SP); break;
-		case  1: if (CC1) cpustate->pc = POPW(cpustate, SP); break;
-		case  2: if (CC2) cpustate->pc = POPW(cpustate, SP); break;
-		case  3: if (CC3) cpustate->pc = POPW(cpustate, SP); break;
-		case  4: if (CC4) cpustate->pc = POPW(cpustate, SP); break;
-		case  5: if (CC5) cpustate->pc = POPW(cpustate, SP); break;
-		case  6: if (CC6) cpustate->pc = POPW(cpustate, SP); break;
-		case  7: if (CC7) cpustate->pc = POPW(cpustate, SP); break;
-		case  8: if (CC8) cpustate->pc = POPW(cpustate, SP); break;
-		case  9: if (CC9) cpustate->pc = POPW(cpustate, SP); break;
-		case 10: if (CCA) cpustate->pc = POPW(cpustate, SP); break;
-		case 11: if (CCB) cpustate->pc = POPW(cpustate, SP); break;
-		case 12: if (CCC) cpustate->pc = POPW(cpustate, SP); break;
-		case 13: if (CCD) cpustate->pc = POPW(cpustate, SP); break;
-		case 14: if (CCE) cpustate->pc = POPW(cpustate, SP); break;
-		case 15: if (CCF) cpustate->pc = POPW(cpustate, SP); break;
-	}
+    if (segmented_mode(cpustate))
+        switch (cc) {
+            case  0: if (CC0) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  1: if (CC1) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  2: if (CC2) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  3: if (CC3) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  4: if (CC4) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  5: if (CC5) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  6: if (CC6) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  7: if (CC7) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  8: if (CC8) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case  9: if (CC9) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case 10: if (CCA) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case 11: if (CCB) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case 12: if (CCC) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case 13: if (CCD) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case 14: if (CCE) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+            case 15: if (CCF) cpustate->pc = segmented_addr(POPL(cpustate, SP)); break;
+        }
+    else
+        switch (cc) {
+		    case  0: if (CC0) cpustate->pc = POPW(cpustate, SP); break;
+		    case  1: if (CC1) cpustate->pc = POPW(cpustate, SP); break;
+		    case  2: if (CC2) cpustate->pc = POPW(cpustate, SP); break;
+		    case  3: if (CC3) cpustate->pc = POPW(cpustate, SP); break;
+		    case  4: if (CC4) cpustate->pc = POPW(cpustate, SP); break;
+		    case  5: if (CC5) cpustate->pc = POPW(cpustate, SP); break;
+		    case  6: if (CC6) cpustate->pc = POPW(cpustate, SP); break;
+		    case  7: if (CC7) cpustate->pc = POPW(cpustate, SP); break;
+		    case  8: if (CC8) cpustate->pc = POPW(cpustate, SP); break;
+		    case  9: if (CC9) cpustate->pc = POPW(cpustate, SP); break;
+		    case 10: if (CCA) cpustate->pc = POPW(cpustate, SP); break;
+		    case 11: if (CCB) cpustate->pc = POPW(cpustate, SP); break;
+		    case 12: if (CCC) cpustate->pc = POPW(cpustate, SP); break;
+		    case 13: if (CCD) cpustate->pc = POPW(cpustate, SP); break;
+		    case 14: if (CCE) cpustate->pc = POPW(cpustate, SP); break;
+		    case 15: if (CCF) cpustate->pc = POPW(cpustate, SP); break;
+        }
 }
 
 /******************************************
@@ -5733,7 +5778,7 @@ static void ZB7_ssss_dddd(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_0010_0000_rrrr_ssN0_0000(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5749,7 +5794,7 @@ static void ZB8_ddN0_0010_0000_rrrr_ssN0_0000(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_0110_0000_rrrr_ssN0_1110(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5765,7 +5810,7 @@ static void ZB8_ddN0_0110_0000_rrrr_ssN0_1110(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_1010_0000_rrrr_ssN0_0000(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5781,7 +5826,7 @@ static void ZB8_ddN0_1010_0000_rrrr_ssN0_0000(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_1110_0000_rrrr_ssN0_1110(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5797,7 +5842,7 @@ static void ZB8_ddN0_1110_0000_rrrr_ssN0_1110(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_0000_0000_rrrr_ssN0_0000(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5812,7 +5857,7 @@ static void ZB8_ddN0_0000_0000_rrrr_ssN0_0000(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_0100_0000_rrrr_ssN0_0000(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5827,7 +5872,7 @@ static void ZB8_ddN0_0100_0000_rrrr_ssN0_0000(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_1000_0000_rrrr_ssN0_0000(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5842,7 +5887,7 @@ static void ZB8_ddN0_1000_0000_rrrr_ssN0_0000(z8000_state *cpustate)
  flags:  -ZSV--
  ******************************************/
 static void ZB8_ddN0_1100_0000_rrrr_ssN0_0000(z8000_state *cpustate)
-{
+{//@@@
 	GET_DST(OP0,NIB2);
 	GET_SRC(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
@@ -5877,7 +5922,7 @@ static void ZBA_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -5896,7 +5941,7 @@ static void ZBA_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(src)++;
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) CLR_V; else SET_V;
 }
 
@@ -5911,9 +5956,9 @@ static void ZBA_ssN0_0001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
 	GET_CCC(OP1,NIB3);	/* repeat? */
-    WRMEM_B(cpustate,  cpustate->RW(dst), RDMEM_B(cpustate, cpustate->RW(src)));
-	cpustate->RW(dst)++;
-	cpustate->RW(src)++;
+    WRMEM_B(cpustate,  cpustate->RW(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
+	addr_to_reg(cpustate, dst, addr_add(cpustate, addr_from_reg(cpustate, dst), 1));
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -5927,7 +5972,7 @@ static void ZBA_ssN0_0010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst)), RDMEM_B(cpustate, cpustate->RW(src)));
+	CPB(cpustate, RDMEM_B(cpustate, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -5946,8 +5991,8 @@ static void ZBA_ssN0_0010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(dst)++;
-	cpustate->RW(src)++;
+	addr_to_reg(cpustate, dst, addr_add(cpustate, addr_from_reg(cpustate, dst), 1));
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -5961,7 +6006,7 @@ static void ZBA_ssN0_0100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -5980,7 +6025,7 @@ static void ZBA_ssN0_0100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(src)++;
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -5994,7 +6039,7 @@ static void ZBA_ssN0_0110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst)), RDMEM_B(cpustate, cpustate->RW(src)));
+	CPB(cpustate, RDMEM_B(cpustate, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6013,8 +6058,8 @@ static void ZBA_ssN0_0110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(dst)++;
-	cpustate->RW(src)++;
+	addr_to_reg(cpustate, dst, addr_add(cpustate, addr_from_reg(cpustate, dst), 1));
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6028,7 +6073,7 @@ static void ZBA_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-    CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+    CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
     switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6047,7 +6092,7 @@ static void ZBA_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-    cpustate->RW(src)--;
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) CLR_V; else SET_V;
 }
 
@@ -6062,9 +6107,9 @@ static void ZBA_ssN0_1001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
 	GET_CCC(OP1,NIB3);
-	WRMEM_B(cpustate,  cpustate->RW(dst), RDMEM_B(cpustate, cpustate->RW(src)));
-	cpustate->RW(dst)--;
-	cpustate->RW(src)--;
+	WRMEM_B(cpustate,  addr_from_reg(cpustate, dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
+	addr_to_reg(cpustate, dst, addr_sub(cpustate, addr_from_reg(cpustate, dst), 1));
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6078,7 +6123,7 @@ static void ZBA_ssN0_1010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-    CPB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst)), RDMEM_B(cpustate, cpustate->RW(src)));
+    CPB(cpustate, RDMEM_B(cpustate, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6097,8 +6142,8 @@ static void ZBA_ssN0_1010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(dst)--;
-	cpustate->RW(src)--;
+	addr_to_reg(cpustate, dst, addr_sub(cpustate, addr_from_reg(cpustate, dst), 1));
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) CLR_V; else SET_V;
 }
 
@@ -6112,7 +6157,7 @@ static void ZBA_ssN0_1100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, cpustate->RW(src)));
+	CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6131,7 +6176,7 @@ static void ZBA_ssN0_1100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-    cpustate->RW(src)--;
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6145,7 +6190,7 @@ static void ZBA_ssN0_1110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-    CPB(cpustate, RDMEM_B(cpustate, cpustate->RW(dst)), RDMEM_B(cpustate, cpustate->RW(src)));
+    CPB(cpustate, RDMEM_B(cpustate, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6164,8 +6209,8 @@ static void ZBA_ssN0_1110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
 	}
-	cpustate->RW(dst)--;
-	cpustate->RW(src)--;
+	addr_to_reg(cpustate, dst, addr_sub(cpustate, addr_from_reg(cpustate, dst), 1));
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 1));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6179,7 +6224,7 @@ static void ZBB_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
     switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6198,7 +6243,7 @@ static void ZBB_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-    cpustate->RW(src) += 2;
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 2));
 	if (--cpustate->RW(cnt)) CLR_V; else SET_V;
 }
 
@@ -6213,9 +6258,9 @@ static void ZBB_ssN0_0001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
     GET_CNT(OP1,NIB1);
 	GET_DST(OP1,NIB2);
 	GET_CCC(OP1,NIB3);
-	WRMEM_W(cpustate,  cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
-	cpustate->RW(dst) += 2;
-	cpustate->RW(src) += 2;
+	WRMEM_W(cpustate,  addr_from_reg(cpustate, dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 2));
+	addr_to_reg(cpustate, dst, addr_add(cpustate, addr_from_reg(cpustate, dst), 2));
 	if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6229,7 +6274,7 @@ static void ZBB_ssN0_0010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, RDMEM_W(cpustate, addr_from_reg(cpustate, dst)), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6248,8 +6293,8 @@ static void ZBB_ssN0_0010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(dst) += 2;
-	cpustate->RW(src) += 2;
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 2));
+	addr_to_reg(cpustate, dst, addr_add(cpustate, addr_from_reg(cpustate, dst), 2));
 	if (--cpustate->RW(cnt)) CLR_V; else SET_V;
 }
 
@@ -6263,7 +6308,7 @@ static void ZBB_ssN0_0100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6282,7 +6327,7 @@ static void ZBB_ssN0_0100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(src) += 2;
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 2));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6296,7 +6341,7 @@ static void ZBB_ssN0_0110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, RDMEM_W(cpustate, addr_from_reg(cpustate, dst)), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6315,8 +6360,8 @@ static void ZBB_ssN0_0110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-	cpustate->RW(dst) += 2;
-    cpustate->RW(src) += 2;
+	addr_to_reg(cpustate, src, addr_add(cpustate, addr_from_reg(cpustate, src), 2));
+	addr_to_reg(cpustate, dst, addr_add(cpustate, addr_from_reg(cpustate, dst), 2));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6330,7 +6375,7 @@ static void ZBB_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
     switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6349,7 +6394,7 @@ static void ZBB_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-    cpustate->RW(src) -= 2;
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 2));
 	if (--cpustate->RW(cnt)) CLR_V; else SET_V;
 }
 
@@ -6364,9 +6409,9 @@ static void ZBB_ssN0_1001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
     GET_CNT(OP1,NIB1);
     GET_DST(OP1,NIB2);
 	GET_CCC(OP1,NIB3);
-    WRMEM_W(cpustate,  cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
-    cpustate->RW(dst) -= 2;
-    cpustate->RW(src) -= 2;
+    WRMEM_W(cpustate,  addr_from_reg(cpustate, dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
+	addr_to_reg(cpustate, dst, addr_sub(cpustate, addr_from_reg(cpustate, dst), 2));
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 2));
 	if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6380,7 +6425,7 @@ static void ZBB_ssN0_1010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, RDMEM_W(cpustate, addr_from_reg(cpustate, dst)), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6399,8 +6444,8 @@ static void ZBB_ssN0_1010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-    cpustate->RW(dst) -= 2;
-    cpustate->RW(src) -= 2;
+	addr_to_reg(cpustate, dst, addr_sub(cpustate, addr_from_reg(cpustate, dst), 2));
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 2));
 	if (--cpustate->RW(cnt)) CLR_V; else SET_V;
 }
 
@@ -6414,7 +6459,7 @@ static void ZBB_ssN0_1100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6433,7 +6478,7 @@ static void ZBB_ssN0_1100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-    cpustate->RW(src) -= 2;
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 2));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6447,7 +6492,7 @@ static void ZBB_ssN0_1110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 	GET_CCC(OP1,NIB3);
 	GET_DST(OP1,NIB2);
 	GET_CNT(OP1,NIB1);
-	CPW(cpustate, RDMEM_W(cpustate, cpustate->RW(dst)), RDMEM_W(cpustate, cpustate->RW(src)));
+	CPW(cpustate, RDMEM_W(cpustate, addr_from_reg(cpustate, dst)), RDMEM_W(cpustate, addr_from_reg(cpustate, src)));
 	switch (cc) {
 		case  0: if (CC0) SET_Z; else CLR_Z; break;
 		case  1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6466,8 +6511,8 @@ static void ZBB_ssN0_1110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
 		case 14: if (CCE) SET_Z; else CLR_Z; break;
 		case 15: if (CCF) SET_Z; else CLR_Z; break;
     }
-    cpustate->RW(dst) -= 2;
-    cpustate->RW(src) -= 2;
+	addr_to_reg(cpustate, dst, addr_sub(cpustate, addr_from_reg(cpustate, dst), 2));
+	addr_to_reg(cpustate, src, addr_sub(cpustate, addr_from_reg(cpustate, src), 2));
 	if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
 }
 
@@ -6543,9 +6588,12 @@ static void ZC_dddd_imm8(z8000_state *cpustate)
 static void ZD_dsp12(z8000_state *cpustate)
 {
 	INT16 dsp12 = cpustate->op[0] & 0xfff;
-	PUSHW(cpustate, SP, cpustate->pc);
-	dsp12 = (dsp12 & 2048) ? 4096 -2 * (dsp12 & 2047) : -2 * (dsp12 & 2047);
-	cpustate->pc += dsp12;
+    if (segmented_mode(cpustate))
+        PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+    else
+        PUSHW(cpustate, SP, cpustate->pc);
+	dsp12 = (dsp12 & 2048) ? 4096 - 2 * (dsp12 & 2047) : -2 * (dsp12 & 2047);
+	cpustate->pc = addr_add(cpustate, cpustate->pc, dsp12);
 }
 
 /******************************************
@@ -6557,23 +6605,23 @@ static void ZE_cccc_dsp8(z8000_state *cpustate)
 	GET_DSP8;
 	GET_CCC(OP0,NIB1);
 	switch (cc) {
-		case  0: if (CC0) cpustate->pc += dsp8 * 2; break;
-		case  1: if (CC1) cpustate->pc += dsp8 * 2; break;
-		case  2: if (CC2) cpustate->pc += dsp8 * 2; break;
-		case  3: if (CC3) cpustate->pc += dsp8 * 2; break;
-		case  4: if (CC4) cpustate->pc += dsp8 * 2; break;
-		case  5: if (CC5) cpustate->pc += dsp8 * 2; break;
-		case  6: if (CC6) cpustate->pc += dsp8 * 2; break;
-		case  7: if (CC7) cpustate->pc += dsp8 * 2; break;
-		case  8: if (CC8) cpustate->pc += dsp8 * 2; break;
-		case  9: if (CC9) cpustate->pc += dsp8 * 2; break;
-		case 10: if (CCA) cpustate->pc += dsp8 * 2; break;
-		case 11: if (CCB) cpustate->pc += dsp8 * 2; break;
-		case 12: if (CCC) cpustate->pc += dsp8 * 2; break;
-		case 13: if (CCD) cpustate->pc += dsp8 * 2; break;
-		case 14: if (CCE) cpustate->pc += dsp8 * 2; break;
-		case 15: if (CCF) cpustate->pc += dsp8 * 2; break;
-    }
+		case  0: if (CC0) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  1: if (CC1) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  2: if (CC2) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  3: if (CC3) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  4: if (CC4) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  5: if (CC5) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  6: if (CC6) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  7: if (CC7) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  8: if (CC8) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  9: if (CC9) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  10: if (CCA) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  11: if (CCB) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  12: if (CCC) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  13: if (CCD) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  14: if (CCE) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+		case  15: if (CCF) cpustate->pc = addr_add(cpustate, cpustate->pc, dsp8 * 2); break;
+	}
 }
 
 /******************************************
@@ -6586,7 +6634,7 @@ static void ZF_dddd_0dsp7(z8000_state *cpustate)
     GET_DSP7;
     cpustate->RB(dst) -= 1;
     if (cpustate->RB(dst)) {
-        cpustate->pc = cpustate->pc - 2 * dsp7;
+        cpustate->pc = addr_sub(cpustate, cpustate->pc, 2 * dsp7);
     }
 }
 
@@ -6600,8 +6648,6 @@ static void ZF_dddd_1dsp7(z8000_state *cpustate)
 	GET_DSP7;
 	cpustate->RW(dst) -= 1;
 	if (cpustate->RW(dst)) {
-		cpustate->pc = cpustate->pc - 2 * dsp7;
+        cpustate->pc = addr_sub(cpustate, cpustate->pc, 2 * dsp7);
 	}
 }
-
-
diff --git a/src/emu/cpu/z8000/z8000tbl.c b/src/emu/cpu/z8000/z8000tbl.c
index 2f8f611f7a8..d9cab889947 100644
--- a/src/emu/cpu/z8000/z8000tbl.c
+++ b/src/emu/cpu/z8000/z8000tbl.c
@@ -75,6 +75,7 @@ static const Z8000_init table[] = {
 {0x1600,0x160f, 1,3, 14,Z16_0000_dddd_imm32,					 "addl    %rl3,%#l1",				0},
 {0x1610,0x16ff, 1,1, 14,Z16_ssN0_dddd,							 "addl    %rl3,@%rw2",				0},
 {0x1711,0x17ff, 1,1, 12,Z17_ssN0_ddN0,							 "pop     @%rw3,@%rw2",				0},
+{0x1800,0x180f, 1,1,282,Z18_00N0_dddd_imm32,					 "multl   %rq3,@%l#1",				0},
 {0x1810,0x18ff, 1,1,282,Z18_ssN0_dddd,							 "multl   %rq3,@%rw2",				0},
 {0x1900,0x190f, 1,2, 70,Z19_0000_dddd_imm16,					 "mult    %rl3,%#w1",				0},
 {0x1910,0x19ff, 1,1, 70,Z19_ssN0_dddd,							 "mult    %rl3,@%rw2",				0},
@@ -388,529 +389,13 @@ static const Z8000_init table[] = {
 {0x8c02,0x8cf2,16,1,  7,Z8C_dddd_0010,							 "negb    %rb2",					0},
 {0x8c04,0x8cf4,16,1,  7,Z8C_dddd_0100,							 "testb   %rb2",					0},
 {0x8c06,0x8cf6,16,1,  7,Z8C_dddd_0110,							 "tsetb   %rb2",					0},
-{0x8c08,0x8cf8,16,1,  7,Z8C_dddd_1000,							 "clrb    %rb2",					0},
-{0x8d00,0x8df0,16,1,  7,Z8D_dddd_0000,							 "com     %rw2",					0},
-{0x8d01,0x8df1,16,1,  7,Z8D_imm4_0001,							 "setflg  %f2",						0},
-{0x8d02,0x8df2,16,1,  7,Z8D_dddd_0010,							 "neg     %rw2",					0},
-{0x8d03,0x8df3,16,1,  7,Z8D_imm4_0011,							 "resflg  %f2",						0},
-{0x8d04,0x8df4,16,1,  7,Z8D_dddd_0100,							 "test    %rw2",					0},
-{0x8d05,0x8df5,16,1,  7,Z8D_imm4_0101,							 "comflg  %f2",						0},
-{0x8d06,0x8df6,16,1,  7,Z8D_dddd_0110,							 "tset    %rw2",					0},
-{0x8d07,0x8d07, 1,1,  7,Z8D_0000_0111,							 "nop",								0},
-{0x8d08,0x8df8,16,1,  7,Z8D_dddd_1000,							 "clr     %rw2",					0},
-{0x8e00,0x8eff, 1,1, 10,Z8E_imm8,								 "ext8e   %#b1",					0},
-{0x8f00,0x8fff, 1,1, 10,Z8F_imm8,								 "ext8f   %#b1",					0},
-{0x9000,0x90ff, 1,1,  8,Z90_ssss_dddd,							 "cpl     %rl3,%rl2",				0},
-{0x9110,0x91ff, 1,1, 12,Z91_ddN0_ssss,							 "pushl   @%rw2,%rl3",				0},
-{0x9200,0x92ff, 1,1,  8,Z92_ssss_dddd,							 "subl    %rl3,%rl2",				0},
-{0x9310,0x93ff, 1,1,  9,Z93_ddN0_ssss,							 "push    @%rw2,%rw3",				0},
-{0x9400,0x94ff, 1,1,  5,Z94_ssss_dddd,							 "ldl     %rl3,%rl2",				0},
-{0x9510,0x95ff, 1,1, 12,Z95_ssN0_dddd,							 "popl    %rl3,@%rw2",				0},
-{0x9600,0x96ff, 1,1,  8,Z96_ssss_dddd,							 "addl    %rl3,%rl2",				0},
-{0x9710,0x97ff, 1,1,  8,Z97_ssN0_dddd,							 "pop     %rw3,@%rw2",				0},
-{0x9800,0x98ff, 1,1,282,Z98_ssss_dddd,							 "multl   %rq3,%rl2",				0},
-{0x9900,0x99ff, 1,1, 70,Z99_ssss_dddd,							 "mult    %rl3,%rw2",				0},
-{0x9a00,0x9aff, 1,1,744,Z9A_ssss_dddd,							 "divl    %rq3,%rl2",				0},
-{0x9b00,0x9bff, 1,1,107,Z9B_ssss_dddd,							 "div     %rl3,%rw2",				0},
-{0x9c08,0x9cf8,16,1, 13,Z9C_dddd_1000,							 "testl   %rl2",					0},
-{0x9d00,0x9dff, 1,1, 10,Z9D_imm8,								 "rsvd9d",							0},
-{0x9e00,0x9e0f, 1,1, 10,Z9E_0000_cccc,							 "ret     %c3",						DASMFLAG_STEP_OUT},
-{0x9f00,0x9fff, 1,1, 10,Z9F_imm8,								 "rsvd9f",							0},
-{0xa000,0xa0ff, 1,1,  3,ZA0_ssss_dddd,							 "ldb     %rb3,%rb2",				0},
-{0xa100,0xa1ff, 1,1,  3,ZA1_ssss_dddd,							 "ld      %rw3,%rw2",				0},
-{0xa200,0xa2ff, 1,1,  4,ZA2_dddd_imm4,							 "resb    %rb2,%3",					0},
-{0xa300,0xa3ff, 1,1,  4,ZA3_dddd_imm4,							 "res     %rw2,%3",					0},
-{0xa400,0xa4ff, 1,1,  4,ZA4_dddd_imm4,							 "setb    %rb2,%3",					0},
-{0xa500,0xa5ff, 1,1,  4,ZA5_dddd_imm4,							 "set     %rw2,%3",					0},
-{0xa600,0xa6ff, 1,1,  4,ZA6_dddd_imm4,							 "bitb    %rb2,%3",					0},
-{0xa700,0xa7ff, 1,1,  4,ZA7_dddd_imm4,							 "bit     %rw2,%3",					0},
-{0xa800,0xa8ff, 1,1,  4,ZA8_dddd_imm4m1,						 "incb    %rb2,%+3",				0},
-{0xa900,0xa9ff, 1,1,  4,ZA9_dddd_imm4m1,						 "inc     %rw2,%+3",				0},
-{0xaa00,0xaaff, 1,1,  4,ZAA_dddd_imm4m1,						 "decb    %rb2,%+3",				0},
-{0xab00,0xabff, 1,1,  4,ZAB_dddd_imm4m1,						 "dec     %rw2,%+3",				0},
-{0xac00,0xacff, 1,1,  6,ZAC_ssss_dddd,							 "exb     %rb3,%rb2",				0},
-{0xad00,0xadff, 1,1,  6,ZAD_ssss_dddd,							 "ex      %rw3,%rw2",				0},
-{0xae00,0xaeff, 1,1,  5,ZAE_dddd_cccc,							 "tccb    %c3,%rb2",				0},
-{0xaf00,0xafff, 1,1,  5,ZAF_dddd_cccc,							 "tcc     %c3,%rw2",				0},
-{0xb000,0xb0f0,16,1,  5,ZB0_dddd_0000,							 "dab     %rb2",					0},
-{0xb100,0xb1f0,16,1, 11,ZB1_dddd_0000,							 "extsb   %rw2",					0},
-{0xb107,0xb1f7,16,1, 11,ZB1_dddd_0111,							 "extsl   %rq2",					0},
-{0xb10a,0xb1fa,16,1, 11,ZB1_dddd_1010,							 "exts    %rl2",					0},
-{0xb200,0xb2f0,16,1,  6,ZB2_dddd_00I0,							 "rlb     %rb2,%?3",				0},
-{0xb201,0xb2f1,16,2, 13,ZB2_dddd_0001_imm8,						 "s%*lb    %rb2,%$3",				0},
-{0xb202,0xb2f2,16,1,  6,ZB2_dddd_00I0,							 "rlb     %rb2,%?3",				0},
-{0xb203,0xb2f3,16,2, 15,ZB2_dddd_0011_0000_ssss_0000_0000,		 "sdlb    %rb2,%rw5",				0},
-{0xb204,0xb2f4,16,1,  6,ZB2_dddd_01I0,							 "rrb     %rb2,%?3",				0},
-{0xb206,0xb2f6,16,1,  6,ZB2_dddd_01I0,							 "rrb     %rb2,%?3",				0},
-{0xb208,0xb2f8,16,1,  9,ZB2_dddd_10I0,							 "rlcb    %rb2,%?3",				0},
-{0xb209,0xb2f9,16,2, 13,ZB2_dddd_1001_imm8,						 "s%*ab    %rb2,%$3",				0},
-{0xb20a,0xb2fa,16,1,  9,ZB2_dddd_10I0,							 "rlcb    %rb2,%?3",				0},
-{0xb20b,0xb2fb,16,2, 15,ZB2_dddd_1011_0000_ssss_0000_0000,		 "sdab    %rb2,%rw5",				0},
-{0xb20c,0xb2fc,16,1,  9,ZB2_dddd_11I0,							 "rrcb    %rb2,%?3",				0},
-{0xb20e,0xb2fe,16,1,  9,ZB2_dddd_11I0,							 "rrcb    %rb2,%?3",				0},
-{0xb300,0xb3f0,16,1,  6,ZB3_dddd_00I0,							 "rl      %rw2,%?3",				0},
-{0xb301,0xb3f1,16,2, 13,ZB3_dddd_0001_imm8,						 "s%*l     %rw2,%$3",				0},
-{0xb302,0xb3f2,16,1,  6,ZB3_dddd_00I0,							 "rl      %rw2,%?3",				0},
-{0xb303,0xb3f3,16,2, 15,ZB3_dddd_0011_0000_ssss_0000_0000,		 "sdl     %rw2,%rw5",				0},
-{0xb304,0xb3f4,16,1,  6,ZB3_dddd_01I0,							 "rr      %rw2,%?3",				0},
-{0xb305,0xb3f5,16,2, 13,ZB3_dddd_0101_imm8,						 "s%*ll    %rl2,%$3",				0},
-{0xb306,0xb3f6,16,1,  6,ZB3_dddd_01I0,							 "rr      %rw2,%?3",				0},
-{0xb307,0xb3f7,16,2, 15,ZB3_dddd_0111_0000_ssss_0000_0000,		 "sdll    %rl2,%rw5",				0},
-{0xb308,0xb3f8,16,1,  6,ZB3_dddd_10I0,							 "rlc     %rw2,%?3",				0},
-{0xb309,0xb3f9,16,2, 13,ZB3_dddd_1001_imm8,						 "s%*a     %rw2,%$3",				0},
-{0xb30a,0xb3fa,16,1,  6,ZB3_dddd_10I0,							 "rlc     %rw2,%?3",				0},
-{0xb30b,0xb3fb,16,2, 15,ZB3_dddd_1011_0000_ssss_0000_0000,		 "sda     %rw2,%rw5",				0},
-{0xb30c,0xb3fc,16,1,  6,ZB3_dddd_11I0,							 "rrc     %rw2,%?3",				0},
-{0xb30d,0xb3fd,16,2, 13,ZB3_dddd_1101_imm8,						 "s%*al    %rl2,%$3",				0},
-{0xb30e,0xb3fe,16,1,  6,ZB3_dddd_11I0,							 "rrc     %rw2,%?3",				0},
-{0xb30f,0xb3ff,16,2, 15,ZB3_dddd_1111_0000_ssss_0000_0000,		 "sdal    %rl2,%rw5",				0},
-{0xb400,0xb4ff, 1,1,  5,ZB4_ssss_dddd,							 "adcb    %rb3,%rb2",				0},
-{0xb500,0xb5ff, 1,1,  5,ZB5_ssss_dddd,							 "adc     %rw3,%rw2",				0},
-{0xb600,0xb6ff, 1,1,  5,ZB6_ssss_dddd,							 "sbcb    %rb3,%rb2",				0},
-{0xb700,0xb7ff, 1,1,  5,ZB7_ssss_dddd,							 "sbc     %rw3,%rw2",				0},
-{0xb810,0xb8f0,16,2, 25,ZB8_ddN0_0000_0000_rrrr_ssN0_0000,		 "trib    @%rw2,@%rw6,%rb5",		0},
-{0xb812,0xb8f2,16,2, 25,ZB8_ddN0_0010_0000_rrrr_ssN0_0000,		 "trtib   @%rw2,@%rw6,%rb5",		0},
-{0xb814,0xb8f4,16,2, 25,ZB8_ddN0_0100_0000_rrrr_ssN0_0000,		 "trirb   @%rw2,@%rw6,%rb5",		0},
-{0xb816,0xb8f6,16,2, 25,ZB8_ddN0_0110_0000_rrrr_ssN0_1110,		 "trtirb  @%rw2,@%rw6,%rb5",		0},
-{0xb818,0xb8f8,16,2, 25,ZB8_ddN0_1000_0000_rrrr_ssN0_0000,		 "trdb    @%rw2,@%rw6,%rb5",		0},
-{0xb81a,0xb8fa,16,2, 25,ZB8_ddN0_1010_0000_rrrr_ssN0_0000,		 "trtrb   @%rw2,@%rw6,%rb5",		0},
-{0xb81c,0xb8fc,16,2, 25,ZB8_ddN0_1100_0000_rrrr_ssN0_0000,		 "trdrb   @%rw2,@%rw6,%rb5",		0},
-{0xb81e,0xb8fe,16,2, 25,ZB8_ddN0_1110_0000_rrrr_ssN0_1110,		 "trtdrb  @%rw2,@%rw6,%rb5",		0},
-{0xb900,0xb9ff,16,1, 10,ZB9_imm8,								 "rsvdb9",							0},
-{0xba10,0xbaf0,16,2, 11,ZBA_ssN0_0000_0000_rrrr_dddd_cccc,		 "cpib    %rb6,@%rw2,%rw5,%c7",		0},
-{0xba11,0xbaf1,16,2, 11,ZBA_ssN0_0001_0000_rrrr_ddN0_x000,		 "ldirb   @%rw6,@%rw2,%rw5",		DASMFLAG_STEP_OVER},
-{0xba12,0xbaf2,16,2, 11,ZBA_ssN0_0010_0000_rrrr_ddN0_cccc,		 "cpsib   @%rw6,@%rw2,%rw5,%c7",	0},
-{0xba14,0xbaf4,16,2, 11,ZBA_ssN0_0100_0000_rrrr_dddd_cccc,		 "cpirb   %rb6,@%rw2,%rw5,%c7",		DASMFLAG_STEP_OVER},
-{0xba16,0xbaf6,16,2, 11,ZBA_ssN0_0110_0000_rrrr_ddN0_cccc,		 "cpsirb  @%rw6,@%rw2,%rw5,%c7",	DASMFLAG_STEP_OVER},
-{0xba18,0xbaf8,16,2, 11,ZBA_ssN0_1000_0000_rrrr_dddd_cccc,		 "cpdb    %rb6,@%rw2,%rw5,%c7",		0},
-{0xba19,0xbaf9,16,2, 11,ZBA_ssN0_1001_0000_rrrr_ddN0_x000,		 "lddrb   @%rw2,@%rw6,%rw5",		DASMFLAG_STEP_OVER},
-{0xba1a,0xbafa,16,2, 11,ZBA_ssN0_1010_0000_rrrr_ddN0_cccc,		 "cpsdb   @%rw6,@%rw2,%rw5,%c7",	0},
-{0xba1c,0xbafc,16,2, 11,ZBA_ssN0_1100_0000_rrrr_dddd_cccc,		 "cpdrb   %rb6,@%rw2,%rw5,%c7",		DASMFLAG_STEP_OVER},
-{0xba1e,0xbafe,16,2, 11,ZBA_ssN0_1110_0000_rrrr_ddN0_cccc,		 "cpsdrb  @%rw6,@%rw2,%rw5,%c7",	DASMFLAG_STEP_OVER},
-{0xbb10,0xbbf0,16,2, 11,ZBB_ssN0_0000_0000_rrrr_dddd_cccc,		 "cpi     %rw6,@%rw2,%rw5,%c7",		0},
-{0xbb11,0xbbf1,16,2, 11,ZBB_ssN0_0001_0000_rrrr_ddN0_x000,		 "ldir    @%rw6,@%rw2,%rw5",		DASMFLAG_STEP_OVER},
-{0xbb12,0xbbf2,16,2, 11,ZBB_ssN0_0010_0000_rrrr_ddN0_cccc,		 "cpsi    @%rw6,@%rw2,%rw5,%c7",	0},
-{0xbb14,0xbbf4,16,2, 11,ZBB_ssN0_0100_0000_rrrr_dddd_cccc,		 "cpir    %rw6,@%rw2,%rw5,%c7",		DASMFLAG_STEP_OVER},
-{0xbb16,0xbbf6,16,2, 11,ZBB_ssN0_0110_0000_rrrr_ddN0_cccc,		 "cpsir   @%rw6,@%rw2,%rw5,%c7",	DASMFLAG_STEP_OVER},
-{0xbb18,0xbbf8,16,2, 11,ZBB_ssN0_1000_0000_rrrr_dddd_cccc,		 "cpd     %rw6,@%rw2,%rw5,%c7",		0},
-{0xbb19,0xbbf9,16,2, 11,ZBB_ssN0_1001_0000_rrrr_ddN0_x000,		 "lddr    @%rw2,@%rw6,%rw5",		DASMFLAG_STEP_OVER},
-{0xbb1a,0xbbfa,16,2, 11,ZBB_ssN0_1010_0000_rrrr_ddN0_cccc,		 "cpsd    @%rw6,@%rw2,%rw5,%c7",	0},
-{0xbb1c,0xbbfc,16,2, 11,ZBB_ssN0_1100_0000_rrrr_dddd_cccc,		 "cpdr    %rw6,@%rw2,%rw5,%c7",		DASMFLAG_STEP_OVER},
-{0xbb1e,0xbbfe,16,2, 11,ZBB_ssN0_1110_0000_rrrr_ddN0_cccc,		 "cpsdr   @%rw6,@%rw2,%rw5,%c7",	DASMFLAG_STEP_OVER},
-{0xbc00,0xbcff, 1,1,  9,ZBC_aaaa_bbbb,							 "rrdb    %rb3,%rb2",				0},
-{0xbd00,0xbdff, 1,1,  5,ZBD_dddd_imm4,							 "ldk     %rw2,%3",					0},
-{0xbe00,0xbeff, 1,1,  9,ZBE_aaaa_bbbb,							 "rldb    %rb3,%rb2",				0},
-{0xbf00,0xbfff, 1,1, 10,ZBF_imm8,								 "rsvdbf",							0},
-{0xc000,0xcfff, 1,1,  5,ZC_dddd_imm8,							 "ldb     %rb1,%#b1",				0},
-{0xd000,0xdfff, 1,1, 10,ZD_dsp12,								 "calr    %d2",						DASMFLAG_STEP_OVER},
-{0xe000,0xefff, 1,1,  6,ZE_cccc_dsp8,							 "jr      %c1,%d1",					0},
-{0xf000,0xf07f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf100,0xf17f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf200,0xf27f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf300,0xf37f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf400,0xf47f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf500,0xf57f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf600,0xf67f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf700,0xf77f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf800,0xf87f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf900,0xf97f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xfa00,0xfa7f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xfb00,0xfb7f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xfc00,0xfc7f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xfd00,0xfd7f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xfe00,0xfe7f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xff00,0xff7f, 1,1, 11,ZF_dddd_0dsp7,							 "dbjnz   %rb1,%d0",				DASMFLAG_STEP_OVER},
-{0xf080,0xf0ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf180,0xf1ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf280,0xf2ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf380,0xf3ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf480,0xf4ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf580,0xf5ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf680,0xf6ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf780,0xf7ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf880,0xf8ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xf980,0xf9ff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xfa80,0xfaff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xfb80,0xfbff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xfc80,0xfcff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xfd80,0xfdff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xfe80,0xfeff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0xff80,0xffff, 1,1, 11,ZF_dddd_1dsp7,							 "djnz    %rw1,%d0",				DASMFLAG_STEP_OVER},
-{0, 	0,		0,0,  0,NULL,									NULL,								0}
-};
 
-/*
-opcodes in segmented mode
-*/
+{0x8c01,0x8cf1,16,1,  7,Z8C_dddd_0001,							 "ldctlb  %rb2,flags",					0},
 
-static const Z8000_init seg_table[] = {
-{0x0000,0x000f, 1,2,  7,Z00_0000_dddd_imm8,						 "addb    %rb3,%#b3",				0},
-{0x0010,0x00ff, 1,1,  7,Z00_ssN0_dddd,							 "addb    %rb3,@%rw2",				0},
-{0x0100,0x010f, 1,2,  7,Z01_0000_dddd_imm16,					 "add     %rw3,%#w1",				0},
-{0x0110,0x01ff, 1,1,  7,Z01_ssN0_dddd,							 "add     %rw3,@%rw2",				0},
-{0x0200,0x020f, 1,2,  7,Z02_0000_dddd_imm8,						 "subb    %rb3,%#b3",				0},
-{0x0210,0x02ff, 1,1,  7,Z02_ssN0_dddd,							 "subb    %rb3,@%rw2",				0},
-{0x0300,0x030f, 1,2,  7,Z03_0000_dddd_imm16,					 "sub     %rw3,%#w1",				0},
-{0x0310,0x03ff, 1,1,  7,Z03_ssN0_dddd,							 "sub     %rw3,@%rw2",				0},
-{0x0400,0x040f, 1,2,  7,Z04_0000_dddd_imm8,						 "orb     %rb3,%#b3",				0},
-{0x0410,0x04ff, 1,1,  7,Z04_ssN0_dddd,							 "orb     %rb3,@%rw2",				0},
-{0x0500,0x050f, 1,2,  7,Z05_0000_dddd_imm16,					 "or      %rw3,%#w1",				0},
-{0x0510,0x05ff, 1,1,  7,Z05_ssN0_dddd,							 "or      %rw3,@%rw2",				0},
-{0x0600,0x060f, 1,2,  7,Z06_0000_dddd_imm8,						 "andb    %rb3,%#b3",				0},
-{0x0610,0x06ff, 1,1,  7,Z06_ssN0_dddd,							 "andb    %rb3,@%rw2",				0},
-{0x0700,0x070f, 1,2,  7,Z07_0000_dddd_imm16,					 "and     %rw3,%#w1",				0},
-{0x0710,0x07ff, 1,1,  7,Z07_ssN0_dddd,							 "and     %rw3,@%rw2",				0},
-{0x0800,0x080f, 1,2,  7,Z08_0000_dddd_imm8,						 "xorb    %rb3,%#b3",				0},
-{0x0810,0x08ff, 1,1,  7,Z08_ssN0_dddd,							 "xorb    %rb3,@%rw2",				0},
-{0x0900,0x090f, 1,2,  7,Z09_0000_dddd_imm16,					 "xor     %rw3,%#w1",				0},
-{0x0910,0x09ff, 1,1,  7,Z09_ssN0_dddd,							 "xor     %rw3,@%rw2",				0},
-{0x0a00,0x0a0f, 1,2,  7,Z0A_0000_dddd_imm8,						 "cpb     %rb3,%#b3",				0},
-{0x0a10,0x0aff, 1,1,  7,Z0A_ssN0_dddd,							 "cpb     %rb3,@%rw2",				0},
-{0x0b00,0x0b0f, 1,2,  7,Z0B_0000_dddd_imm16,					 "cp      %rw3,%#w1",				0},
-{0x0b10,0x0bff, 1,1,  7,Z0B_ssN0_dddd,							 "cp      %rw3,@%rw2",				0},
-{0x0c10,0x0cf0,16,1, 12,Z0C_ddN0_0000,							 "comb    @%rw2",					0},
-{0x0c11,0x0cf1,16,2, 11,Z0C_ddN0_0001_imm8,						 "cpb     @%rw2,%#b3",				0},
-{0x0c12,0x0cf2,16,1, 12,Z0C_ddN0_0010,							 "negb    @%rw2",					0},
-{0x0c14,0x0cf4,16,1,  8,Z0C_ddN0_0100,							 "testb   @%rw2",					0},
-{0x0c15,0x0cf5,16,2,  7,Z0C_ddN0_0101_imm8,						 "ldb     @%rw2,%#b3",				0},
-{0x0c16,0x0cf6,16,1, 11,Z0C_ddN0_0110,							 "tsetb   @%rw2",					0},
-{0x0c18,0x0cf8,16,1,  8,Z0C_ddN0_1000,							 "clrb    @%rw2",					0},
-{0x0d10,0x0df0,16,1, 12,Z0D_ddN0_0000,							 "com     @%rw2",					0},
-{0x0d11,0x0df1,16,2, 11,Z0D_ddN0_0001_imm16,					 "cp      @%rw2,%#w1",				0},
-{0x0d12,0x0df2,16,1, 12,Z0D_ddN0_0010,							 "neg     @%rw2",					0},
-{0x0d14,0x0df4,16,1,  8,Z0D_ddN0_0100,							 "test    @%rw2",					0},
-{0x0d15,0x0df5,16,2, 11,Z0D_ddN0_0101_imm16,					 "ld      @%rw2,%#w1",				0},  /* fix cycles ld IR,IM */
-{0x0d16,0x0df6,16,1, 11,Z0D_ddN0_0110,							 "tset    @%rw2",					0},
-{0x0d18,0x0df8,16,1,  8,Z0D_ddN0_1000,							 "clr     @%rw2",					0},
-{0x0d19,0x0df9,16,2, 12,Z0D_ddN0_1001_imm16,					 "push    @%rw2,%#w1",				0},
-{0x0e00,0x0eff, 1,1, 10,Z0E_imm8,								 "ext0e   %#b1",					0},
-{0x0f00,0x0fff, 1,1, 10,Z0F_imm8,								 "ext0f   %#b1",					0},
-{0x1000,0x100f, 1,3, 14,Z10_0000_dddd_imm32,					 "cpl     %rl3,%#l1",				0},
-{0x1010,0x10ff, 1,1, 14,Z10_ssN0_dddd,							 "cpl     %rl3,@%rw2",				0},
-{0x1111,0x11ff, 1,1, 20,Z11_ddN0_ssN0,							 "pushl   @%rw2,@%rw3",				0},
-{0x1200,0x120f, 1,3, 14,Z12_0000_dddd_imm32,					 "subl    %rl3,%#l1",				0},
-{0x1210,0x12ff, 1,1, 14,Z12_ssN0_dddd,							 "subl    %rl3,@%rw2",				0},
-{0x1311,0x13ff, 1,1, 13,Z13_ddN0_ssN0,							 "push    @%rw2,@%rw3",				0},
-{0x1400,0x140f, 1,3, 11,Z14_0000_dddd_imm32,					 "ldl     %rl3,%#l1",				0},
-{0x1410,0x14ff, 1,1, 11,Z14_ssN0_dddd,							 "ldl     %rl3,@%rw2",				0},
-{0x1511,0x15ff, 1,1, 19,Z15_ssN0_ddN0,							 "popl    @%rw3,@%rw2",				0},
-{0x1600,0x160f, 1,3, 14,Z16_0000_dddd_imm32,					 "addl    %rl3,%#l1",				0},
-{0x1610,0x16ff, 1,1, 14,Z16_ssN0_dddd,							 "addl    %rl3,@%rw2",				0},
-{0x1711,0x17ff, 1,1, 12,Z17_ssN0_ddN0,							 "pop     @%rw3,@%rw2",				0},
-{0x1810,0x18ff, 1,1,282,Z18_ssN0_dddd,							 "multl   %rq3,@%rw2",				0},
-{0x1900,0x190f, 1,2, 70,Z19_0000_dddd_imm16,					 "mult    %rl3,%#w1",				0},
-{0x1910,0x19ff, 1,1, 70,Z19_ssN0_dddd,							 "mult    %rl3,@%rw2",				0},
-{0x1a00,0x1a0f, 1,3,744,Z1A_0000_dddd_imm32,					 "divl    %rq3,%#l1",				0},
-{0x1a10,0x1aff, 1,1,744,Z1A_ssN0_dddd,							 "divl    %rq3,@%rw2",				0},
-{0x1b00,0x1b0f, 1,2,107,Z1B_0000_dddd_imm16,					 "div     %rl3,%#w1",				0},
-{0x1b10,0x1bff, 1,1,107,Z1B_ssN0_dddd,							 "div     %rl3,@%rw2",				0},
-{0x1c11,0x1cf1,16,2, 11,Z1C_ssN0_0001_0000_dddd_0000_nmin1,		 "ldm     %rw5,@%rw2,#%n",			0},
-{0x1c18,0x1cf8,16,1, 13,Z1C_ddN0_1000,							 "testl   @%rw2",					0},
-{0x1c19,0x1cf9,16,2, 11,Z1C_ddN0_1001_0000_ssss_0000_nmin1,		 "ldm     @%rw2,%rw5,#%n",			0},
-{0x1d10,0x1dff, 1,1, 11,Z1D_ddN0_ssss,							 "ldl     @%rw2,%rl3",				0},
-{0x1e10,0x1eff, 1,1, 10,Z1E_ddN0_cccc,							 "jp      %c3,@%rl2",				0},
-{0x1f10,0x1ff0,16,1, 10,Z1F_ddN0_0000,							 "call    %rw2",					DASMFLAG_STEP_OVER},
-{0x2010,0x20ff, 1,1,  7,Z20_ssN0_dddd_seg,						 "ldb     %rb3,@%rw2",				0},
-{0x2100,0x210f, 1,2,  7,Z21_0000_dddd_imm16,					 "ld      %rw3,%#w1",				0},
-{0x2110,0x21ff, 1,1,  7,Z21_ssN0_dddd,							 "ld      %rw3,@%rw2",				0},
-{0x2200,0x220f, 1,2, 10,Z22_0000_ssss_0000_dddd_0000_0000,		 "resb    %rb5,%rw3",				0},
-{0x2210,0x22ff, 1,1, 11,Z22_ddN0_imm4,							 "resb    @%rw3,%3",				0},
-{0x2300,0x230f, 1,2, 10,Z23_0000_ssss_0000_dddd_0000_0000,		 "res     %rw5,%rw3",				0},
-{0x2310,0x23ff, 1,1, 11,Z23_ddN0_imm4,							 "res     @%rw3,%3",				0},
-{0x2400,0x240f, 1,2, 10,Z24_0000_ssss_0000_dddd_0000_0000,		 "setb    %rb5,%rw3",				0},
-{0x2410,0x24ff, 1,1, 11,Z24_ddN0_imm4,							 "setb    @%rw3,%3",				0},
-{0x2500,0x250f, 1,2, 10,Z25_0000_ssss_0000_dddd_0000_0000,		 "set     %rw5,%rw3",				0},
-{0x2510,0x25ff, 1,1, 11,Z25_ddN0_imm4,							 "set     @%rw3,%3",				0},
-{0x2600,0x260f, 1,2, 10,Z26_0000_ssss_0000_dddd_0000_0000,		 "bitb    %rb5,%rw3",				0},
-{0x2610,0x26ff, 1,1,  8,Z26_ddN0_imm4,							 "bitb    @%rw3,%3",				0},
-{0x2700,0x270f, 1,2, 10,Z27_0000_ssss_0000_dddd_0000_0000,		 "bit     %rw5,%rw3",				0},
-{0x2710,0x27ff, 1,1,  8,Z27_ddN0_imm4,							 "bit     @%rw2,%3",				0},
-{0x2810,0x28ff, 1,1, 11,Z28_ddN0_imm4m1,						 "incb    @%rw2,%+3",				0},
-{0x2910,0x29ff, 1,1, 11,Z29_ddN0_imm4m1,						 "inc     @%rw2,%+3",				0},
-{0x2a10,0x2aff, 1,1, 11,Z2A_ddN0_imm4m1,						 "decb    @%rw2,%+3",				0},
-{0x2b10,0x2bff, 1,1, 11,Z2B_ddN0_imm4m1,						 "dec     @%rw2,%+3",				0},
-{0x2c10,0x2cff, 1,1, 12,Z2C_ssN0_dddd,							 "exb     %rb3,@%rw2",				0},
-{0x2d10,0x2dff, 1,1, 12,Z2D_ssN0_dddd,							 "ex      %rw3,@%rw2",				0},
-{0x2e10,0x2eff, 1,1,  8,Z2E_ddN0_ssss,							 "ldb     @%rw2,%rb3",				0},
-{0x2f10,0x2fff, 1,1,  8,Z2F_ddN0_ssss,							 "ld      @%rw2,%rw3",				0},
-{0x3000,0x300f, 1,2, 14,Z30_0000_dddd_dsp16,					 "ldrb    %rb3,%p1",				0},
-{0x3010,0x30ff, 1,2, 14,Z30_ssN0_dddd_imm16,					 "ldb     %rb3,%rw2(%#w1)",			0},
-{0x3100,0x310f, 1,2, 14,Z31_0000_dddd_dsp16,					 "ldr     %rw3,%p1",				0},
-{0x3110,0x31ff, 1,2, 14,Z31_ssN0_dddd_imm16,					 "ld      %rw3,%rw2(%#w1)",			0},
-{0x3200,0x320f, 1,2, 14,Z32_0000_ssss_dsp16,					 "ldrb    %p1,%rb3",				0},
-{0x3210,0x32ff, 1,2, 14,Z32_ddN0_ssss_imm16,					 "ldb     %rw2(%#w1),%rb3",			0},
-{0x3300,0x330f, 1,2, 14,Z33_0000_ssss_dsp16,					 "ldr     %p1,%rw3",				0},
-{0x3310,0x33ff, 1,2, 14,Z33_ddN0_ssss_imm16,					 "ld      %rw2(%#w1),%rw3",			0},
-{0x3400,0x340f, 1,2, 15,Z34_0000_dddd_dsp16,					 "ldar    p%rw3,%p1",				0},
-{0x3410,0x34ff, 1,2, 15,Z34_ssN0_dddd_imm16,					 "lda     p%rw3,%rw2(%#w1)",		0},
-{0x3500,0x350f, 1,2, 17,Z35_0000_dddd_dsp16,					 "ldrl    %rl3,%p1",				0},
-{0x3510,0x35ff, 1,2, 17,Z35_ssN0_dddd_imm16,					 "ldl     %rl3,%rw2(%#w1)",			0},
-{0x3600,0x3600, 1,1,  2,Z36_0000_0000,							 "bpt",								0},
-{0x3601,0x36ff, 1,1, 10,Z36_imm8,								 "rsvd36",							0},
-{0x3700,0x370f, 1,2, 17,Z37_0000_ssss_dsp16,					 "ldrl    %p1,%rl3",				0},
-{0x3710,0x37ff, 1,2, 17,Z37_ddN0_ssss_imm16,					 "ldl     %rw2(%#w1),%rl3",			0},
-{0x3800,0x38ff, 1,1, 10,Z38_imm8,								 "rsvd38",							0},
-{0x3910,0x39f0,16,1, 12,Z39_ssN0_0000,							 "ldps    @%rw2",					0},
-{0x3a00,0x3af0,16,2, 21,Z3A_ssss_0000_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3a01,0x3af1,16,2, 21,Z3A_ssss_0001_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3a02,0x3af2,16,2, 21,Z3A_ssss_0010_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3a03,0x3af3,16,2, 21,Z3A_ssss_0011_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3a04,0x3af4,16,2, 10,Z3A_dddd_0100_imm16,					 "%R %rb2,%#w1",					0},
-{0x3a05,0x3af5,16,2, 10,Z3A_dddd_0101_imm16,					 "%R %rb2,%#w1",					0},
-{0x3a06,0x3af6,16,2, 12,Z3A_ssss_0110_imm16,					 "%R %#w1,%rb2",					0},
-{0x3a07,0x3af7,16,2, 12,Z3A_ssss_0111_imm16,					 "%R %#w1,%rb2",					0},
-{0x3a08,0x3af8,16,2, 21,Z3A_ssss_1000_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3a09,0x3af9,16,2, 21,Z3A_ssss_1001_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3a0a,0x3afa,16,2, 21,Z3A_ssss_1010_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3a0b,0x3afb,16,2, 21,Z3A_ssss_1011_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3b00,0x3bf0,16,2, 21,Z3B_ssss_0000_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3b01,0x3bf1,16,2, 21,Z3B_ssss_0001_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3b02,0x3bf2,16,2, 21,Z3B_ssss_0010_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3b03,0x3bf3,16,2, 21,Z3B_ssss_0011_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3b04,0x3bf4,16,2, 12,Z3B_dddd_0100_imm16,					 "%R %rw2,%#w1",					0},
-{0x3b05,0x3bf5,16,2, 12,Z3B_dddd_0101_imm16,					 "%R %rw2,%#w1",					0},
-{0x3b06,0x3bf6,16,2, 12,Z3B_ssss_0110_imm16,					 "%R %#w1,%rw2",					0},
-{0x3b07,0x3bf7,16,2, 12,Z3B_ssss_0111_imm16,					 "%R %#w1,%rw2",					0},
-{0x3b08,0x3bf8,16,2, 21,Z3B_ssss_1000_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3b09,0x3bf9,16,2, 21,Z3B_ssss_1001_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rw5",				0},
-{0x3b0a,0x3bfa,16,2, 21,Z3B_ssss_1010_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rb5",				0},
-{0x3b0b,0x3bfb,16,2, 21,Z3B_ssss_1011_0000_aaaa_dddd_x000,		 "%R @%rw6,@%rw2,%rb5",				0},
-{0x3c00,0x3cff, 1,1, 10,Z3C_ssss_dddd,							 "inb     %rb3,@%rw2",				0},
-{0x3d00,0x3dff, 1,1, 10,Z3D_ssss_dddd,							 "in      %rw3,@%rw2",				0},
-{0x3e00,0x3eff, 1,1, 12,Z3E_dddd_ssss_seg,						 "outb    @%rw2,%rb3",				0},
-{0x3f00,0x3fff, 1,1, 12,Z3F_dddd_ssss,							 "out     @%rw2,%rw3",				0},
-{0x4000,0x400f, 1,2,  9,Z40_0000_dddd_addr,						 "addb    %rb3,%a1",				0},
-{0x4010,0x40ff, 1,2, 10,Z40_ssN0_dddd_addr,						 "addb    %rb3,%a1(%rw2)",			0},
-{0x4100,0x410f, 1,2,  9,Z41_0000_dddd_addr,						 "add     %rw3,%a1",				0},
-{0x4110,0x41ff, 1,2, 10,Z41_ssN0_dddd_addr,						 "add     %rw3,%a1(%rw2)",			0},
-{0x4200,0x420f, 1,2,  9,Z42_0000_dddd_addr,						 "subb    %rb3,%a1",				0},
-{0x4210,0x42ff, 1,2, 10,Z42_ssN0_dddd_addr,						 "subb    %rb3,%a1(%rw2)",			0},
-{0x4300,0x430f, 1,2,  9,Z43_0000_dddd_addr,						 "sub     %rw3,%a1",				0},
-{0x4310,0x43ff, 1,2, 10,Z43_ssN0_dddd_addr,						 "sub     %rw3,%a1(%rw2)",			0},
-{0x4400,0x440f, 1,2,  9,Z44_0000_dddd_addr,						 "orb     %rb3,%a1",				0},
-{0x4410,0x44ff, 1,2, 10,Z44_ssN0_dddd_addr,						 "orb     %rb3,%a1(%rw2)",			0},
-{0x4500,0x450f, 1,2,  9,Z45_0000_dddd_addr,						 "or      %rw3,%a1",				0},
-{0x4510,0x45ff, 1,2, 10,Z45_ssN0_dddd_addr,						 "or      %rw3,%a1(%rw2)",			0},
-{0x4600,0x460f, 1,2,  9,Z46_0000_dddd_addr,						 "andb    %rb3,%a1",				0},
-{0x4610,0x46ff, 1,2, 10,Z46_ssN0_dddd_addr,						 "andb    %rb3,%a1(%rw2)",			0},
-{0x4700,0x470f, 1,2,  9,Z47_0000_dddd_addr,						 "and     %rw3,%a1",				0},
-{0x4710,0x47ff, 1,2, 10,Z47_ssN0_dddd_addr,						 "and     %rw3,%a1(%rw2)",			0},
-{0x4800,0x480f, 1,2,  9,Z48_0000_dddd_addr,						 "xorb    %rb3,%a1",				0},
-{0x4810,0x48ff, 1,2, 10,Z48_ssN0_dddd_addr,						 "xorb    %rb3,%a1(%rw2)",			0},
-{0x4900,0x490f, 1,2,  9,Z49_0000_dddd_addr,						 "xor     %rw3,%a1",				0},
-{0x4910,0x49ff, 1,2, 10,Z49_ssN0_dddd_addr,						 "xor     %rw3,%a1(%rw2)",			0},
-{0x4a00,0x4a0f, 1,2,  9,Z4A_0000_dddd_addr,						 "cpb     %rb3,%a1",				0},
-{0x4a10,0x4aff, 1,2, 10,Z4A_ssN0_dddd_addr,						 "cpb     %rb3,%a1(%rw2)",			0},
-{0x4b00,0x4b0f, 1,2,  9,Z4B_0000_dddd_addr,						 "cp      %rw3,%a1",				0},
-{0x4b10,0x4bff, 1,2, 10,Z4B_ssN0_dddd_addr,						 "cp      %rw3,%a1(%rw2)",			0},
-{0x4c00,0x4c00, 1,2, 15,Z4C_0000_0000_addr,						 "comb    %a1",						0},
-{0x4c01,0x4c01, 1,3, 14,Z4C_0000_0001_addr_imm8,				 "cpb     %a1,%#b3",				0},
-{0x4c02,0x4c02, 1,2, 15,Z4C_0000_0010_addr,						 "negb    %a1",						0},
-{0x4c04,0x4c04, 1,2, 11,Z4C_0000_0100_addr,						 "testb   %a1",						0},
-{0x4c05,0x4c05, 1,3, 14,Z4C_0000_0101_addr_imm8,				 "ldb     %a1,%#b3",				0},
-{0x4c06,0x4c06, 1,2, 14,Z4C_0000_0110_addr,						 "tsetb   %a1",						0},
-{0x4c08,0x4c08, 1,1, 0, Z4C_0000_1000_addr_seg,					 "clrb    %a1",						0},
-{0x4c10,0x4cf0,16,2, 16,Z4C_ddN0_0000_addr,						 "comb    %a1(%rw2)",				0},
-{0x4c11,0x4cf1,16,3, 15,Z4C_ddN0_0001_addr_imm8,				 "cpb     %a1(%rw2),%#b3",			0},
-{0x4c12,0x4cf2,16,2, 16,Z4C_ddN0_0010_addr,						 "negb    %a1(%rw2)",				0},
-{0x4c14,0x4cf4,16,2, 12,Z4C_ddN0_0100_addr,						 "testb   %a1(%rw2)",				0},
-{0x4c15,0x4cf5,16,3, 15,Z4C_ddN0_0101_addr_imm8,				 "ldb     %a1(%rw2),%#b3",			0},
-{0x4c16,0x4cf6,16,2, 15,Z4C_ddN0_0110_addr,						 "tsetb   %a1(%rw2)",				0},
-{0x4c18,0x4cf8,16,2, 12,Z4C_ddN0_1000_addr,						 "clrb    %a1(%rw2)",				0},
-{0x4d00,0x4d00, 1,2, 15,Z4D_0000_0000_addr,						 "com     %a1",						0},
-{0x4d01,0x4d01, 1,3, 14,Z4D_0000_0001_addr_imm16,				 "cp      %a1,%#w2",				0},
-{0x4d02,0x4d02, 1,2, 15,Z4D_0000_0010_addr,						 "neg     %a1",						0},
-{0x4d04,0x4d04, 1,2, 11,Z4D_0000_0100_addr,						 "test    %a1",						0},
-{0x4d05,0x4d05, 1,1, 0, Z4D_0000_0101_addr_imm16_seg,			 "ld      %a1,%#w2",				0},
-{0x4d06,0x4d06, 1,2, 14,Z4D_0000_0110_addr,						 "tset    %a1",						0},
-{0x4d08,0x4d08, 1,1, 0, Z4D_0000_1000_addr_seg,					 "clr     %a1",						0},
-{0x4d10,0x4df0,16,2, 16,Z4D_ddN0_0000_addr,						 "com     %a1(%rw2)",				0},
-{0x4d11,0x4df1,16,3, 15,Z4D_ddN0_0001_addr_imm16,				 "cp      %a1(%rw2),%#w2",			0},
-{0x4d12,0x4df2,16,2, 16,Z4D_ddN0_0010_addr,						 "neg     %a1(%rw2)",				0},
-{0x4d14,0x4df4,16,2, 12,Z4D_ddN0_0100_addr,						 "test    %a1(%rw2)",				0},
-{0x4d15,0x4df5,16,3, 15,Z4D_ddN0_0101_addr_imm16,				 "ld      %a1(%rw2),%#w2",			0},
-{0x4d16,0x4df6,16,2, 15,Z4D_ddN0_0110_addr,						 "tset    %a1(%rw2)",				0},
-{0x4d18,0x4df8,16,2, 12,Z4D_ddN0_1000_addr,						 "clr     %a1(%rw2)",				0},
-{0x4e11,0x4ef0,16,2, 12,Z4E_ddN0_ssN0_addr,						 "ldb     %a1(%rw2),%rb3",			0},
-{0x5000,0x500f, 1,2, 15,Z50_0000_dddd_addr,						 "cpl     %rl3,%a1",				0},
-{0x5010,0x50ff, 1,2, 16,Z50_ssN0_dddd_addr,						 "cpl     %rl3,%a1(%rw2)",			0},
-{0x5110,0x51f0,16,2, 21,Z51_ddN0_0000_addr,						 "pushl   @%rw2,%a1",				0},
-{0x5111,0x51f1,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5112,0x51f2,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5113,0x51f3,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5114,0x51f4,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5115,0x51f5,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5116,0x51f6,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5117,0x51f7,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5118,0x51f8,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5119,0x51f9,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x511a,0x51fa,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x511b,0x51fb,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x511c,0x51fc,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x511d,0x51fd,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x511e,0x51fe,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x511f,0x51ff,16,2, 21,Z51_ddN0_ssN0_addr,						 "pushl   @%rw2,%a1(%rw3)",			0},
-{0x5200,0x520f, 1,2, 15,Z52_0000_dddd_addr,						 "subl    %rl3,%a1",				0},
-{0x5210,0x52ff, 1,2, 16,Z52_ssN0_dddd_addr,						 "subl    %rl3,%a1(%rw2)",			0},
-{0x5310,0x53f0,16,2, 14,Z53_ddN0_0000_addr,						 "push    @%rw2,%a1",				0},
-{0x5311,0x53f1,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5312,0x53f2,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5313,0x53f3,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5314,0x53f4,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5315,0x53f5,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5316,0x53f6,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5317,0x53f7,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5318,0x53f8,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5319,0x53f9,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x531a,0x53fa,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x531b,0x53fb,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x531c,0x53fc,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x531d,0x53fd,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x531e,0x53fe,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x531f,0x53ff,16,2, 14,Z53_ddN0_ssN0_addr,						 "push    @%rw2,%a1(%rw3)",			0},
-{0x5400,0x540f, 1,2, 12,Z54_0000_dddd_addr,						 "ldl     %rl3,%a1",				0},
-{0x5410,0x54ff, 1,2, 13,Z54_ssN0_dddd_addr,						 "ldl     %rl3,%a1(%rw2)",			0},
-{0x5510,0x55f0,16,2, 23,Z55_ssN0_0000_addr,						 "popl    %a1,@%rw2",				0},
-{0x5511,0x55f1,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5512,0x55f2,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5513,0x55f3,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5514,0x55f4,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5515,0x55f5,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5516,0x55f6,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5517,0x55f7,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5518,0x55f8,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5519,0x55f9,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x551a,0x55fa,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x551b,0x55fb,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x551c,0x55fc,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x551d,0x55fd,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x551e,0x55fe,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x551f,0x55ff,16,2, 23,Z55_ssN0_ddN0_addr,						 "popl    %a1(%rw3),@%rw2",			0},
-{0x5600,0x560f, 1,2, 15,Z56_0000_dddd_addr,						 "addl    %rl3,%a1",				0},
-{0x5610,0x56ff, 1,2, 16,Z56_ssN0_dddd_addr,						 "addl    %rl3,%a1(%rw2)",			0},
-{0x5710,0x57f0,16,2, 16,Z57_ssN0_0000_addr,						 "pop     %a1,@%rw2",				0},
-{0x5711,0x57f1,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5712,0x57f2,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5713,0x57f3,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5714,0x57f4,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5715,0x57f5,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5716,0x57f6,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5717,0x57f7,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5718,0x57f8,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5719,0x57f9,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x571a,0x57fa,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x571b,0x57fb,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x571c,0x57fc,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x571d,0x57fd,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x571e,0x57fe,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x571f,0x57ff,16,2, 16,Z57_ssN0_ddN0_addr,						 "pop     %a1(%rw3),@%rw2",			0},
-{0x5800,0x580f, 1,2,283,Z58_0000_dddd_addr,						 "multl   %rq3,%a1",				0},
-{0x5810,0x58ff, 1,2,284,Z58_ssN0_dddd_addr,						 "multl   %rq3,%a1(%rw2)",			0},
-{0x5900,0x590f, 1,2, 71,Z59_0000_dddd_addr,						 "mult    %rl3,%a1",				0},
-{0x5910,0x59ff, 1,2, 72,Z59_ssN0_dddd_addr,						 "mult    %rl3,%a1(%rw2)",			0},
-{0x5a00,0x5a0f, 1,2,745,Z5A_0000_dddd_addr,						 "divl    %rq3,%a1",				0},
-{0x5a10,0x5aff, 1,2,746,Z5A_ssN0_dddd_addr,						 "divl    %rq3,%a1(%rw2)",			0},
-{0x5b00,0x5b0f, 1,2,108,Z5B_0000_dddd_addr,						 "div     %rl3,%a1",				0},
-{0x5b10,0x5bff, 1,2,109,Z5B_ssN0_dddd_addr,						 "div     %rl3,%a1(%rw2)",			0},
-{0x5c01,0x5c01, 1,3, 14,Z5C_0000_0001_0000_dddd_0000_nmin1_addr, "ldm     %rw5,%a2,#%n",			0},
-{0x5c08,0x5c08, 1,2, 16,Z5C_0000_1000_addr,						 "testl   %a1",						0},
-{0x5c09,0x5c09, 1,3, 14,Z5C_0000_1001_0000_ssss_0000_nmin1_addr, "ldm     %a2,%rw5,#%n",			0},
-{0x5c11,0x5cf1,16,3, 15,Z5C_ssN0_0001_0000_dddd_0000_nmin1_addr, "ldm     %rw5,%a2(%rw2),#%n",		0},
-{0x5c18,0x5cf8,16,2, 17,Z5C_ddN0_1000_addr,						 "testl   %a1(%rw2)",				0},
-{0x5c19,0x5cf9,16,3, 15,Z5C_ddN0_1001_0000_ssN0_0000_nmin1_addr, "ldm     %a2(%rw2),%rw5,#%n",		0},
-{0x5d00,0x5d0f, 1,2, 15,Z5D_0000_ssss_addr,						 "ldl     %a1,%rl3",				0},
-{0x5d10,0x5dff, 1,2, 14,Z5D_ddN0_ssss_addr,						 "ldl     %a1(%rw2),%rl3",			0},
-{0x5e00,0x5e0f, 1,2,  7,Z5E_0000_cccc_addr,						 "jp      %c3,%a1",					0},
-{0x5e10,0x5eff, 1,2,  8,Z5E_ddN0_cccc_addr,						 "jp      %c3,%a1(%rw2)",			0},
-{0x5f00,0x5f00, 1,2, 12,Z5F_0000_0000_addr,						 "call    %a1",						DASMFLAG_STEP_OVER},
-{0x5f10,0x5ff0,16,2, 13,Z5F_ddN0_0000_addr,						 "call    %a1(%rw2)",				DASMFLAG_STEP_OVER},
-{0x6000,0x600f, 1,2,  9,Z60_0000_dddd_addr,						 "ldb     %rb3,%a1",				0},
-{0x6010,0x60ff, 1,2, 10,Z60_ssN0_dddd_addr,						 "ldb     %rb3,%a1(%rw2)",			0},
-{0x6100,0x610f, 1,2,  9,Z61_0000_dddd_addr,						 "ld      %rw3,%a1",				0},
-{0x6110,0x61ff, 1,2, 10,Z61_ssN0_dddd_addr,						 "ld      %rw3,%a1(%rw2)",			0},
-{0x6200,0x620f, 1,2, 13,Z62_0000_imm4_addr,						 "resb    %a1,%3",					0},
-{0x6210,0x62ff, 1,2, 14,Z62_ddN0_imm4_addr,						 "resb    %a1(%rw2),%3",			0},
-{0x6300,0x630f, 1,2, 13,Z63_0000_imm4_addr,						 "res     %a1,%3",					0},
-{0x6310,0x63ff, 1,2, 14,Z63_ddN0_imm4_addr,						 "res     %a1(%rw2),%3",			0},
-{0x6400,0x640f, 1,2, 13,Z64_0000_imm4_addr,						 "setb    %a1,%3",					0},
-{0x6410,0x64ff, 1,2, 14,Z64_ddN0_imm4_addr,						 "setb    %a1(%rw2),%3",			0},
-{0x6500,0x650f, 1,2, 13,Z65_0000_imm4_addr,						 "set     %a1,%3",					0},
-{0x6510,0x65ff, 1,2, 14,Z65_ddN0_imm4_addr,						 "set     %a1(%rw2),%3",			0},
-{0x6600,0x660f, 1,2, 10,Z66_0000_imm4_addr,						 "bitb    %a1,%3",					0},
-{0x6610,0x66ff, 1,2, 11,Z66_ddN0_imm4_addr,						 "bitb    %a1(%rw2),%3",			0},
-{0x6700,0x670f, 1,2, 10,Z67_0000_imm4_addr,						 "bit     %a1,%3",					0},
-{0x6710,0x67ff, 1,2, 11,Z67_ddN0_imm4_addr,						 "bit     %a1(%rw2),%3",			0},
-{0x6800,0x680f, 1,2, 13,Z68_0000_imm4m1_addr,					 "incb    %a1,%+3",					0},
-{0x6810,0x68ff, 1,2, 14,Z68_ddN0_imm4m1_addr,					 "incb    %a1(%rw2),%+3",			0},
-{0x6900,0x690f, 1,2, 13,Z69_0000_imm4m1_addr,					 "inc     %a1,%+3",					0},
-{0x6910,0x69ff, 1,2, 14,Z69_ddN0_imm4m1_addr,					 "inc     %a1(%rw2),%+3",			0},
-{0x6a00,0x6a0f, 1,2, 13,Z6A_0000_imm4m1_addr,					 "decb    %a1,%+3",					0},
-{0x6a10,0x6aff, 1,2, 14,Z6A_ddN0_imm4m1_addr,					 "decb    %a1(%rw2),%+3",			0},
-{0x6b00,0x6b0f, 1,2, 13,Z6B_0000_imm4m1_addr,					 "dec     %a1,%+3",					0},
-{0x6b10,0x6bff, 1,2, 14,Z6B_ddN0_imm4m1_addr,					 "dec     %a1(%rw2),%+3",			0},
-{0x6c00,0x6c0f, 1,2, 15,Z6C_0000_dddd_addr,						 "exb     %rb3,%a1",				0},
-{0x6c10,0x6cff, 1,2, 16,Z6C_ssN0_dddd_addr,						 "exb     %rb3,%a1(%rw2)",			0},
-{0x6d00,0x6d0f, 1,2, 15,Z6D_0000_dddd_addr,						 "ex      %rw3,%a1",				0},
-{0x6d10,0x6dff, 1,2, 16,Z6D_ssN0_dddd_addr,						 "ex      %rw3,%a1(%rw2)",			0},
-{0x6e00,0x6e0f, 1,2, 11,Z6E_0000_ssss_addr,						 "ldb     %a1,%rb3",				0},
-{0x6e10,0x6eff, 1,2, 11,Z6E_ddN0_ssss_addr,						 "ldb     %a1(%rw2),%rb3",			0},
-{0x6f00,0x6f0f, 1,2, 11,Z6F_0000_ssss_addr,						 "ld      %a1,%rw3",				0},
-{0x6f10,0x6fff, 1,2, 12,Z6F_ddN0_ssss_addr,						 "ld      %a1(%rw2),%rw3",			0},
-{0x7010,0x70ff, 1,2, 14,Z70_ssN0_dddd_0000_xxxx_0000_0000,		 "ldb     %rb3,%rw2(%rw5)",			0},
-{0x7110,0x71ff, 1,2, 14,Z71_ssN0_dddd_0000_xxxx_0000_0000,		 "ld      %rw3,%rw2(%rw5)",			0},
-{0x7210,0x72ff, 1,2, 14,Z72_ddN0_ssss_0000_xxxx_0000_0000,		 "ldb     %rw2(%rw5),%rb3",			0},
-{0x7310,0x73ff, 1,2, 14,Z73_ddN0_ssss_0000_xxxx_0000_0000,		 "ld      %rw2(%rw5),%rw3",			0},
-{0x7410,0x74ff, 1,2, 15,Z74_ssN0_dddd_0000_xxxx_0000_0000,		 "lda     p%rw3,%rw2(%rw5)",		0},
-{0x7510,0x75ff, 1,2, 17,Z75_ssN0_dddd_0000_xxxx_0000_0000,		 "ldl     %rl3,%rw2(%rw5)",			0},
-{0x7600,0x760f, 1,1, 0, Z76_0000_dddd_addr_seg,					 "lda     p%rw3,%a1",				0},
-{0x7610,0x76ff, 1,2, 13,Z76_ssN0_dddd_addr,						 "lda     p%rw3,%a1(%rw2)",			0},
-{0x7710,0x77ff, 1,2, 17,Z77_ddN0_ssss_0000_xxxx_0000_0000,		 "ldl     %rw2(%rw5),%rl3",			0},
-{0x7800,0x78ff, 1,1, 10,Z78_imm8,								 "rsvd78",							0},
-{0x7900,0x7900, 1,2, 16,Z79_0000_0000_addr,						 "ldps    %a1",						0},
-{0x7910,0x79f0,16,2, 17,Z79_ssN0_0000_addr,						 "ldps    %a1(%rw2)",				0},
-{0x7a00,0x7a00, 1,1,  8,Z7A_0000_0000,							 "halt",							DASMFLAG_STEP_OVER},
-{0x7b00,0x7b00, 1,1, 13,Z7B_0000_0000,							 "iret",							DASMFLAG_STEP_OUT},
-{0x7b08,0x7b08, 1,1,  5,Z7B_0000_1000,							 "mset",							0},
-{0x7b09,0x7b09, 1,1,  5,Z7B_0000_1001,							 "mres",							0},
-{0x7b0a,0x7b0a, 1,1,  7,Z7B_0000_1010,							 "mbit",							0},
-{0x7b0d,0x7bfd,16,1, 12,Z7B_dddd_1101,							 "mreq    %rw2",					0},
-{0x7c00,0x7c03, 1,1,  7,Z7C_0000_00ii,							 "di      %i3",						0},
-{0x7c04,0x7c07, 1,1,  7,Z7C_0000_01ii,							 "ei      %i3",						0},
-{0x7d00,0x7df0,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,ctrl0",				0},
-{0x7d01,0x7df1,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,ctrl1",				0},
-{0x7d02,0x7df2,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,fcw",				0},
-{0x7d03,0x7df3,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,refresh",			0},
-{0x7d04,0x7df4,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,ctrl4",				0},
-{0x7d05,0x7df5,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,psap",				0},
-{0x7d06,0x7df6,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,ctrl6",				0},
-{0x7d07,0x7df7,16,1,  7,Z7D_dddd_0ccc,							 "ldctl   %rw2,nsp",				0},
-{0x7d08,0x7df8,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   ctrl0,%rw2",				0},
-{0x7d09,0x7df9,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   ctrl1,%rw2",				0},
-{0x7d0a,0x7dfa,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   fcw,%rw2",				0},
-{0x7d0b,0x7dfb,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   refresh,%rw2",			0},
-{0x7d0c,0x7dfc,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   ctrl4,%rw2",				0},
-{0x7d0d,0x7dfd,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   psap,%rw2",				0},
-{0x7d0e,0x7dfe,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   ctrl6,%rw2",				0},
-{0x7d0f,0x7dff,16,1,  7,Z7D_ssss_1ccc,							 "ldctl   nsp,%rw2",				0},
-{0x7e00,0x7eff, 1,1, 10,Z7E_imm8,								 "rsvd7e  %#b1",					0},
-{0x7f00,0x7fff, 1,1, 33,Z7F_imm8,								 "sc      %#b1",					0},
-{0x8000,0x80ff, 1,1,  4,Z80_ssss_dddd,							 "addb    %rb3,%rb2",				0},
-{0x8100,0x81ff, 1,1,  4,Z81_ssss_dddd,							 "add     %rw3,%rw2",				0},
-{0x8200,0x82ff, 1,1,  4,Z82_ssss_dddd,							 "subb    %rb3,%rb2",				0},
-{0x8300,0x83ff, 1,1,  4,Z83_ssss_dddd,							 "sub     %rw3,%rw2",				0},
-{0x8400,0x84ff, 1,1,  4,Z84_ssss_dddd,							 "orb     %rb3,%rb2",				0},
-{0x8500,0x85ff, 1,1,  4,Z85_ssss_dddd,							 "or      %rw3,%rw2",				0},
-{0x8600,0x86ff, 1,1,  4,Z86_ssss_dddd,							 "andb    %rb3,%rb2",				0},
-{0x8700,0x87ff, 1,1,  4,Z87_ssss_dddd,							 "and     %rw3,%rw2",				0},
-{0x8800,0x88ff, 1,1,  4,Z88_ssss_dddd,							 "xorb    %rb3,%rb2",				0},
-{0x8900,0x89ff, 1,1,  4,Z89_ssss_dddd,							 "xor     %rw3,%rw2",				0},
-{0x8a00,0x8aff, 1,1,  4,Z8A_ssss_dddd,							 "cpb     %rb3,%rb2",				0},
-{0x8b00,0x8bff, 1,1,  4,Z8B_ssss_dddd,							 "cp      %rw3,%rw2",				0},
-{0x8c00,0x8cf0,16,1,  7,Z8C_dddd_0000,							 "comb    %rb2",					0},
-{0x8c02,0x8cf2,16,1,  7,Z8C_dddd_0010,							 "negb    %rb2",					0},
-{0x8c04,0x8cf4,16,1,  7,Z8C_dddd_0100,							 "testb   %rb2",					0},
-{0x8c06,0x8cf6,16,1,  7,Z8C_dddd_0110,							 "tsetb   %rb2",					0},
 {0x8c08,0x8cf8,16,1,  7,Z8C_dddd_1000,							 "clrb    %rb2",					0},
+
+{0x8c09,0x8cf9,16,1,  7,Z8C_dddd_1001,							 "ldctlb  flags,%rb2",					0},
+
 {0x8d00,0x8df0,16,1,  7,Z8D_dddd_0000,							 "com     %rw2",					0},
 {0x8d01,0x8df1,16,1,  7,Z8D_imm4_0001,							 "setflg  %f2",						0},
 {0x8d02,0x8df2,16,1,  7,Z8D_dddd_0010,							 "neg     %rw2",					0},
@@ -1062,48 +547,7 @@ static const Z8000_init seg_table[] = {
 };
 
 
-void z8001_init_tables(void)
-{
-	const Z8000_init *init;
-	int i;
-
-	/* allocate the opcode execution and disassembler array */
-	z8000_exec = global_alloc_array(Z8000_exec, 0x10000);
-
-	/* set up the zero, sign, parity lookup table */
-    for (i = 0; i < 256; i++)
-		z8000_zsp[i] = ((i == 0) ? F_Z : 0) |
-                       ((i & 128) ? F_S : 0) |
-                       ((((i>>7)^(i>>6)^(i>>5)^(i>>4)^(i>>3)^(i>>2)^(i>>1)^i) & 1) ? F_PV : 0);
-
-    /* first set all 64K opcodes to invalid */
-	for (i = 0; i < 0x10000; i++)
-	{
-		z8000_exec[i].opcode = zinvalid;
-		z8000_exec[i].cycles = 4;
-		z8000_exec[i].size	 = 1;
-		z8000_exec[i].dasm	 = ".word   %#w0";
-		z8000_exec[i].dasmflags = 0;
-	}
-
-    /* now decompose the initialization table */
-	for (init = seg_table; init->size; init++)
-	{
-		for (i = init->beg; i <= init->end; i += init->step)
-		{
-			if (z8000_exec[i].opcode != zinvalid)
-				logerror("Z8000 opcode %04x clash '%s'\n", i, z8000_exec[i].dasm);
-
-			z8000_exec[i].opcode = init->opcode;
-			z8000_exec[i].cycles = init->cycles;
-			z8000_exec[i].size	 = init->size;
-			z8000_exec[i].dasm	 = init->dasm;
-			z8000_exec[i].dasmflags = init->dasmflags;
-		}
-	}
-}
-
-void z8002_init_tables(void)
+void z8000_init_tables(void)
 {
 	const Z8000_init *init;
 	int i;