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https://github.com/holub/mame
synced 2025-05-25 15:25:33 +03:00
Corrected Ameri Darts audio playback rate.
This exposed some cycle timing errors in the TMS32010 CPU core which are also fixed. [Quench]
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@ -52,6 +52,8 @@
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* - LST instruction was incorrectly setting an Indirect Addressing *
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* - LST instruction was incorrectly setting an Indirect Addressing *
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* feature when Direct Addressing mode was selected *
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* feature when Direct Addressing mode was selected *
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* - Added TMS32015 and TMS32016 variants *
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* - Added TMS32015 and TMS32016 variants *
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* TLP (27-Jul-2010) Ver 1.31 *
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* - Corrected cycle timing for conditional branch instructions *
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* *
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* *
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\**************************************************************************/
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\**************************************************************************/
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@ -118,6 +120,8 @@ struct _tms32010_opcode
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void (*function)(tms32010_state *);
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void (*function)(tms32010_state *);
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};
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};
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INLINE int add_branch_cycle(tms32010_state *cpustate);
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/********* The following is the Status (Flag) register definition. *********/
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/********* The following is the Status (Flag) register definition. *********/
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/* 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
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/* 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
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@ -400,8 +404,10 @@ static void br(tms32010_state *cpustate)
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}
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}
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static void banz(tms32010_state *cpustate)
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static void banz(tms32010_state *cpustate)
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{
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{
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if (cpustate->AR[ARP] & 0x01ff)
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if (cpustate->AR[ARP] & 0x01ff) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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cpustate->ALU.w.l = cpustate->AR[ARP];
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cpustate->ALU.w.l = cpustate->AR[ARP];
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@ -410,59 +416,74 @@ static void banz(tms32010_state *cpustate)
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}
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}
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static void bgez(tms32010_state *cpustate)
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static void bgez(tms32010_state *cpustate)
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{
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{
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if ( (INT32)(cpustate->ACC.d) >= 0 )
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if ( (INT32)(cpustate->ACC.d) >= 0 ) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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static void bgz(tms32010_state *cpustate)
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static void bgz(tms32010_state *cpustate)
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{
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{
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if ( (INT32)(cpustate->ACC.d) > 0 )
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if ( (INT32)(cpustate->ACC.d) > 0 ) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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static void bioz(tms32010_state *cpustate)
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static void bioz(tms32010_state *cpustate)
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{
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{
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if (BIO_IN != CLEAR_LINE)
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if (BIO_IN != CLEAR_LINE) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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static void blez(tms32010_state *cpustate)
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static void blez(tms32010_state *cpustate)
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{
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{
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if ( (INT32)(cpustate->ACC.d) <= 0 )
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if ( (INT32)(cpustate->ACC.d) <= 0 ) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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static void blz(tms32010_state *cpustate)
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static void blz(tms32010_state *cpustate)
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{
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{
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if ( (INT32)(cpustate->ACC.d) < 0 )
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if ( (INT32)(cpustate->ACC.d) < 0 ) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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static void bnz(tms32010_state *cpustate)
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static void bnz(tms32010_state *cpustate)
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{
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{
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if (cpustate->ACC.d != 0)
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if (cpustate->ACC.d != 0) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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static void bv(tms32010_state *cpustate)
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static void bv(tms32010_state *cpustate)
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{
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{
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if (OV) {
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if (OV) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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CLR(cpustate, OV_FLAG);
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CLR(cpustate, OV_FLAG);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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static void bz(tms32010_state *cpustate)
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static void bz(tms32010_state *cpustate)
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{
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{
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if (cpustate->ACC.d == 0)
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if (cpustate->ACC.d == 0) {
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->PC = M_RDOP_ARG(cpustate->PC);
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cpustate->icount -= add_branch_cycle(cpustate);
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}
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else
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else
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cpustate->PC++ ;
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cpustate->PC++ ;
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}
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}
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@ -726,6 +747,8 @@ static void zals(tms32010_state *cpustate)
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* Opcode Table (Cycles, Instruction)
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* Opcode Table (Cycles, Instruction)
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***********************************************************************/
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***********************************************************************/
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/* Conditional Branch instructions take two cycles when the test condition is met and the branch performed */
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static const tms32010_opcode opcode_main[256]=
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static const tms32010_opcode opcode_main[256]=
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{
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{
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/*00*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
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/*00*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
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@ -758,8 +781,8 @@ static const tms32010_opcode opcode_main[256]=
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/*D8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
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/*D8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
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/*E0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
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/*E0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
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/*E8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
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/*E8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
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/*F0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{2, banz },{2, bv },{2, bioz },{0, illegal },
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/*F0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{1, banz },{1, bv },{1, bioz },{0, illegal },
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/*F8*/ {2, call },{2, br },{2, blz },{2, blez },{2, bgz },{2, bgez },{2, bnz },{2, bz }
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/*F8*/ {2, call },{2, br },{1, blz },{1, blez },{1, bgz },{1, bgez },{1, bnz },{1, bz }
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};
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};
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static const tms32010_opcode opcode_7F[32]=
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static const tms32010_opcode opcode_7F[32]=
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@ -770,7 +793,10 @@ static const tms32010_opcode opcode_7F[32]=
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/*98*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{2, push },{2, pop },{0, illegal },{0, illegal }
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/*98*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{2, push },{2, pop },{0, illegal },{0, illegal }
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};
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};
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INLINE int add_branch_cycle(tms32010_state *cpustate)
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{
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return opcode_main[cpustate->opcode.b.h].cycles;
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}
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/****************************************************************************
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/****************************************************************************
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* Inits CPU emulation
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* Inits CPU emulation
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@ -839,7 +865,7 @@ static int Ext_IRQ(tms32010_state *cpustate)
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SET(cpustate, INTM_FLAG);
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SET(cpustate, INTM_FLAG);
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PUSH_STACK(cpustate, cpustate->PC);
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PUSH_STACK(cpustate, cpustate->PC);
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cpustate->PC = 0x0002;
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cpustate->PC = 0x0002;
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return (3); /* 3 cycles used due to PUSH and DINT operation ? */
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return (opcode_7F[0x1c].cycles + opcode_7F[0x01].cycles); /* 3 cycles used due to PUSH and DINT operation ? */
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}
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}
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return (0);
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return (0);
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}
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}
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@ -1002,7 +1028,7 @@ CPU_GET_INFO( tms32010 )
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case DEVINFO_STR_NAME: strcpy(info->s, "TMS32010"); break;
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case DEVINFO_STR_NAME: strcpy(info->s, "TMS32010"); break;
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case DEVINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments TMS32010"); break;
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case DEVINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments TMS32010"); break;
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case DEVINFO_STR_VERSION: strcpy(info->s, "1.30"); break;
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case DEVINFO_STR_VERSION: strcpy(info->s, "1.31"); break;
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case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
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case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
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case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
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case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
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@ -137,6 +137,11 @@ static void coolpool_from_shiftreg(const address_space *space, UINT32 address, U
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static MACHINE_RESET( amerdart )
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static MACHINE_RESET( amerdart )
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{
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{
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coolpool_state *state = (coolpool_state *)machine->driver_data;
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state->maincpu = machine->device("maincpu");
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state->dsp = machine->device("dsp");
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nvram_write_enable = 0;
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nvram_write_enable = 0;
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}
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}
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@ -202,6 +207,15 @@ static WRITE16_HANDLER( nvram_thrash_data_w )
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*
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*
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*************************************/
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*************************************/
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static TIMER_DEVICE_CALLBACK( amerdart_audio_int_gen )
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{
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coolpool_state *state = (coolpool_state *)timer.machine->driver_data;
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cpu_set_input_line(state->dsp, 0, ASSERT_LINE);
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cpu_set_input_line(state->dsp, 0, CLEAR_LINE);
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}
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static WRITE16_HANDLER( amerdart_misc_w )
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static WRITE16_HANDLER( amerdart_misc_w )
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{
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{
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logerror("%08x:IOP_system_w %04x\n",cpu_get_pc(space->cpu),data);
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logerror("%08x:IOP_system_w %04x\n",cpu_get_pc(space->cpu),data);
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@ -862,7 +876,7 @@ static MACHINE_DRIVER_START( amerdart )
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MDRV_CPU_PROGRAM_MAP(amerdart_dsp_pgm_map)
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MDRV_CPU_PROGRAM_MAP(amerdart_dsp_pgm_map)
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/* Data Map is internal to the CPU */
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/* Data Map is internal to the CPU */
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MDRV_CPU_IO_MAP(amerdart_dsp_io_map)
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MDRV_CPU_IO_MAP(amerdart_dsp_io_map)
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MDRV_CPU_PERIODIC_INT(irq0_line_pulse, 14400)
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MDRV_TIMER_ADD_SCANLINE("audioint", amerdart_audio_int_gen, "screen", 0, 1)
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MDRV_MACHINE_RESET(amerdart)
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MDRV_MACHINE_RESET(amerdart)
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MDRV_NVRAM_HANDLER(generic_0fill)
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MDRV_NVRAM_HANDLER(generic_0fill)
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UINT16 result;
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UINT16 result;
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UINT16 lastresult;
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UINT16 lastresult;
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running_device *maincpu;
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running_device *dsp;
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};
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};
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