pic8259.c: Switched to devcb2. (nw)

This commit is contained in:
Wilbert Pol 2013-05-15 21:57:33 +00:00
parent febb0e53f1
commit 6f7dd684be
75 changed files with 154 additions and 784 deletions

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@ -58,6 +58,8 @@
#define DEVCB2_CONSTANT(_value) devcb2_base::constant_desc(_value) #define DEVCB2_CONSTANT(_value) devcb2_base::constant_desc(_value)
#define DEVCB2_LOGGER(_string, _value) devcb2_base::logger_desc(_string, _value) #define DEVCB2_LOGGER(_string, _value) devcb2_base::logger_desc(_string, _value)
#define DEVCB2_INPUTLINE(_tag, _line) devcb2_base::inputline_desc(_tag, _line) #define DEVCB2_INPUTLINE(_tag, _line) devcb2_base::inputline_desc(_tag, _line)
#define DEVCB2_VCC DEVCB2_CONSTANT(1)
#define DEVCB2_GND DEVCB2_CONSTANT(0)
// wrappers for read callbacks into the owner device // wrappers for read callbacks into the owner device
#define DEVCB2_READLINE(_class, _func) read_line_delegate(&_class::_func, #_class "::" #_func, DEVICE_SELF, (_class *)0) #define DEVCB2_READLINE(_class, _func) read_line_delegate(&_class::_func, #_class "::" #_func, DEVICE_SELF, (_class *)0)

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@ -377,14 +377,10 @@ WRITE8_MEMBER( pic8259_device::write )
void pic8259_device::device_start() void pic8259_device::device_start()
{ {
const struct pic8259_interface *intf = (const struct pic8259_interface *)this->static_config();
assert(intf != NULL);
/* resolve callbacks */ /* resolve callbacks */
m_out_int_func.resolve(intf->out_int_func, *this); m_out_int_func.resolve();
m_sp_en_func.resolve(intf->sp_en_func, *this); m_sp_en_func.resolve();
m_read_slave_ack_func.resolve(intf->read_slave_ack_func, *this); m_read_slave_ack_func.resolve();
} }
@ -422,16 +418,9 @@ const device_type PIC8259 = &device_creator<pic8259_device>;
pic8259_device::pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) pic8259_device::pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, PIC8259, "Intel PIC8259", tag, owner, clock) : device_t(mconfig, PIC8259, "Intel PIC8259", tag, owner, clock)
{ , m_out_int_func(*this)
} , m_sp_en_func(*this)
, m_read_slave_ack_func(*this)
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void pic8259_device::device_config_complete()
{ {
} }

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@ -25,14 +25,29 @@
#ifndef __PIC8259_H__ #ifndef __PIC8259_H__
#define __PIC8259_H__ #define __PIC8259_H__
#include "devlegcy.h"
#include "devcb.h" #include "devcb.h"
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_PIC8259_ADD(_tag, _out_int, _sp_en, _read_slave_ack) \
MCFG_DEVICE_ADD(_tag, PIC8259, 0) \
devcb = &pic8259_device::static_set_out_int_callback( *device, DEVCB2_##_out_int ); \
devcb = &pic8259_device::static_set_sp_en_callback( *device, DEVCB2_##_sp_en ); \
devcb = &pic8259_device::static_set_read_slave_ack_callback( *device, DEVCB2_##_read_slave_ack );
class pic8259_device : public device_t class pic8259_device : public device_t
{ {
public: public:
pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
template<class _Object> static devcb2_base &static_set_out_int_callback(device_t &device, _Object object) { return downcast<pic8259_device &>(device).m_out_int_func.set_callback(object); }
template<class _Object> static devcb2_base &static_set_sp_en_callback(device_t &device, _Object object) { return downcast<pic8259_device &>(device).m_sp_en_func.set_callback(object); }
template<class _Object> static devcb2_base &static_set_read_slave_ack_callback(device_t &device, _Object object) { return downcast<pic8259_device &>(device).m_read_slave_ack_func.set_callback(object); }
DECLARE_READ8_MEMBER( read ); DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write ); DECLARE_WRITE8_MEMBER( write );
UINT32 acknowledge(); UINT32 acknowledge();
@ -50,7 +65,6 @@ public:
protected: protected:
// device-level overrides // device-level overrides
virtual void device_config_complete();
virtual void device_start(); virtual void device_start();
virtual void device_reset(); virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@ -71,9 +85,9 @@ private:
STATE_READY STATE_READY
}; };
devcb_resolved_write_line m_out_int_func; devcb2_write_line m_out_int_func;
devcb_resolved_read_line m_sp_en_func; devcb2_read_line m_sp_en_func;
devcb_resolved_read8 m_read_slave_ack_func; devcb2_read8 m_read_slave_ack_func;
pic8259_state_t m_state; pic8259_state_t m_state;
@ -109,29 +123,4 @@ private:
extern const device_type PIC8259; extern const device_type PIC8259;
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
struct pic8259_interface
{
/* Called when int line changes */
devcb_write_line out_int_func;
/* 1 - when master, 0 - when slave */
devcb_read_line sp_en_func;
/* Called when on master slave irq is trigered*/
devcb_read8 read_slave_ack_func;
};
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_PIC8259_ADD(_tag, _intrf) \
MCFG_DEVICE_ADD(_tag, PIC8259, 0) \
MCFG_DEVICE_CONFIG(_intrf)
#endif /* __PIC8259_H__ */ #endif /* __PIC8259_H__ */

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@ -842,22 +842,6 @@ READ8_MEMBER(calchase_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface calchase_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(calchase_state,calchase_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(calchase_state,get_slave_ack)
};
static const struct pic8259_interface calchase_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
@ -916,8 +900,8 @@ static MACHINE_CONFIG_START( calchase, calchase_state )
MCFG_PIT8254_ADD( "pit8254", calchase_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", calchase_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", calchase_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(calchase_state,calchase_pic8259_1_set_int_line), VCC, READ8(calchase_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", calchase_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

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@ -2789,20 +2789,6 @@ READ8_MEMBER(chihiro_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface chihiro_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(chihiro_state, chihiro_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(chihiro_state,get_slave_ack)
};
static const struct pic8259_interface chihiro_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(chihiro_state::irq_callback) IRQ_CALLBACK_MEMBER(chihiro_state::irq_callback)
{ {
int r = 0; int r = 0;
@ -3062,8 +3048,8 @@ static MACHINE_CONFIG_START( chihiro_base, chihiro_state )
MCFG_PCI_BUS_LEGACY_ADD("agpbus", 1) MCFG_PCI_BUS_LEGACY_ADD("agpbus", 1)
MCFG_PCI_BUS_LEGACY_SIBLING("pcibus") MCFG_PCI_BUS_LEGACY_SIBLING("pcibus")
MCFG_PCI_BUS_LEGACY_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", geforce_pci_r, geforce_pci_w) MCFG_PCI_BUS_LEGACY_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", geforce_pci_r, geforce_pci_w)
MCFG_PIC8259_ADD( "pic8259_1", chihiro_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(chihiro_state, chihiro_pic8259_1_set_int_line), VCC, READ8(chihiro_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", chihiro_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_PIT8254_ADD( "pit8254", chihiro_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", chihiro_pit8254_config )
MCFG_IDE_CONTROLLER_ADD( "ide", ide_baseboard, NULL, "bb", true) MCFG_IDE_CONTROLLER_ADD( "ide", ide_baseboard, NULL, "bb", true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

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@ -476,22 +476,6 @@ READ8_MEMBER(fruitpc_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface fruitpc_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(fruitpc_state,fruitpc_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(fruitpc_state,get_slave_ack)
};
static const struct pic8259_interface fruitpc_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
@ -547,8 +531,8 @@ static MACHINE_CONFIG_START( fruitpc, fruitpc_state )
MCFG_PIT8254_ADD( "pit8254", fruitpc_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", fruitpc_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", fruitpc_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(fruitpc_state,fruitpc_pic8259_1_set_int_line), VCC, READ8(fruitpc_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", fruitpc_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

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@ -1045,20 +1045,6 @@ READ8_MEMBER( funkball_state::get_slave_ack )
return 0x00; return 0x00;
} }
static const struct pic8259_interface funkball_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(funkball_state,funkball_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(funkball_state,get_slave_ack)
};
static const struct pic8259_interface funkball_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
READ8_MEMBER(funkball_state::get_out2) READ8_MEMBER(funkball_state::get_out2)
{ {
return pit8253_get_output( m_pit8254, 2 ); return pit8253_get_output( m_pit8254, 2 );
@ -1131,8 +1117,8 @@ static MACHINE_CONFIG_START( funkball, funkball_state )
MCFG_PIT8254_ADD( "pit8254", funkball_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", funkball_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", funkball_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(funkball_state,funkball_pic8259_1_set_int_line), VCC, READ8(funkball_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", funkball_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )

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@ -645,20 +645,6 @@ READ8_MEMBER(gamecstl_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface gamecstl_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(gamecstl_state,gamecstl_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(gamecstl_state,get_slave_ack)
};
static const struct pic8259_interface gamecstl_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
@ -720,9 +706,9 @@ static MACHINE_CONFIG_START( gamecstl, gamecstl_state )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", gamecstl_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(gamecstl_state,gamecstl_pic8259_1_set_int_line), VCC, READ8(gamecstl_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", gamecstl_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

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@ -708,20 +708,6 @@ READ8_MEMBER(gammagic_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface gammagic_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(gammagic_state,gammagic_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(gammagic_state,get_slave_ack)
};
static const struct pic8259_interface gammagic_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
* pit8254 configuration * pit8254 configuration
@ -771,8 +757,8 @@ static MACHINE_CONFIG_START( gammagic, gammagic_state )
MCFG_PIT8254_ADD( "pit8254", gammagic_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", gammagic_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", gammagic_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(gammagic_state,gammagic_pic8259_1_set_int_line), VCC, READ8(gammagic_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", gammagic_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
// MCFG_I82371SB_ADD("i82371sb") // MCFG_I82371SB_ADD("i82371sb")
// MCFG_I82439TX_ADD("i82439tx", "maincpu", "user") // MCFG_I82439TX_ADD("i82439tx", "maincpu", "user")

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@ -1107,20 +1107,6 @@ READ8_MEMBER(mediagx_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface mediagx_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(mediagx_state,mediagx_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(mediagx_state,get_slave_ack)
};
static const struct pic8259_interface mediagx_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
@ -1190,9 +1176,9 @@ static MACHINE_CONFIG_START( mediagx, mediagx_state )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_master", mediagx_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(mediagx_state,mediagx_pic8259_1_set_int_line), VCC, READ8(mediagx_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", mediagx_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL )
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w))

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@ -598,20 +598,6 @@ READ8_MEMBER( midqslvr_state::get_slave_ack )
return 0x00; return 0x00;
} }
static const struct pic8259_interface midqslvr_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(midqslvr_state,midqslvr_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(midqslvr_state,get_slave_ack)
};
static const struct pic8259_interface midqslvr_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
READ8_MEMBER(midqslvr_state::get_out2) READ8_MEMBER(midqslvr_state::get_out2)
{ {
return pit8253_get_output( m_pit8254, 2 ); return pit8253_get_output( m_pit8254, 2 );
@ -669,8 +655,8 @@ static MACHINE_CONFIG_START( midqslvr, midqslvr_state )
MCFG_PIT8254_ADD( "pit8254", midqslvr_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", midqslvr_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", midqslvr_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(midqslvr_state,midqslvr_pic8259_1_set_int_line), VCC, READ8(midqslvr_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", midqslvr_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )

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@ -530,20 +530,6 @@ READ8_MEMBER(pcxt_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(pcxt_state,pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(pcxt_state,get_slave_ack)
};
static const struct pic8259_interface pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(pcxt_state::irq_callback) IRQ_CALLBACK_MEMBER(pcxt_state::irq_callback)
{ {
return m_pic8259_1->acknowledge(); return m_pic8259_1->acknowledge();
@ -738,9 +724,9 @@ static MACHINE_CONFIG_START( filetto, pcxt_state )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_PIC8259_ADD( "pic8259_1", pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(pcxt_state,pic8259_1_set_int_line), VCC, READ8(pcxt_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )

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@ -215,20 +215,6 @@ READ8_MEMBER(photoply_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(photoply_state,pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(photoply_state,get_slave_ack)
};
static const struct pic8259_interface pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(photoply_state::irq_callback) IRQ_CALLBACK_MEMBER(photoply_state::irq_callback)
{ {
return m_pic8259_1->acknowledge(); return m_pic8259_1->acknowledge();
@ -388,8 +374,8 @@ static MACHINE_CONFIG_START( photoply, photoply_state )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
// MCFG_FRAGMENT_ADD( at_kbdc8042 ) // MCFG_FRAGMENT_ADD( at_kbdc8042 )
MCFG_PIC8259_ADD( "pic8259_1", pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(photoply_state,pic8259_1_set_int_line), VCC, READ8(photoply_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIT8254_ADD( "pit8254", at_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", at_pit8254_config )

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@ -809,20 +809,6 @@ READ8_MEMBER(pinball2k_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface mediagx_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(pinball2k_state,mediagx_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(pinball2k_state,get_slave_ack)
};
static const struct pic8259_interface mediagx_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
@ -892,9 +878,9 @@ static MACHINE_CONFIG_START( mediagx, pinball2k_state )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_master", mediagx_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pinball2k_state,mediagx_pic8259_1_set_int_line), VCC, READ8(pinball2k_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", mediagx_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL )
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_slave", pic8259_device, ir6_w))

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@ -134,20 +134,6 @@ READ8_MEMBER(quakeat_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface quakeat_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(quakeat_state,quakeat_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(quakeat_state,get_slave_ack)
};
static const struct pic8259_interface quakeat_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/*************************************************************/ /*************************************************************/
static INPUT_PORTS_START( quake ) static INPUT_PORTS_START( quake )
@ -176,8 +162,8 @@ static MACHINE_CONFIG_START( quake, quakeat_state )
MCFG_CPU_IO_MAP(quake_io) MCFG_CPU_IO_MAP(quake_io)
MCFG_PIC8259_ADD( "pic8259_1", quakeat_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(quakeat_state,quakeat_pic8259_1_set_int_line), VCC, READ8(quakeat_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", quakeat_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)

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@ -462,20 +462,6 @@ READ8_MEMBER( queen_state::get_slave_ack )
return 0x00; return 0x00;
} }
static const struct pic8259_interface queen_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(queen_state,queen_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(queen_state,get_slave_ack)
};
static const struct pic8259_interface queen_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
READ8_MEMBER(queen_state::get_out2) READ8_MEMBER(queen_state::get_out2)
{ {
return pit8253_get_output( m_pit8254, 2 ); return pit8253_get_output( m_pit8254, 2 );
@ -524,8 +510,8 @@ static MACHINE_CONFIG_START( queen, queen_state )
MCFG_PIT8254_ADD( "pit8254", queen_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", queen_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", queen_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(queen_state,queen_pic8259_1_set_int_line), VCC, READ8(queen_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", queen_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )

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@ -561,20 +561,6 @@ READ8_MEMBER( savquest_state::get_slave_ack )
return 0x00; return 0x00;
} }
static const struct pic8259_interface savquest_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(savquest_state,savquest_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(savquest_state,get_slave_ack)
};
static const struct pic8259_interface savquest_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
READ8_MEMBER(savquest_state::get_out2) READ8_MEMBER(savquest_state::get_out2)
{ {
return pit8253_get_output( m_pit8254, 2 ); return pit8253_get_output( m_pit8254, 2 );
@ -627,8 +613,8 @@ static MACHINE_CONFIG_START( savquest, savquest_state )
MCFG_PIT8254_ADD( "pit8254", savquest_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", savquest_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", savquest_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(savquest_state,savquest_pic8259_1_set_int_line), VCC, READ8(savquest_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", savquest_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )

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@ -150,19 +150,19 @@ READ8_MEMBER(su2000_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface su2000_pic8259_1_config = //static const struct pic8259_interface su2000_pic8259_1_config =
{ //{
DEVCB_DRIVER_LINE_MEMBER(su2000_state,su2000_pic8259_1_set_int_line), // DEVCB_DRIVER_LINE_MEMBER(su2000_state,su2000_pic8259_1_set_int_line),
DEVCB_LINE_VCC, // DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(su2000_state,get_slave_ack) // DEVCB_DRIVER_MEMBER(su2000_state,get_slave_ack)
}; //};
//
static const struct pic8259_interface su2000_pic8259_2_config = //static const struct pic8259_interface su2000_pic8259_2_config =
{ //{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w), // DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND, // DEVCB_LINE_GND,
DEVCB_NULL // DEVCB_NULL
}; //};
/************************************************************* /*************************************************************

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@ -582,20 +582,6 @@ READ8_MEMBER(taitowlf_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface taitowlf_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(taitowlf_state,taitowlf_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(taitowlf_state,get_slave_ack)
};
static const struct pic8259_interface taitowlf_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
@ -666,8 +652,8 @@ static MACHINE_CONFIG_START( taitowlf, taitowlf_state )
MCFG_PIT8254_ADD( "pit8254", taitowlf_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", taitowlf_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", taitowlf_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(taitowlf_state,taitowlf_pic8259_1_set_int_line), VCC, READ8(taitowlf_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", taitowlf_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )

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@ -678,22 +678,6 @@ READ8_MEMBER(voyager_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface voyager_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(voyager_state,voyager_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(voyager_state,get_slave_ack)
};
static const struct pic8259_interface voyager_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
@ -752,8 +736,8 @@ static MACHINE_CONFIG_START( voyager, voyager_state )
MCFG_PIT8254_ADD( "pit8254", voyager_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", voyager_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", voyager_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(voyager_state,voyager_pic8259_1_set_int_line), VCC, READ8(voyager_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", voyager_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true) MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w)) MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))

View File

@ -590,20 +590,6 @@ READ8_MEMBER( xtom3d_state::get_slave_ack )
return 0x00; return 0x00;
} }
static const struct pic8259_interface xtom3d_pic8259_1_config =
{
DEVCB_DRIVER_LINE_MEMBER(xtom3d_state,xtom3d_pic8259_1_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(xtom3d_state,get_slave_ack)
};
static const struct pic8259_interface xtom3d_pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
READ8_MEMBER(xtom3d_state::get_out2) READ8_MEMBER(xtom3d_state::get_out2)
{ {
return pit8253_get_output( m_pit8254, 2 ); return pit8253_get_output( m_pit8254, 2 );
@ -660,8 +646,8 @@ static MACHINE_CONFIG_START( xtom3d, xtom3d_state )
MCFG_PIT8254_ADD( "pit8254", xtom3d_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", xtom3d_pit8254_config )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_1", xtom3d_pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", WRITELINE(xtom3d_state,xtom3d_pic8259_1_set_int_line), VCC, READ8(xtom3d_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", xtom3d_pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD ) MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )

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@ -151,20 +151,6 @@ READ8_MEMBER( pcat_base_state::get_slave_ack )
return 0x00; return 0x00;
} }
static const struct pic8259_interface pic8259_1_config =
{
DEVCB_CPU_INPUT_LINE("maincpu", 0),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(pcat_base_state, get_slave_ack)
};
static const struct pic8259_interface pic8259_2_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(pcat_base_state::irq_callback) IRQ_CALLBACK_MEMBER(pcat_base_state::irq_callback)
{ {
return m_pic8259_1->acknowledge(); return m_pic8259_1->acknowledge();
@ -240,8 +226,8 @@ ADDRESS_MAP_START( pcat32_io_common, AS_IO, 32, pcat_base_state )
ADDRESS_MAP_END ADDRESS_MAP_END
MACHINE_CONFIG_FRAGMENT(pcat_common) MACHINE_CONFIG_FRAGMENT(pcat_common)
MCFG_PIC8259_ADD( "pic8259_1", pic8259_1_config ) MCFG_PIC8259_ADD( "pic8259_1", INPUTLINE("maincpu", 0), VCC, READ8(pcat_base_state, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_2", pic8259_2_config ) MCFG_PIC8259_ADD( "pic8259_2", DEVWRITELINE("pic8259_1", pic8259_device, ir2_w), GND, NULL )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
MCFG_PIT8254_ADD( "pit8254", at_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", at_pit8254_config )

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@ -268,7 +268,7 @@ static MACHINE_CONFIG_START( pc200, amstrad_pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface )
@ -341,7 +341,7 @@ static MACHINE_CONFIG_START( ppc512, amstrad_pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface )

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@ -898,20 +898,6 @@ READ8_MEMBER(apc_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(apc_state, apc_master_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(apc_state,get_slave_ack)
};
static const struct pic8259_interface pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w), //TODO: check me
DEVCB_LINE_GND,
DEVCB_NULL
};
/**************************************** /****************************************
* *
* I8237 DMA interface * I8237 DMA interface
@ -1030,8 +1016,8 @@ static MACHINE_CONFIG_START( apc, apc_state )
MCFG_CPU_IO_MAP(apc_io) MCFG_CPU_IO_MAP(apc_io)
MCFG_PIT8253_ADD( "pit8253", pit8253_config ) MCFG_PIT8253_ADD( "pit8253", pit8253_config )
MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(apc_state, apc_master_set_int_line), VCC, READ8(apc_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: check ir7_w
MCFG_I8237_ADD("i8237", MAIN_CLOCK, dmac_intf) MCFG_I8237_ADD("i8237", MAIN_CLOCK, dmac_intf)
MCFG_NVRAM_ADD_1FILL("cmos") MCFG_NVRAM_ADD_1FILL("cmos")

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@ -148,14 +148,6 @@ IRQ_CALLBACK_MEMBER(apricot_state::apricot_irq_ack)
return m_pic->inta_r(); return m_pic->inta_r();
} }
static const struct pic8259_interface apricot_pic8259_intf =
{
DEVCB_CPU_INPUT_LINE("maincpu", 0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
/*************************************************************************** /***************************************************************************
FLOPPY FLOPPY
***************************************************************************/ ***************************************************************************/
@ -394,7 +386,7 @@ static MACHINE_CONFIG_START( apricot, apricot_state )
/* Devices */ /* Devices */
MCFG_MC6845_ADD("ic30", MC6845, XTAL_15MHz / 10, apricot_mc6845_intf) MCFG_MC6845_ADD("ic30", MC6845, XTAL_15MHz / 10, apricot_mc6845_intf)
MCFG_I8255A_ADD("ic17", apricot_i8255a_intf) MCFG_I8255A_ADD("ic17", apricot_i8255a_intf)
MCFG_PIC8259_ADD("ic31", apricot_pic8259_intf) MCFG_PIC8259_ADD("ic31", INPUTLINE("maincpu",0), VCC, NULL)
MCFG_PIT8253_ADD("ic16", apricot_pit8253_intf) MCFG_PIT8253_ADD("ic16", apricot_pit8253_intf)
MCFG_Z80SIO_ADD("ic15", 0, apricot_z80sio_intf) MCFG_Z80SIO_ADD("ic15", 0, apricot_z80sio_intf)

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@ -434,14 +434,6 @@ static APRICOT_KEYBOARD_INTERFACE( kb_intf )
*/ */
static const struct pic8259_interface pic_intf =
{
DEVCB_CPU_INPUT_LINE(I8086_TAG, INPUT_LINE_IRQ0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
//------------------------------------------------- //-------------------------------------------------
// pit8253_config pit_intf // pit8253_config pit_intf
//------------------------------------------------- //-------------------------------------------------
@ -660,7 +652,7 @@ static MACHINE_CONFIG_START( fp, fp_state )
/* Devices */ /* Devices */
MCFG_APRICOT_KEYBOARD_ADD(kb_intf) MCFG_APRICOT_KEYBOARD_ADD(kb_intf)
MCFG_I8237_ADD(I8237_TAG, 250000, dmac_intf) MCFG_I8237_ADD(I8237_TAG, 250000, dmac_intf)
MCFG_PIC8259_ADD(I8259A_TAG, pic_intf) MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253A5_TAG, pit_intf) MCFG_PIT8253_ADD(I8253A5_TAG, pit_intf)
MCFG_Z80DART_ADD(Z80SIO0_TAG, 2500000, sio_intf) MCFG_Z80DART_ADD(Z80SIO0_TAG, 2500000, sio_intf)
MCFG_WD2797x_ADD(WD2797_TAG, 2000000) MCFG_WD2797x_ADD(WD2797_TAG, 2000000)

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@ -380,8 +380,8 @@ static MACHINE_CONFIG_FRAGMENT( at_motherboard )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_master", at_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE("maincpu", 0), VCC, READ8(at_state, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", at_pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL )
MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keyboard_controller_intf) MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keyboard_controller_intf)
MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf) MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)

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@ -207,8 +207,7 @@ static MACHINE_CONFIG_START( b2m, b2m_state )
MCFG_I8255_ADD( "ppi8255_3", b2m_ppi8255_interface_3 ) MCFG_I8255_ADD( "ppi8255_3", b2m_ppi8255_interface_3 )
MCFG_PIC8259_ADD( "pic8259", b2m_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(b2m_state,b2m_pic_set_int_line), VCC, NULL )
/* sound */ /* sound */
MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_SPEAKER_STANDARD_MONO("mono")

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@ -197,9 +197,9 @@ static MACHINE_CONFIG_START( bebox, bebox_state )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, bebox_dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, bebox_dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_master", bebox_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(bebox_state,bebox_pic8259_master_set_int_line), VCC, READ8(bebox_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", bebox_pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", WRITELINE(bebox_state,bebox_pic8259_slave_set_int_line), GND, NULL )
MCFG_NS16550_ADD( "ns16550_0", bebox_uart_inteface_0, 0 ) /* TODO: Verify model */ MCFG_NS16550_ADD( "ns16550_0", bebox_uart_inteface_0, 0 ) /* TODO: Verify model */
MCFG_NS16550_ADD( "ns16550_1", bebox_uart_inteface_1, 0 ) /* TODO: Verify model */ MCFG_NS16550_ADD( "ns16550_1", bebox_uart_inteface_1, 0 ) /* TODO: Verify model */

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@ -1688,13 +1688,6 @@ IRQ_CALLBACK_MEMBER(cbm2_state::pic_irq_callback)
return m_ext_pic->inta_r(); return m_ext_pic->inta_r();
} }
static pic8259_interface ext_pic_intf =
{
DEVCB_CPU_INPUT_LINE(EXT_I8088_TAG, INPUT_LINE_IRQ0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
//------------------------------------------------- //-------------------------------------------------
// tpi6525_interface ext_tpi_intf // tpi6525_interface ext_tpi_intf
@ -2431,7 +2424,7 @@ static MACHINE_CONFIG_DERIVED( bx256hp, b256hp )
MCFG_CPU_PROGRAM_MAP(ext_mem) MCFG_CPU_PROGRAM_MAP(ext_mem)
MCFG_CPU_IO_MAP(ext_io) MCFG_CPU_IO_MAP(ext_io)
MCFG_PIC8259_ADD(EXT_I8259A_TAG, ext_pic_intf) MCFG_PIC8259_ADD(EXT_I8259A_TAG, INPUTLINE(EXT_I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf) MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf)
MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 60, DEVWRITELINE(DEVICE_SELF, cbm2_state, ext_cia_irq_w)) MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 60, DEVWRITELINE(DEVICE_SELF, cbm2_state, ext_cia_irq_w))
MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w)) MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w))
@ -2490,7 +2483,7 @@ static MACHINE_CONFIG_DERIVED( cbm730, cbm720 )
MCFG_CPU_PROGRAM_MAP(ext_mem) MCFG_CPU_PROGRAM_MAP(ext_mem)
MCFG_CPU_IO_MAP(ext_io) MCFG_CPU_IO_MAP(ext_io)
MCFG_PIC8259_ADD(EXT_I8259A_TAG, ext_pic_intf) MCFG_PIC8259_ADD(EXT_I8259A_TAG, INPUTLINE(EXT_I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf) MCFG_TPI6525_ADD(EXT_MOS6525_TAG, ext_tpi_intf)
MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 50, DEVWRITELINE(DEVICE_SELF, cbm2_state, ext_cia_irq_w)) MCFG_MOS6526_ADD(EXT_MOS6526_TAG, XTAL_18MHz/9, 50, DEVWRITELINE(DEVICE_SELF, cbm2_state, ext_cia_irq_w))
MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w)) MCFG_MOS6526_SERIAL_CALLBACKS(DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, cnt_w), DEVWRITELINE(CBM2_USER_PORT_TAG, cbm2_user_port_device, sp_w))

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@ -373,8 +373,8 @@ static MACHINE_CONFIG_START( compis, compis_state )
/* Devices */ /* Devices */
MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config ) MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config )
MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config )
MCFG_PIC8259_ADD( "pic8259_master", compis_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(compis_state, compis_pic8259_master_set_int_line), VCC, READ8(compis_state, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", compis_pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", WRITELINE(compis_state, compis_pic8259_slave_set_int_line), GND, NULL )
MCFG_I8255_ADD( "ppi8255", compis_ppi_interface ) MCFG_I8255_ADD( "ppi8255", compis_ppi_interface )
MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock
MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics) MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics)
@ -413,8 +413,8 @@ static MACHINE_CONFIG_START( compis2, compis_state )
/* Devices */ /* Devices */
MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config ) MCFG_PIT8253_ADD( "pit8253", compis_pit8253_config )
MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", compis_pit8254_config )
MCFG_PIC8259_ADD( "pic8259_master", compis_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(compis_state, compis_pic8259_master_set_int_line), VCC, READ8(compis_state, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", compis_pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", WRITELINE(compis_state, compis_pic8259_slave_set_int_line), GND, NULL )
MCFG_I8255_ADD( "ppi8255", compis_ppi_interface ) MCFG_I8255_ADD( "ppi8255", compis_ppi_interface )
MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock MCFG_UPD7220_ADD("upd7220", XTAL_4_433619MHz/2, hgdc_intf, upd7220_map) //unknown clock
MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics) MCFG_CENTRONICS_PRINTER_ADD("centronics", standard_centronics)

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@ -2691,20 +2691,6 @@ READ8_MEMBER(towns_state::get_slave_ack)
} }
return 0x00; return 0x00;
} }
static const struct pic8259_interface towns_pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_pic_irq),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(towns_state,get_slave_ack)
};
static const struct pic8259_interface towns_pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
static const wd17xx_interface towns_mb8877a_interface = static const wd17xx_interface towns_mb8877a_interface =
{ {
@ -2820,9 +2806,9 @@ static MACHINE_CONFIG_FRAGMENT( towns_base )
MCFG_PIT8253_ADD("pit",towns_pit8253_config) MCFG_PIT8253_ADD("pit",towns_pit8253_config)
MCFG_PIT8253_ADD("pit2",towns_pit8253_config_2) MCFG_PIT8253_ADD("pit2",towns_pit8253_config_2)
MCFG_PIC8259_ADD( "pic8259_master", towns_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(towns_state,towns_pic_irq), VCC, READ8(towns_state,get_slave_ack))
MCFG_PIC8259_ADD( "pic8259_slave", towns_pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL)
MCFG_MB8877_ADD("fdc",towns_mb8877a_interface) MCFG_MB8877_ADD("fdc",towns_mb8877a_interface)
MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(towns_floppy_interface) MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(towns_floppy_interface)

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@ -374,14 +374,6 @@ UINT32 iq151_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, c
return 0; return 0;
} }
const struct pic8259_interface iq151_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(iq151_state, pic_set_int_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
static I8255_INTERFACE( iq151_ppi8255_intf ) static I8255_INTERFACE( iq151_ppi8255_intf )
{ {
DEVCB_DRIVER_MEMBER(iq151_state, keyboard_row_r), DEVCB_DRIVER_MEMBER(iq151_state, keyboard_row_r),
@ -448,7 +440,7 @@ static MACHINE_CONFIG_START( iq151, iq151_state )
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MCFG_PIC8259_ADD("pic8259", iq151_pic8259_config) MCFG_PIC8259_ADD("pic8259", WRITELINE(iq151_state, pic_set_int_line), VCC, NULL)
MCFG_I8255_ADD("ppi8255", iq151_ppi8255_intf) MCFG_I8255_ADD("ppi8255", iq151_ppi8255_intf)

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@ -157,7 +157,7 @@ static MACHINE_CONFIG_START( irisha, irisha_state )
MCFG_PIT8253_ADD( "pit8253", irisha_pit8253_intf ) MCFG_PIT8253_ADD( "pit8253", irisha_pit8253_intf )
MCFG_PIC8259_ADD( "pic8259", irisha_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(irisha_state,irisha_pic_set_int_line), VCC, NULL )
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)

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@ -950,13 +950,6 @@ const struct pit8253_config pit8253_intf =
} }
}; };
const struct pic8259_interface pic_intf =
{
DEVCB_DRIVER_LINE_MEMBER(m20_state, pic_irq_line_w),
DEVCB_LINE_VCC, // we're the only 8259, so we're the master
DEVCB_NULL
};
static SLOT_INTERFACE_START( m20_floppies ) static SLOT_INTERFACE_START( m20_floppies )
SLOT_INTERFACE( "5dd", FLOPPY_525_DD ) SLOT_INTERFACE( "5dd", FLOPPY_525_DD )
SLOT_INTERFACE_END SLOT_INTERFACE_END
@ -1003,7 +996,7 @@ static MACHINE_CONFIG_START( m20, m20_state )
MCFG_I8251_ADD("i8251_1", kbd_i8251_intf) MCFG_I8251_ADD("i8251_1", kbd_i8251_intf)
MCFG_I8251_ADD("i8251_2", tty_i8251_intf) MCFG_I8251_ADD("i8251_2", tty_i8251_intf)
MCFG_PIT8253_ADD("pit8253", pit8253_intf) MCFG_PIT8253_ADD("pit8253", pit8253_intf)
MCFG_PIC8259_ADD("i8259", pic_intf) MCFG_PIC8259_ADD("i8259", WRITELINE(m20_state, pic_irq_line_w), VCC, NULL)
MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf) MCFG_ASCII_KEYBOARD_ADD(KEYBOARD_TAG, keyboard_intf)

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@ -259,7 +259,7 @@ static MACHINE_CONFIG_START( mbc55x, mbc55x_state )
/* Devices */ /* Devices */
MCFG_I8251_ADD(I8251A_KB_TAG,mbc55x_i8251a_interface) MCFG_I8251_ADD(I8251A_KB_TAG,mbc55x_i8251a_interface)
MCFG_PIT8253_ADD( PIT8253_TAG, mbc55x_pit8253_config ) MCFG_PIT8253_ADD( PIT8253_TAG, mbc55x_pit8253_config )
MCFG_PIC8259_ADD( PIC8259_TAG, mbc55x_pic8259_config ) MCFG_PIC8259_ADD( PIC8259_TAG, INPUTLINE(MAINCPU_TAG, INPUT_LINE_IRQ0), VCC, NULL )
MCFG_I8255_ADD( PPI8255_TAG, mbc55x_ppi8255_interface ) MCFG_I8255_ADD( PPI8255_TAG, mbc55x_ppi8255_interface )
MCFG_MC6845_ADD(VID_MC6845_NAME, MC6845, XTAL_14_31818MHz/8, mb55x_mc6845_intf) MCFG_MC6845_ADD(VID_MC6845_NAME, MC6845, XTAL_14_31818MHz/8, mb55x_mc6845_intf)

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@ -128,13 +128,6 @@ WRITE_LINE_MEMBER( multi16_state::multi16_set_int_line )
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
} }
static const struct pic8259_interface multi16_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(multi16_state, multi16_set_int_line),
DEVCB_LINE_GND,
DEVCB_NULL
};
void multi16_state::machine_start() void multi16_state::machine_start()
{ {
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(multi16_state::multi16_irq_callback),this)); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(multi16_state::multi16_irq_callback),this));
@ -179,7 +172,7 @@ static MACHINE_CONFIG_START( multi16, multi16_state )
/* Devices */ /* Devices */
MCFG_MC6845_ADD("crtc", H46505, 16000000/5, mc6845_intf) /* unknown clock, hand tuned to get ~60 fps */ MCFG_MC6845_ADD("crtc", H46505, 16000000/5, mc6845_intf) /* unknown clock, hand tuned to get ~60 fps */
MCFG_PIC8259_ADD( "pic8259", multi16_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(multi16_state, multi16_set_int_line), GND, NULL )
MACHINE_CONFIG_END MACHINE_CONFIG_END
/* ROM definition */ /* ROM definition */

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@ -286,12 +286,6 @@ WRITE_LINE_MEMBER( paso1600_state::paso1600_set_int_line )
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
} }
static const struct pic8259_interface paso1600_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(paso1600_state, paso1600_set_int_line),
DEVCB_LINE_GND,
DEVCB_NULL
};
void paso1600_state::machine_start() void paso1600_state::machine_start()
{ {
@ -352,7 +346,7 @@ static MACHINE_CONFIG_START( paso1600, paso1600_state )
/* Devices */ /* Devices */
MCFG_MC6845_ADD("crtc", H46505, 16000000/4, mc6845_intf) /* unknown clock, hand tuned to get ~60 fps */ MCFG_MC6845_ADD("crtc", H46505, 16000000/4, mc6845_intf) /* unknown clock, hand tuned to get ~60 fps */
MCFG_PIC8259_ADD( "pic8259", paso1600_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(paso1600_state, paso1600_set_int_line), GND, NULL )
MCFG_I8237_ADD("8237dma", 16000000/4, paso1600_dma8237_interface) MCFG_I8237_ADD("8237dma", 16000000/4, paso1600_dma8237_interface)
MACHINE_CONFIG_END MACHINE_CONFIG_END

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@ -495,13 +495,6 @@ WRITE_LINE_MEMBER(pasogo_state::pasogo_pic8259_set_int_line)
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
} }
static const pic8259_interface pasogo_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(pasogo_state, pasogo_pic8259_set_int_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
static MACHINE_CONFIG_START( pasogo, pasogo_state ) static MACHINE_CONFIG_START( pasogo, pasogo_state )
@ -513,7 +506,7 @@ static MACHINE_CONFIG_START( pasogo, pasogo_state )
MCFG_PIT8254_ADD( "pit8254", pc_pit8254_config ) MCFG_PIT8254_ADD( "pit8254", pc_pit8254_config )
MCFG_PIC8259_ADD( "pic8259", pasogo_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(pasogo_state, pasogo_pic8259_set_int_line), VCC, NULL )
MCFG_SCREEN_ADD("screen", LCD) MCFG_SCREEN_ADD("screen", LCD)
MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_REFRESH_RATE(60)

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@ -995,7 +995,7 @@ static MACHINE_CONFIG_START( pccga, pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
@ -1079,7 +1079,7 @@ static MACHINE_CONFIG_START( europc, europc_pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface )
@ -1131,7 +1131,7 @@ static MACHINE_CONFIG_START( t1000hx, tandy_pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface )
@ -1185,7 +1185,7 @@ static MACHINE_CONFIG_START( t1000_16, tandy_pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface )
@ -1234,7 +1234,7 @@ static MACHINE_CONFIG_START( t1000_286, tandy_pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", pc_ppi8255_interface )
@ -1303,7 +1303,7 @@ static MACHINE_CONFIG_START( ibmpcjr, tandy_pc_state )
MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config ) MCFG_PIT8253_ADD( "pit8253", pcjr_pit8253_config )
MCFG_PIC8259_ADD( "pic8259", pcjr_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(pc_state,pcjr_pic8259_set_int_line), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", pcjr_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", pcjr_ppi8255_interface )
@ -1392,7 +1392,7 @@ static MACHINE_CONFIG_START( mc1502, pc_state )
MCFG_PIT8253_ADD( "pit8253", mc1502_pit8253_config ) MCFG_PIT8253_ADD( "pit8253", mc1502_pit8253_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", mc1502_ppi8255_interface ) /* not complete */ MCFG_I8255_ADD( "ppi8255", mc1502_ppi8255_interface ) /* not complete */
MCFG_I8255_ADD( "ppi8255n2", mc1502_ppi8255_interface_2 ) /* not complete */ MCFG_I8255_ADD( "ppi8255n2", mc1502_ppi8255_interface_2 ) /* not complete */
@ -1442,7 +1442,7 @@ static MACHINE_CONFIG_START( ec1841, pc_state )
// maybe XTAL_12_288MHz // maybe XTAL_12_288MHz
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
@ -1492,7 +1492,7 @@ static MACHINE_CONFIG_START( iskr1031, pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
@ -1565,7 +1565,7 @@ static MACHINE_CONFIG_START( iskr3104, pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
@ -1620,7 +1620,7 @@ static MACHINE_CONFIG_START( poisk2, pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
@ -1675,7 +1675,7 @@ static MACHINE_CONFIG_START( zenith, pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
@ -1730,7 +1730,7 @@ static MACHINE_CONFIG_START( olivetti, pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )
@ -1785,7 +1785,7 @@ static MACHINE_CONFIG_START( ibm5550, pc_state )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, ibm5150_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", ibm5150_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL )
MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface ) MCFG_I8255_ADD( "ppi8255", ibm5160_ppi8255_interface )

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@ -414,13 +414,6 @@ WRITE_LINE_MEMBER( pc100_state::pc100_set_int_line )
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
} }
static const struct pic8259_interface pc100_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(pc100_state, pc100_set_int_line),
DEVCB_LINE_GND,
DEVCB_NULL
};
void pc100_state::machine_start() void pc100_state::machine_start()
{ {
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pc100_state::pc100_irq_callback),this)); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pc100_state::pc100_irq_callback),this));
@ -500,7 +493,7 @@ static MACHINE_CONFIG_START( pc100, pc100_state )
MCFG_TIMER_DRIVER_ADD_PERIODIC("10hz", pc100_state, pc100_10hz_irq, attotime::from_hz(MASTER_CLOCK/10)) MCFG_TIMER_DRIVER_ADD_PERIODIC("10hz", pc100_state, pc100_10hz_irq, attotime::from_hz(MASTER_CLOCK/10))
MCFG_I8255_ADD( "ppi8255_1", pc100_ppi8255_interface_1 ) MCFG_I8255_ADD( "ppi8255_1", pc100_ppi8255_interface_1 )
MCFG_I8255_ADD( "ppi8255_2", pc100_ppi8255_interface_2 ) MCFG_I8255_ADD( "ppi8255_2", pc100_ppi8255_interface_2 )
MCFG_PIC8259_ADD( "pic8259", pc100_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(pc100_state, pc100_set_int_line), GND, NULL )
MCFG_UPD765A_ADD("upd765", true, true) MCFG_UPD765A_ADD("upd765", true, true)
MCFG_MSM58321_ADD("rtc", XTAL_32_768kHz, rtc_intf) MCFG_MSM58321_ADD("rtc", XTAL_32_768kHz, rtc_intf)

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@ -916,13 +916,6 @@ IRQ_CALLBACK_MEMBER(pc1512_state::pc1512_irq_callback)
return m_pic->inta_r(); return m_pic->inta_r();
} }
static const struct pic8259_interface pic_intf =
{
DEVCB_CPU_INPUT_LINE(I8086_TAG, INPUT_LINE_IRQ0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
//------------------------------------------------- //-------------------------------------------------
// pit8253_config pit_intf // pit8253_config pit_intf
@ -1244,7 +1237,7 @@ static MACHINE_CONFIG_START( pc1512, pc1512_state )
// devices // devices
MCFG_PC1512_KEYBOARD_ADD(kb_intf) MCFG_PC1512_KEYBOARD_ADD(kb_intf)
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf) MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
MCFG_PIC8259_ADD(I8259A2_TAG, pic_intf) MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf) MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf) MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG) MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
@ -1289,7 +1282,7 @@ static MACHINE_CONFIG_START( pc1640, pc1640_state )
// devices // devices
MCFG_PC1512_KEYBOARD_ADD(kb_intf) MCFG_PC1512_KEYBOARD_ADD(kb_intf)
MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf) MCFG_I8237_ADD(I8237A5_TAG, XTAL_24MHz/6, dmac_intf)
MCFG_PIC8259_ADD(I8259A2_TAG, pic_intf) MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf) MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf) MCFG_MC146818_IRQ_ADD(MC146818_TAG, MC146818_STANDARD, rtc_intf)
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG) MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)

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@ -1637,20 +1637,6 @@ READ8_MEMBER(pc88va_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface pc88va_pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(pc88va_state, pc88va_pic_irq),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(pc88va_state,get_slave_ack)
};
static const struct pic8259_interface pc88va_pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
void pc88va_state::machine_start() void pc88va_state::machine_start()
{ {
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pc88va_state::pc88va_irq_callback),this)); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pc88va_state::pc88va_irq_callback),this));
@ -1856,8 +1842,9 @@ static MACHINE_CONFIG_START( pc88va, pc88va_state )
MCFG_I8255_ADD( "d8255_2s", slave_fdd_intf ) MCFG_I8255_ADD( "d8255_2s", slave_fdd_intf )
MCFG_PIC8259_ADD( "pic8259_master", pc88va_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc88va_state, pc88va_pic_irq), VCC, READ8(pc88va_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", pc88va_pic8259_slave_config )
MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL )
MCFG_UPD71071_ADD("dmac",pc88va_dma_config) MCFG_UPD71071_ADD("dmac",pc88va_dma_config)

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@ -2930,20 +2930,6 @@ READ8_MEMBER(pc9801_state::get_slave_ack)
return 0x00; return 0x00;
} }
static const struct pic8259_interface pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(pc9801_state, pc9801_master_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(pc9801_state,get_slave_ack)
};
static const struct pic8259_interface pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w), //TODO: check me
DEVCB_LINE_GND,
DEVCB_NULL
};
/**************************************** /****************************************
* *
* I8253 PIT interface * I8253 PIT interface
@ -3571,8 +3557,8 @@ static MACHINE_CONFIG_START( pc9801, pc9801_state )
MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config ) MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config )
MCFG_I8237_ADD("i8237", 5000000, dmac_intf) // unknown clock MCFG_I8237_ADD("i8237", 5000000, dmac_intf) // unknown clock
MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf ) MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf )
MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf ) MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf )
MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf ) MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf )
@ -3640,8 +3626,8 @@ static MACHINE_CONFIG_START( pc9801rs, pc9801_state )
MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config ) MCFG_PIT8253_ADD( "pit8253", pc9801_pit8253_config )
MCFG_I8237_ADD("i8237", MAIN_CLOCK_X1*8, pc9801rs_dmac_intf) // unknown clock MCFG_I8237_ADD("i8237", MAIN_CLOCK_X1*8, pc9801rs_dmac_intf) // unknown clock
MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf ) MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf )
MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf ) MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf )
MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf ) MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf )
@ -3706,8 +3692,8 @@ static MACHINE_CONFIG_START( pc9821, pc9801_state )
MCFG_PIT8253_ADD( "pit8253", pc9821_pit8253_config ) MCFG_PIT8253_ADD( "pit8253", pc9821_pit8253_config )
MCFG_I8237_ADD("i8237", 16000000, pc9801rs_dmac_intf) // unknown clock MCFG_I8237_ADD("i8237", 16000000, pc9801rs_dmac_intf) // unknown clock
MCFG_PIC8259_ADD( "pic8259_master", pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(pc9801_state, pc9801_master_set_int_line), VCC, READ8(pc9801_state,get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL ) // TODO: Check ir7_w
MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf ) MCFG_I8255_ADD( "ppi8255_sys", ppi_system_intf )
MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf ) MCFG_I8255_ADD( "ppi8255_prn", ppi_printer_intf )
MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf ) MCFG_I8255_ADD( "ppi8255_fdd", ppi_fdd_intf )

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@ -224,7 +224,7 @@ static MACHINE_CONFIG_START( pk8020, pk8020_state )
MCFG_I8255_ADD( "ppi8255_2", pk8020_ppi8255_interface_2 ) MCFG_I8255_ADD( "ppi8255_2", pk8020_ppi8255_interface_2 )
MCFG_I8255_ADD( "ppi8255_3", pk8020_ppi8255_interface_3 ) MCFG_I8255_ADD( "ppi8255_3", pk8020_ppi8255_interface_3 )
MCFG_PIT8253_ADD( "pit8253", pk8020_pit8253_intf ) MCFG_PIT8253_ADD( "pit8253", pk8020_pit8253_intf )
MCFG_PIC8259_ADD( "pic8259", pk8020_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", WRITELINE(pk8020_state,pk8020_pic_set_int_line), VCC, NULL )
MCFG_I8251_ADD( "rs232", default_i8251_interface) MCFG_I8251_ADD( "rs232", default_i8251_interface)
MCFG_I8251_ADD( "lan", default_i8251_interface) MCFG_I8251_ADD( "lan", default_i8251_interface)

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@ -564,12 +564,6 @@ READ8_MEMBER( qx10_state::get_slave_ack )
return 0x00; return 0x00;
} }
static const struct pic8259_interface qx10_pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(qx10_state, qx10_pic8259_master_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(qx10_state, get_slave_ack)
};
/* /*
Slave PIC8259 Slave PIC8259
@ -584,13 +578,6 @@ static const struct pic8259_interface qx10_pic8259_master_config =
*/ */
static const struct pic8259_interface qx10_pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir7_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(qx10_state::irq_callback) IRQ_CALLBACK_MEMBER(qx10_state::irq_callback)
{ {
return m_pic_m->acknowledge(); return m_pic_m->acknowledge();
@ -1048,8 +1035,8 @@ static MACHINE_CONFIG_START( qx10, qx10_state )
/* Devices */ /* Devices */
MCFG_PIT8253_ADD("pit8253_1", qx10_pit8253_1_config) MCFG_PIT8253_ADD("pit8253_1", qx10_pit8253_1_config)
MCFG_PIT8253_ADD("pit8253_2", qx10_pit8253_2_config) MCFG_PIT8253_ADD("pit8253_2", qx10_pit8253_2_config)
MCFG_PIC8259_ADD("pic8259_master", qx10_pic8259_master_config) MCFG_PIC8259_ADD("pic8259_master", WRITELINE(qx10_state, qx10_pic8259_master_set_int_line), VCC, READ8(qx10_state, get_slave_ack))
MCFG_PIC8259_ADD("pic8259_slave", qx10_pic8259_slave_config) MCFG_PIC8259_ADD("pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir7_w), GND, NULL)
MCFG_UPD7201_ADD("upd7201", MAIN_CLK/4, qx10_upd7201_interface) MCFG_UPD7201_ADD("upd7201", MAIN_CLK/4, qx10_upd7201_interface)
MCFG_I8255_ADD("i8255", qx10_i8255_interface) MCFG_I8255_ADD("i8255", qx10_i8255_interface)
MCFG_I8237_ADD("8237dma_1", MAIN_CLK/4, qx10_dma8237_1_interface) MCFG_I8237_ADD("8237dma_1", MAIN_CLK/4, qx10_dma8237_1_interface)

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@ -206,13 +206,6 @@ INPUT_PORTS_END
*/ */
static const struct pic8259_interface pic_intf =
{
DEVCB_CPU_INPUT_LINE(M68000_TAG, M68K_IRQ_1),
DEVCB_LINE_VCC,
DEVCB_NULL
};
//------------------------------------------------- //-------------------------------------------------
// I8255A_INTERFACE( ppi0_intf ) // I8255A_INTERFACE( ppi0_intf )
@ -568,7 +561,7 @@ static MACHINE_CONFIG_START( sage2, sage2_state )
MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf) MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
// devices // devices
MCFG_PIC8259_ADD(I8259_TAG, pic_intf) MCFG_PIC8259_ADD(I8259_TAG, INPUTLINE(M68000_TAG, M68K_IRQ_1), VCC, NULL)
MCFG_I8255A_ADD(I8255A_0_TAG, ppi0_intf) MCFG_I8255A_ADD(I8255A_0_TAG, ppi0_intf)
MCFG_I8255A_ADD(I8255A_1_TAG, ppi1_intf) MCFG_I8255A_ADD(I8255A_1_TAG, ppi1_intf)
MCFG_PIT8253_ADD(I8253_0_TAG, pit0_intf) MCFG_PIT8253_ADD(I8253_0_TAG, pit0_intf)

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@ -568,13 +568,6 @@ static I8255A_INTERFACE( ppi_intf )
*/ */
static const struct pic8259_interface pic0_intf =
{
DEVCB_CPU_INPUT_LINE(I80186_TAG, INPUT_LINE_INT0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
/* /*
IR0 KBDINT10 IR0 KBDINT10
@ -588,13 +581,6 @@ static const struct pic8259_interface pic0_intf =
*/ */
static const struct pic8259_interface pic1_intf =
{
DEVCB_CPU_INPUT_LINE(I80186_TAG, INPUT_LINE_INT1),
DEVCB_LINE_VCC,
DEVCB_NULL
};
// Intel 8272 Interface // Intel 8272 Interface
void tandy2k_state::fdc_irq(bool state) void tandy2k_state::fdc_irq(bool state)
@ -715,8 +701,8 @@ static MACHINE_CONFIG_START( tandy2k, tandy2k_state )
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf) MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
MCFG_I8251_ADD(I8251A_TAG, usart_intf) MCFG_I8251_ADD(I8251A_TAG, usart_intf)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf) MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_PIC8259_ADD(I8259A_0_TAG, pic0_intf) MCFG_PIC8259_ADD(I8259A_0_TAG, INPUTLINE(I80186_TAG, INPUT_LINE_INT0), VCC, NULL)
MCFG_PIC8259_ADD(I8259A_1_TAG, pic1_intf) MCFG_PIC8259_ADD(I8259A_1_TAG, INPUTLINE(I80186_TAG, INPUT_LINE_INT1), VCC, NULL)
MCFG_I8272A_ADD(I8272A_TAG, true) MCFG_I8272A_ADD(I8272A_TAG, true)
MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":0", tandy2k_floppies, "525qd", 0, floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":0", tandy2k_floppies, "525qd", 0, floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":1", tandy2k_floppies, "525qd", 0, floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":1", tandy2k_floppies, "525qd", 0, floppy_image_device::default_floppy_formats)

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@ -267,18 +267,6 @@ static I8085_CONFIG( i8085_sub_intf )
}; };
//-------------------------------------------------
// pic8259_interface pic_intf
//-------------------------------------------------
static const struct pic8259_interface pic_intf =
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
//------------------------------------------------- //-------------------------------------------------
// pit8253_config pit0_intf // pit8253_config pit0_intf
//------------------------------------------------- //-------------------------------------------------
@ -411,7 +399,7 @@ static MACHINE_CONFIG_START( tdv2324, tdv2324_state )
MCFG_TMS9927_ADD(TMS9937NL_TAG, XTAL_25_39836MHz, vtac_intf) MCFG_TMS9927_ADD(TMS9937NL_TAG, XTAL_25_39836MHz, vtac_intf)
// devices // devices
MCFG_PIC8259_ADD(P8259A_TAG, pic_intf) MCFG_PIC8259_ADD(P8259A_TAG, NULL, NULL, NULL)
MCFG_PIT8253_ADD(P8253_5_0_TAG, pit0_intf) MCFG_PIT8253_ADD(P8253_5_0_TAG, pit0_intf)
MCFG_PIT8253_ADD(P8253_5_1_TAG, pit1_intf) MCFG_PIT8253_ADD(P8253_5_1_TAG, pit1_intf)
MCFG_Z80SIO2_ADD(MK3887N4_TAG, 8000000/2, sio_intf) MCFG_Z80SIO2_ADD(MK3887N4_TAG, 8000000/2, sio_intf)

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@ -737,13 +737,6 @@ IRQ_CALLBACK_MEMBER(trs80m16_state::trs80m16_irq_callback)
return m_pic->inta_r(); return m_pic->inta_r();
} }
static const struct pic8259_interface pic_intf =
{
DEVCB_CPU_INPUT_LINE(M68000_TAG, M68K_IRQ_5),
DEVCB_LINE_VCC,
DEVCB_NULL
};
//************************************************************************** //**************************************************************************
@ -901,7 +894,7 @@ static MACHINE_CONFIG_START( trs80m16, trs80m16_state )
MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":1", trs80m2_floppies, NULL, NULL, floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":1", trs80m2_floppies, NULL, NULL, floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":2", trs80m2_floppies, NULL, NULL, floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":2", trs80m2_floppies, NULL, NULL, floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":3", trs80m2_floppies, NULL, NULL, floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":3", trs80m2_floppies, NULL, NULL, floppy_image_device::default_floppy_formats)
MCFG_PIC8259_ADD(AM9519A_TAG, pic_intf) MCFG_PIC8259_ADD(AM9519A_TAG, INPUTLINE(M68000_TAG, M68K_IRQ_5), VCC, NULL )
MCFG_TRS80M2_KEYBOARD_ADD(kb_intf) MCFG_TRS80M2_KEYBOARD_ADD(kb_intf)
// internal RAM // internal RAM

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@ -173,13 +173,6 @@ WRITE_LINE_MEMBER(tsispch_state::pic8259_set_int_line)
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
} }
static const struct pic8259_interface pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(tsispch_state,pic8259_set_int_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(tsispch_state::irq_callback) IRQ_CALLBACK_MEMBER(tsispch_state::irq_callback)
{ {
return machine().device<pic8259_device>("pic8259")->acknowledge(); return machine().device<pic8259_device>("pic8259")->acknowledge();
@ -418,7 +411,7 @@ static MACHINE_CONFIG_START( prose2k, tsispch_state )
MCFG_CPU_CONFIG(upd7720_config) MCFG_CPU_CONFIG(upd7720_config)
/* PIC 8259 */ /* PIC 8259 */
MCFG_PIC8259_ADD("pic8259", pic8259_config) MCFG_PIC8259_ADD("pic8259", WRITELINE(tsispch_state,pic8259_set_int_line), VCC, NULL)
/* uarts */ /* uarts */
MCFG_I8251_ADD("i8251a_u15", i8251_config) MCFG_I8251_ADD("i8251a_u15", i8251_config)

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@ -169,13 +169,6 @@ static const struct pit8253_config pit_intf =
*/ */
static const struct pic8259_interface pic_intf =
{
DEVCB_CPU_INPUT_LINE(I8088_TAG, INPUT_LINE_IRQ0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
// NEC uPD7201 Interface // NEC uPD7201 Interface
static UPD7201_INTERFACE( mpsc_intf ) static UPD7201_INTERFACE( mpsc_intf )
@ -937,7 +930,7 @@ static MACHINE_CONFIG_START( victor9k, victor9k_state )
MCFG_IEEE488_BUS_ADD() MCFG_IEEE488_BUS_ADD()
MCFG_IEEE488_NRFD_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_ca1)) MCFG_IEEE488_NRFD_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_ca1))
MCFG_IEEE488_NDAC_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_ca2)) MCFG_IEEE488_NDAC_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_ca2))
MCFG_PIC8259_ADD(I8259A_TAG, pic_intf) MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf) MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_30MHz/30, mpsc_intf) MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_30MHz/30, mpsc_intf)
MCFG_MC6852_ADD(MC6852_TAG, XTAL_30MHz/30, ssda_intf) MCFG_MC6852_ADD(MC6852_TAG, XTAL_30MHz/30, ssda_intf)

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@ -748,13 +748,6 @@ IRQ_CALLBACK_MEMBER( wangpc_state::wangpc_irq_callback )
return m_pic->inta_r(); return m_pic->inta_r();
} }
static const struct pic8259_interface pic_intf =
{
DEVCB_CPU_INPUT_LINE(I8086_TAG, INPUT_LINE_IRQ0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
//------------------------------------------------- //-------------------------------------------------
// I8255A_INTERFACE( ppi_intf ) // I8255A_INTERFACE( ppi_intf )
@ -1203,7 +1196,7 @@ static MACHINE_CONFIG_START( wangpc, wangpc_state )
// devices // devices
MCFG_AM9517A_ADD(AM9517A_TAG, 4000000, dmac_intf) MCFG_AM9517A_ADD(AM9517A_TAG, 4000000, dmac_intf)
MCFG_PIC8259_ADD(I8259A_TAG, pic_intf) MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf) MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf) MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_IM6402_ADD(IM6402_TAG, uart_intf) MCFG_IM6402_ADD(IM6402_TAG, uart_intf)

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@ -614,21 +614,6 @@ READ8_MEMBER( z100_state::get_slave_ack )
return 0; return 0;
} }
static const struct pic8259_interface z100_pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(z100_state, z100_pic_irq),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(z100_state, get_slave_ack)
};
static const struct pic8259_interface z100_pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir3_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
static MC6845_INTERFACE( mc6845_intf ) static MC6845_INTERFACE( mc6845_intf )
{ {
"screen", /* screen we are acting on */ "screen", /* screen we are acting on */
@ -791,8 +776,8 @@ static MACHINE_CONFIG_START( z100, z100_state )
/* Devices */ /* Devices */
MCFG_MC6845_ADD("crtc", MC6845, XTAL_14_31818MHz/8, mc6845_intf) /* unknown clock, hand tuned to get ~50/~60 fps */ MCFG_MC6845_ADD("crtc", MC6845, XTAL_14_31818MHz/8, mc6845_intf) /* unknown clock, hand tuned to get ~50/~60 fps */
MCFG_PIC8259_ADD( "pic8259_master", z100_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", WRITELINE(z100_state, z100_pic_irq), VCC, READ8(z100_state, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", z100_pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir3_w), GND, NULL )
MCFG_PIA6821_ADD("pia0", pia0_intf) MCFG_PIA6821_ADD("pia0", pia0_intf)
MCFG_PIA6821_ADD("pia1", pia1_intf) MCFG_PIA6821_ADD("pia1", pia1_intf)

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@ -207,6 +207,8 @@ public:
DECLARE_WRITE_LINE_MEMBER( apollo_dma8237_out_eop ); DECLARE_WRITE_LINE_MEMBER( apollo_dma8237_out_eop );
DECLARE_WRITE_LINE_MEMBER( apollo_dma_1_hrq_changed ); DECLARE_WRITE_LINE_MEMBER( apollo_dma_1_hrq_changed );
DECLARE_WRITE_LINE_MEMBER( apollo_dma_2_hrq_changed ); DECLARE_WRITE_LINE_MEMBER( apollo_dma_2_hrq_changed );
DECLARE_WRITE_LINE_MEMBER( apollo_pic8259_master_set_int_line );
DECLARE_WRITE_LINE_MEMBER( apollo_pic8259_slave_set_int_line );
}; };
MACHINE_CONFIG_EXTERN( apollo ); MACHINE_CONFIG_EXTERN( apollo );

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@ -191,8 +191,6 @@ public:
/*----------- defined in machine/at.c -----------*/ /*----------- defined in machine/at.c -----------*/
extern const struct pic8259_interface at_pic8259_master_config;
extern const struct pic8259_interface at_pic8259_slave_config;
extern const struct pit8253_config at_pit8254_config; extern const struct pit8253_config at_pit8254_config;
extern const am9517a_interface at_dma8237_1_config; extern const am9517a_interface at_dma8237_1_config;
extern const am9517a_interface at_dma8237_2_config; extern const am9517a_interface at_dma8237_2_config;

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@ -77,7 +77,6 @@ public:
/*----------- defined in machine/b2m.c -----------*/ /*----------- defined in machine/b2m.c -----------*/
extern const struct pit8253_config b2m_pit8253_intf; extern const struct pit8253_config b2m_pit8253_intf;
extern const struct pic8259_interface b2m_pic8259_config;
extern const i8255_interface b2m_ppi8255_interface_1; extern const i8255_interface b2m_ppi8255_interface_1;
extern const i8255_interface b2m_ppi8255_interface_2; extern const i8255_interface b2m_ppi8255_interface_2;

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@ -108,8 +108,6 @@ public:
extern const struct pit8253_config bebox_pit8254_config; extern const struct pit8253_config bebox_pit8254_config;
extern const i8237_interface bebox_dma8237_1_config; extern const i8237_interface bebox_dma8237_1_config;
extern const i8237_interface bebox_dma8237_2_config; extern const i8237_interface bebox_dma8237_2_config;
extern const struct pic8259_interface bebox_pic8259_master_config;
extern const struct pic8259_interface bebox_pic8259_slave_config;
extern const ins8250_interface bebox_uart_inteface_0; extern const ins8250_interface bebox_uart_inteface_0;
extern const ins8250_interface bebox_uart_inteface_1; extern const ins8250_interface bebox_uart_inteface_1;
extern const ins8250_interface bebox_uart_inteface_2; extern const ins8250_interface bebox_uart_inteface_2;

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@ -203,8 +203,6 @@ public:
extern const i8255_interface compis_ppi_interface; extern const i8255_interface compis_ppi_interface;
extern const struct pit8253_config compis_pit8253_config; extern const struct pit8253_config compis_pit8253_config;
extern const struct pit8253_config compis_pit8254_config; extern const struct pit8253_config compis_pit8254_config;
extern const struct pic8259_interface compis_pic8259_master_config;
extern const struct pic8259_interface compis_pic8259_slave_config;
extern const i8251_interface compis_usart_interface; extern const i8251_interface compis_usart_interface;
#endif /* COMPIS_H_ */ #endif /* COMPIS_H_ */

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@ -59,6 +59,5 @@ public:
extern const i8255_interface irisha_ppi8255_interface; extern const i8255_interface irisha_ppi8255_interface;
extern const struct pit8253_config irisha_pit8253_intf; extern const struct pit8253_config irisha_pit8253_intf;
extern const struct pic8259_interface irisha_pic8259_config;
#endif /* IRISHA_H_ */ #endif /* IRISHA_H_ */

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@ -172,7 +172,6 @@ extern const unsigned char mbc55x_palette[SCREEN_NO_COLOURS][3];
/*----------- defined in machine/mbc55x.c -----------*/ /*----------- defined in machine/mbc55x.c -----------*/
extern const struct pit8253_config mbc55x_pit8253_config; extern const struct pit8253_config mbc55x_pit8253_config;
extern const struct pic8259_interface mbc55x_pic8259_config;
extern const i8255_interface mbc55x_ppi8255_interface; extern const i8255_interface mbc55x_ppi8255_interface;
extern const i8251_interface mbc55x_i8251a_interface; extern const i8251_interface mbc55x_i8251a_interface;
extern const i8251_interface mbc55x_i8251b_interface; extern const i8251_interface mbc55x_i8251b_interface;

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@ -192,8 +192,6 @@ extern const struct am9517a_interface ibm5150_dma8237_config;
extern const struct pit8253_config ibm5150_pit8253_config; extern const struct pit8253_config ibm5150_pit8253_config;
extern const struct pit8253_config pcjr_pit8253_config; extern const struct pit8253_config pcjr_pit8253_config;
extern const struct pit8253_config mc1502_pit8253_config; extern const struct pit8253_config mc1502_pit8253_config;
extern const struct pic8259_interface ibm5150_pic8259_config;
extern const struct pic8259_interface pcjr_pic8259_config;
extern const ins8250_interface ibm5150_com_interface[4]; extern const ins8250_interface ibm5150_com_interface[4];
extern const rs232_port_interface ibm5150_serport_config[4]; extern const rs232_port_interface ibm5150_serport_config[4];
extern const i8255_interface ibm5160_ppi8255_interface; extern const i8255_interface ibm5160_ppi8255_interface;

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@ -97,6 +97,5 @@ extern const i8255_interface pk8020_ppi8255_interface_1;
extern const i8255_interface pk8020_ppi8255_interface_2; extern const i8255_interface pk8020_ppi8255_interface_2;
extern const i8255_interface pk8020_ppi8255_interface_3; extern const i8255_interface pk8020_ppi8255_interface_3;
extern const struct pit8253_config pk8020_pit8253_intf; extern const struct pit8253_config pk8020_pit8253_intf;
extern const struct pic8259_interface pk8020_pic8259_config;
#endif /* pk8020_H_ */ #endif /* pk8020_H_ */

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@ -689,9 +689,10 @@ IRQ_CALLBACK_MEMBER(apollo_state::apollo_pic_acknowledge)
* pic8259 configuration * pic8259 configuration
*************************************************************/ *************************************************************/
static WRITE_LINE_DEVICE_HANDLER( apollo_pic8259_master_set_int_line ) { WRITE_LINE_MEMBER( apollo_state::apollo_pic8259_master_set_int_line ) {
static int interrupt_line = -1; static int interrupt_line = -1;
if (state != interrupt_line) { if (state != interrupt_line) {
device_t *device = pic8259_master;
DLOG1(("apollo_pic8259_master_set_int_line: %x", state)); DLOG1(("apollo_pic8259_master_set_int_line: %x", state));
} }
interrupt_line = state; interrupt_line = state;
@ -704,23 +705,19 @@ static WRITE_LINE_DEVICE_HANDLER( apollo_pic8259_master_set_int_line ) {
apollo_set_cache_status_register(0x10, state ? 0x10 : 0x00); apollo_set_cache_status_register(0x10, state ? 0x10 : 0x00);
} }
device->machine().device(MAINCPU)->execute().set_input_line_and_vector(M68K_IRQ_6,state ? ASSERT_LINE : CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); machine().device(MAINCPU)->execute().set_input_line_and_vector(M68K_IRQ_6,state ? ASSERT_LINE : CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
} }
static WRITE_LINE_DEVICE_HANDLER( apollo_pic8259_slave_set_int_line ) { WRITE_LINE_MEMBER( apollo_state::apollo_pic8259_slave_set_int_line ) {
static int interrupt_line = -1; static int interrupt_line = -1;
if (state != interrupt_line) { if (state != interrupt_line) {
device_t *device = pic8259_slave;
DLOG1(("apollo_pic8259_slave_set_int_line: %x", state)); DLOG1(("apollo_pic8259_slave_set_int_line: %x", state));
interrupt_line = state; interrupt_line = state;
apollo_pic_set_irq_line(device, 3, state); apollo_pic_set_irq_line(device, 3, state);
} }
} }
static const struct pic8259_interface apollo_pic8259_master_config = {
DEVCB_LINE(apollo_pic8259_master_set_int_line) };
static const struct pic8259_interface apollo_pic8259_slave_config = {
DEVCB_LINE(apollo_pic8259_slave_set_int_line) };
//########################################################################## //##########################################################################
// machine/apollo_ptm.c - APOLLO DS3500 Programmable Timer 6840 // machine/apollo_ptm.c - APOLLO DS3500 Programmable Timer 6840
@ -1370,8 +1367,8 @@ MACHINE_CONFIG_FRAGMENT( apollo )
MCFG_I8237_ADD( APOLLO_DMA1_TAG, XTAL_14_31818MHz/3, apollo_dma8237_1_config ) MCFG_I8237_ADD( APOLLO_DMA1_TAG, XTAL_14_31818MHz/3, apollo_dma8237_1_config )
MCFG_I8237_ADD( APOLLO_DMA2_TAG, XTAL_14_31818MHz/3, apollo_dma8237_2_config ) MCFG_I8237_ADD( APOLLO_DMA2_TAG, XTAL_14_31818MHz/3, apollo_dma8237_2_config )
MCFG_PIC8259_ADD( APOLLO_PIC1_TAG, apollo_pic8259_master_config ) MCFG_PIC8259_ADD( APOLLO_PIC1_TAG, WRITELINE(apollo_state,apollo_pic8259_master_set_int_line), NULL, NULL ) // TODO: Doublecheck config
MCFG_PIC8259_ADD( APOLLO_PIC2_TAG, apollo_pic8259_slave_config ) MCFG_PIC8259_ADD( APOLLO_PIC2_TAG, WRITELINE(apollo_state,apollo_pic8259_slave_set_int_line), NULL, NULL ) // TODO: Doublecheck config
MCFG_PTM6840_ADD(APOLLO_PTM_TAG, apollo_ptm_config) MCFG_PTM6840_ADD(APOLLO_PTM_TAG, apollo_ptm_config)
MCFG_MC146818_ADD( APOLLO_RTC_TAG, MC146818_UTC ) MCFG_MC146818_ADD( APOLLO_RTC_TAG, MC146818_UTC )
MCFG_DUART68681_ADD( APOLLO_SIO_TAG, XTAL_3_6864MHz, apollo_sio_config ) MCFG_DUART68681_ADD( APOLLO_SIO_TAG, XTAL_3_6864MHz, apollo_sio_config )

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@ -21,22 +21,6 @@ READ8_MEMBER( at_state::get_slave_ack )
return 0x00; return 0x00;
} }
const struct pic8259_interface at_pic8259_master_config =
{
DEVCB_CPU_INPUT_LINE("maincpu", 0),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(at_state, get_slave_ack)
};
const struct pic8259_interface at_pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************************************************* /*************************************************************************
* *
* PC Speaker related * PC Speaker related

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@ -350,13 +350,6 @@ IRQ_CALLBACK_MEMBER(b2m_state::b2m_irq_callback)
return m_pic->acknowledge(); return m_pic->acknowledge();
} }
const struct pic8259_interface b2m_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(b2m_state,b2m_pic_set_int_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
INTERRUPT_GEN_MEMBER(b2m_state::b2m_vblank_interrupt) INTERRUPT_GEN_MEMBER(b2m_state::b2m_vblank_interrupt)
{ {
m_vblank_state++; m_vblank_state++;

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@ -506,20 +506,6 @@ READ8_MEMBER(bebox_state::get_slave_ack)
return 0x00; return 0x00;
} }
const struct pic8259_interface bebox_pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_pic8259_master_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(bebox_state,get_slave_ack)
};
const struct pic8259_interface bebox_pic8259_slave_config =
{
DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_pic8259_slave_set_int_line),
DEVCB_LINE_GND,
DEVCB_NULL
};
/************************************* /*************************************
* *

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@ -1274,20 +1274,6 @@ READ8_MEMBER( compis_state::get_slave_ack )
return 0; return 0;
} }
const struct pic8259_interface compis_pic8259_master_config =
{
DEVCB_DRIVER_LINE_MEMBER(compis_state, compis_pic8259_master_set_int_line),
DEVCB_LINE_VCC,
DEVCB_DRIVER_MEMBER(compis_state, get_slave_ack)
};
const struct pic8259_interface compis_pic8259_slave_config =
{
DEVCB_DRIVER_LINE_MEMBER(compis_state, compis_pic8259_slave_set_int_line),
DEVCB_LINE_GND,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(compis_state::compis_irq_callback) IRQ_CALLBACK_MEMBER(compis_state::compis_irq_callback)
{ {

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@ -191,14 +191,6 @@ WRITE_LINE_MEMBER(ibm5160_mb_device::pc_cpu_line)
m_maincpu->set_input_line(INPUT_LINE_IRQ0, state); m_maincpu->set_input_line(INPUT_LINE_IRQ0, state);
} }
const struct pic8259_interface pc_pic8259_config =
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_cpu_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
WRITE_LINE_MEMBER(ibm5160_mb_device::pc_speaker_set_spkrdata) WRITE_LINE_MEMBER(ibm5160_mb_device::pc_speaker_set_spkrdata)
{ {
m_pc_spkrdata = state ? 1 : 0; m_pc_spkrdata = state ? 1 : 0;
@ -481,7 +473,7 @@ static MACHINE_CONFIG_FRAGMENT( ibm5160_mb_config )
MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, pc_dma8237_config ) MCFG_I8237_ADD( "dma8237", XTAL_14_31818MHz/3, pc_dma8237_config )
MCFG_PIC8259_ADD( "pic8259", pc_pic8259_config ) MCFG_PIC8259_ADD( "pic8259", DEVWRITELINE(DEVICE_SELF_OWNER, ibm5160_mb_device, pc_cpu_line), VCC, NULL )
MCFG_I8255A_ADD( "ppi8255", pc_ppi8255_interface ) MCFG_I8255A_ADD( "ppi8255", pc_ppi8255_interface )

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@ -127,13 +127,6 @@ WRITE_LINE_MEMBER(irisha_state::irisha_pic_set_int_line)
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
} }
const struct pic8259_interface irisha_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(irisha_state,irisha_pic_set_int_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
const struct pit8253_config irisha_pit8253_intf = const struct pit8253_config irisha_pit8253_intf =
{ {
{ {

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@ -109,13 +109,6 @@ WRITE8_MEMBER( mbc55x_state::mbc55x_usart_w )
/* PIC 8259 Configuration */ /* PIC 8259 Configuration */
const struct pic8259_interface mbc55x_pic8259_config =
{
DEVCB_CPU_INPUT_LINE(MAINCPU_TAG, INPUT_LINE_IRQ0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
READ8_MEMBER(mbc55x_state::mbcpic8259_r) READ8_MEMBER(mbc55x_state::mbcpic8259_r)
{ {
return m_pic->read(space, offset>>1); return m_pic->read(space, offset>>1);

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@ -277,20 +277,6 @@ I8237_INTERFACE( ibm5150_dma8237_config )
}; };
/*************************************************************
*
* pic8259 configuration
*
*************************************************************/
const struct pic8259_interface ibm5150_pic8259_config =
{
DEVCB_CPU_INPUT_LINE("maincpu", 0),
DEVCB_LINE_VCC,
DEVCB_NULL
};
/************************************************************* /*************************************************************
* *
* PCJR pic8259 configuration * PCJR pic8259 configuration
@ -325,14 +311,6 @@ WRITE_LINE_MEMBER(pc_state::pcjr_pic8259_set_int_line)
} }
} }
const struct pic8259_interface pcjr_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(pc_state,pcjr_pic8259_set_int_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
/************************************************************************* /*************************************************************************
* *
* PC Speaker related * PC Speaker related

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@ -946,13 +946,6 @@ WRITE_LINE_MEMBER(pk8020_state::pk8020_pic_set_int_line)
m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
} }
const struct pic8259_interface pk8020_pic8259_config =
{
DEVCB_DRIVER_LINE_MEMBER(pk8020_state,pk8020_pic_set_int_line),
DEVCB_LINE_VCC,
DEVCB_NULL
};
IRQ_CALLBACK_MEMBER(pk8020_state::pk8020_irq_callback) IRQ_CALLBACK_MEMBER(pk8020_state::pk8020_irq_callback)
{ {
return m_pic8259->acknowledge(); return m_pic8259->acknowledge();

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@ -54,13 +54,6 @@ WRITE_LINE_MEMBER( s100_wunderbus_device::pic_int_w )
m_bus->int_w(state); m_bus->int_w(state);
} }
static struct pic8259_interface pic_intf =
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, s100_wunderbus_device, pic_int_w),
DEVCB_LINE_VCC,
DEVCB_NULL
};
//------------------------------------------------- //-------------------------------------------------
// ins8250_interface ace1_intf // ins8250_interface ace1_intf
@ -148,7 +141,7 @@ static UPD1990A_INTERFACE( rtc_intf )
//------------------------------------------------- //-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( s100_wunderbus ) static MACHINE_CONFIG_FRAGMENT( s100_wunderbus )
MCFG_PIC8259_ADD(I8259A_TAG, pic_intf) MCFG_PIC8259_ADD(I8259A_TAG, DEVWRITELINE(DEVICE_SELF_OWNER, s100_wunderbus_device, pic_int_w), VCC, NULL)
MCFG_INS8250_ADD(INS8250_1_TAG, ace1_intf, XTAL_18_432MHz/10) MCFG_INS8250_ADD(INS8250_1_TAG, ace1_intf, XTAL_18_432MHz/10)
MCFG_INS8250_ADD(INS8250_2_TAG, ace2_intf, XTAL_18_432MHz/10) MCFG_INS8250_ADD(INS8250_2_TAG, ace2_intf, XTAL_18_432MHz/10)
MCFG_INS8250_ADD(INS8250_3_TAG, ace3_intf, XTAL_18_432MHz/10) MCFG_INS8250_ADD(INS8250_3_TAG, ace3_intf, XTAL_18_432MHz/10)

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@ -9,19 +9,6 @@
#include "machine/southbridge.h" #include "machine/southbridge.h"
#include "machine/pc_keyboards.h" #include "machine/pc_keyboards.h"
const struct pic8259_interface at_pic8259_master_config =
{
DEVCB_CPU_INPUT_LINE(":maincpu", 0),
DEVCB_LINE_VCC,
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, southbridge_device, get_slave_ack)
};
const struct pic8259_interface at_pic8259_slave_config =
{
DEVCB_DEVICE_LINE_MEMBER("pic8259_master", pic8259_device, ir2_w),
DEVCB_LINE_GND,
DEVCB_NULL
};
const struct pit8253_config at_pit8254_config = const struct pit8253_config at_pit8254_config =
{ {
@ -127,8 +114,8 @@ static MACHINE_CONFIG_FRAGMENT( southbridge )
MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config ) MCFG_I8237_ADD( "dma8237_1", XTAL_14_31818MHz/3, at_dma8237_1_config )
MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config ) MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, at_dma8237_2_config )
MCFG_PIC8259_ADD( "pic8259_master", at_pic8259_master_config ) MCFG_PIC8259_ADD( "pic8259_master", INPUTLINE(":maincpu", 0), VCC, DEVREAD8(DEVICE_SELF_OWNER, southbridge_device, get_slave_ack) )
MCFG_PIC8259_ADD( "pic8259_slave", at_pic8259_slave_config ) MCFG_PIC8259_ADD( "pic8259_slave", DEVWRITELINE("pic8259_master", pic8259_device, ir2_w), GND, NULL )
MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keyboard_controller_intf) MCFG_AT_KEYBOARD_CONTROLLER_ADD("keybc", XTAL_12MHz, keyboard_controller_intf)
MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf) MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf)