mirror of
https://github.com/holub/mame
synced 2025-05-14 18:08:13 +03:00
Converted TMS3203X to a modern device.
Also removed redundant m_machine from the state and execute interfaces to fix ambiguity when using m_machine from within a device that inherits from these.
This commit is contained in:
parent
89f3e59251
commit
6fa241b445
File diff suppressed because it is too large
Load Diff
@ -374,7 +374,7 @@ static void disasm_parallel_storestore(const char *opstring1, const char *opstri
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static unsigned dasm_tms32031(char *buffer, unsigned pc, UINT32 op)
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static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
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{
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UINT32 flags = 0;
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@ -734,8 +734,8 @@ static unsigned dasm_tms32031(char *buffer, unsigned pc, UINT32 op)
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}
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CPU_DISASSEMBLE( tms32031 )
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CPU_DISASSEMBLE( tms3203x )
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{
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UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
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return dasm_tms32031(buffer, pc, op);
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return dasm_tms3203x(buffer, pc, op);
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}
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File diff suppressed because it is too large
Load Diff
@ -1,8 +1,39 @@
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/***************************************************************************
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tms32031.h
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Interface file for the portable TMS32C031 emulator.
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Written by Aaron Giles
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TMS32031/2 emulator
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****************************************************************************
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Copyright Aaron Giles
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name 'MAME' nor the names of its contributors may be
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used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY AARON GILES ''AS IS'' AND ANY EXPRESS OR
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IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL AARON GILES BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***************************************************************************/
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@ -12,72 +43,872 @@
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#define __TMS32031_H__
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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//**************************************************************************
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// DEBUGGING
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//**************************************************************************
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typedef void (*tms32031_xf_func)(device_t *device, UINT8 val);
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typedef void (*tms32031_iack_func)(device_t *device, UINT8 val, offs_t address);
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#define TMS_3203X_LOG_OPCODE_USAGE (0)
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typedef struct _tms32031_config tms32031_config;
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struct _tms32031_config
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{
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UINT32 bootoffset;
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tms32031_xf_func xf0_w;
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tms32031_xf_func xf1_w;
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tms32031_iack_func iack_w;
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};
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//**************************************************************************
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// CONSTANTS
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//**************************************************************************
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/***************************************************************************
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REGISTER ENUMERATION
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***************************************************************************/
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// interrupts
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const int TMS3203X_IRQ0 = 0; // IRQ0
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const int TMS3203X_IRQ1 = 1; // IRQ1
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const int TMS3203X_IRQ2 = 2; // IRQ2
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const int TMS3203X_IRQ3 = 3; // IRQ3
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const int TMS3203X_XINT0 = 4; // serial 0 transmit interrupt
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const int TMS3203X_RINT0 = 5; // serial 0 receive interrupt
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const int TMS3203X_XINT1 = 6; // serial 1 transmit interrupt
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const int TMS3203X_RINT1 = 7; // serial 1 receive interrupt
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const int TMS3203X_TINT0 = 8; // timer 0 interrupt
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const int TMS3203X_TINT1 = 9; // timer 1 interrupt
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const int TMS3203X_DINT = 10; // DMA interrupt
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const int TMS3203X_DINT0 = 10; // DMA 0 interrupt (32032 only)
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const int TMS3203X_DINT1 = 11; // DMA 1 interrupt (32032 only)
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// register enumeration
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enum
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{
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TMS32031_PC=1,
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TMS32031_R0,TMS32031_R1,TMS32031_R2,TMS32031_R3,
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TMS32031_R4,TMS32031_R5,TMS32031_R6,TMS32031_R7,
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TMS32031_R0F,TMS32031_R1F,TMS32031_R2F,TMS32031_R3F,
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TMS32031_R4F,TMS32031_R5F,TMS32031_R6F,TMS32031_R7F,
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TMS32031_AR0,TMS32031_AR1,TMS32031_AR2,TMS32031_AR3,
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TMS32031_AR4,TMS32031_AR5,TMS32031_AR6,TMS32031_AR7,
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TMS32031_DP,TMS32031_IR0,TMS32031_IR1,TMS32031_BK,
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TMS32031_SP,TMS32031_ST,TMS32031_IE,TMS32031_IF,
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TMS32031_IOF,TMS32031_RS,TMS32031_RE,TMS32031_RC
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TMS3203X_PC=1,
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TMS3203X_R0,
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TMS3203X_R1,
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TMS3203X_R2,
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TMS3203X_R3,
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TMS3203X_R4,
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TMS3203X_R5,
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TMS3203X_R6,
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TMS3203X_R7,
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TMS3203X_R0F,
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TMS3203X_R1F,
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TMS3203X_R2F,
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TMS3203X_R3F,
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TMS3203X_R4F,
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TMS3203X_R5F,
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TMS3203X_R6F,
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TMS3203X_R7F,
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TMS3203X_AR0,
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TMS3203X_AR1,
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TMS3203X_AR2,
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TMS3203X_AR3,
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TMS3203X_AR4,
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TMS3203X_AR5,
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TMS3203X_AR6,
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TMS3203X_AR7,
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TMS3203X_DP,
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TMS3203X_IR0,
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TMS3203X_IR1,
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TMS3203X_BK,
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TMS3203X_SP,
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TMS3203X_ST,
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TMS3203X_IE,
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TMS3203X_IF,
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TMS3203X_IOF,
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TMS3203X_RS,
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TMS3203X_RE,
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TMS3203X_RC
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};
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/***************************************************************************
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INTERRUPT CONSTANTS
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***************************************************************************/
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#define TMS32031_IRQ0 0 /* IRQ0 */
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#define TMS32031_IRQ1 1 /* IRQ1 */
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#define TMS32031_IRQ2 2 /* IRQ2 */
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#define TMS32031_IRQ3 3 /* IRQ3 */
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#define TMS32031_XINT0 4 /* serial 0 transmit interrupt */
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#define TMS32031_RINT0 5 /* serial 0 receive interrupt */
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#define TMS32031_XINT1 6 /* serial 1 transmit interrupt */
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#define TMS32031_RINT1 7 /* serial 1 receive interrupt */
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#define TMS32031_TINT0 8 /* timer 0 interrupt */
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#define TMS32031_TINT1 9 /* timer 1 interrupt */
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#define TMS32031_DINT 10 /* DMA interrupt */
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#define TMS32031_DINT0 10 /* DMA 0 interrupt (32032 only) */
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#define TMS32031_DINT1 11 /* DMA 1 interrupt (32032 only) */
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//**************************************************************************
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// INTERFACE CONFIGURATION MACROS
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//**************************************************************************
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#define MCFG_TMS3203X_CONFIG(_config) \
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tms3203x_device_config::static_set_config(device, _config); \
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/***************************************************************************
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PUBLIC FUNCTIONS
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***************************************************************************/
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DECLARE_LEGACY_CPU_DEVICE(TMS32031, tms32031);
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DECLARE_LEGACY_CPU_DEVICE(TMS32032, tms32032);
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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// device type definition
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extern const device_type TMS32031;
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extern const device_type TMS32032;
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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class tms3203x_device;
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// I/O callback types
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typedef void (*tms3203x_xf_func)(tms3203x_device &device, UINT8 val);
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typedef void (*tms3203x_iack_func)(tms3203x_device &device, UINT8 val, offs_t address);
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// ======================> tms3203x_config
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struct tms3203x_config
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{
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UINT32 m_bootoffset;
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tms3203x_xf_func m_xf0_w;
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tms3203x_xf_func m_xf1_w;
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tms3203x_iack_func m_iack_w;
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};
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// ======================> tms3203x_device_config
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class tms3203x_device_config : public cpu_device_config,
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public tms3203x_config
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{
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friend class tms3203x_device;
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protected:
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enum
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{
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CHIP_TYPE_TMS32031,
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CHIP_TYPE_TMS32032,
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};
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// construction/destruction
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tms3203x_device_config(const machine_config &mconfig, device_type type, const char *name, const char *tag, const device_config *owner, UINT32 clock, UINT32 chiptype, address_map_constructor internal_map);
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public:
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// inline configuration helpers
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static void static_set_config(device_config *device, const tms3203x_config &config);
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protected:
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// device_config_execute_interface overrides
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virtual UINT32 execute_min_cycles() const;
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virtual UINT32 execute_max_cycles() const;
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virtual UINT32 execute_input_lines() const;
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// device_config_memory_interface overrides
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virtual const address_space_config *memory_space_config(int spacenum = 0) const;
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// device_config_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const;
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virtual UINT32 disasm_max_opcode_bytes() const;
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// address spaces
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const address_space_config m_program_config;
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// internal state
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UINT32 m_chip_type;
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};
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// ======================> tms3203x_device
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class tms3203x_device : public cpu_device
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{
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friend class tms3203x_device_config;
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struct tmsreg
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{
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// constructors
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tmsreg() { i32[0] = i32[1] = 0; }
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tmsreg(double value) { from_double(value); }
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tmsreg(INT32 mantissa, INT8 exponent) { set_mantissa(mantissa); set_exponent(exponent); }
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// getters
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UINT32 integer() const { return i32[0]; }
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INT32 mantissa() const { return i32[0]; }
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INT8 exponent() const { return i32[1]; }
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void set_mantissa(INT32 man) { i32[0] = man; }
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void set_exponent(INT8 exp) { i32[1] = exp; }
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// exporters
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float as_float() const;
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double as_double() const;
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// importers
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void from_double(double);
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UINT32 i32[2];
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};
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protected:
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// construction/destruction
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tms3203x_device(running_machine &_machine, const tms3203x_device_config &config);
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virtual ~tms3203x_device();
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public:
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// public interfaces
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static float fp_to_float(UINT32 floatdata);
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static double fp_to_double(UINT32 floatdata);
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static UINT32 float_to_fp(float fval);
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static UINT32 double_to_fp(double dval);
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device_execute_interface overrides
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virtual void execute_run();
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virtual void execute_set_input(int inputnum, int state);
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// device_state_interface overrides
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virtual void state_import(const device_state_entry &entry);
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virtual void state_export(const device_state_entry &entry);
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virtual void state_string_export(const device_state_entry &entry, astring &string);
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// device_disasm_interface overrides
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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// memory helpers
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UINT32 ROPCODE(offs_t pc);
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UINT32 RMEM(offs_t addr);
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void WMEM(offs_t addr, UINT32 data);
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// misc helpers
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void check_irqs();
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UINT32 boot_loader(UINT32 boot_rom_addr);
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void execute_one();
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void update_special(int dreg);
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bool condition(int which);
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// floating point helpers
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void double_to_dsp_with_flags(double val, tmsreg &result);
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void int2float(tmsreg &srcdst);
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void float2int(tmsreg &srcdst, bool setflags);
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void negf(tmsreg &dst, tmsreg &src);
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void addf(tmsreg &dst, tmsreg &src1, tmsreg &src2);
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void subf(tmsreg &dst, tmsreg &src1, tmsreg &src2);
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void mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2);
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void norm(tmsreg &dst, tmsreg &src);
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// memory addressing
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UINT32 mod00_d(UINT32 op, UINT8 ar);
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UINT32 mod01_d(UINT32 op, UINT8 ar);
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UINT32 mod02_d(UINT32 op, UINT8 ar);
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UINT32 mod03_d(UINT32 op, UINT8 ar);
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UINT32 mod04_d(UINT32 op, UINT8 ar);
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UINT32 mod05_d(UINT32 op, UINT8 ar);
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UINT32 mod06_d(UINT32 op, UINT8 ar);
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UINT32 mod07_d(UINT32 op, UINT8 ar);
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UINT32 mod00_1(UINT32 op, UINT8 ar);
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UINT32 mod01_1(UINT32 op, UINT8 ar);
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UINT32 mod02_1(UINT32 op, UINT8 ar);
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UINT32 mod03_1(UINT32 op, UINT8 ar);
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UINT32 mod04_1(UINT32 op, UINT8 ar);
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UINT32 mod05_1(UINT32 op, UINT8 ar);
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UINT32 mod06_1(UINT32 op, UINT8 ar);
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UINT32 mod07_1(UINT32 op, UINT8 ar);
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UINT32 mod08(UINT32 op, UINT8 ar);
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UINT32 mod09(UINT32 op, UINT8 ar);
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UINT32 mod0a(UINT32 op, UINT8 ar);
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UINT32 mod0b(UINT32 op, UINT8 ar);
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UINT32 mod0c(UINT32 op, UINT8 ar);
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UINT32 mod0d(UINT32 op, UINT8 ar);
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UINT32 mod0e(UINT32 op, UINT8 ar);
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UINT32 mod0f(UINT32 op, UINT8 ar);
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UINT32 mod10(UINT32 op, UINT8 ar);
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UINT32 mod11(UINT32 op, UINT8 ar);
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UINT32 mod12(UINT32 op, UINT8 ar);
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UINT32 mod13(UINT32 op, UINT8 ar);
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UINT32 mod14(UINT32 op, UINT8 ar);
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UINT32 mod15(UINT32 op, UINT8 ar);
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UINT32 mod16(UINT32 op, UINT8 ar);
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UINT32 mod17(UINT32 op, UINT8 ar);
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UINT32 mod18(UINT32 op, UINT8 ar);
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UINT32 mod19(UINT32 op, UINT8 ar);
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UINT32 modillegal(UINT32 op, UINT8 ar);
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UINT32 mod00_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod01_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod02_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod03_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod04_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod05_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod06_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod07_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod08_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod09_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod0a_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod0b_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod0c_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod0d_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod0e_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod0f_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod10_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod11_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod12_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod13_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod14_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod15_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod16_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod17_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod18_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 mod19_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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UINT32 modillegal_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
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// instructions
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void illegal(UINT32 op);
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void unimplemented(UINT32 op);
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|
||||
void absf_reg(UINT32 op);
|
||||
void absf_dir(UINT32 op);
|
||||
void absf_ind(UINT32 op);
|
||||
void absf_imm(UINT32 op);
|
||||
void absi_reg(UINT32 op);
|
||||
void absi_dir(UINT32 op);
|
||||
void absi_ind(UINT32 op);
|
||||
void absi_imm(UINT32 op);
|
||||
void addc_reg(UINT32 op);
|
||||
void addc_dir(UINT32 op);
|
||||
void addc_ind(UINT32 op);
|
||||
void addc_imm(UINT32 op);
|
||||
void addf_reg(UINT32 op);
|
||||
void addf_dir(UINT32 op);
|
||||
void addf_ind(UINT32 op);
|
||||
void addf_imm(UINT32 op);
|
||||
void addi_reg(UINT32 op);
|
||||
void addi_dir(UINT32 op);
|
||||
void addi_ind(UINT32 op);
|
||||
void addi_imm(UINT32 op);
|
||||
void and_reg(UINT32 op);
|
||||
void and_dir(UINT32 op);
|
||||
void and_ind(UINT32 op);
|
||||
void and_imm(UINT32 op);
|
||||
void andn_reg(UINT32 op);
|
||||
void andn_dir(UINT32 op);
|
||||
void andn_ind(UINT32 op);
|
||||
void andn_imm(UINT32 op);
|
||||
void ash_reg(UINT32 op);
|
||||
void ash_dir(UINT32 op);
|
||||
void ash_ind(UINT32 op);
|
||||
void ash_imm(UINT32 op);
|
||||
void cmpf_reg(UINT32 op);
|
||||
void cmpf_dir(UINT32 op);
|
||||
void cmpf_ind(UINT32 op);
|
||||
void cmpf_imm(UINT32 op);
|
||||
void cmpi_reg(UINT32 op);
|
||||
void cmpi_dir(UINT32 op);
|
||||
void cmpi_ind(UINT32 op);
|
||||
void cmpi_imm(UINT32 op);
|
||||
void fix_reg(UINT32 op);
|
||||
void fix_dir(UINT32 op);
|
||||
void fix_ind(UINT32 op);
|
||||
void fix_imm(UINT32 op);
|
||||
void float_reg(UINT32 op);
|
||||
void float_dir(UINT32 op);
|
||||
void float_ind(UINT32 op);
|
||||
void float_imm(UINT32 op);
|
||||
void idle(UINT32 op);
|
||||
void lde_reg(UINT32 op);
|
||||
void lde_dir(UINT32 op);
|
||||
void lde_ind(UINT32 op);
|
||||
void lde_imm(UINT32 op);
|
||||
void ldf_reg(UINT32 op);
|
||||
void ldf_dir(UINT32 op);
|
||||
void ldf_ind(UINT32 op);
|
||||
void ldf_imm(UINT32 op);
|
||||
void ldfi_dir(UINT32 op);
|
||||
void ldfi_ind(UINT32 op);
|
||||
void ldi_reg(UINT32 op);
|
||||
void ldi_dir(UINT32 op);
|
||||
void ldi_ind(UINT32 op);
|
||||
void ldi_imm(UINT32 op);
|
||||
void ldii_dir(UINT32 op);
|
||||
void ldii_ind(UINT32 op);
|
||||
void ldm_reg(UINT32 op);
|
||||
void ldm_dir(UINT32 op);
|
||||
void ldm_ind(UINT32 op);
|
||||
void ldm_imm(UINT32 op);
|
||||
void lsh_reg(UINT32 op);
|
||||
void lsh_dir(UINT32 op);
|
||||
void lsh_ind(UINT32 op);
|
||||
void lsh_imm(UINT32 op);
|
||||
void mpyf_reg(UINT32 op);
|
||||
void mpyf_dir(UINT32 op);
|
||||
void mpyf_ind(UINT32 op);
|
||||
void mpyf_imm(UINT32 op);
|
||||
void mpyi_reg(UINT32 op);
|
||||
void mpyi_dir(UINT32 op);
|
||||
void mpyi_ind(UINT32 op);
|
||||
void mpyi_imm(UINT32 op);
|
||||
void negb_reg(UINT32 op);
|
||||
void negb_dir(UINT32 op);
|
||||
void negb_ind(UINT32 op);
|
||||
void negb_imm(UINT32 op);
|
||||
void negf_reg(UINT32 op);
|
||||
void negf_dir(UINT32 op);
|
||||
void negf_ind(UINT32 op);
|
||||
void negf_imm(UINT32 op);
|
||||
void negi_reg(UINT32 op);
|
||||
void negi_dir(UINT32 op);
|
||||
void negi_ind(UINT32 op);
|
||||
void negi_imm(UINT32 op);
|
||||
void nop_reg(UINT32 op);
|
||||
void nop_ind(UINT32 op);
|
||||
void norm_reg(UINT32 op);
|
||||
void norm_dir(UINT32 op);
|
||||
void norm_ind(UINT32 op);
|
||||
void norm_imm(UINT32 op);
|
||||
void not_reg(UINT32 op);
|
||||
void not_dir(UINT32 op);
|
||||
void not_ind(UINT32 op);
|
||||
void not_imm(UINT32 op);
|
||||
void pop(UINT32 op);
|
||||
void popf(UINT32 op);
|
||||
void push(UINT32 op);
|
||||
void pushf(UINT32 op);
|
||||
void or_reg(UINT32 op);
|
||||
void or_dir(UINT32 op);
|
||||
void or_ind(UINT32 op);
|
||||
void or_imm(UINT32 op);
|
||||
void maxspeed(UINT32 op);
|
||||
void rnd_reg(UINT32 op);
|
||||
void rnd_dir(UINT32 op);
|
||||
void rnd_ind(UINT32 op);
|
||||
void rnd_imm(UINT32 op);
|
||||
void rol(UINT32 op);
|
||||
void rolc(UINT32 op);
|
||||
void ror(UINT32 op);
|
||||
void rorc(UINT32 op);
|
||||
void rtps_reg(UINT32 op);
|
||||
void rtps_dir(UINT32 op);
|
||||
void rtps_ind(UINT32 op);
|
||||
void rtps_imm(UINT32 op);
|
||||
void stf_dir(UINT32 op);
|
||||
void stf_ind(UINT32 op);
|
||||
void stfi_dir(UINT32 op);
|
||||
void stfi_ind(UINT32 op);
|
||||
void sti_dir(UINT32 op);
|
||||
void sti_ind(UINT32 op);
|
||||
void stii_dir(UINT32 op);
|
||||
void stii_ind(UINT32 op);
|
||||
void sigi(UINT32 op);
|
||||
void subb_reg(UINT32 op);
|
||||
void subb_dir(UINT32 op);
|
||||
void subb_ind(UINT32 op);
|
||||
void subb_imm(UINT32 op);
|
||||
void subc_reg(UINT32 op);
|
||||
void subc_dir(UINT32 op);
|
||||
void subc_ind(UINT32 op);
|
||||
void subc_imm(UINT32 op);
|
||||
void subf_reg(UINT32 op);
|
||||
void subf_dir(UINT32 op);
|
||||
void subf_ind(UINT32 op);
|
||||
void subf_imm(UINT32 op);
|
||||
void subi_reg(UINT32 op);
|
||||
void subi_dir(UINT32 op);
|
||||
void subi_ind(UINT32 op);
|
||||
void subi_imm(UINT32 op);
|
||||
void subrb_reg(UINT32 op);
|
||||
void subrb_dir(UINT32 op);
|
||||
void subrb_ind(UINT32 op);
|
||||
void subrb_imm(UINT32 op);
|
||||
void subrf_reg(UINT32 op);
|
||||
void subrf_dir(UINT32 op);
|
||||
void subrf_ind(UINT32 op);
|
||||
void subrf_imm(UINT32 op);
|
||||
void subri_reg(UINT32 op);
|
||||
void subri_dir(UINT32 op);
|
||||
void subri_ind(UINT32 op);
|
||||
void subri_imm(UINT32 op);
|
||||
void tstb_reg(UINT32 op);
|
||||
void tstb_dir(UINT32 op);
|
||||
void tstb_ind(UINT32 op);
|
||||
void tstb_imm(UINT32 op);
|
||||
void xor_reg(UINT32 op);
|
||||
void xor_dir(UINT32 op);
|
||||
void xor_ind(UINT32 op);
|
||||
void xor_imm(UINT32 op);
|
||||
void iack_dir(UINT32 op);
|
||||
void iack_ind(UINT32 op);
|
||||
void addc3_regreg(UINT32 op);
|
||||
void addc3_indreg(UINT32 op);
|
||||
void addc3_regind(UINT32 op);
|
||||
void addc3_indind(UINT32 op);
|
||||
void addf3_regreg(UINT32 op);
|
||||
void addf3_indreg(UINT32 op);
|
||||
void addf3_regind(UINT32 op);
|
||||
void addf3_indind(UINT32 op);
|
||||
void addi3_regreg(UINT32 op);
|
||||
void addi3_indreg(UINT32 op);
|
||||
void addi3_regind(UINT32 op);
|
||||
void addi3_indind(UINT32 op);
|
||||
void and3_regreg(UINT32 op);
|
||||
void and3_indreg(UINT32 op);
|
||||
void and3_regind(UINT32 op);
|
||||
void and3_indind(UINT32 op);
|
||||
void andn3_regreg(UINT32 op);
|
||||
void andn3_indreg(UINT32 op);
|
||||
void andn3_regind(UINT32 op);
|
||||
void andn3_indind(UINT32 op);
|
||||
void ash3_regreg(UINT32 op);
|
||||
void ash3_indreg(UINT32 op);
|
||||
void ash3_regind(UINT32 op);
|
||||
void ash3_indind(UINT32 op);
|
||||
void cmpf3_regreg(UINT32 op);
|
||||
void cmpf3_indreg(UINT32 op);
|
||||
void cmpf3_regind(UINT32 op);
|
||||
void cmpf3_indind(UINT32 op);
|
||||
void cmpi3_regreg(UINT32 op);
|
||||
void cmpi3_indreg(UINT32 op);
|
||||
void cmpi3_regind(UINT32 op);
|
||||
void cmpi3_indind(UINT32 op);
|
||||
void lsh3_regreg(UINT32 op);
|
||||
void lsh3_indreg(UINT32 op);
|
||||
void lsh3_regind(UINT32 op);
|
||||
void lsh3_indind(UINT32 op);
|
||||
void mpyf3_regreg(UINT32 op);
|
||||
void mpyf3_indreg(UINT32 op);
|
||||
void mpyf3_regind(UINT32 op);
|
||||
void mpyf3_indind(UINT32 op);
|
||||
void mpyi3_regreg(UINT32 op);
|
||||
void mpyi3_indreg(UINT32 op);
|
||||
void mpyi3_regind(UINT32 op);
|
||||
void mpyi3_indind(UINT32 op);
|
||||
void or3_regreg(UINT32 op);
|
||||
void or3_indreg(UINT32 op);
|
||||
void or3_regind(UINT32 op);
|
||||
void or3_indind(UINT32 op);
|
||||
void subb3_regreg(UINT32 op);
|
||||
void subb3_indreg(UINT32 op);
|
||||
void subb3_regind(UINT32 op);
|
||||
void subb3_indind(UINT32 op);
|
||||
void subf3_regreg(UINT32 op);
|
||||
void subf3_indreg(UINT32 op);
|
||||
void subf3_regind(UINT32 op);
|
||||
void subf3_indind(UINT32 op);
|
||||
void subi3_regreg(UINT32 op);
|
||||
void subi3_indreg(UINT32 op);
|
||||
void subi3_regind(UINT32 op);
|
||||
void subi3_indind(UINT32 op);
|
||||
void tstb3_regreg(UINT32 op);
|
||||
void tstb3_indreg(UINT32 op);
|
||||
void tstb3_regind(UINT32 op);
|
||||
void tstb3_indind(UINT32 op);
|
||||
void xor3_regreg(UINT32 op);
|
||||
void xor3_indreg(UINT32 op);
|
||||
void xor3_regind(UINT32 op);
|
||||
void xor3_indind(UINT32 op);
|
||||
void ldfu_reg(UINT32 op);
|
||||
void ldfu_dir(UINT32 op);
|
||||
void ldfu_ind(UINT32 op);
|
||||
void ldfu_imm(UINT32 op);
|
||||
void ldflo_reg(UINT32 op);
|
||||
void ldflo_dir(UINT32 op);
|
||||
void ldflo_ind(UINT32 op);
|
||||
void ldflo_imm(UINT32 op);
|
||||
void ldfls_reg(UINT32 op);
|
||||
void ldfls_dir(UINT32 op);
|
||||
void ldfls_ind(UINT32 op);
|
||||
void ldfls_imm(UINT32 op);
|
||||
void ldfhi_reg(UINT32 op);
|
||||
void ldfhi_dir(UINT32 op);
|
||||
void ldfhi_ind(UINT32 op);
|
||||
void ldfhi_imm(UINT32 op);
|
||||
void ldfhs_reg(UINT32 op);
|
||||
void ldfhs_dir(UINT32 op);
|
||||
void ldfhs_ind(UINT32 op);
|
||||
void ldfhs_imm(UINT32 op);
|
||||
void ldfeq_reg(UINT32 op);
|
||||
void ldfeq_dir(UINT32 op);
|
||||
void ldfeq_ind(UINT32 op);
|
||||
void ldfeq_imm(UINT32 op);
|
||||
void ldfne_reg(UINT32 op);
|
||||
void ldfne_dir(UINT32 op);
|
||||
void ldfne_ind(UINT32 op);
|
||||
void ldfne_imm(UINT32 op);
|
||||
void ldflt_reg(UINT32 op);
|
||||
void ldflt_dir(UINT32 op);
|
||||
void ldflt_ind(UINT32 op);
|
||||
void ldflt_imm(UINT32 op);
|
||||
void ldfle_reg(UINT32 op);
|
||||
void ldfle_dir(UINT32 op);
|
||||
void ldfle_ind(UINT32 op);
|
||||
void ldfle_imm(UINT32 op);
|
||||
void ldfgt_reg(UINT32 op);
|
||||
void ldfgt_dir(UINT32 op);
|
||||
void ldfgt_ind(UINT32 op);
|
||||
void ldfgt_imm(UINT32 op);
|
||||
void ldfge_reg(UINT32 op);
|
||||
void ldfge_dir(UINT32 op);
|
||||
void ldfge_ind(UINT32 op);
|
||||
void ldfge_imm(UINT32 op);
|
||||
void ldfnv_reg(UINT32 op);
|
||||
void ldfnv_dir(UINT32 op);
|
||||
void ldfnv_ind(UINT32 op);
|
||||
void ldfnv_imm(UINT32 op);
|
||||
void ldfv_reg(UINT32 op);
|
||||
void ldfv_dir(UINT32 op);
|
||||
void ldfv_ind(UINT32 op);
|
||||
void ldfv_imm(UINT32 op);
|
||||
void ldfnuf_reg(UINT32 op);
|
||||
void ldfnuf_dir(UINT32 op);
|
||||
void ldfnuf_ind(UINT32 op);
|
||||
void ldfnuf_imm(UINT32 op);
|
||||
void ldfuf_reg(UINT32 op);
|
||||
void ldfuf_dir(UINT32 op);
|
||||
void ldfuf_ind(UINT32 op);
|
||||
void ldfuf_imm(UINT32 op);
|
||||
void ldfnlv_reg(UINT32 op);
|
||||
void ldfnlv_dir(UINT32 op);
|
||||
void ldfnlv_ind(UINT32 op);
|
||||
void ldfnlv_imm(UINT32 op);
|
||||
void ldflv_reg(UINT32 op);
|
||||
void ldflv_dir(UINT32 op);
|
||||
void ldflv_ind(UINT32 op);
|
||||
void ldflv_imm(UINT32 op);
|
||||
void ldfnluf_reg(UINT32 op);
|
||||
void ldfnluf_dir(UINT32 op);
|
||||
void ldfnluf_ind(UINT32 op);
|
||||
void ldfnluf_imm(UINT32 op);
|
||||
void ldfluf_reg(UINT32 op);
|
||||
void ldfluf_dir(UINT32 op);
|
||||
void ldfluf_ind(UINT32 op);
|
||||
void ldfluf_imm(UINT32 op);
|
||||
void ldfzuf_reg(UINT32 op);
|
||||
void ldfzuf_dir(UINT32 op);
|
||||
void ldfzuf_ind(UINT32 op);
|
||||
void ldfzuf_imm(UINT32 op);
|
||||
void ldiu_reg(UINT32 op);
|
||||
void ldiu_dir(UINT32 op);
|
||||
void ldiu_ind(UINT32 op);
|
||||
void ldiu_imm(UINT32 op);
|
||||
void ldilo_reg(UINT32 op);
|
||||
void ldilo_dir(UINT32 op);
|
||||
void ldilo_ind(UINT32 op);
|
||||
void ldilo_imm(UINT32 op);
|
||||
void ldils_reg(UINT32 op);
|
||||
void ldils_dir(UINT32 op);
|
||||
void ldils_ind(UINT32 op);
|
||||
void ldils_imm(UINT32 op);
|
||||
void ldihi_reg(UINT32 op);
|
||||
void ldihi_dir(UINT32 op);
|
||||
void ldihi_ind(UINT32 op);
|
||||
void ldihi_imm(UINT32 op);
|
||||
void ldihs_reg(UINT32 op);
|
||||
void ldihs_dir(UINT32 op);
|
||||
void ldihs_ind(UINT32 op);
|
||||
void ldihs_imm(UINT32 op);
|
||||
void ldieq_reg(UINT32 op);
|
||||
void ldieq_dir(UINT32 op);
|
||||
void ldieq_ind(UINT32 op);
|
||||
void ldieq_imm(UINT32 op);
|
||||
void ldine_reg(UINT32 op);
|
||||
void ldine_dir(UINT32 op);
|
||||
void ldine_ind(UINT32 op);
|
||||
void ldine_imm(UINT32 op);
|
||||
void ldilt_reg(UINT32 op);
|
||||
void ldilt_dir(UINT32 op);
|
||||
void ldilt_ind(UINT32 op);
|
||||
void ldilt_imm(UINT32 op);
|
||||
void ldile_reg(UINT32 op);
|
||||
void ldile_dir(UINT32 op);
|
||||
void ldile_ind(UINT32 op);
|
||||
void ldile_imm(UINT32 op);
|
||||
void ldigt_reg(UINT32 op);
|
||||
void ldigt_dir(UINT32 op);
|
||||
void ldigt_ind(UINT32 op);
|
||||
void ldigt_imm(UINT32 op);
|
||||
void ldige_reg(UINT32 op);
|
||||
void ldige_dir(UINT32 op);
|
||||
void ldige_ind(UINT32 op);
|
||||
void ldige_imm(UINT32 op);
|
||||
void ldinv_reg(UINT32 op);
|
||||
void ldinv_dir(UINT32 op);
|
||||
void ldinv_ind(UINT32 op);
|
||||
void ldinv_imm(UINT32 op);
|
||||
void ldiuf_reg(UINT32 op);
|
||||
void ldiuf_dir(UINT32 op);
|
||||
void ldiuf_ind(UINT32 op);
|
||||
void ldiuf_imm(UINT32 op);
|
||||
void ldinuf_reg(UINT32 op);
|
||||
void ldinuf_dir(UINT32 op);
|
||||
void ldinuf_ind(UINT32 op);
|
||||
void ldinuf_imm(UINT32 op);
|
||||
void ldiv_reg(UINT32 op);
|
||||
void ldiv_dir(UINT32 op);
|
||||
void ldiv_ind(UINT32 op);
|
||||
void ldiv_imm(UINT32 op);
|
||||
void ldinlv_reg(UINT32 op);
|
||||
void ldinlv_dir(UINT32 op);
|
||||
void ldinlv_ind(UINT32 op);
|
||||
void ldinlv_imm(UINT32 op);
|
||||
void ldilv_reg(UINT32 op);
|
||||
void ldilv_dir(UINT32 op);
|
||||
void ldilv_ind(UINT32 op);
|
||||
void ldilv_imm(UINT32 op);
|
||||
void ldinluf_reg(UINT32 op);
|
||||
void ldinluf_dir(UINT32 op);
|
||||
void ldinluf_ind(UINT32 op);
|
||||
void ldinluf_imm(UINT32 op);
|
||||
void ldiluf_reg(UINT32 op);
|
||||
void ldiluf_dir(UINT32 op);
|
||||
void ldiluf_ind(UINT32 op);
|
||||
void ldiluf_imm(UINT32 op);
|
||||
void ldizuf_reg(UINT32 op);
|
||||
void ldizuf_dir(UINT32 op);
|
||||
void ldizuf_ind(UINT32 op);
|
||||
void ldizuf_imm(UINT32 op);
|
||||
void execute_delayed(UINT32 newpc);
|
||||
void br_imm(UINT32 op);
|
||||
void brd_imm(UINT32 op);
|
||||
void call_imm(UINT32 op);
|
||||
void rptb_imm(UINT32 op);
|
||||
void swi(UINT32 op);
|
||||
void brc_reg(UINT32 op);
|
||||
void brcd_reg(UINT32 op);
|
||||
void brc_imm(UINT32 op);
|
||||
void brcd_imm(UINT32 op);
|
||||
void dbc_reg(UINT32 op);
|
||||
void dbcd_reg(UINT32 op);
|
||||
void dbc_imm(UINT32 op);
|
||||
void dbcd_imm(UINT32 op);
|
||||
void callc_reg(UINT32 op);
|
||||
void callc_imm(UINT32 op);
|
||||
void trap(int trapnum);
|
||||
void trapc(UINT32 op);
|
||||
void retic_reg(UINT32 op);
|
||||
void retsc_reg(UINT32 op);
|
||||
void mpyaddf_0(UINT32 op);
|
||||
void mpyaddf_1(UINT32 op);
|
||||
void mpyaddf_2(UINT32 op);
|
||||
void mpyaddf_3(UINT32 op);
|
||||
void mpysubf_0(UINT32 op);
|
||||
void mpysubf_1(UINT32 op);
|
||||
void mpysubf_2(UINT32 op);
|
||||
void mpysubf_3(UINT32 op);
|
||||
void mpyaddi_0(UINT32 op);
|
||||
void mpyaddi_1(UINT32 op);
|
||||
void mpyaddi_2(UINT32 op);
|
||||
void mpyaddi_3(UINT32 op);
|
||||
void mpysubi_0(UINT32 op);
|
||||
void mpysubi_1(UINT32 op);
|
||||
void mpysubi_2(UINT32 op);
|
||||
void mpysubi_3(UINT32 op);
|
||||
void stfstf(UINT32 op);
|
||||
void stisti(UINT32 op);
|
||||
void ldfldf(UINT32 op);
|
||||
void ldildi(UINT32 op);
|
||||
void absfstf(UINT32 op);
|
||||
void absisti(UINT32 op);
|
||||
void addf3stf(UINT32 op);
|
||||
void addi3sti(UINT32 op);
|
||||
void and3sti(UINT32 op);
|
||||
void ash3sti(UINT32 op);
|
||||
void fixsti(UINT32 op);
|
||||
void floatstf(UINT32 op);
|
||||
void ldfstf(UINT32 op);
|
||||
void ldisti(UINT32 op);
|
||||
void lsh3sti(UINT32 op);
|
||||
void mpyf3stf(UINT32 op);
|
||||
void mpyi3sti(UINT32 op);
|
||||
void negfstf(UINT32 op);
|
||||
void negisti(UINT32 op);
|
||||
void notsti(UINT32 op);
|
||||
void or3sti(UINT32 op);
|
||||
void subf3stf(UINT32 op);
|
||||
void subi3sti(UINT32 op);
|
||||
void xor3sti(UINT32 op);
|
||||
|
||||
// configuration
|
||||
const tms3203x_device_config &m_config;
|
||||
|
||||
union int_double
|
||||
{
|
||||
double d;
|
||||
float f[2];
|
||||
UINT32 i[2];
|
||||
};
|
||||
|
||||
// core registers
|
||||
UINT32 m_pc;
|
||||
tmsreg m_r[36];
|
||||
UINT32 m_bkmask;
|
||||
|
||||
// internal stuff
|
||||
UINT16 m_irq_state;
|
||||
bool m_delayed;
|
||||
bool m_irq_pending;
|
||||
bool m_mcu_mode;
|
||||
bool m_is_idling;
|
||||
int m_icount;
|
||||
|
||||
UINT32 m_iotemp;
|
||||
device_irq_callback m_irq_callback;
|
||||
address_space * m_program;
|
||||
direct_read_data * m_direct;
|
||||
|
||||
// tables
|
||||
static void (tms3203x_device::*const s_tms32031ops[])(UINT32 op);
|
||||
static UINT32 (tms3203x_device::*const s_indirect_d[0x20])(UINT32, UINT8);
|
||||
static UINT32 (tms3203x_device::*const s_indirect_1[0x20])(UINT32, UINT8);
|
||||
static UINT32 (tms3203x_device::*const s_indirect_1_def[0x20])(UINT32, UINT8, UINT32 *&);
|
||||
|
||||
#if (TMS_3203X_LOG_OPCODE_USAGE)
|
||||
UINT32 m_hits[0x200*4];
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
// ======================> tms32031_device_config
|
||||
|
||||
class tms32031_device_config : public tms3203x_device_config
|
||||
{
|
||||
friend class tms32031_device;
|
||||
|
||||
// construction/destruction
|
||||
tms32031_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
|
||||
public:
|
||||
// allocators
|
||||
static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
virtual device_t *alloc_device(running_machine &machine) const;
|
||||
};
|
||||
|
||||
|
||||
// ======================> tms32031_device
|
||||
|
||||
class tms32031_device : public tms3203x_device
|
||||
{
|
||||
friend class tms32031_device_config;
|
||||
|
||||
// construction/destruction
|
||||
tms32031_device(running_machine &_machine, const tms32031_device_config &config);
|
||||
};
|
||||
|
||||
|
||||
// ======================> tms32032_device_config
|
||||
|
||||
class tms32032_device_config : public tms3203x_device_config
|
||||
{
|
||||
friend class tms32032_device;
|
||||
|
||||
protected:
|
||||
// construction/destruction
|
||||
tms32032_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
|
||||
public:
|
||||
// allocators
|
||||
static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
virtual device_t *alloc_device(running_machine &machine) const;
|
||||
};
|
||||
|
||||
|
||||
// ======================> tms32032_device
|
||||
|
||||
class tms32032_device : public tms3203x_device
|
||||
{
|
||||
friend class tms32032_device_config;
|
||||
|
||||
protected:
|
||||
// construction/destruction
|
||||
tms32032_device(running_machine &_machine, const tms32032_device_config &config);
|
||||
};
|
||||
|
||||
extern float convert_tms3203x_fp_to_float(UINT32 floatdata);
|
||||
extern double convert_tms3203x_fp_to_double(UINT32 floatdata);
|
||||
extern UINT32 convert_float_to_tms3203x_fp(float fval);
|
||||
extern UINT32 convert_double_to_tms3203x_fp(double dval);
|
||||
|
||||
#endif /* __TMS32031_H__ */
|
||||
|
@ -272,7 +272,6 @@ bool device_config_execute_interface::interface_validity_check(const game_driver
|
||||
|
||||
device_execute_interface::device_execute_interface(running_machine &machine, const device_config &config, device_t &device)
|
||||
: device_interface(machine, config, device),
|
||||
m_machine(machine),
|
||||
m_execute_config(dynamic_cast<const device_config_execute_interface &>(config)),
|
||||
m_nextexec(NULL),
|
||||
m_driver_irq(0),
|
||||
@ -315,7 +314,7 @@ device_execute_interface::~device_execute_interface()
|
||||
|
||||
bool device_execute_interface::executing() const
|
||||
{
|
||||
return (this == m_machine.scheduler().currently_executing());
|
||||
return (this == device().machine->scheduler().currently_executing());
|
||||
}
|
||||
|
||||
|
||||
@ -373,7 +372,7 @@ void device_execute_interface::adjust_icount(int delta)
|
||||
void device_execute_interface::abort_timeslice()
|
||||
{
|
||||
// ignore if not the executing device
|
||||
if (this != m_machine.scheduler().currently_executing())
|
||||
if (this != device().machine->scheduler().currently_executing())
|
||||
return;
|
||||
|
||||
// swallow the remaining cycles
|
||||
@ -443,7 +442,7 @@ void device_execute_interface::spin_until_time(attotime duration)
|
||||
suspend_until_trigger(TRIGGER_SUSPENDTIME + timetrig, true);
|
||||
|
||||
// then set a timer for it
|
||||
timer_set(&m_machine, duration, this, TRIGGER_SUSPENDTIME + timetrig, static_timed_trigger_callback);
|
||||
timer_set(device().machine, duration, this, TRIGGER_SUSPENDTIME + timetrig, static_timed_trigger_callback);
|
||||
timetrig = (timetrig + 1) % 256;
|
||||
}
|
||||
|
||||
@ -548,7 +547,7 @@ void device_execute_interface::execute_set_input(int linenum, int state)
|
||||
void device_execute_interface::interface_pre_start()
|
||||
{
|
||||
// fill in the initial states
|
||||
int index = m_machine.m_devicelist.index(&m_device);
|
||||
int index = device().machine->m_devicelist.index(&m_device);
|
||||
m_suspend = SUSPEND_REASON_RESET;
|
||||
m_profiler = profile_type(index + PROFILER_DEVICE_FIRST);
|
||||
m_inttrigger = index + TRIGGER_INT;
|
||||
@ -559,9 +558,9 @@ void device_execute_interface::interface_pre_start()
|
||||
|
||||
// allocate timers if we need them
|
||||
if (m_execute_config.m_vblank_interrupts_per_frame > 1)
|
||||
m_partial_frame_timer = timer_alloc(&m_machine, static_trigger_partial_frame_interrupt, (void *)this);
|
||||
m_partial_frame_timer = timer_alloc(device().machine, static_trigger_partial_frame_interrupt, (void *)this);
|
||||
if (attotime_compare(m_execute_config.m_timed_interrupt_period, attotime_zero) != 0)
|
||||
m_timedint_timer = timer_alloc(&m_machine, static_trigger_periodic_interrupt, (void *)this);
|
||||
m_timedint_timer = timer_alloc(device().machine, static_trigger_periodic_interrupt, (void *)this);
|
||||
|
||||
// register for save states
|
||||
state_save_register_device_item(&m_device, 0, m_suspend);
|
||||
@ -625,11 +624,11 @@ void device_execute_interface::interface_post_reset()
|
||||
// new style - use screen tag directly
|
||||
screen_device *screen;
|
||||
if (m_execute_config.m_vblank_interrupt_screen != NULL)
|
||||
screen = downcast<screen_device *>(m_machine.device(m_execute_config.m_vblank_interrupt_screen));
|
||||
screen = downcast<screen_device *>(device().machine->device(m_execute_config.m_vblank_interrupt_screen));
|
||||
|
||||
// old style 'hack' setup - use screen #0
|
||||
else
|
||||
screen = m_machine.first_screen();
|
||||
screen = device().machine->first_screen();
|
||||
|
||||
assert(screen != NULL);
|
||||
screen->register_vblank_callback(static_on_vblank, NULL);
|
||||
@ -667,7 +666,7 @@ void device_execute_interface::interface_clock_changed()
|
||||
m_divisor = attos;
|
||||
|
||||
// re-compute the perfect interleave factor
|
||||
m_machine.scheduler().compute_perfect_interleave();
|
||||
device().machine->scheduler().compute_perfect_interleave();
|
||||
}
|
||||
|
||||
|
||||
@ -742,7 +741,7 @@ void device_execute_interface::on_vblank_start(screen_device &screen)
|
||||
// if we have more than one interrupt per frame, start the timer now to trigger the rest of them
|
||||
if (m_execute_config.m_vblank_interrupts_per_frame > 1 && !suspended(SUSPEND_REASON_DISABLE))
|
||||
{
|
||||
m_partial_frame_period = attotime_div(m_machine.primary_screen->frame_period(), m_execute_config.m_vblank_interrupts_per_frame);
|
||||
m_partial_frame_period = attotime_div(device().machine->primary_screen->frame_period(), m_execute_config.m_vblank_interrupts_per_frame);
|
||||
timer_adjust_oneshot(m_partial_frame_timer, m_partial_frame_period, 0);
|
||||
}
|
||||
}
|
||||
@ -918,7 +917,7 @@ if (TEMPLOG) printf("setline(%s,%d,%d,%d)\n", m_device->tag(), m_linenum, state,
|
||||
|
||||
// if this is the first one, set the timer
|
||||
if (event_index == 0)
|
||||
timer_call_after_resynch(&m_execute->m_machine, (void *)this, 0, static_empty_event_queue);
|
||||
timer_call_after_resynch(m_execute->device().machine, (void *)this, 0, static_empty_event_queue);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -305,7 +305,6 @@ protected:
|
||||
};
|
||||
|
||||
// configuration
|
||||
running_machine & m_machine; // reference to owning machine
|
||||
const device_config_execute_interface &m_execute_config; // reference to our device_config_execute_interface
|
||||
|
||||
// execution lists
|
||||
|
@ -409,7 +409,6 @@ device_config_state_interface::~device_config_state_interface()
|
||||
|
||||
device_state_interface::device_state_interface(running_machine &machine, const device_config &config, device_t &device)
|
||||
: device_interface(machine, config, device),
|
||||
m_machine(machine),
|
||||
m_state_config(dynamic_cast<const device_config_state_interface &>(config))
|
||||
{
|
||||
memset(m_fast_state, 0, sizeof(m_fast_state));
|
||||
@ -580,7 +579,7 @@ device_state_entry &device_state_interface::state_add(int index, const char *sym
|
||||
assert(symbol != NULL);
|
||||
|
||||
// allocate new entry
|
||||
device_state_entry *entry = auto_alloc(&m_machine, device_state_entry(index, symbol, data, size));
|
||||
device_state_entry *entry = auto_alloc(device().machine, device_state_entry(index, symbol, data, size));
|
||||
|
||||
// append to the end of the list
|
||||
m_state_list.append(*entry);
|
||||
|
@ -204,7 +204,6 @@ protected:
|
||||
static const int k_fast_state_max = 256; // lookups
|
||||
|
||||
// state
|
||||
running_machine & m_machine; // reference to owning machine
|
||||
const device_config_state_interface & m_state_config; // reference to configuration data
|
||||
simple_list<device_state_entry> m_state_list; // head of state list
|
||||
device_state_entry * m_fast_state[k_fast_state_max + 1 - k_fast_state_min];
|
||||
|
@ -232,7 +232,7 @@ static TIMER_DEVICE_CALLBACK( dma_timer_callback )
|
||||
tms32031_io_regs[DMA_SOURCE_ADDR] = param;
|
||||
|
||||
/* set the interrupt */
|
||||
cpu_set_input_line(cage_cpu, TMS32031_DINT, ASSERT_LINE);
|
||||
cpu_set_input_line(cage_cpu, TMS3203X_DINT, ASSERT_LINE);
|
||||
dma_enabled = 0;
|
||||
}
|
||||
|
||||
@ -301,7 +301,7 @@ static TIMER_DEVICE_CALLBACK( cage_timer_callback )
|
||||
int which = param;
|
||||
|
||||
/* set the interrupt */
|
||||
cpu_set_input_line(cage_cpu, TMS32031_TINT0 + which, ASSERT_LINE);
|
||||
cpu_set_input_line(cage_cpu, TMS3203X_TINT0 + which, ASSERT_LINE);
|
||||
cage_timer_enabled[which] = 0;
|
||||
update_timer(which);
|
||||
}
|
||||
@ -470,11 +470,11 @@ static void update_control_lines(running_machine *machine)
|
||||
}
|
||||
|
||||
/* set the IOF input lines */
|
||||
val = cpu_get_reg(cage_cpu, TMS32031_IOF);
|
||||
val = cpu_get_reg(cage_cpu, TMS3203X_IOF);
|
||||
val &= ~0x88;
|
||||
if (cpu_to_cage_ready) val |= 0x08;
|
||||
if (cage_to_cpu_ready) val |= 0x80;
|
||||
cage_cpu->set_state(TMS32031_IOF, val);
|
||||
cage_cpu->set_state(TMS3203X_IOF, val);
|
||||
}
|
||||
|
||||
|
||||
@ -484,7 +484,7 @@ static READ32_HANDLER( cage_from_main_r )
|
||||
logerror("%06X:CAGE read command = %04X\n", cpu_get_pc(space->cpu), cage_from_main);
|
||||
cpu_to_cage_ready = 0;
|
||||
update_control_lines(space->machine);
|
||||
cpu_set_input_line(cage_cpu, TMS32031_IRQ0, CLEAR_LINE);
|
||||
cpu_set_input_line(cage_cpu, TMS3203X_IRQ0, CLEAR_LINE);
|
||||
return cage_from_main;
|
||||
}
|
||||
|
||||
@ -532,7 +532,7 @@ static TIMER_CALLBACK( deferred_cage_w )
|
||||
cage_from_main = param;
|
||||
cpu_to_cage_ready = 1;
|
||||
update_control_lines(machine);
|
||||
cpu_set_input_line(cage_cpu, TMS32031_IRQ0, ASSERT_LINE);
|
||||
cpu_set_input_line(cage_cpu, TMS3203X_IRQ0, ASSERT_LINE);
|
||||
}
|
||||
|
||||
|
||||
@ -610,7 +610,7 @@ static WRITE32_HANDLER( speedup_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static const tms32031_config cage_config =
|
||||
static const tms3203x_config cage_config =
|
||||
{
|
||||
0x400000
|
||||
};
|
||||
@ -651,7 +651,7 @@ MACHINE_CONFIG_FRAGMENT( cage )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("cage", TMS32031, 33868800)
|
||||
MCFG_CPU_CONFIG(cage_config)
|
||||
MCFG_TMS3203X_CONFIG(cage_config)
|
||||
MCFG_CPU_PROGRAM_MAP(cage_map)
|
||||
|
||||
MCFG_TIMER_ADD("cage_dma_timer", dma_timer_callback)
|
||||
|
@ -484,11 +484,11 @@ static WRITE32_HANDLER( tms_m68k_ram_w )
|
||||
}
|
||||
|
||||
|
||||
static void iack_w(device_t *device, UINT8 state, offs_t addr)
|
||||
static void iack_w(tms3203x_device &device, UINT8 state, offs_t addr)
|
||||
{
|
||||
if (LOG)
|
||||
logerror("iack_w(%d) - %06X\n", state, addr);
|
||||
cpu_set_input_line(device, 0, CLEAR_LINE);
|
||||
device.set_input_line(0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
|
||||
@ -978,7 +978,7 @@ static const adsp21xx_config adsp_config =
|
||||
NULL /* callback for timer fired */
|
||||
};
|
||||
|
||||
static const tms32031_config tms_config =
|
||||
static const tms3203x_config tms_config =
|
||||
{
|
||||
0x1000,
|
||||
0,
|
||||
@ -995,7 +995,7 @@ static MACHINE_CONFIG_START( gaelco3d, driver_device )
|
||||
MCFG_CPU_VBLANK_INT("screen", vblank_gen)
|
||||
|
||||
MCFG_CPU_ADD("tms", TMS32031, 60000000)
|
||||
MCFG_CPU_CONFIG(tms_config)
|
||||
MCFG_TMS3203X_CONFIG(tms_config)
|
||||
MCFG_CPU_PROGRAM_MAP(tms_map)
|
||||
|
||||
MCFG_CPU_ADD("adsp", ADSP2115, 16000000)
|
||||
|
@ -463,7 +463,7 @@ static WRITE32_HANDLER( midvplus_misc_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void midvplus_xf1_w(device_t *device, UINT8 val)
|
||||
static void midvplus_xf1_w(tms3203x_device &device, UINT8 val)
|
||||
{
|
||||
static int lastval;
|
||||
// mame_printf_debug("xf1_w = %d\n", val);
|
||||
@ -513,7 +513,7 @@ static ADDRESS_MAP_START( midvunit_map, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static const tms32031_config midvplus_config = { 0, NULL, midvplus_xf1_w };
|
||||
static const tms3203x_config midvplus_config = { 0, NULL, midvplus_xf1_w };
|
||||
|
||||
static ADDRESS_MAP_START( midvplus_map, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x000000, 0x01ffff) AM_RAM AM_BASE(&ram_base)
|
||||
@ -1058,7 +1058,7 @@ static MACHINE_CONFIG_DERIVED( midvplus, midvcommon )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_CONFIG(midvplus_config)
|
||||
MCFG_TMS3203X_CONFIG(midvplus_config)
|
||||
MCFG_CPU_PROGRAM_MAP(midvplus_map)
|
||||
|
||||
MCFG_MACHINE_RESET(midvplus)
|
||||
|
@ -133,16 +133,16 @@ static void render_poly(screen_device &screen, UINT32 *polydata)
|
||||
{
|
||||
float midx = screen.width() / 2;
|
||||
float midy = screen.height() / 2;
|
||||
float z0 = convert_tms3203x_fp_to_float(polydata[0]);
|
||||
float voz_dy = convert_tms3203x_fp_to_float(polydata[1]) * 256.0f;
|
||||
float voz_dx = convert_tms3203x_fp_to_float(polydata[2]) * 256.0f;
|
||||
float ooz_dy = convert_tms3203x_fp_to_float(polydata[3]);
|
||||
float ooz_dx = convert_tms3203x_fp_to_float(polydata[4]);
|
||||
float uoz_dy = convert_tms3203x_fp_to_float(polydata[5]) * 256.0f;
|
||||
float uoz_dx = convert_tms3203x_fp_to_float(polydata[6]) * 256.0f;
|
||||
float voz_base = convert_tms3203x_fp_to_float(polydata[7]) * 256.0f - midx * voz_dx - midy * voz_dy;
|
||||
float ooz_base = convert_tms3203x_fp_to_float(polydata[8]) - midx * ooz_dx - midy * ooz_dy;
|
||||
float uoz_base = convert_tms3203x_fp_to_float(polydata[9]) * 256.0f - midx * uoz_dx - midy * uoz_dy;
|
||||
float z0 = tms3203x_device::fp_to_float(polydata[0]);
|
||||
float voz_dy = tms3203x_device::fp_to_float(polydata[1]) * 256.0f;
|
||||
float voz_dx = tms3203x_device::fp_to_float(polydata[2]) * 256.0f;
|
||||
float ooz_dy = tms3203x_device::fp_to_float(polydata[3]);
|
||||
float ooz_dx = tms3203x_device::fp_to_float(polydata[4]);
|
||||
float uoz_dy = tms3203x_device::fp_to_float(polydata[5]) * 256.0f;
|
||||
float uoz_dx = tms3203x_device::fp_to_float(polydata[6]) * 256.0f;
|
||||
float voz_base = tms3203x_device::fp_to_float(polydata[7]) * 256.0f - midx * voz_dx - midy * voz_dy;
|
||||
float ooz_base = tms3203x_device::fp_to_float(polydata[8]) - midx * ooz_dx - midy * ooz_dy;
|
||||
float uoz_base = tms3203x_device::fp_to_float(polydata[9]) * 256.0f - midx * uoz_dx - midy * uoz_dy;
|
||||
poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
|
||||
int color = (polydata[10] & 0x7f) << 8;
|
||||
poly_vertex vert[MAX_VERTICES];
|
||||
@ -153,16 +153,16 @@ static void render_poly(screen_device &screen, UINT32 *polydata)
|
||||
{
|
||||
int t;
|
||||
logerror("poly: %12.2f %12.2f %12.2f %12.2f %12.2f %12.2f %12.2f %12.2f %12.2f %12.2f %08X %08X (%4d,%4d) %08X",
|
||||
(double)convert_tms3203x_fp_to_float(polydata[0]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[1]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[2]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[3]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[4]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[5]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[6]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[7]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[8]),
|
||||
(double)convert_tms3203x_fp_to_float(polydata[9]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[0]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[1]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[2]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[3]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[4]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[5]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[6]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[7]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[8]),
|
||||
(double)tms3203x_device::fp_to_float(polydata[9]),
|
||||
polydata[10],
|
||||
polydata[11],
|
||||
(INT16)(polydata[12] >> 16), (INT16)(polydata[12] << 2) >> 2, polydata[12]);
|
||||
|
@ -309,7 +309,7 @@ static void process_dma_queue(running_machine *machine)
|
||||
poly_vertex vert[4];
|
||||
|
||||
/* if we're rendering to the same page we're viewing, it has changed */
|
||||
if ((((page_control >> 2) ^ page_control) & 1) == 0)
|
||||
if ((((page_control >> 2) ^ page_control) & 1) == 0 || WATCH_RENDER)
|
||||
video_changed = TRUE;
|
||||
|
||||
/* fill in the vertex data */
|
||||
|
@ -805,20 +805,20 @@ static int zeus_fifo_process(running_machine *machine, const UINT32 *data, int n
|
||||
return FALSE;
|
||||
|
||||
/* extract the matrix from the raw data */
|
||||
zeus_matrix[0][0] = convert_tms3203x_fp_to_float(data[dataoffs + 1]);
|
||||
zeus_matrix[0][1] = convert_tms3203x_fp_to_float(data[dataoffs + 2]);
|
||||
zeus_matrix[0][2] = convert_tms3203x_fp_to_float(data[dataoffs + 3]);
|
||||
zeus_matrix[1][0] = convert_tms3203x_fp_to_float(data[dataoffs + 4]);
|
||||
zeus_matrix[1][1] = convert_tms3203x_fp_to_float(data[dataoffs + 5]);
|
||||
zeus_matrix[1][2] = convert_tms3203x_fp_to_float(data[dataoffs + 6]);
|
||||
zeus_matrix[2][0] = convert_tms3203x_fp_to_float(data[dataoffs + 7]);
|
||||
zeus_matrix[2][1] = convert_tms3203x_fp_to_float(data[dataoffs + 8]);
|
||||
zeus_matrix[2][2] = convert_tms3203x_fp_to_float(data[dataoffs + 9]);
|
||||
zeus_matrix[0][0] = tms3203x_device::fp_to_float(data[dataoffs + 1]);
|
||||
zeus_matrix[0][1] = tms3203x_device::fp_to_float(data[dataoffs + 2]);
|
||||
zeus_matrix[0][2] = tms3203x_device::fp_to_float(data[dataoffs + 3]);
|
||||
zeus_matrix[1][0] = tms3203x_device::fp_to_float(data[dataoffs + 4]);
|
||||
zeus_matrix[1][1] = tms3203x_device::fp_to_float(data[dataoffs + 5]);
|
||||
zeus_matrix[1][2] = tms3203x_device::fp_to_float(data[dataoffs + 6]);
|
||||
zeus_matrix[2][0] = tms3203x_device::fp_to_float(data[dataoffs + 7]);
|
||||
zeus_matrix[2][1] = tms3203x_device::fp_to_float(data[dataoffs + 8]);
|
||||
zeus_matrix[2][2] = tms3203x_device::fp_to_float(data[dataoffs + 9]);
|
||||
|
||||
/* extract the translation point from the raw data */
|
||||
zeus_point[0] = convert_tms3203x_fp_to_float(data[dataoffs + 10]);
|
||||
zeus_point[1] = convert_tms3203x_fp_to_float(data[dataoffs + 11]);
|
||||
zeus_point[2] = convert_tms3203x_fp_to_float(data[dataoffs + 12]);
|
||||
zeus_point[0] = tms3203x_device::fp_to_float(data[dataoffs + 10]);
|
||||
zeus_point[1] = tms3203x_device::fp_to_float(data[dataoffs + 11]);
|
||||
zeus_point[2] = tms3203x_device::fp_to_float(data[dataoffs + 12]);
|
||||
|
||||
if (log_fifo)
|
||||
{
|
||||
@ -841,9 +841,9 @@ static int zeus_fifo_process(running_machine *machine, const UINT32 *data, int n
|
||||
return FALSE;
|
||||
|
||||
/* extract the translation point from the raw data */
|
||||
zeus_point[0] = convert_tms3203x_fp_to_float(data[1]);
|
||||
zeus_point[1] = convert_tms3203x_fp_to_float(data[2]);
|
||||
zeus_point[2] = convert_tms3203x_fp_to_float(data[3]);
|
||||
zeus_point[0] = tms3203x_device::fp_to_float(data[1]);
|
||||
zeus_point[1] = tms3203x_device::fp_to_float(data[2]);
|
||||
zeus_point[2] = tms3203x_device::fp_to_float(data[3]);
|
||||
|
||||
if (log_fifo)
|
||||
{
|
||||
@ -863,14 +863,14 @@ static int zeus_fifo_process(running_machine *machine, const UINT32 *data, int n
|
||||
{
|
||||
log_fifo_command(data, numwords, " -- unknown control + hack clear screen\n");
|
||||
logerror("\t\tvector %8.2f %8.2f %8.5f\n",
|
||||
convert_tms3203x_fp_to_float(data[1]),
|
||||
convert_tms3203x_fp_to_float(data[2]),
|
||||
convert_tms3203x_fp_to_float(data[3]));
|
||||
tms3203x_device::fp_to_float(data[1]),
|
||||
tms3203x_device::fp_to_float(data[2]),
|
||||
tms3203x_device::fp_to_float(data[3]));
|
||||
|
||||
/* extract the translation point from the raw data */
|
||||
zeus_point2[0] = convert_tms3203x_fp_to_float(data[1]);
|
||||
zeus_point2[1] = convert_tms3203x_fp_to_float(data[2]);
|
||||
zeus_point2[2] = convert_tms3203x_fp_to_float(data[3]);
|
||||
zeus_point2[0] = tms3203x_device::fp_to_float(data[1]);
|
||||
zeus_point2[1] = tms3203x_device::fp_to_float(data[2]);
|
||||
zeus_point2[2] = tms3203x_device::fp_to_float(data[3]);
|
||||
}
|
||||
{
|
||||
/* not right -- just a hack */
|
||||
|
Loading…
Reference in New Issue
Block a user