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https://github.com/holub/mame
synced 2025-06-06 04:43:45 +03:00
svi318: simplify memory accesses
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@ -32,6 +32,13 @@
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#define IS_SVI328 (m_ram->size() == 64 * 1024)
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#define CCS1 (m_cart == 0 && offset < 0x4000)
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#define CCS2 (m_cart == 0 && offset >= 0x4000 && offset < 0x8000)
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#define CCS3 (m_cart == 0 && m_rom2 == 0 && offset >= 0x8000 && offset < 0xc000)
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#define CCS4 (m_cart == 0 && m_rom3 == 0 && offset >= 0xc000)
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#define ROMCS (m_romdis == 1 && offset < 0x8000)
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#define RAMCS (m_ramdis == 1 && offset >= 0x8000)
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//**************************************************************************
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// TYPE DEFINITIONS
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@ -64,10 +71,8 @@ public:
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DECLARE_WRITE8_MEMBER( bank_w );
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DECLARE_WRITE_LINE_MEMBER( intvdp_w );
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READ8_MEMBER( page1_r );
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WRITE8_MEMBER( page1_w );
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READ8_MEMBER( page2_r );
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WRITE8_MEMBER( page2_w );
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READ8_MEMBER( mreq_r );
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WRITE8_MEMBER( mreq_w );
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// from expander bus
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DECLARE_WRITE_LINE_MEMBER( intexp_w );
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@ -110,8 +115,7 @@ private:
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static ADDRESS_MAP_START( svi3x8_mem, AS_PROGRAM, 8, svi3x8_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x7fff) AM_READWRITE(page1_r, page1_w)
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AM_RANGE(0x8000, 0xffff) AM_READWRITE(page2_r, page2_w)
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(mreq_r, mreq_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( svi3x8_io, AS_IO, 8, svi3x8_state )
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@ -326,71 +330,41 @@ void svi3x8_state::machine_reset()
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m_ramdis = 1;
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m_cart = 1;
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m_bk21 = 1;
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m_rom2 = 1;
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m_rom3 = 1;
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m_keyboard_row = 0;
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}
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READ8_MEMBER( svi3x8_state::page1_r)
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READ8_MEMBER( svi3x8_state::mreq_r )
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{
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// cartridge /CCS1 and /CCS2
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if (m_cart == 0)
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if (CCS1 || CCS2 || CCS3 || CCS4)
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return m_cart_rom->read_rom(space, offset);
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UINT8 data = m_expander->mreq_r(space, offset);
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if (m_romdis == 1)
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if (ROMCS)
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data = m_basic->u8(offset);
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if (m_bk21 == 0 && IS_SVI328)
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if (m_bk21 == 0 && IS_SVI328 && offset < 0x8000)
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data = m_ram->read(offset);
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if (RAMCS && (IS_SVI328 || offset >= 0xc000))
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data = m_ram->read(IS_SVI328 ? offset : offset - 0xc000);
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return data;
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}
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WRITE8_MEMBER( svi3x8_state::page1_w)
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WRITE8_MEMBER( svi3x8_state::mreq_w )
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{
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if (m_cart == 0)
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if (CCS1 || CCS2 || CCS3 || CCS4)
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return;
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m_expander->mreq_w(space, offset, data);
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if (m_bk21 == 0 && IS_SVI328)
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if (m_bk21 == 0 && IS_SVI328 && offset < 0x8000)
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m_ram->write(offset, data);
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}
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READ8_MEMBER( svi3x8_state::page2_r)
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{
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offset += 0x8000;
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// cartridge /CCS3
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if (m_cart == 0 && m_rom2 == 0 && offset < 0xc000)
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return m_cart_rom->read_rom(space, offset);
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// cartridge /CCS4
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if (m_cart == 0 && m_rom3 == 0 && offset >= 0xc000)
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return m_cart_rom->read_rom(space, offset);
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UINT8 data = m_expander->mreq_r(space, offset);
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if (m_ramdis == 1 && (offset >= 0x4000 || IS_SVI328))
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return m_ram->read(IS_SVI328 ? offset : offset - 0xc000);
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return data;
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}
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WRITE8_MEMBER( svi3x8_state::page2_w )
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{
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offset += 0x8000;
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// cartridge /CCS3
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if (m_cart == 0 && m_rom2 == 0 && offset < 0xc000)
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return;
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// cartridge /CCS4
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if (m_cart == 0 && m_rom3 == 0 && offset >= 0xc000)
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return;
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m_expander->mreq_w(space, offset, data);
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if (m_ramdis == 1 && (offset >= 0x4000 || IS_SVI328))
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if (RAMCS && (IS_SVI328 || offset >= 0xc000))
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m_ram->write(IS_SVI328 ? offset : offset - 0xc000, data);
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}
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