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https://github.com/holub/mame
synced 2025-04-20 23:42:22 +03:00
finished modernizing at28c16 [smf]
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parent
cca73a4ec0
commit
6fb2859b04
@ -87,7 +87,7 @@ const address_space_config *at28c16_device::memory_space_config( address_spacenu
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void at28c16_device::device_start()
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{
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m_write_timer = machine().scheduler().timer_alloc( FUNC(write_finished), this );
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m_write_timer = timer_alloc(0);
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save_item( NAME(m_a9_12v) );
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save_item( NAME(m_oe_12v) );
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@ -182,12 +182,7 @@ void at28c16_device::nvram_write( emu_file &file )
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// READ/WRITE HANDLERS
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//**************************************************************************
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WRITE8_DEVICE_HANDLER( at28c16_w )
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{
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downcast<at28c16_device *>( device )->write( offset, data );
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}
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void at28c16_device::write( offs_t offset, UINT8 data )
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WRITE8_MEMBER( at28c16_device::write )
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{
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if( m_last_write >= 0 )
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{
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@ -225,12 +220,7 @@ void at28c16_device::write( offs_t offset, UINT8 data )
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}
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READ8_DEVICE_HANDLER( at28c16_r )
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{
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return downcast<at28c16_device *>( device )->read( offset );
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}
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UINT8 at28c16_device::read( offs_t offset )
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READ8_MEMBER( at28c16_device::read )
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{
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if( m_last_write >= 0 )
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{
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@ -252,12 +242,7 @@ UINT8 at28c16_device::read( offs_t offset )
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}
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WRITE_LINE_DEVICE_HANDLER( at28c16_a9_12v )
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{
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downcast<at28c16_device *>( device )->set_a9_12v( state );
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}
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void at28c16_device::set_a9_12v( int state )
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WRITE_LINE_MEMBER( at28c16_device::set_a9_12v )
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{
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state &= 1;
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if( m_a9_12v != state )
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@ -268,12 +253,7 @@ void at28c16_device::set_a9_12v( int state )
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}
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WRITE_LINE_DEVICE_HANDLER( at28c16_oe_12v )
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{
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downcast<at28c16_device *>( device )->set_oe_12v( state );
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}
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void at28c16_device::set_oe_12v( int state )
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WRITE_LINE_MEMBER( at28c16_device::set_oe_12v )
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{
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state &= 1;
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if( m_oe_12v != state )
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@ -284,11 +264,12 @@ void at28c16_device::set_oe_12v( int state )
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}
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//**************************************************************************
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// INTERNAL HELPERS
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//**************************************************************************
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TIMER_CALLBACK( at28c16_device::write_finished )
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void at28c16_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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reinterpret_cast<at28c16_device *>(ptr)->m_last_write = -1;
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switch( id )
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{
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case 0:
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m_last_write = -1;
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break;
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}
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}
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@ -44,10 +44,10 @@ public:
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at28c16_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock );
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// I/O operations
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void write( offs_t offset, UINT8 data );
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UINT8 read( offs_t offset );
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void set_a9_12v( int state );
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void set_oe_12v( int state );
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DECLARE_WRITE8_MEMBER( write );
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DECLARE_READ8_MEMBER( read );
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DECLARE_WRITE_LINE_MEMBER( set_a9_12v );
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DECLARE_WRITE_LINE_MEMBER( set_oe_12v );
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protected:
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// device-level overrides
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@ -55,6 +55,7 @@ protected:
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virtual void device_validity_check(validity_checker &valid) const;
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virtual void device_start();
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virtual void device_reset();
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config( address_spacenum spacenum = AS_0 ) const;
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@ -64,9 +65,6 @@ protected:
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virtual void nvram_read( emu_file &file );
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virtual void nvram_write( emu_file &file );
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// internal helpers
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static TIMER_CALLBACK( write_finished );
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// internal state
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address_space_config m_space_config;
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emu_timer *m_write_timer;
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@ -79,14 +77,4 @@ protected:
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// device type definition
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extern const device_type AT28C16;
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//**************************************************************************
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// READ/WRITE HANDLERS
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//**************************************************************************
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DECLARE_WRITE8_DEVICE_HANDLER( at28c16_w );
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DECLARE_READ8_DEVICE_HANDLER( at28c16_r );
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WRITE_LINE_DEVICE_HANDLER( at28c16_a9_12v );
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WRITE_LINE_DEVICE_HANDLER( at28c16_oe_12v );
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#endif
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@ -80,7 +80,7 @@ static ADDRESS_MAP_START( namcond1_map, AS_PROGRAM, 16, namcond1_state )
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AM_RANGE(0x000000, 0x0fffff) AM_ROM
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AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(namcond1_shared_ram_r,namcond1_shared_ram_w) AM_SHARE("shared_ram")
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AM_RANGE(0x800000, 0x80000f) AM_READWRITE_LEGACY(ygv608_r,ygv608_w)
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AM_RANGE(0xa00000, 0xa00fff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0xff00)
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AM_RANGE(0xa00000, 0xa00fff) AM_DEVREADWRITE8("at28c16", at28c16_device, read, write, 0xff00)
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#ifdef MAME_DEBUG
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AM_RANGE(0xb00000, 0xb00001) AM_READ_LEGACY(ygv608_debug_trigger)
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#endif
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@ -730,7 +730,7 @@ READ32_MEMBER(namcos11_state::lightgun_r)
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static ADDRESS_MAP_START( namcos11_map, AS_PROGRAM, 32, namcos11_state )
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AM_RANGE(0x1fa04000, 0x1fa0ffff) AM_RAM AM_SHARE("sharedram") /* shared ram with C76 */
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AM_RANGE(0x1fa20000, 0x1fa2ffff) AM_WRITE(keycus_w) AM_SHARE("keycus") /* keycus */
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AM_RANGE(0x1fa30000, 0x1fa30fff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0x00ff00ff) /* eeprom */
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AM_RANGE(0x1fa30000, 0x1fa30fff) AM_DEVREADWRITE8("at28c16", at28c16_device, read, write, 0x00ff00ff) /* eeprom */
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AM_RANGE(0x1fb00000, 0x1fb00003) AM_WRITENOP /* ?? */
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AM_RANGE(0x1fbf6000, 0x1fbf6003) AM_WRITENOP /* ?? */
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ADDRESS_MAP_END
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@ -1257,7 +1257,7 @@ WRITE32_MEMBER(namcos12_state::s12_dma_bias_w)
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static ADDRESS_MAP_START( namcos12_map, AS_PROGRAM, 32, namcos12_state )
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AM_RANGE(0x1f000000, 0x1f000003) AM_READNOP AM_WRITE(bankoffset_w) /* banking */
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AM_RANGE(0x1f080000, 0x1f083fff) AM_READWRITE(sharedram_r, sharedram_w) AM_SHARE("sharedram") /* shared ram?? */
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AM_RANGE(0x1f140000, 0x1f140fff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0x00ff00ff) /* eeprom */
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AM_RANGE(0x1f140000, 0x1f140fff) AM_DEVREADWRITE8("at28c16", at28c16_device, read, write, 0x00ff00ff) /* eeprom */
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AM_RANGE(0x1f1bff08, 0x1f1bff0f) AM_WRITENOP /* ?? */
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AM_RANGE(0x1f700000, 0x1f70ffff) AM_WRITE(dmaoffset_w) /* dma */
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AM_RANGE(0x1fa00000, 0x1fbfffff) AM_ROMBANK("bank1") /* banked roms */
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@ -818,7 +818,7 @@ static ADDRESS_MAP_START( taitogn_map, AS_PROGRAM, 32, taitogn_state )
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AM_RANGE(0x1fa30000, 0x1fa30003) AM_READWRITE(control3_r, control3_w)
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AM_RANGE(0x1fa51c00, 0x1fa51dff) AM_READNOP // systematic read at spu_address + 250000, result dropped, maybe other accesses
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AM_RANGE(0x1fa60000, 0x1fa60003) AM_READ(hack1_r)
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AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0xffffffff) /* eeprom */
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AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8("at28c16", at28c16_device, read, write, 0xffffffff) /* eeprom */
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AM_RANGE(0x1fb00000, 0x1fb0ffff) AM_READWRITE(rf5c296_io_r, rf5c296_io_w)
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AM_RANGE(0x1fb40000, 0x1fb40003) AM_READWRITE(control_r, control_w)
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AM_RANGE(0x1fb60000, 0x1fb60003) AM_WRITE(control2_w)
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@ -144,7 +144,7 @@ WRITE32_MEMBER(vegaeo_state::soundlatch_w)
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static ADDRESS_MAP_START( vega_map, AS_PROGRAM, 32, vegaeo_state )
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AM_RANGE(0x00000000, 0x001fffff) AM_RAM
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AM_RANGE(0x80000000, 0x80013fff) AM_READWRITE(vega_vram_r, vega_vram_w)
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AM_RANGE(0xfc000000, 0xfc0000ff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0x000000ff)
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AM_RANGE(0xfc000000, 0xfc0000ff) AM_DEVREADWRITE8("at28c16", at28c16_device, read, write, 0x000000ff)
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AM_RANGE(0xfc200000, 0xfc2003ff) AM_RAM_WRITE(vega_palette_w) AM_SHARE("paletteram")
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AM_RANGE(0xfc400000, 0xfc40005b) AM_WRITENOP // crt registers ?
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AM_RANGE(0xfc600000, 0xfc600003) AM_WRITE(soundlatch_w)
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@ -420,7 +420,7 @@ static ADDRESS_MAP_START( zn_map, AS_PROGRAM, 32, zn_state )
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AM_RANGE(0x1fa30000, 0x1fa30003) AM_NOP /* ?? */
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AM_RANGE(0x1fa40000, 0x1fa40003) AM_READNOP /* ?? */
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AM_RANGE(0x1fa60000, 0x1fa60003) AM_READNOP /* ?? */
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AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0xffffffff) /* eeprom */
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AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8("at28c16", at28c16_device, read, write, 0xffffffff) /* eeprom */
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AM_RANGE(0x1fb20000, 0x1fb20007) AM_READ(unknown_r)
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ADDRESS_MAP_END
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