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m37710: Replace I/O space with callbacks

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namcos22.cpp: Separate System Super 22 state class (nw)
This commit is contained in:
AJR 2019-04-07 17:05:31 -04:00
parent a60f8ba71d
commit 702b45b1bc
13 changed files with 468 additions and 462 deletions
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83
src/devices/cpu/m37710/m37710.cpp
View File

@ -108,7 +108,9 @@ void m37720s1_device::map(address_map &map)
m37710_cpu_device::m37710_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, map_delegate)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
, m_port_in_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}}
, m_port_out_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}}
, m_analog_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}}
{
}
@ -144,8 +146,7 @@ m37720s1_device::m37720s1_device(const machine_config &mconfig, const char *tag,
std::vector<std::pair<int, const address_space_config *>> m37710_cpu_device::memory_space_config() const
{
return std::vector<std::pair<int, const address_space_config *>> {
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_IO, &m_io_config)
std::make_pair(AS_PROGRAM, &m_program_config)
};
}
@ -517,82 +518,82 @@ READ8_MEMBER(m37710_cpu_device::m37710_internal_r)
case 0x02: // p0
d = m_m37710_regs[0x04];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT0)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[0](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x03: // p1
d = m_m37710_regs[0x05];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT1)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[1](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x06: // p2
d = m_m37710_regs[0x08];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT2)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[2](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x07: // p3
d = m_m37710_regs[0x09];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT3)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[3](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x0a: // p4
d = m_m37710_regs[0x0c];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT4)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[4](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x0b: // p5
d = m_m37710_regs[0x0d];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT5)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[5](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x0e: // p6
d = m_m37710_regs[0x10];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT6)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[6](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x0f: // p7
d = m_m37710_regs[0x11];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT7)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[7](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
case 0x12: // p8
d = m_m37710_regs[0x14];
if (d != 0xff)
return (m_io->read_byte(M37710_PORT8)&~d) | (m_m37710_regs[offset]&d);
return (m_port_in_cb[8](0,~d)&~d) | (m_m37710_regs[offset]&d);
break;
// A-D regs
case 0x20:
return m_io->read_byte(M37710_ADC0_L);
return m_analog_cb[0]() & 0xff;
case 0x21:
return m_io->read_byte(M37710_ADC0_H);
return m_analog_cb[0]() >> 8;
case 0x22:
return m_io->read_byte(M37710_ADC1_L);
return m_analog_cb[1]() & 0xff;
case 0x23:
return m_io->read_byte(M37710_ADC1_H);
return m_analog_cb[1]() >> 8;
case 0x24:
return m_io->read_byte(M37710_ADC2_L);
return m_analog_cb[2]() & 0xff;
case 0x25:
return m_io->read_byte(M37710_ADC2_H);
return m_analog_cb[2]() >> 8;
case 0x26:
return m_io->read_byte(M37710_ADC3_L);
return m_analog_cb[3]() & 0xff;
case 0x27:
return m_io->read_byte(M37710_ADC3_H);
return m_analog_cb[3]() >> 8;
case 0x28:
return m_io->read_byte(M37710_ADC4_L);
return m_analog_cb[4]() & 0xff;
case 0x29:
return m_io->read_byte(M37710_ADC4_H);
return m_analog_cb[4]() >> 8;
case 0x2a:
return m_io->read_byte(M37710_ADC5_L);
return m_analog_cb[5]() & 0xff;
case 0x2b:
return m_io->read_byte(M37710_ADC5_H);
return m_analog_cb[5]() >> 8;
case 0x2c:
return m_io->read_byte(M37710_ADC6_L);
return m_analog_cb[6]() & 0xff;
case 0x2d:
return m_io->read_byte(M37710_ADC6_H);
return m_analog_cb[6]() >> 8;
case 0x2e:
return m_io->read_byte(M37710_ADC7_L);
return m_analog_cb[7]() & 0xff;
case 0x2f:
return m_io->read_byte(M37710_ADC7_H);
return m_analog_cb[7]() >> 8;
// UART control (not hooked up yet)
case 0x34: case 0x3c:
@ -631,47 +632,47 @@ WRITE8_MEMBER(m37710_cpu_device::m37710_internal_w)
case 0x02: // p0
d = m_m37710_regs[0x04];
if (d != 0)
m_io->write_byte(M37710_PORT0, data&d);
m_port_out_cb[0](0,data&d,d);
break;
case 0x03: // p1
d = m_m37710_regs[0x05];
if (d != 0)
m_io->write_byte(M37710_PORT1, data&d);
m_port_out_cb[1](0,data&d,d);
break;
case 0x06: // p2
d = m_m37710_regs[0x08];
if (d != 0)
m_io->write_byte(M37710_PORT2, data&d);
m_port_out_cb[2](0,data&d,d);
break;
case 0x07: // p3
d = m_m37710_regs[0x09];
if (d != 0)
m_io->write_byte(M37710_PORT3, data&d);
m_port_out_cb[3](0,data&d,d);
break;
case 0x0a: // p4
d = m_m37710_regs[0x0c];
if (d != 0)
m_io->write_byte(M37710_PORT4, data&d);
m_port_out_cb[4](0,data&d,d);
break;
case 0x0b: // p5
d = m_m37710_regs[0x0d];
if (d != 0)
m_io->write_byte(M37710_PORT5, data&d);
m_port_out_cb[5](0,data&d,d);
break;
case 0x0e: // p6
d = m_m37710_regs[0x10];
if (d != 0)
m_io->write_byte(M37710_PORT6, data&d);
m_port_out_cb[6](0,data&d,d);
break;
case 0x0f: // p7
d = m_m37710_regs[0x11];
if (d != 0)
m_io->write_byte(M37710_PORT7, data&d);
m_port_out_cb[7](0,data&d,d);
break;
case 0x12: // p8
d = m_m37710_regs[0x14];
if (d != 0)
m_io->write_byte(M37710_PORT8, data&d);
m_port_out_cb[8](0,data&d,d);
break;
case 0x40: // count start
@ -1014,7 +1015,13 @@ void m37710_cpu_device::device_start()
m_program = &space(AS_PROGRAM);
m_cache = m_program->cache<1, 0, ENDIANNESS_LITTLE>();
m_io = &space(AS_IO);
for (auto &cb : m_port_in_cb)
cb.resolve_safe(0xff);
for (auto &cb : m_port_out_cb)
cb.resolve_safe();
for (auto &cb : m_analog_cb)
cb.resolve_safe(0);
m_ICount = 0;

57
src/devices/cpu/m37710/m37710.h
View File

@ -88,29 +88,44 @@ enum
};
/* I/O ports */
enum
{
M37710_PORT0 = 0,
M37710_PORT1, M37710_PORT2, M37710_PORT3, M37710_PORT4,
M37710_PORT5, M37710_PORT6, M37710_PORT7, M37710_PORT8,
M37710_ADC0_L = 0x10, M37710_ADC0_H,
M37710_ADC1_L, M37710_ADC1_H, M37710_ADC2_L, M37710_ADC2_H, M37710_ADC3_L, M37710_ADC3_H,
M37710_ADC4_L, M37710_ADC4_H, M37710_ADC5_L, M37710_ADC5_H, M37710_ADC6_L, M37710_ADC6_H,
M37710_ADC7_L, M37710_ADC7_H,
M37710_SER0_REC = 0x20,
M37710_SER0_XMIT, M37710_SER1_REC, M37710_SER1_XMIT
};
// internal ROM region
#define M37710_INTERNAL_ROM_REGION "internal"
#define M37710_INTERNAL_ROM(_tag) (_tag ":" M37710_INTERNAL_ROM_REGION)
class m37710_cpu_device : public cpu_device, public m7700_disassembler::config
{
public:
auto p0_in_cb() { return m_port_in_cb[0].bind(); }
auto p0_out_cb() { return m_port_out_cb[0].bind(); }
auto p1_in_cb() { return m_port_in_cb[1].bind(); }
auto p1_out_cb() { return m_port_out_cb[1].bind(); }
auto p2_in_cb() { return m_port_in_cb[2].bind(); }
auto p2_out_cb() { return m_port_out_cb[2].bind(); }
auto p3_in_cb() { return m_port_in_cb[3].bind(); }
auto p3_out_cb() { return m_port_out_cb[3].bind(); }
auto p4_in_cb() { return m_port_in_cb[4].bind(); }
auto p4_out_cb() { return m_port_out_cb[4].bind(); }
auto p5_in_cb() { return m_port_in_cb[5].bind(); }
auto p5_out_cb() { return m_port_out_cb[5].bind(); }
auto p6_in_cb() { return m_port_in_cb[6].bind(); }
auto p6_out_cb() { return m_port_out_cb[6].bind(); }
auto p7_in_cb() { return m_port_in_cb[7].bind(); }
auto p7_out_cb() { return m_port_out_cb[7].bind(); }
auto p8_in_cb() { return m_port_in_cb[8].bind(); }
auto p8_out_cb() { return m_port_out_cb[8].bind(); }
auto p9_in_cb() { return m_port_in_cb[9].bind(); }
auto p9_out_cb() { return m_port_out_cb[9].bind(); }
auto p10_in_cb() { return m_port_in_cb[10].bind(); }
auto p10_out_cb() { return m_port_out_cb[10].bind(); }
auto an0_cb() { return m_analog_cb[0].bind(); }
auto an1_cb() { return m_analog_cb[1].bind(); }
auto an2_cb() { return m_analog_cb[2].bind(); }
auto an3_cb() { return m_analog_cb[3].bind(); }
auto an4_cb() { return m_analog_cb[4].bind(); }
auto an5_cb() { return m_analog_cb[5].bind(); }
auto an6_cb() { return m_analog_cb[6].bind(); }
auto an7_cb() { return m_analog_cb[7].bind(); }
protected:
DECLARE_READ8_MEMBER( m37710_internal_r );
DECLARE_WRITE8_MEMBER( m37710_internal_w );
@ -146,6 +161,13 @@ private:
address_space_config m_program_config;
address_space_config m_io_config;
// I/O port callbacks
devcb_read8 m_port_in_cb[11];
devcb_write8 m_port_out_cb[11];
// A-D callbacks
devcb_read16 m_analog_cb[8];
uint32_t m_a; /* Accumulator */
uint32_t m_b; /* holds high byte of accumulator */
uint32_t m_ba; /* Secondary Accumulator */
@ -183,7 +205,6 @@ private:
uint32_t m_destination; /* temp register */
address_space *m_program;
memory_access_cache<1, 0, ENDIANNESS_LITTLE> *m_cache;
address_space *m_io;
uint32_t m_stopped; /* Sets how the CPU is stopped */
// on-board peripheral stuff

13
src/mame/drivers/fontwriter.cpp
View File

@ -54,7 +54,6 @@ private:
m_vbl2 ^= 0x88;
return m_vbl;
}
void io_map(address_map &map);
void main_map(address_map &map);
void fw600_map(address_map &map);
@ -93,12 +92,6 @@ void fontwriter_state::main_map(address_map &map)
map(0x200000, 0x3fffff).rom().region("maincpu", 0x0000);
}
void fontwriter_state::io_map(address_map &map)
{
map(M37710_PORT6, M37710_PORT6).r(FUNC(fontwriter_state::vbl_r));
map(M37710_PORT7, M37710_PORT7).r(FUNC(fontwriter_state::vbl2_r));
}
void fontwriter_state::fw600_map(address_map &map)
{
map(0x000280, 0x0002ff).ram();
@ -116,7 +109,8 @@ void fontwriter_state::fontwriter(machine_config &config)
{
M37720S1(config, m_maincpu, XTAL(16'000'000)); /* M37720S1 @ 16MHz - main CPU */
m_maincpu->set_addrmap(AS_PROGRAM, &fontwriter_state::main_map);
m_maincpu->set_addrmap(AS_IO, &fontwriter_state::io_map);
m_maincpu->p6_in_cb().set(FUNC(fontwriter_state::vbl_r));
m_maincpu->p7_in_cb().set(FUNC(fontwriter_state::vbl2_r));
AT28C16(config, "at28c16", 0);
@ -132,7 +126,8 @@ void fontwriter_state::fw600(machine_config &config)
{
M37720S1(config, m_maincpu, XTAL(16'000'000)); /* M37720S1 @ 16MHz - main CPU */
m_maincpu->set_addrmap(AS_PROGRAM, &fontwriter_state::fw600_map);
m_maincpu->set_addrmap(AS_IO, &fontwriter_state::io_map);
m_maincpu->p6_in_cb().set(FUNC(fontwriter_state::vbl_r));
m_maincpu->p7_in_cb().set(FUNC(fontwriter_state::vbl2_r));
AT28C16(config, "at28c16", 0);

27
src/mame/drivers/namcofl.cpp
View File

@ -162,7 +162,6 @@ OSC3: 48.384MHz
#include "cpu/i960/i960.h"
#include "sound/c352.h"
#include "machine/namcomcu.h"
#include "machine/nvram.h"
#include "speaker.h"
@ -318,20 +317,6 @@ void namcofl_state::namcoc75_am(address_map &map)
map(0x200000, 0x27ffff).rom().region("c75data", 0);
}
void namcofl_state::namcoc75_io(address_map &map)
{
map(M37710_PORT6, M37710_PORT6).rw(FUNC(namcofl_state::port6_r), FUNC(namcofl_state::port6_w));
map(M37710_PORT7, M37710_PORT7).r(FUNC(namcofl_state::port7_r));
map(M37710_ADC7_L, M37710_ADC7_L).r(FUNC(namcofl_state::dac7_r));
map(M37710_ADC6_L, M37710_ADC6_L).r(FUNC(namcofl_state::dac6_r));
map(M37710_ADC5_L, M37710_ADC5_L).r(FUNC(namcofl_state::dac5_r));
map(M37710_ADC4_L, M37710_ADC4_L).r(FUNC(namcofl_state::dac4_r));
map(M37710_ADC3_L, M37710_ADC3_L).r(FUNC(namcofl_state::dac3_r));
map(M37710_ADC2_L, M37710_ADC2_L).r(FUNC(namcofl_state::dac2_r));
map(M37710_ADC1_L, M37710_ADC1_L).r(FUNC(namcofl_state::dac1_r));
map(M37710_ADC0_L, M37710_ADC0_L).r(FUNC(namcofl_state::dac0_r));
}
static INPUT_PORTS_START( speedrcr )
PORT_START("MISC")
@ -560,7 +545,17 @@ void namcofl_state::namcofl(machine_config &config)
NAMCO_C75(config, m_mcu, 48.384_MHz_XTAL/3);
m_mcu->set_addrmap(AS_PROGRAM, &namcofl_state::namcoc75_am);
m_mcu->set_addrmap(AS_IO, &namcofl_state::namcoc75_io);
m_mcu->p6_in_cb().set(FUNC(namcofl_state::port6_r));
m_mcu->p6_out_cb().set(FUNC(namcofl_state::port6_w));
m_mcu->p7_in_cb().set(FUNC(namcofl_state::port7_r));
m_mcu->an7_cb().set(FUNC(namcofl_state::dac7_r));
m_mcu->an6_cb().set(FUNC(namcofl_state::dac6_r));
m_mcu->an5_cb().set(FUNC(namcofl_state::dac5_r));
m_mcu->an4_cb().set(FUNC(namcofl_state::dac4_r));
m_mcu->an3_cb().set(FUNC(namcofl_state::dac3_r));
m_mcu->an2_cb().set(FUNC(namcofl_state::dac2_r));
m_mcu->an1_cb().set(FUNC(namcofl_state::dac1_r));
m_mcu->an0_cb().set(FUNC(namcofl_state::dac0_r));
/* TODO: irq generation for these */
TIMER(config, "mcu_irq0").configure_periodic(FUNC(namcofl_state::mcu_irq0_cb), attotime::from_hz(60));
TIMER(config, "mcu_irq2").configure_periodic(FUNC(namcofl_state::mcu_irq2_cb), attotime::from_hz(60));

59
src/mame/drivers/namcona1.cpp
View File

@ -169,7 +169,6 @@ Notes:
#include "emu.h"
#include "includes/namcona1.h"
#include "cpu/m68000/m68000.h"
#include "machine/namcomcu.h"
#include "speaker.h"
#define MASTER_CLOCK XTAL(50'113'000)
@ -736,22 +735,10 @@ void namcona1_state::machine_reset()
// bit 2 => port 5
// bit 3 => port 6
// bit 7 => port 7
READ8_MEMBER(namcona1_state::portana_r)
template <int Bit>
uint16_t namcona1_state::portana_r()
{
static const uint8_t bitnum[8] = { 0x40, 0x20, 0x10, 0x01, 0x02, 0x04, 0x08, 0x80 };
uint8_t port = m_io_p3->read();
return (port & bitnum[offset>>1]) ? 0xff : 0x00;
}
void namcona1_state::namcona1_mcu_io_map(address_map &map)
{
map(M37710_PORT4, M37710_PORT4).rw(FUNC(namcona1_state::port4_r), FUNC(namcona1_state::port4_w));
map(M37710_PORT5, M37710_PORT5).rw(FUNC(namcona1_state::port5_r), FUNC(namcona1_state::port5_w));
map(M37710_PORT6, M37710_PORT6).rw(FUNC(namcona1_state::port6_r), FUNC(namcona1_state::port6_w));
map(M37710_PORT7, M37710_PORT7).rw(FUNC(namcona1_state::port7_r), FUNC(namcona1_state::port7_w));
map(M37710_PORT8, M37710_PORT8).rw(FUNC(namcona1_state::port8_r), FUNC(namcona1_state::port8_w));
map(0x10, 0x1f).r(FUNC(namcona1_state::portana_r));
return BIT(m_io_p3->read(), Bit) ? 0xffff : 0x0000;
}
@ -957,7 +944,24 @@ void namcona1_state::c69(machine_config &config)
{
NAMCO_C69(config, m_mcu, MASTER_CLOCK/4);
m_mcu->set_addrmap(AS_PROGRAM, &namcona1_state::namcona1_mcu_map);
m_mcu->set_addrmap(AS_IO, &namcona1_state::namcona1_mcu_io_map);
m_mcu->p4_in_cb().set(FUNC(namcona1_state::port4_r));
m_mcu->p4_out_cb().set(FUNC(namcona1_state::port4_w));
m_mcu->p5_in_cb().set(FUNC(namcona1_state::port5_r));
m_mcu->p5_out_cb().set(FUNC(namcona1_state::port5_w));
m_mcu->p6_in_cb().set(FUNC(namcona1_state::port6_r));
m_mcu->p6_out_cb().set(FUNC(namcona1_state::port6_w));
m_mcu->p7_in_cb().set(FUNC(namcona1_state::port7_r));
m_mcu->p7_out_cb().set(FUNC(namcona1_state::port7_w));
m_mcu->p8_in_cb().set(FUNC(namcona1_state::port8_r));
m_mcu->p8_out_cb().set(FUNC(namcona1_state::port8_w));
m_mcu->an0_cb().set(FUNC(namcona1_state::portana_r<6>));
m_mcu->an1_cb().set(FUNC(namcona1_state::portana_r<5>));
m_mcu->an2_cb().set(FUNC(namcona1_state::portana_r<4>));
m_mcu->an3_cb().set(FUNC(namcona1_state::portana_r<0>));
m_mcu->an4_cb().set(FUNC(namcona1_state::portana_r<1>));
m_mcu->an5_cb().set(FUNC(namcona1_state::portana_r<2>));
m_mcu->an6_cb().set(FUNC(namcona1_state::portana_r<3>));
m_mcu->an7_cb().set(FUNC(namcona1_state::portana_r<7>));
}
/* cropped at sides */
@ -1002,8 +1006,25 @@ void namcona1_state::namcona1(machine_config &config)
void namcona2_state::c70(machine_config &config)
{
NAMCO_C70(config, m_mcu, MASTER_CLOCK/4);
m_mcu->set_addrmap(AS_PROGRAM, &namcona1_state::namcona1_mcu_map);
m_mcu->set_addrmap(AS_IO, &namcona1_state::namcona1_mcu_io_map);
m_mcu->set_addrmap(AS_PROGRAM, &namcona2_state::namcona1_mcu_map);
m_mcu->p4_in_cb().set(FUNC(namcona2_state::port4_r));
m_mcu->p4_out_cb().set(FUNC(namcona2_state::port4_w));
m_mcu->p5_in_cb().set(FUNC(namcona2_state::port5_r));
m_mcu->p5_out_cb().set(FUNC(namcona2_state::port5_w));
m_mcu->p6_in_cb().set(FUNC(namcona2_state::port6_r));
m_mcu->p6_out_cb().set(FUNC(namcona2_state::port6_w));
m_mcu->p7_in_cb().set(FUNC(namcona2_state::port7_r));
m_mcu->p7_out_cb().set(FUNC(namcona2_state::port7_w));
m_mcu->p8_in_cb().set(FUNC(namcona2_state::port8_r));
m_mcu->p8_out_cb().set(FUNC(namcona2_state::port8_w));
m_mcu->an0_cb().set(FUNC(namcona2_state::portana_r<6>));
m_mcu->an1_cb().set(FUNC(namcona2_state::portana_r<5>));
m_mcu->an2_cb().set(FUNC(namcona2_state::portana_r<4>));
m_mcu->an3_cb().set(FUNC(namcona2_state::portana_r<0>));
m_mcu->an4_cb().set(FUNC(namcona2_state::portana_r<1>));
m_mcu->an5_cb().set(FUNC(namcona2_state::portana_r<2>));
m_mcu->an6_cb().set(FUNC(namcona2_state::portana_r<3>));
m_mcu->an7_cb().set(FUNC(namcona2_state::portana_r<7>));
}
void namcona2_state::namcona2(machine_config &config)

67
src/mame/drivers/namconb1.cpp
View File

@ -274,7 +274,6 @@ GFX: Custom 145 ( 80 pin PQFP)
#include "includes/namconb1.h"
#include "cpu/m68000/m68000.h"
#include "machine/namcomcu.h"
#include "sound/c352.h"
#include "speaker.h"
@ -797,58 +796,10 @@ READ8_MEMBER(namconb1_state::port7_r)
// Is this madness? No, this is Namco. They didn't have enough digital ports for all 4 players,
// so the 8 bits of player 3 got routed to the 8 analog inputs. +5V on the analog input will
// register full scale, so it works...
READ8_MEMBER(namconb1_state::dac7_r)// bit 7
template <int Bit>
uint16_t namconb1_state::dac_bit_r()
{
return m_p3.read_safe(0xff)&0x80;
}
READ8_MEMBER(namconb1_state::dac6_r)// bit 3
{
return (m_p3.read_safe(0xff)<<1)&0x80;
}
READ8_MEMBER(namconb1_state::dac5_r)// bit 2
{
return (m_p3.read_safe(0xff)<<2)&0x80;
}
READ8_MEMBER(namconb1_state::dac4_r)// bit 1
{
return (m_p3.read_safe(0xff)<<3)&0x80;
}
READ8_MEMBER(namconb1_state::dac3_r)// bit 0
{
return (m_p3.read_safe(0xff)<<4)&0x80;
}
READ8_MEMBER(namconb1_state::dac2_r)// bit 4
{
return (m_p3.read_safe(0xff)<<5)&0x80;
}
READ8_MEMBER(namconb1_state::dac1_r)// bit 5
{
return (m_p3.read_safe(0xff)<<6)&0x80;
}
READ8_MEMBER(namconb1_state::dac0_r)// bit 6
{
return (m_p3.read_safe(0xff)<<7)&0x80;
}
void namconb1_state::namcoc75_io(address_map &map)
{
map(M37710_PORT6, M37710_PORT6).rw(FUNC(namconb1_state::port6_r), FUNC(namconb1_state::port6_w));
map(M37710_PORT7, M37710_PORT7).r(FUNC(namconb1_state::port7_r));
map(M37710_ADC7_L, M37710_ADC7_L).r(FUNC(namconb1_state::dac7_r));
map(M37710_ADC6_L, M37710_ADC6_L).r(FUNC(namconb1_state::dac6_r));
map(M37710_ADC5_L, M37710_ADC5_L).r(FUNC(namconb1_state::dac5_r));
map(M37710_ADC4_L, M37710_ADC4_L).r(FUNC(namconb1_state::dac4_r));
map(M37710_ADC3_L, M37710_ADC3_L).r(FUNC(namconb1_state::dac3_r));
map(M37710_ADC2_L, M37710_ADC2_L).r(FUNC(namconb1_state::dac2_r));
map(M37710_ADC1_L, M37710_ADC1_L).r(FUNC(namconb1_state::dac1_r));
map(M37710_ADC0_L, M37710_ADC0_L).r(FUNC(namconb1_state::dac0_r));
return (m_p3.read_safe(0xff)<<(7-Bit))&0x80;
}
@ -1043,7 +994,17 @@ void namconb1_state::namconb1(machine_config &config)
NAMCO_C75(config, m_mcu, MASTER_CLOCK/3);
m_mcu->set_addrmap(AS_PROGRAM, &namconb1_state::namcoc75_am);
m_mcu->set_addrmap(AS_IO, &namconb1_state::namcoc75_io);
m_mcu->p6_in_cb().set(FUNC(namconb1_state::port6_r));
m_mcu->p6_out_cb().set(FUNC(namconb1_state::port6_w));
m_mcu->p7_in_cb().set(FUNC(namconb1_state::port7_r));
m_mcu->an7_cb().set(FUNC(namconb1_state::dac_bit_r<7>));
m_mcu->an6_cb().set(FUNC(namconb1_state::dac_bit_r<3>));
m_mcu->an5_cb().set(FUNC(namconb1_state::dac_bit_r<2>));
m_mcu->an4_cb().set(FUNC(namconb1_state::dac_bit_r<1>));
m_mcu->an3_cb().set(FUNC(namconb1_state::dac_bit_r<0>));
m_mcu->an2_cb().set(FUNC(namconb1_state::dac_bit_r<4>));
m_mcu->an1_cb().set(FUNC(namconb1_state::dac_bit_r<5>));
m_mcu->an0_cb().set(FUNC(namconb1_state::dac_bit_r<6>));
EEPROM_2816(config, "eeprom");

25
src/mame/drivers/namcos11.cpp
View File

@ -353,7 +353,6 @@ private:
TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq2_cb);
TIMER_DEVICE_CALLBACK_MEMBER(mcu_adc_cb);
void c76_io_map(address_map &map);
void c76_map(address_map &map);
void namcos11_map(address_map &map);
void ptblank2ua_map(address_map &map);
@ -364,7 +363,7 @@ private:
required_shared_ptr<uint16_t> m_sharedram;
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_mcu;
required_device<m37710_cpu_device> m_mcu;
optional_memory_region m_bankedroms;
optional_memory_bank_array<8> m_bank;
@ -535,19 +534,6 @@ void namcos11_state::c76_map(address_map &map)
map(0x301000, 0x301001).nopw();
}
void namcos11_state::c76_io_map(address_map &map)
{
map(M37710_ADC0_H, M37710_ADC7_H).nopr();
map(M37710_ADC0_L, M37710_ADC0_L).portr("ADC0");
map(M37710_ADC1_L, M37710_ADC1_L).portr("ADC1");
map(M37710_ADC2_L, M37710_ADC2_L).portr("ADC2");
map(M37710_ADC3_L, M37710_ADC3_L).portr("ADC3");
map(M37710_ADC4_L, M37710_ADC4_L).portr("ADC4");
map(M37710_ADC5_L, M37710_ADC5_L).portr("ADC5");
map(M37710_ADC6_L, M37710_ADC6_L).portr("ADC6");
map(M37710_ADC7_L, M37710_ADC7_L).portr("ADC7");
}
READ16_MEMBER(namcos11_state::c76_speedup_r)
{
if ((m_mcu->pc() == 0xc153) && (!(m_su_83 & 0xff00)))
@ -617,7 +603,14 @@ void namcos11_state::coh110(machine_config &config)
/* basic machine hardware */
NAMCO_C76(config, m_mcu, 16934400);
m_mcu->set_addrmap(AS_PROGRAM, &namcos11_state::c76_map);
m_mcu->set_addrmap(AS_IO, &namcos11_state::c76_io_map);
m_mcu->an0_cb().set_ioport("ADC0");
m_mcu->an1_cb().set_ioport("ADC1");
m_mcu->an2_cb().set_ioport("ADC2");
m_mcu->an3_cb().set_ioport("ADC3");
m_mcu->an4_cb().set_ioport("ADC4");
m_mcu->an5_cb().set_ioport("ADC5");
m_mcu->an6_cb().set_ioport("ADC6");
m_mcu->an7_cb().set_ioport("ADC7");
/* TODO: irq generation for these */
TIMER(config, "mcu_irq0").configure_periodic(FUNC(namcos11_state::mcu_irq0_cb), attotime::from_hz(60));

276
src/mame/drivers/namcos22.cpp
View File

@ -1194,7 +1194,6 @@
#include "cpu/m68000/m68000.h"
#include "cpu/tms32025/tms32025.h"
#include "machine/namcomcu.h"
#include "speaker.h"
// 51.2MHz XTAL on video board, pixel clock of 12.8MHz (doubled in MAME because of unemulated interlacing)
@ -1434,7 +1433,7 @@ WRITE8_MEMBER(namcos22_state::ss22_syscon_w)
00008bf0: sys[0x00] := 0x04 // vblank
00008bf8: sys[0x08] := 0xff // ?
*/
INTERRUPT_GEN_MEMBER(namcos22_state::namcos22s_interrupt)
INTERRUPT_GEN_MEMBER(namcos22s_state::namcos22s_interrupt)
{
// vblank irq
int line = 1 << 0;
@ -1735,7 +1734,7 @@ WRITE16_MEMBER(namcos22_state::namcos22_cpuleds_w)
m_cpuled[i] = (~data << i & 0x80) ? 0 : 1;
}
WRITE32_MEMBER(namcos22_state::namcos22s_chipselect_w)
WRITE32_MEMBER(namcos22s_state::namcos22s_chipselect_w)
{
// assume that this register is for chip enable/disable
// it's written many times during boot-up, and most games don't touch it afterwards (last value usually 0038 or 0838)
@ -1957,38 +1956,38 @@ void namcos22_state::namcos22_am(address_map &map)
// System Super22
void namcos22_state::namcos22s_am(address_map &map)
void namcos22s_state::namcos22s_am(address_map &map)
{
map(0x000000, 0x3fffff).rom();
map(0x400000, 0x40001f).rw(FUNC(namcos22_state::namcos22_keycus_r), FUNC(namcos22_state::namcos22_keycus_w));
map(0x400000, 0x40001f).rw(FUNC(namcos22s_state::namcos22_keycus_r), FUNC(namcos22s_state::namcos22_keycus_w));
map(0x410000, 0x413fff).ram(); // C139 SCI buffer
map(0x420000, 0x42000f).rw(FUNC(namcos22_state::namcos22_sci_r), FUNC(namcos22_state::namcos22_sci_w)); // C139 SCI registers
map(0x430000, 0x430003).w(FUNC(namcos22_state::namcos22_cpuleds_w)).umask32(0xffff0000);
map(0x440000, 0x440003).r(FUNC(namcos22_state::namcos22_dipswitch_r)).umask32(0xffff0000);
map(0x450008, 0x45000b).rw(FUNC(namcos22_state::namcos22_portbit_r), FUNC(namcos22_state::namcos22_portbit_w));
map(0x420000, 0x42000f).rw(FUNC(namcos22s_state::namcos22_sci_r), FUNC(namcos22s_state::namcos22_sci_w)); // C139 SCI registers
map(0x430000, 0x430003).w(FUNC(namcos22s_state::namcos22_cpuleds_w)).umask32(0xffff0000);
map(0x440000, 0x440003).r(FUNC(namcos22s_state::namcos22_dipswitch_r)).umask32(0xffff0000);
map(0x450008, 0x45000b).rw(FUNC(namcos22s_state::namcos22_portbit_r), FUNC(namcos22s_state::namcos22_portbit_w));
map(0x460000, 0x463fff).rw(m_eeprom, FUNC(eeprom_parallel_28xx_device::read), FUNC(eeprom_parallel_28xx_device::write)).umask32(0xff00ff00);
map(0x700000, 0x70001f).rw(FUNC(namcos22_state::syscon_r), FUNC(namcos22_state::ss22_syscon_w));
map(0x800000, 0x800003).w(FUNC(namcos22_state::namcos22s_chipselect_w));
map(0x810000, 0x81000f).rw(FUNC(namcos22_state::namcos22s_czattr_r), FUNC(namcos22_state::namcos22s_czattr_w));
map(0x810200, 0x8103ff).rw(FUNC(namcos22_state::namcos22s_czram_r), FUNC(namcos22_state::namcos22s_czram_w));
map(0x700000, 0x70001f).rw(FUNC(namcos22s_state::syscon_r), FUNC(namcos22s_state::ss22_syscon_w));
map(0x800000, 0x800003).w(FUNC(namcos22s_state::namcos22s_chipselect_w));
map(0x810000, 0x81000f).rw(FUNC(namcos22s_state::namcos22s_czattr_r), FUNC(namcos22s_state::namcos22s_czattr_w));
map(0x810200, 0x8103ff).rw(FUNC(namcos22s_state::namcos22s_czram_r), FUNC(namcos22s_state::namcos22s_czram_w));
map(0x820000, 0x8202ff).nopw(); // leftover of old (non-super) video mixer device
map(0x824000, 0x8243ff).ram().share("video_mixer");
map(0x828000, 0x83ffff).ram().w(FUNC(namcos22_state::namcos22_paletteram_w)).share("paletteram");
map(0x860000, 0x860007).rw(FUNC(namcos22_state::spotram_r), FUNC(namcos22_state::spotram_w));
map(0x880000, 0x89dfff).ram().w(FUNC(namcos22_state::namcos22_cgram_w)).share("cgram");
map(0x89e000, 0x89ffff).ram().w(FUNC(namcos22_state::namcos22_textram_w)).share("textram");
map(0x8a0000, 0x8a000f).rw(FUNC(namcos22_state::namcos22_tilemapattr_r), FUNC(namcos22_state::namcos22_tilemapattr_w));
map(0x828000, 0x83ffff).ram().w(FUNC(namcos22s_state::namcos22_paletteram_w)).share("paletteram");
map(0x860000, 0x860007).rw(FUNC(namcos22s_state::spotram_r), FUNC(namcos22s_state::spotram_w));
map(0x880000, 0x89dfff).ram().w(FUNC(namcos22s_state::namcos22_cgram_w)).share("cgram");
map(0x89e000, 0x89ffff).ram().w(FUNC(namcos22s_state::namcos22_textram_w)).share("textram");
map(0x8a0000, 0x8a000f).rw(FUNC(namcos22s_state::namcos22_tilemapattr_r), FUNC(namcos22s_state::namcos22_tilemapattr_w));
map(0x900000, 0x90ffff).ram().share("vics_data");
map(0x940000, 0x94007f).rw(FUNC(namcos22_state::namcos22s_vics_control_r), FUNC(namcos22_state::namcos22s_vics_control_w)).share("vics_control");
map(0x940000, 0x94007f).rw(FUNC(namcos22s_state::namcos22s_vics_control_r), FUNC(namcos22s_state::namcos22s_vics_control_w)).share("vics_control");
map(0x980000, 0x9affff).ram().share("spriteram"); // C374
map(0xa04000, 0xa0bfff).rw(FUNC(namcos22_state::namcos22_shared_r), FUNC(namcos22_state::namcos22_shared_w)); // COM RAM
map(0xc00000, 0xc1ffff).rw(FUNC(namcos22_state::namcos22_dspram_r), FUNC(namcos22_state::namcos22_dspram_w)).share("polygonram");
map(0xa04000, 0xa0bfff).rw(FUNC(namcos22s_state::namcos22_shared_r), FUNC(namcos22s_state::namcos22_shared_w)); // COM RAM
map(0xc00000, 0xc1ffff).rw(FUNC(namcos22s_state::namcos22_dspram_r), FUNC(namcos22s_state::namcos22_dspram_w)).share("polygonram");
map(0xe00000, 0xe3ffff).ram(); // workram
}
// Time Crisis gun
READ16_MEMBER(namcos22_state::namcos22_gun_r)
READ16_MEMBER(namcos22s_state::timecris_gun_r)
{
u16 xpos = m_opt[0]->read();
u16 ypos = m_opt[1]->read();
@ -2017,20 +2016,20 @@ READ16_MEMBER(namcos22_state::namcos22_gun_r)
}
}
void namcos22_state::timecris_am(address_map &map)
void namcos22s_state::timecris_am(address_map &map)
{
namcos22s_am(map);
map(0x430000, 0x43000f).r(FUNC(namcos22_state::namcos22_gun_r)).umask32(0xffff0000);
map(0x430000, 0x43000f).r(FUNC(namcos22s_state::timecris_gun_r)).umask32(0xffff0000);
}
// Alpine Surfer protection
READ32_MEMBER(namcos22_state::alpinesa_prot_r)
READ32_MEMBER(namcos22s_state::alpinesa_prot_r)
{
return m_alpinesa_protection;
}
WRITE32_MEMBER(namcos22_state::alpinesa_prot_w)
WRITE32_MEMBER(namcos22s_state::alpinesa_prot_w)
{
switch (data)
{
@ -2051,11 +2050,11 @@ WRITE32_MEMBER(namcos22_state::alpinesa_prot_w)
}
}
void namcos22_state::alpinesa_am(address_map &map)
void namcos22s_state::alpinesa_am(address_map &map)
{
namcos22s_am(map);
map(0x200000, 0x200003).r(FUNC(namcos22_state::alpinesa_prot_r));
map(0x300000, 0x300003).w(FUNC(namcos22_state::alpinesa_prot_w));
map(0x200000, 0x200003).r(FUNC(namcos22s_state::alpinesa_prot_r));
map(0x300000, 0x300003).w(FUNC(namcos22s_state::alpinesa_prot_w));
}
@ -2727,21 +2726,10 @@ void namcos22_state::iomcu_s22_program(address_map &map)
// is there any external memory or MMIO on this one?
}
void namcos22_state::mcu_s22_io(address_map &map)
{
map(M37710_PORT4, M37710_PORT4).r(FUNC(namcos22_state::mcu_port4_s22_r));
}
void namcos22_state::iomcu_s22_io(address_map &map)
{
map(M37710_PORT4, M37710_PORT4).r(FUNC(namcos22_state::iomcu_port4_s22_r));
map(0x00, 0xff).noprw();
}
// System Super22 M37710
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::mcu_irq)
TIMER_DEVICE_CALLBACK_MEMBER(namcos22s_state::mcu_irq)
{
int scanline = param;
@ -2754,7 +2742,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::mcu_irq)
m_mcu->set_input_line(M37710_LINE_IRQ2, HOLD_LINE);
}
WRITE8_MEMBER(namcos22_state::mb87078_gain_changed)
WRITE8_MEMBER(namcos22s_state::mb87078_gain_changed)
{
m_c352->set_output_gain(offset ^ 3, data / 100.0);
}
@ -2817,7 +2805,7 @@ WRITE8_MEMBER(namcos22_state::mb87078_gain_changed)
other: ?
*/
WRITE8_MEMBER(namcos22_state::mcu_port4_w)
WRITE8_MEMBER(namcos22s_state::mcu_port4_w)
{
// d3: input port select for port 5
// d4: port 5 direction?
@ -2839,40 +2827,40 @@ WRITE8_MEMBER(namcos22_state::mcu_port4_w)
m_mcu_iocontrol = data;
}
READ8_MEMBER(namcos22_state::mcu_port4_r)
READ8_MEMBER(namcos22s_state::mcu_port4_r)
{
return m_mcu_iocontrol;
}
WRITE8_MEMBER(namcos22_state::mcu_port5_w)
WRITE8_MEMBER(namcos22s_state::mcu_port5_w)
{
m_mcu_outdata = data;
}
READ8_MEMBER(namcos22_state::mcu_port5_r)
READ8_MEMBER(namcos22s_state::mcu_port5_r)
{
u16 inputs = m_inputs->read();
return (m_mcu_iocontrol & 8) ? inputs & 0xff : inputs >> 8;
}
WRITE8_MEMBER(namcos22_state::mcu_port6_w)
WRITE8_MEMBER(namcos22s_state::mcu_port6_w)
{
// always 2?
}
READ8_MEMBER(namcos22_state::mcu_port6_r)
READ8_MEMBER(namcos22s_state::mcu_port6_r)
{
// discarded
return 0;
}
READ8_MEMBER(namcos22_state::namcos22s_mcu_adc_r)
template <int Channel>
u16 namcos22s_state::mcu_adc_r(offs_t offset)
{
u16 adc = m_adc_ports[offset >> 1 & 7].read_safe(0);
return (offset & 1) ? adc >> 8 : adc;
return m_adc_ports[offset].read_safe(0);
}
void namcos22_state::mcu_program(address_map &map)
void namcos22s_state::mcu_program(address_map &map)
{
map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write));
map(0x004000, 0x00bfff).ram().share("shareram");
@ -2883,14 +2871,6 @@ void namcos22_state::mcu_program(address_map &map)
map(0x308000, 0x308003).w("mb87078", FUNC(mb87078_device::data_w)).umask16(0x00ff);
}
void namcos22_state::mcu_io(address_map &map)
{
map(M37710_PORT4, M37710_PORT4).rw(FUNC(namcos22_state::mcu_port4_r), FUNC(namcos22_state::mcu_port4_w));
map(M37710_PORT5, M37710_PORT5).rw(FUNC(namcos22_state::mcu_port5_r), FUNC(namcos22_state::mcu_port5_w));
map(M37710_PORT6, M37710_PORT6).rw(FUNC(namcos22_state::mcu_port6_r), FUNC(namcos22_state::mcu_port6_w));
map(M37710_ADC0_L, M37710_ADC7_H).r(FUNC(namcos22_state::namcos22s_mcu_adc_r));
}
/*********************************************************************************************/
@ -2985,12 +2965,12 @@ void namcos22_state::handle_cybrcomm_io()
// Alpine skiing games
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::alpine_steplock_callback)
TIMER_DEVICE_CALLBACK_MEMBER(namcos22s_state::alpine_steplock_callback)
{
m_motor_status = param;
}
WRITE8_MEMBER(namcos22_state::alpine_mcu_port4_w)
WRITE8_MEMBER(namcos22s_state::alpine_mcu_port4_w)
{
if (~m_mcu_iocontrol & data & 0x20)
{
@ -3018,22 +2998,16 @@ WRITE8_MEMBER(namcos22_state::alpine_mcu_port4_w)
mcu_port4_w(space, offset, data);
}
void namcos22_state::alpine_io_map(address_map &map)
{
mcu_io(map);
map(M37710_PORT4, M37710_PORT4).w(FUNC(namcos22_state::alpine_mcu_port4_w));
}
// Prop Cycle
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_interrupt)
TIMER_DEVICE_CALLBACK_MEMBER(namcos22s_state::propcycl_pedal_interrupt)
{
m_mcu->set_input_line(M37710_LINE_TIMERA3OUT, param ? ASSERT_LINE : CLEAR_LINE);
m_mcu->pulse_input_line(M37710_LINE_TIMERA3IN, m_mcu->minimum_quantum_time());
}
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_update)
TIMER_DEVICE_CALLBACK_MEMBER(namcos22s_state::propcycl_pedal_update)
{
// arbitrary timer for reading optical pedal
int pedal = m_opt[0]->read() - 0x80;
@ -3063,13 +3037,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_update)
// Armadillo Racing
TIMER_CALLBACK_MEMBER(namcos22_state::adillor_trackball_interrupt)
TIMER_CALLBACK_MEMBER(namcos22s_state::adillor_trackball_interrupt)
{
m_mcu->set_input_line((param & 1) ? M37710_LINE_TIMERA2OUT : M37710_LINE_TIMERA3OUT, (param & 2) ? ASSERT_LINE : CLEAR_LINE);
m_mcu->pulse_input_line((param & 1) ? M37710_LINE_TIMERA2IN : M37710_LINE_TIMERA3IN, m_mcu->minimum_quantum_time());
}
TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::adillor_trackball_update)
TIMER_DEVICE_CALLBACK_MEMBER(namcos22s_state::adillor_trackball_update)
{
// arbitrary timer for reading optical trackball
// -1.0 .. 1.0
@ -3363,7 +3337,7 @@ INPUT_PORTS_END
/*********************************************************************************************/
CUSTOM_INPUT_MEMBER(namcos22_state::alpine_motor_read)
CUSTOM_INPUT_MEMBER(namcos22s_state::alpine_motor_read)
{
return m_motor_status >> (uintptr_t)param & 1;
}
@ -3377,8 +3351,8 @@ static INPUT_PORTS_START( alpiner )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START1 ) // Decision / View Change
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_16WAY // L Selection
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_16WAY // R Selection
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, namcos22_state, alpine_motor_read, 0) // steps are free
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, namcos22_state, alpine_motor_read, 1) // steps are locked
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, namcos22s_state, alpine_motor_read, 0) // steps are free
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, namcos22s_state, alpine_motor_read, 1) // steps are locked
PORT_BIT( 0xfe00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("ADC.0")
@ -3792,7 +3766,6 @@ void namcos22_state::machine_start()
m_keycus_rng = 0;
m_su_82 = 0;
m_irq_state = 0;
m_mcu_iocontrol = 0;
m_old_coin_state = 0;
m_credits1 = m_credits2 = 0;
@ -3830,16 +3803,9 @@ void namcos22_state::machine_start()
save_item(NAME(m_irq_enabled));
save_item(NAME(m_dsp_upload_state));
save_item(NAME(m_UploadDestIdx));
save_item(NAME(m_alpinesa_protection));
save_item(NAME(m_motor_status));
save_item(NAME(m_mcu_iocontrol));
save_item(NAME(m_mcu_outdata));
save_item(NAME(m_su_82));
save_item(NAME(m_keycus_id));
save_item(NAME(m_keycus_rng));
save_item(NAME(m_chipselect));
save_item(NAME(m_spotram_enable));
save_item(NAME(m_spotram_address));
save_item(NAME(m_cz_adjust));
save_item(NAME(m_dspram_bank));
save_item(NAME(m_dspram16_latch));
@ -3876,6 +3842,21 @@ void namcos22_state::machine_start()
save_item(NAME(m_pdp_base));
}
void namcos22s_state::machine_start()
{
namcos22_state::machine_start();
m_mcu_iocontrol = 0;
save_item(NAME(m_spotram_enable));
save_item(NAME(m_spotram_address));
save_item(NAME(m_alpinesa_protection));
save_item(NAME(m_motor_status));
save_item(NAME(m_mcu_iocontrol));
save_item(NAME(m_mcu_outdata));
save_item(NAME(m_chipselect));
}
// System22
void namcos22_state::namcos22(machine_config &config)
{
@ -3908,11 +3889,11 @@ void namcos22_state::namcos22(machine_config &config)
NAMCO_C74(config, m_mcu, 49.152_MHz_XTAL/3); // C74 on the CPU board has no periodic interrupts, it runs entirely off Timer A0
m_mcu->set_addrmap(AS_PROGRAM, &namcos22_state::mcu_s22_program);
m_mcu->set_addrmap(AS_IO, &namcos22_state::mcu_s22_io);
m_mcu->p4_in_cb().set(FUNC(namcos22_state::mcu_port4_s22_r));
NAMCO_C74(config, m_iomcu, 6.144_MHz_XTAL);
m_iomcu->set_addrmap(AS_PROGRAM, &namcos22_state::iomcu_s22_program);
m_iomcu->set_addrmap(AS_IO, &namcos22_state::iomcu_s22_io);
m_iomcu->p4_in_cb().set(FUNC(namcos22_state::iomcu_port4_s22_r));
EEPROM_2864(config, "eeprom").write_time(attotime::zero);
@ -3947,33 +3928,42 @@ void namcos22_state::cybrcomm(machine_config &config)
}
// System Super22
void namcos22_state::namcos22s(machine_config &config)
void namcos22s_state::namcos22s(machine_config &config)
{
namcos22(config);
/* basic machine hardware */
M68EC020(config.replace(), m_maincpu, 49.152_MHz_XTAL/2); // MC68EC020FG25
m_maincpu->set_addrmap(AS_PROGRAM, &namcos22_state::namcos22s_am);
m_maincpu->set_vblank_int("screen", FUNC(namcos22_state::namcos22s_interrupt));
m_maincpu->set_addrmap(AS_PROGRAM, &namcos22s_state::namcos22s_am);
m_maincpu->set_vblank_int("screen", FUNC(namcos22s_state::namcos22s_interrupt));
M37710S4(config.replace(), m_mcu, 49.152_MHz_XTAL/3);
m_mcu->set_addrmap(AS_PROGRAM, &namcos22_state::mcu_program);
m_mcu->set_addrmap(AS_IO, &namcos22_state::mcu_io);
TIMER(config, "mcu_irq").configure_scanline(FUNC(namcos22_state::mcu_irq), "screen", 0, 240);
m_mcu->set_addrmap(AS_PROGRAM, &namcos22s_state::mcu_program);
m_mcu->p4_in_cb().set(FUNC(namcos22s_state::mcu_port4_r));
m_mcu->p4_out_cb().set(FUNC(namcos22s_state::mcu_port4_w));
m_mcu->p5_in_cb().set(FUNC(namcos22s_state::mcu_port5_r));
m_mcu->p5_out_cb().set(FUNC(namcos22s_state::mcu_port5_w));
m_mcu->p6_in_cb().set(FUNC(namcos22s_state::mcu_port6_r));
m_mcu->p6_out_cb().set(FUNC(namcos22s_state::mcu_port6_w));
m_mcu->an0_cb().set(FUNC(namcos22s_state::mcu_adc_r<0>));
m_mcu->an1_cb().set(FUNC(namcos22s_state::mcu_adc_r<1>));
m_mcu->an2_cb().set(FUNC(namcos22s_state::mcu_adc_r<2>));
m_mcu->an3_cb().set(FUNC(namcos22s_state::mcu_adc_r<3>));
TIMER(config, "mcu_irq").configure_scanline(FUNC(namcos22s_state::mcu_irq), "screen", 0, 240);
config.m_minimum_quantum = attotime::from_hz(9000); // erratic inputs otherwise, probably mcu vs maincpu shareram
config.device_remove("iomcu");
MB87078(config, m_mb87078);
m_mb87078->gain_changed().set(FUNC(namcos22_state::mb87078_gain_changed));
m_mb87078->gain_changed().set(FUNC(namcos22s_state::mb87078_gain_changed));
/* video hardware */
m_screen->set_screen_update(FUNC(namcos22_state::screen_update_namcos22s));
m_screen->set_screen_update(FUNC(namcos22s_state::screen_update_namcos22s));
GFXDECODE(config.replace(), m_gfxdecode, m_palette, gfx_super);
}
void namcos22_state::airco22b(machine_config &config)
void namcos22s_state::airco22b(machine_config &config)
{
namcos22s(config);
@ -3982,23 +3972,23 @@ void namcos22_state::airco22b(machine_config &config)
m_c352->add_route(2, "bodysonic", 0.50); // to subwoofer
}
void namcos22_state::alpine(machine_config &config)
void namcos22s_state::alpine(machine_config &config)
{
namcos22s(config);
m_mcu->set_addrmap(AS_IO, &namcos22_state::alpine_io_map);
m_mcu->p4_out_cb().set(FUNC(namcos22s_state::alpine_mcu_port4_w));
TIMER(config, m_motor_timer).configure_generic(FUNC(namcos22_state::alpine_steplock_callback));
TIMER(config, m_motor_timer).configure_generic(FUNC(namcos22s_state::alpine_steplock_callback));
}
void namcos22_state::alpinesa(machine_config &config)
void namcos22s_state::alpinesa(machine_config &config)
{
alpine(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos22_state::alpinesa_am);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos22s_state::alpinesa_am);
}
void namcos22_state::cybrcycc(machine_config &config)
void namcos22s_state::cybrcycc(machine_config &config)
{
namcos22s(config);
@ -4007,7 +3997,7 @@ void namcos22_state::cybrcycc(machine_config &config)
m_c352->add_route(2, "tank", 1.00);
}
void namcos22_state::dirtdash(machine_config &config)
void namcos22s_state::dirtdash(machine_config &config)
{
namcos22s(config);
@ -4016,14 +4006,14 @@ void namcos22_state::dirtdash(machine_config &config)
m_c352->add_route(3, "road", 1.00);
}
void namcos22_state::timecris(machine_config &config)
void namcos22s_state::timecris(machine_config &config)
{
namcos22s(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos22_state::timecris_am);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos22s_state::timecris_am);
}
void namcos22_state::tokyowar(machine_config &config)
void namcos22s_state::tokyowar(machine_config &config)
{
namcos22s(config);
@ -4034,28 +4024,28 @@ void namcos22_state::tokyowar(machine_config &config)
m_c352->add_route(3, "seat", 1.00);
}
void namcos22_state::propcycl(machine_config &config)
void namcos22s_state::propcycl(machine_config &config)
{
namcos22s(config);
TIMER(config, "pc_p_upd").configure_periodic(FUNC(namcos22_state::propcycl_pedal_update), attotime::from_msec(20));
TIMER(config, m_pc_pedal_interrupt).configure_generic(FUNC(namcos22_state::propcycl_pedal_interrupt));
TIMER(config, "pc_p_upd").configure_periodic(FUNC(namcos22s_state::propcycl_pedal_update), attotime::from_msec(20));
TIMER(config, m_pc_pedal_interrupt).configure_generic(FUNC(namcos22s_state::propcycl_pedal_interrupt));
}
MACHINE_START_MEMBER(namcos22_state,adillor)
MACHINE_START_MEMBER(namcos22s_state,adillor)
{
machine_start();
for (auto & elem : m_ar_tb_interrupt)
elem = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namcos22_state::adillor_trackball_interrupt),this));
elem = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namcos22s_state::adillor_trackball_interrupt),this));
}
void namcos22_state::adillor(machine_config &config)
void namcos22s_state::adillor(machine_config &config)
{
namcos22s(config);
TIMER(config, "ar_tb_upd").configure_periodic(FUNC(namcos22_state::adillor_trackball_update), attotime::from_msec(20));
MCFG_MACHINE_START_OVERRIDE(namcos22_state,adillor)
TIMER(config, "ar_tb_upd").configure_periodic(FUNC(namcos22s_state::adillor_trackball_update), attotime::from_msec(20));
MCFG_MACHINE_START_OVERRIDE(namcos22s_state,adillor)
}
@ -5614,7 +5604,7 @@ ROM_END
// MCU speed cheats (every bit helps with these games)
// for MCU BIOS v1.41
READ16_MEMBER(namcos22_state::mcu141_speedup_r)
READ16_MEMBER(namcos22s_state::mcu141_speedup_r)
{
if ((m_mcu->pc() == 0xc12d) && (!(m_su_82 & 0xff00)))
{
@ -5630,7 +5620,7 @@ WRITE16_MEMBER(namcos22_state::mcu_speedup_w)
}
// for MCU BIOS v1.20/v1.30
READ16_MEMBER(namcos22_state::mcu130_speedup_r)
READ16_MEMBER(namcos22s_state::mcu130_speedup_r)
{
if ((m_mcu->pc() == 0xc12a) && (!(m_su_82 & 0xff00)))
{
@ -5657,18 +5647,18 @@ void namcos22_state::install_c74_speedup()
m_mcu->space(AS_PROGRAM).install_readwrite_handler(0x80, 0x81, read16_delegate(FUNC(namcos22_state::mcuc74_speedup_r),this), write16_delegate(FUNC(namcos22_state::mcu_speedup_w),this));
}
void namcos22_state::install_130_speedup()
void namcos22s_state::install_130_speedup()
{
// install speedup cheat for 1.20/1.30 MCU BIOS
if (MCU_SPEEDUP)
m_mcu->space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos22_state::mcu130_speedup_r),this), write16_delegate(FUNC(namcos22_state::mcu_speedup_w),this));
m_mcu->space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos22s_state::mcu130_speedup_r),this), write16_delegate(FUNC(namcos22s_state::mcu_speedup_w),this));
}
void namcos22_state::install_141_speedup()
void namcos22s_state::install_141_speedup()
{
// install speedup cheat for 1.41 MCU BIOS
if (MCU_SPEEDUP)
m_mcu->space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos22_state::mcu141_speedup_r),this), write16_delegate(FUNC(namcos22_state::mcu_speedup_w),this));
m_mcu->space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos22s_state::mcu141_speedup_r),this), write16_delegate(FUNC(namcos22s_state::mcu_speedup_w),this));
}
@ -5711,7 +5701,7 @@ void namcos22_state::init_cybrcomm()
install_c74_speedup();
}
void namcos22_state::init_alpiner()
void namcos22s_state::init_alpiner()
{
m_gametype = NAMCOS22_ALPINE_RACER;
install_130_speedup();
@ -5719,7 +5709,7 @@ void namcos22_state::init_alpiner()
m_motor_status = 2;
}
void namcos22_state::init_alpiner2()
void namcos22s_state::init_alpiner2()
{
m_gametype = NAMCOS22_ALPINE_RACER_2;
install_130_speedup();
@ -5727,7 +5717,7 @@ void namcos22_state::init_alpiner2()
m_motor_status = 2;
}
void namcos22_state::init_alpinesa()
void namcos22s_state::init_alpinesa()
{
m_gametype = NAMCOS22_ALPINE_SURFER;
install_141_speedup();
@ -5735,13 +5725,13 @@ void namcos22_state::init_alpinesa()
m_motor_status = 2;
}
void namcos22_state::init_airco22()
void namcos22s_state::init_airco22()
{
m_gametype = NAMCOS22_AIR_COMBAT22;
install_130_speedup(); // S22-BIOS ver1.20 namco all rights reserved 94/12/21
}
void namcos22_state::init_propcycl()
void namcos22s_state::init_propcycl()
{
u32 *ROM = (u32 *)memregion("maincpu")->base();
@ -5765,37 +5755,37 @@ void namcos22_state::init_propcycl()
install_141_speedup();
}
void namcos22_state::init_cybrcyc()
void namcos22s_state::init_cybrcyc()
{
m_gametype = NAMCOS22_CYBER_CYCLES;
install_130_speedup();
}
void namcos22_state::init_timecris()
void namcos22s_state::init_timecris()
{
m_gametype = NAMCOS22_TIME_CRISIS;
install_130_speedup();
}
void namcos22_state::init_tokyowar()
void namcos22s_state::init_tokyowar()
{
m_gametype = NAMCOS22_TOKYO_WARS;
install_141_speedup();
}
void namcos22_state::init_aquajet()
void namcos22s_state::init_aquajet()
{
m_gametype = NAMCOS22_AQUA_JET;
install_141_speedup();
}
void namcos22_state::init_adillor()
void namcos22s_state::init_adillor()
{
m_gametype = NAMCOS22_ARMADILLO_RACING;
install_141_speedup();
}
void namcos22_state::init_dirtdash()
void namcos22s_state::init_dirtdash()
{
m_gametype = NAMCOS22_DIRT_DASH;
install_141_speedup();
@ -5824,17 +5814,17 @@ GAME( 1996, victlapw, 0, namcos22, victlap, namcos22_state, init_vict
GAME( 1996, victlapj, victlapw, namcos22, victlap, namcos22_state, init_victlap, ROT0, "Namco", "Ace Driver: Victory Lap (Rev. ADV1, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/02/13 17:29:10
// System Super22 games
GAME( 1994, alpinerd, 0, alpine, alpiner, namcos22_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.D, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, alpinerc, alpinerd, alpine, alpiner, namcos22_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.C, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1995, airco22b, 0, airco22b, airco22, namcos22_state, init_airco22, ROT0, "Namco", "Air Combat 22 (Rev. ACS1 Ver.B, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1995, cybrcycc, 0, cybrcycc, cybrcycc, namcos22_state, init_cybrcyc, ROT0, "Namco", "Cyber Cycles (Rev. CB2 Ver.C, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 95/04/04
GAME( 1995, dirtdash, 0, dirtdash, dirtdash, namcos22_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (Rev. DT2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 95/12/20 20:01:56
GAME( 1995, timecris, 0, timecris, timecris, namcos22_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/04/02 18:48:00
GAME( 1995, timecrisa,timecris, timecris, timecris, namcos22_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/01/08 18:56:09
GAME( 1996, propcycl, 0, propcycl, propcycl, namcos22_state, init_propcycl, ROT0, "Namco", "Prop Cycle (Rev. PR2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/06/18 21:22:13
GAME( 1996, alpinesa, 0, alpinesa, alpiner, namcos22_state, init_alpinesa, ROT0, "Namco", "Alpine Surfer (Rev. AF2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // 96/07/01 15:19:23. major problems, protection?
GAME( 1996, tokyowar, 0, tokyowar, tokyowar, namcos22_state, init_tokyowar, ROT0, "Namco", "Tokyo Wars (Rev. TW2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/09/03 14:08:47
GAME( 1996, aquajet, 0, cybrcycc, aquajet, namcos22_state, init_aquajet, ROT0, "Namco", "Aqua Jet (Rev. AJ2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/09/20 14:28:30
GAME( 1996, alpinr2b, 0, alpine, alpiner, namcos22_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 97/01/10 17:10:59
GAME( 1996, alpinr2a, alpinr2b, alpine, alpiner, namcos22_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/12/06 13:45:05
GAME( 1997, adillor, 0, adillor, adillor, namcos22_state, init_adillor, ROT0, "Namco", "Armadillo Racing (Rev. AM1 Ver.A, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 97/04/07 19:19:41
GAME( 1994, alpinerd, 0, alpine, alpiner, namcos22s_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.D, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1994, alpinerc, alpinerd, alpine, alpiner, namcos22s_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.C, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1995, airco22b, 0, airco22b, airco22, namcos22s_state, init_airco22, ROT0, "Namco", "Air Combat 22 (Rev. ACS1 Ver.B, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1995, cybrcycc, 0, cybrcycc, cybrcycc, namcos22s_state, init_cybrcyc, ROT0, "Namco", "Cyber Cycles (Rev. CB2 Ver.C, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 95/04/04
GAME( 1995, dirtdash, 0, dirtdash, dirtdash, namcos22s_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (Rev. DT2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 95/12/20 20:01:56
GAME( 1995, timecris, 0, timecris, timecris, namcos22s_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/04/02 18:48:00
GAME( 1995, timecrisa,timecris, timecris, timecris, namcos22s_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/01/08 18:56:09
GAME( 1996, propcycl, 0, propcycl, propcycl, namcos22s_state, init_propcycl, ROT0, "Namco", "Prop Cycle (Rev. PR2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/06/18 21:22:13
GAME( 1996, alpinesa, 0, alpinesa, alpiner, namcos22s_state, init_alpinesa, ROT0, "Namco", "Alpine Surfer (Rev. AF2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // 96/07/01 15:19:23. major problems, protection?
GAME( 1996, tokyowar, 0, tokyowar, tokyowar, namcos22s_state, init_tokyowar, ROT0, "Namco", "Tokyo Wars (Rev. TW2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/09/03 14:08:47
GAME( 1996, aquajet, 0, cybrcycc, aquajet, namcos22s_state, init_aquajet, ROT0, "Namco", "Aqua Jet (Rev. AJ2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/09/20 14:28:30
GAME( 1996, alpinr2b, 0, alpine, alpiner, namcos22s_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 97/01/10 17:10:59
GAME( 1996, alpinr2a, alpinr2b, alpine, alpiner, namcos22s_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/12/06 13:45:05
GAME( 1997, adillor, 0, adillor, adillor, namcos22s_state, init_adillor, ROT0, "Namco", "Armadillo Racing (Rev. AM1 Ver.A, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 97/04/07 19:19:41

4
src/mame/includes/namcofl.h
View File

@ -1,6 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont, ElSemi
#include "machine/namcomcu.h"
#include "machine/timer.h"
#include "screen.h"
#include "video/namco_c123tmap.h"
@ -49,7 +50,7 @@ private:
required_device<namco_c123tmap_device> m_c123tmap;
required_device<namco_c169roz_device> m_c169roz;
required_device<namco_c355spr_device> m_c355spr;
required_device<cpu_device> m_mcu;
required_device<m37710_cpu_device> m_mcu;
required_ioport m_in0;
required_ioport m_in1;
required_ioport m_in2;
@ -98,6 +99,5 @@ private:
void TilemapCB(uint16_t code, int *tile, int *mask);
void RozCB(uint16_t code, int *tile, int *mask, int which);
void namcoc75_am(address_map &map);
void namcoc75_io(address_map &map);
void namcofl_mem(address_map &map);
};

6
src/mame/includes/namcona1.h
View File

@ -11,6 +11,7 @@
#pragma once
#include "machine/eeprompar.h"
#include "machine/namcomcu.h"
#include "machine/timer.h"
#include "machine/msm6242.h"
#include "sound/c140.h"
@ -56,7 +57,6 @@ public:
void init_emeraldj();
void init_swcourtb();
void namcona1_mcu_io_map(address_map &map);
void namcona1_mcu_map(address_map &map);
protected:
@ -78,7 +78,7 @@ protected:
DECLARE_WRITE8_MEMBER(port7_w);
DECLARE_READ8_MEMBER(port8_r);
DECLARE_WRITE8_MEMBER(port8_w);
DECLARE_READ8_MEMBER(portana_r);
template <int Bit> uint16_t portana_r();
DECLARE_WRITE16_MEMBER(videoram_w);
DECLARE_WRITE16_MEMBER(paletteram_w);
DECLARE_READ16_MEMBER(gfxram_r);
@ -120,7 +120,7 @@ protected:
int m_gametype;
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_mcu;
required_device<m37710_cpu_device> m_mcu;
required_device<gfxdecode_device> m_gfxdecode;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;

13
src/mame/includes/namconb1.h
View File

@ -11,6 +11,7 @@
#pragma once
#include "machine/eeprompar.h"
#include "machine/namcomcu.h"
#include "machine/timer.h"
#include "screen.h"
#include "video/namco_c116.h"
@ -92,7 +93,7 @@ private:
required_device<namco_c355spr_device> m_c355spr;
optional_device<namco_c169roz_device> m_c169roz; // NB1 only, not NA1
required_device<screen_device> m_screen;
required_device<cpu_device> m_mcu;
required_device<m37710_cpu_device> m_mcu;
required_device<eeprom_parallel_28xx_device> m_eeprom;
required_ioport m_p1;
required_ioport m_p2;
@ -129,14 +130,7 @@ private:
DECLARE_READ8_MEMBER(port6_r);
DECLARE_WRITE8_MEMBER(port6_w);
DECLARE_READ8_MEMBER(port7_r);
DECLARE_READ8_MEMBER(dac7_r);
DECLARE_READ8_MEMBER(dac6_r);
DECLARE_READ8_MEMBER(dac5_r);
DECLARE_READ8_MEMBER(dac4_r);
DECLARE_READ8_MEMBER(dac3_r);
DECLARE_READ8_MEMBER(dac2_r);
DECLARE_READ8_MEMBER(dac1_r);
DECLARE_READ8_MEMBER(dac0_r);
template <int Bit> uint16_t dac_bit_r();
DECLARE_WRITE32_MEMBER(rozbank32_w);
virtual void machine_start() override;
@ -162,7 +156,6 @@ private:
void NB2RozCB_machbrkr(uint16_t code, int *tile, int *mask, int which);
void NB2RozCB_outfxies(uint16_t code, int *tile, int *mask, int which);
void namcoc75_am(address_map &map);
void namcoc75_io(address_map &map);
void namconb1_am(address_map &map);
void namconb2_am(address_map &map);
};

200
src/mame/includes/namcos22.h
View File

@ -13,6 +13,7 @@
#include "machine/eeprompar.h"
#include "machine/mb87078.h"
#include "machine/namcomcu.h"
#include "machine/timer.h"
#include "sound/c352.h"
#include "video/rgbutil.h"
@ -209,8 +210,6 @@ public:
m_gamma_proms(*this, "gamma_proms"),
m_vics_data(*this, "vics_data"),
m_vics_control(*this, "vics_control"),
m_motor_timer(*this, "motor_timer"),
m_pc_pedal_interrupt(*this, "pc_p_int"),
m_screen(*this, "screen"),
m_adc_ports(*this, "ADC.%u", 0),
m_dsw(*this, "DSW"),
@ -221,38 +220,15 @@ public:
m_cpuled(*this, "cpuled%u", 0U)
{ }
void namcos22s(machine_config &config);
void propcycl(machine_config &config);
void dirtdash(machine_config &config);
void airco22b(machine_config &config);
void cybrcycc(machine_config &config);
void tokyowar(machine_config &config);
void cybrcomm(machine_config &config);
void alpine(machine_config &config);
void alpinesa(machine_config &config);
void adillor(machine_config &config);
void timecris(machine_config &config);
void namcos22(machine_config &config);
void init_acedrvr();
void init_aquajet();
void init_adillor();
void init_cybrcyc();
void init_raveracw();
void init_ridger2j();
void init_victlap();
void init_cybrcomm();
void init_timecris();
void init_tokyowar();
void init_propcycl();
void init_alpiner2();
void init_dirtdash();
void init_airco22();
void init_alpiner();
void init_ridgeraj();
void init_alpinesa();
DECLARE_CUSTOM_INPUT_MEMBER(alpine_motor_read);
// renderer
int m_poly_translucency;
@ -291,18 +267,10 @@ protected:
virtual void video_start() override;
virtual void device_post_load() override;
private:
DECLARE_WRITE16_MEMBER(namcos22s_czattr_w);
DECLARE_READ16_MEMBER(namcos22s_czattr_r);
DECLARE_WRITE32_MEMBER(namcos22s_czram_w);
DECLARE_READ32_MEMBER(namcos22s_czram_r);
DECLARE_READ32_MEMBER(namcos22s_vics_control_r);
DECLARE_WRITE32_MEMBER(namcos22s_vics_control_w);
//private:
DECLARE_WRITE32_MEMBER(namcos22_textram_w);
DECLARE_READ16_MEMBER(namcos22_tilemapattr_r);
DECLARE_WRITE16_MEMBER(namcos22_tilemapattr_w);
DECLARE_READ16_MEMBER(spotram_r);
DECLARE_WRITE16_MEMBER(spotram_w);
DECLARE_READ32_MEMBER(namcos22_dspram_r);
DECLARE_WRITE32_MEMBER(namcos22_dspram_w);
DECLARE_WRITE32_MEMBER(namcos22_cgram_w);
@ -350,26 +318,11 @@ private:
DECLARE_READ16_MEMBER(namcos22_portbit_r);
DECLARE_WRITE16_MEMBER(namcos22_portbit_w);
DECLARE_READ16_MEMBER(namcos22_dipswitch_r);
DECLARE_READ16_MEMBER(namcos22_gun_r);
DECLARE_WRITE16_MEMBER(namcos22_cpuleds_w);
DECLARE_READ32_MEMBER(alpinesa_prot_r);
DECLARE_WRITE32_MEMBER(alpinesa_prot_w);
DECLARE_WRITE32_MEMBER(namcos22s_chipselect_w);
DECLARE_WRITE8_MEMBER(mb87078_gain_changed);
DECLARE_WRITE8_MEMBER(mcu_port4_w);
DECLARE_READ8_MEMBER(mcu_port4_r);
DECLARE_WRITE8_MEMBER(mcu_port5_w);
DECLARE_READ8_MEMBER(mcu_port5_r);
DECLARE_WRITE8_MEMBER(mcu_port6_w);
DECLARE_READ8_MEMBER(mcu_port6_r);
DECLARE_READ8_MEMBER(namcos22s_mcu_adc_r);
DECLARE_WRITE8_MEMBER(alpine_mcu_port4_w);
DECLARE_READ8_MEMBER(mcu_port4_s22_r);
DECLARE_READ8_MEMBER(iomcu_port4_s22_r);
DECLARE_READ16_MEMBER(mcu141_speedup_r);
DECLARE_WRITE16_MEMBER(mcu_speedup_w);
DECLARE_READ16_MEMBER(mcu130_speedup_r);
DECLARE_READ16_MEMBER(mcuc74_speedup_r);
DECLARE_WRITE16_MEMBER(mcu_speedup_w);
inline u8 nthbyte(const u32 *src, int n) { return (src[n / 4] << ((n & 3) * 8)) >> 24; }
inline u16 nthword(const u32 *src, int n) { return (src[n / 2] << ((n & 1) * 16)) >> 16; }
@ -421,59 +374,39 @@ private:
void slavesim_handle_233002(const s32 *src);
void simulate_slavedsp();
void init_tables();
virtual void init_tables();
void update_mixer();
void update_palette();
void recalc_czram();
void draw_direct_poly(const u16 *src);
void draw_polygons();
void draw_sprites();
void draw_sprite_group(const u32 *src, const u32 *attr, int num_sprites, int deltax, int deltay, int y_lowres);
void draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival);
void namcos22_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void install_c74_speedup();
void install_130_speedup();
void install_141_speedup();
TILE_GET_INFO_MEMBER(get_text_tile_info);
DECLARE_MACHINE_START(adillor);
u32 screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual void draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
u32 screen_update_namcos22(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(namcos22s_interrupt);
INTERRUPT_GEN_MEMBER(namcos22_interrupt);
INTERRUPT_GEN_MEMBER(dsp_vblank_irq);
TIMER_DEVICE_CALLBACK_MEMBER(dsp_serial_pulse);
TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq);
TIMER_DEVICE_CALLBACK_MEMBER(adillor_trackball_update);
TIMER_CALLBACK_MEMBER(adillor_trackball_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_update);
TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(alpine_steplock_callback);
void alpine_io_map(address_map &map);
void alpinesa_am(address_map &map);
void iomcu_s22_io(address_map &map);
void iomcu_s22_program(address_map &map);
void master_dsp_data(address_map &map);
void master_dsp_io(address_map &map);
void master_dsp_program(address_map &map);
void mcu_io(address_map &map);
void mcu_program(address_map &map);
void mcu_s22_io(address_map &map);
void mcu_s22_program(address_map &map);
void namcos22_am(address_map &map);
void namcos22s_am(address_map &map);
void slave_dsp_data(address_map &map);
void slave_dsp_io(address_map &map);
void slave_dsp_program(address_map &map);
void timecris_am(address_map &map);
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_master;
required_device<cpu_device> m_slave;
required_device<cpu_device> m_mcu;
optional_device<cpu_device> m_iomcu;
required_device<m37710_cpu_device> m_mcu;
optional_device<m37710_cpu_device> m_iomcu;
required_device<eeprom_parallel_28xx_device> m_eeprom;
optional_device<mb87078_device> m_mb87078;
required_device<c352_device> m_c352;
@ -488,8 +421,6 @@ private:
optional_region_ptr<u8> m_gamma_proms;
optional_shared_ptr<u32> m_vics_data;
optional_shared_ptr<u32> m_vics_control;
optional_device<timer_device> m_motor_timer;
optional_device<timer_device> m_pc_pedal_interrupt;
required_device<screen_device> m_screen;
optional_ioport_array<8> m_adc_ports;
required_ioport m_dsw;
@ -518,20 +449,10 @@ private:
int m_irq_enabled;
namcos22_dsp_upload_state m_dsp_upload_state;
int m_UploadDestIdx;
u32 m_alpinesa_protection;
int m_motor_status;
u8 m_mcu_iocontrol;
u8 m_mcu_outdata;
u16 m_su_82;
u16 m_keycus_id;
u16 m_keycus_rng;
int m_gametype;
int m_chipselect;
int m_spotram_enable;
int m_spotram_address;
std::unique_ptr<u16[]> m_spotram;
std::unique_ptr<u16[]> m_banked_czram[4];
u32 m_cz_was_written[4];
int m_cz_adjust;
namcos22_renderer *m_poly;
u16 m_dspram_bank;
@ -579,4 +500,109 @@ private:
u16 m_pdp_base;
};
class namcos22s_state : public namcos22_state
{
public:
namcos22s_state(const machine_config &mconfig, device_type type, const char *tag) :
namcos22_state(mconfig, type, tag),
m_motor_timer(*this, "motor_timer"),
m_pc_pedal_interrupt(*this, "pc_p_int")
{ }
void namcos22s(machine_config &config);
void propcycl(machine_config &config);
void dirtdash(machine_config &config);
void airco22b(machine_config &config);
void cybrcycc(machine_config &config);
void tokyowar(machine_config &config);
void alpine(machine_config &config);
void alpinesa(machine_config &config);
void adillor(machine_config &config);
void timecris(machine_config &config);
void init_aquajet();
void init_adillor();
void init_cybrcyc();
void init_timecris();
void init_tokyowar();
void init_propcycl();
void init_alpiner2();
void init_dirtdash();
void init_airco22();
void init_alpiner();
void init_alpinesa();
DECLARE_CUSTOM_INPUT_MEMBER(alpine_motor_read);
protected:
virtual void machine_start() override;
virtual void init_tables() override;
virtual void draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) override;
private:
DECLARE_MACHINE_START(adillor);
void install_130_speedup();
void install_141_speedup();
void recalc_czram();
void namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival);
u32 screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_WRITE16_MEMBER(namcos22s_czattr_w);
DECLARE_READ16_MEMBER(namcos22s_czattr_r);
DECLARE_WRITE32_MEMBER(namcos22s_czram_w);
DECLARE_READ32_MEMBER(namcos22s_czram_r);
DECLARE_READ32_MEMBER(namcos22s_vics_control_r);
DECLARE_WRITE32_MEMBER(namcos22s_vics_control_w);
DECLARE_READ16_MEMBER(spotram_r);
DECLARE_WRITE16_MEMBER(spotram_w);
DECLARE_READ32_MEMBER(alpinesa_prot_r);
DECLARE_WRITE32_MEMBER(alpinesa_prot_w);
DECLARE_READ16_MEMBER(timecris_gun_r);
DECLARE_WRITE8_MEMBER(mb87078_gain_changed);
DECLARE_WRITE32_MEMBER(namcos22s_chipselect_w);
DECLARE_WRITE8_MEMBER(mcu_port4_w);
DECLARE_READ8_MEMBER(mcu_port4_r);
DECLARE_WRITE8_MEMBER(mcu_port5_w);
DECLARE_READ8_MEMBER(mcu_port5_r);
DECLARE_WRITE8_MEMBER(mcu_port6_w);
DECLARE_READ8_MEMBER(mcu_port6_r);
template <int Channel> u16 mcu_adc_r(offs_t offset);
DECLARE_WRITE8_MEMBER(alpine_mcu_port4_w);
DECLARE_READ16_MEMBER(mcu130_speedup_r);
DECLARE_READ16_MEMBER(mcu141_speedup_r);
INTERRUPT_GEN_MEMBER(namcos22s_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq);
TIMER_DEVICE_CALLBACK_MEMBER(adillor_trackball_update);
TIMER_CALLBACK_MEMBER(adillor_trackball_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_update);
TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(alpine_steplock_callback);
void alpinesa_am(address_map &map);
void mcu_program(address_map &map);
void namcos22s_am(address_map &map);
void timecris_am(address_map &map);
optional_device<timer_device> m_motor_timer;
optional_device<timer_device> m_pc_pedal_interrupt;
int m_spotram_enable;
int m_spotram_address;
std::unique_ptr<u16[]> m_spotram;
std::unique_ptr<u16[]> m_banked_czram[4];
u32 m_cz_was_written[4];
u32 m_alpinesa_protection;
int m_motor_status;
u8 m_mcu_iocontrol;
u8 m_mcu_outdata;
int m_chipselect;
};
#endif // MAME_INCLUDES_NAMCOS22_H

100
src/mame/video/namcos22.cpp
View File

@ -1710,7 +1710,7 @@ void namcos22_state::draw_sprites()
}
}
READ32_MEMBER(namcos22_state::namcos22s_vics_control_r)
READ32_MEMBER(namcos22s_state::namcos22s_vics_control_r)
{
u32 ret = m_vics_control[offset];
@ -1734,7 +1734,7 @@ READ32_MEMBER(namcos22_state::namcos22s_vics_control_r)
return ret;
}
WRITE32_MEMBER(namcos22_state::namcos22s_vics_control_w)
WRITE32_MEMBER(namcos22s_state::namcos22s_vics_control_w)
{
COMBINE_DATA(&m_vics_control[offset]);
}
@ -1879,7 +1879,7 @@ low byte is indirect pen, high byte is shift amount when spot is in alpha blend
*/
READ16_MEMBER(namcos22_state::spotram_r)
READ16_MEMBER(namcos22s_state::spotram_r)
{
if (offset == 2)
{
@ -1895,7 +1895,7 @@ READ16_MEMBER(namcos22_state::spotram_r)
return 0;
}
WRITE16_MEMBER(namcos22_state::spotram_w)
WRITE16_MEMBER(namcos22s_state::spotram_w)
{
switch (offset)
{
@ -1921,7 +1921,7 @@ WRITE16_MEMBER(namcos22_state::spotram_w)
}
}
void namcos22_state::namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival)
void namcos22s_state::namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival)
{
const pen_t *pens = m_palette->pens();
u8 pen = 0;
@ -2072,16 +2072,21 @@ void namcos22_state::draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap
m_bgtilemap->set_scrolly(0, scroll_y & 0x3ff);
m_bgtilemap->set_palette_offset(m_text_palbase);
if (m_is_ss22)
{
m_bgtilemap->draw(screen, *m_mix_bitmap, cliprect, 0, 4, 4);
namcos22s_mix_text_layer(screen, bitmap, cliprect, 4);
}
else
{
m_bgtilemap->draw(screen, *m_mix_bitmap, cliprect, 0, 2, 3);
namcos22_mix_text_layer(screen, bitmap, cliprect);
}
m_bgtilemap->draw(screen, *m_mix_bitmap, cliprect, 0, 2, 3);
namcos22_mix_text_layer(screen, bitmap, cliprect);
}
void namcos22s_state::draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
int scroll_x = m_tilemapattr[0] - 0x35c;
int scroll_y = m_tilemapattr[1];
m_bgtilemap->set_scrollx(0, scroll_x & 0x3ff);
m_bgtilemap->set_scrolly(0, scroll_y & 0x3ff);
m_bgtilemap->set_palette_offset(m_text_palbase);
m_bgtilemap->draw(screen, *m_mix_bitmap, cliprect, 0, 4, 4);
namcos22s_mix_text_layer(screen, bitmap, cliprect, 4);
}
@ -2116,7 +2121,7 @@ void namcos22_state::update_palette()
}
WRITE16_MEMBER(namcos22_state::namcos22s_czattr_w)
WRITE16_MEMBER(namcos22s_state::namcos22s_czattr_w)
{
/*
0 1 2 3 4 5 6 7
@ -2145,12 +2150,12 @@ WRITE16_MEMBER(namcos22_state::namcos22s_czattr_w)
}
}
READ16_MEMBER(namcos22_state::namcos22s_czattr_r)
READ16_MEMBER(namcos22s_state::namcos22s_czattr_r)
{
return m_czattr[offset];
}
WRITE32_MEMBER(namcos22_state::namcos22s_czram_w)
WRITE32_MEMBER(namcos22s_state::namcos22s_czram_w)
{
/*
czram contents, it's basically a big cz compare table
@ -2177,13 +2182,13 @@ WRITE32_MEMBER(namcos22_state::namcos22s_czram_w)
}
}
READ32_MEMBER(namcos22_state::namcos22s_czram_r)
READ32_MEMBER(namcos22s_state::namcos22s_czram_r)
{
int bank = m_czattr[5] & 3;
return (m_banked_czram[bank][offset * 2] << 16) | m_banked_czram[bank][offset * 2 + 1];
}
void namcos22_state::recalc_czram()
void namcos22s_state::recalc_czram()
{
for (int bank = 0; bank < 4; bank++)
{
@ -2245,12 +2250,11 @@ void namcos22_state::recalc_czram()
void namcos22_state::update_mixer()
{
int i;
m_poly->wait("update_mixer");
#if 0 // show reg contents
char msg1[0x1000] = {0}, msg2[0x1000] = {0};
int st = 0x000 / 16;
for (i = st; i < (st+3); i++)
for (int i = st; i < (st+3); i++)
{
sprintf(msg2,"%04X %08X %08X %08X %08X\n", i*16, m_mixer[i*4+0], m_mixer[i*4+1], m_mixer[i*4+2], m_mixer[i*4+3]);
strcat(msg1,msg2);
@ -2357,7 +2361,7 @@ void namcos22_state::update_mixer()
m_fog_colormask = m_mixer[0x84/4];
// fog color per cz type
for (i = 0; i < 4; i++)
for (int i = 0; i < 4; i++)
{
m_fog_r_per_cztype[i] = nthbyte(m_mixer, 0x0100+i);
m_fog_g_per_cztype[i] = nthbyte(m_mixer, 0x0180+i);
@ -2370,7 +2374,7 @@ void namcos22_state::update_mixer()
/*********************************************************************************************/
u32 namcos22_state::screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
u32 namcos22s_state::screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
render_frame_active();
update_mixer();
@ -2448,30 +2452,7 @@ void namcos22_state::init_tables()
matrix3d_identity(m_viewmatrix);
memset(m_polygonram, 0xcc, m_polygonram.bytes());
// init spotram (super22 only)
if (m_is_ss22)
{
m_spotram = make_unique_clear<u16[]>(0x800);
save_pointer(NAME(m_spotram), 0x800);
}
// init czram tables (super22 only)
if (m_is_ss22)
{
for (int bank = 0; bank < 4; bank++)
{
m_banked_czram[bank] = make_unique_clear<u16[]>(0x100);
m_recalc_czram[bank] = make_unique_clear<u8[]>(0x2000);
m_cz_was_written[bank] = 1;
save_pointer(NAME(m_banked_czram[bank]), 0x100, bank);
save_pointer(NAME(m_recalc_czram[bank]), 0x2000, bank);
}
save_item(NAME(m_czattr));
save_item(NAME(m_cz_was_written));
}
else
if (!m_is_ss22)
{
save_item(NAME(m_fog_r_per_cztype));
save_item(NAME(m_fog_g_per_cztype));
@ -2564,6 +2545,29 @@ void namcos22_state::init_tables()
}
}
void namcos22s_state::init_tables()
{
namcos22_state::init_tables();
// init spotram (super22 only)
m_spotram = make_unique_clear<u16[]>(0x800);
save_pointer(NAME(m_spotram), 0x800);
// init czram tables (super22 only)
for (int bank = 0; bank < 4; bank++)
{
m_banked_czram[bank] = make_unique_clear<u16[]>(0x100);
m_recalc_czram[bank] = make_unique_clear<u8[]>(0x2000);
m_cz_was_written[bank] = 1;
save_pointer(NAME(m_banked_czram[bank]), 0x100, bank);
save_pointer(NAME(m_recalc_czram[bank]), 0x2000, bank);
}
save_item(NAME(m_czattr));
save_item(NAME(m_cz_was_written));
}
void namcos22_state::video_start()
{
m_is_ss22 = (m_iomcu == nullptr);