mirror of
https://github.com/holub/mame
synced 2025-06-29 23:48:56 +03:00
New systems marked not working
------------------------------ Cherry Master 2005 (Ver. 1.10U) [Ioannis Bampoulas, TeamEurope] Halloween Party (US.23.A) [Ioannis Bampoulas, TeamEurope] Lucky V Line [Hammy] New clones marked not working ----------------------------- Cherry Master 2005 (Ver. 1.02U) [Ioannis Bampoulas, TeamEurope] Cherry Master 2005 (Ver. 0.14H) [Ioannis Bampoulas, TeamEurope]
This commit is contained in:
parent
eec7e4d641
commit
706137deae
@ -28943,6 +28943,7 @@ blackbdb //
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dslayrr //
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dslayrra //
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hawaii //
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hwparty //
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oligam //
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rasce //
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@ -42046,6 +42047,11 @@ dsb46 //
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@source:skeleton/dual68.cpp
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dual68 //
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@source:skeleton/dyna_d0404.cpp
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cm2005
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cm2005a
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cm2005b
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@source:skeleton/e100.cpp
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e100 //
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@ -42495,6 +42501,9 @@ systec //
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@source:skeleton/systel1.cpp
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systel100 //
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@source:skeleton/syvg.cpp
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luckyvl
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@source:skeleton/tavernie.cpp
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cpu09 //
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ivg09 //
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@ -30,7 +30,7 @@ Arabian Night NO https://www.astrocorp.com.tw/eng/game_1_1.php?gid=31
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Black Beard YES https://www.astrocorp.com.tw/eng/game_1_1.php?gid=32
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Dragon Slayer YES https://www.astrocorp.com.tw/eng/game_1_1.php?gid=33
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Flying Age NO https://www.astrocorp.com.tw/eng/game_1_1.php?gid=34
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Halloween Party NO https://www.astrocorp.com.tw/eng/game_1_1.php?gid=35
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Halloween Party YES https://www.astrocorp.com.tw/eng/game_1_1.php?gid=35
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Olympian Games YES https://www.astrocorp.com.tw/eng/game_1_1.php?gid=36
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The Circus NO https://www.astrocorp.com.tw/eng/game_1_1.php?gid=37
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Treasure Hunting NO https://www.astrocorp.com.tw/eng/game_1_1.php?gid=38
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@ -286,6 +286,22 @@ ROM_START( rasce )
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ROM_LOAD( "rs.06.03r", 0x0000, 0x7a80000, CRC(66132c3d) SHA1(4a73bab9518548950e11aebc6edf67f64d0d7798) )
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ROM_END
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// Pallas GX1 REV:B - AMD Geode CS5530A-UCE, SMC FDC37C932APM. Sub board with ROMs, ASTRO M and ASTRO V102PX-003 customs
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ROM_START( hwparty )
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// GAME NAME : HALLOWEEN PARTY
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// GAME TYPE : MULTI-LINER
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// DEVELOPER : ASTRO CORP
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ROM_REGION32_LE(0x40000, "pci:12.0", 0) /* motherboard bios */
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ROM_LOAD( "phoenixbios_e586 bios.u16", 0x0000, 0x040000, CRC(885e3cde) SHA1(ff90cda4383a119c7f54545c11fa432505e66c1b) )
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ROM_REGION(0x20000, "rom", 0) // on subboard
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ROM_LOAD16_BYTE( "1_hwus-112.u22", 0x00000, 0x010000, CRC(5cbe992c) SHA1(e785e5863ccc52d4ca5485569244d89e226398a0) )
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ROM_LOAD16_BYTE( "2_hwus-112.u11", 0x00001, 0x010000, CRC(7b0187ed) SHA1(7d0791990aec06d929bcb40a6d9888b3bb350071) )
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ROM_REGION(0x8000000, "drive", 0)
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ROM_LOAD( "halloween_us.23.a.img", 0x0000, 0x7a80000, CRC(65d3877f) SHA1(076035bd55189a186368ae42463ab7471be1583c) )
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ROM_END
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void astropc_state::init_astropc()
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{
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@ -301,6 +317,8 @@ GAME( 2005, blackbdb, blackbd, astropc, astropc, astropc_state, init_astropc, R
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GAME( 2005, dslayrr, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro", "Dragon Slayer (Russia, v15.B, 2005/08/10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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GAME( 2006, dslayrra, dslayrr, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro", "Dragon Slayer (Russia, v16.B, 2005/11/10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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GAME( 2005, hwparty, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro", "Halloween Party (US.23.A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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GAME( 2004, hawaii, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro", "Hawaii (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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GAME( 2005, oligam, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro", "Olympian Games (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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@ -85,6 +85,7 @@ public:
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void cb2001(machine_config &config);
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void cb5(machine_config &config);
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void ndongmul2(machine_config &config);
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void scherrymp(machine_config &config);
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void init_smaller_proms();
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@ -757,6 +758,219 @@ static INPUT_PORTS_START( cb2001 )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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INPUT_PORTS_END
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static INPUT_PORTS_START( scherrymp )
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) PORT_NAME("Stop 2 / Big")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop 1 / D-UP")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Stop All / Take")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SLOT_STOP3 ) PORT_NAME("Stop 3 / Small / Info")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
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PORT_START("IN1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) // Coin B
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_IMPULSE(2) // Coin D
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) // Coin C
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) // Coin A
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PORT_START("IN2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings")
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats")
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PORT_START("DSW1-2")
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PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:1")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
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PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:2")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
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PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:3")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
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PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:4")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
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PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:5")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
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PORT_DIPNAME( 0x0020, 0x0000, "Reel Speed" ) PORT_DIPLOCATION("DSW1:6")
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PORT_DIPSETTING( 0x0000, DEF_STR( Low ) )
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PORT_DIPSETTING( 0x0020, DEF_STR( High ) )
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PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:7")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
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PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:8")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
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PORT_DIPNAME( 0x0700, 0x0000, "Main Game Pay Rate" ) PORT_DIPLOCATION("DSW2:1,2,3")
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PORT_DIPSETTING( 0x0700, "55%" )
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PORT_DIPSETTING( 0x0600, "60%" )
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PORT_DIPSETTING( 0x0500, "65%" )
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PORT_DIPSETTING( 0x0400, "70%" )
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PORT_DIPSETTING( 0x0300, "75%" )
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PORT_DIPSETTING( 0x0200, "80%" )
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PORT_DIPSETTING( 0x0100, "85%" )
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PORT_DIPSETTING( 0x0000, "90%" )
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PORT_DIPNAME( 0x0800, 0x0000, "Double Up Game Pay Rate" ) PORT_DIPLOCATION("DSW2:4")
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PORT_DIPSETTING( 0x0800, "80%" )
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PORT_DIPSETTING( 0x0000, "90%" )
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PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:5")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
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PORT_DIPNAME( 0x2000, 0x0000, "Maximum Bet" ) PORT_DIPLOCATION("DSW2:6")
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PORT_DIPSETTING( 0x0000, "10" )
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PORT_DIPSETTING( 0x2000, "20" )
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PORT_DIPNAME( 0x4000, 0x0000, "Minimum Bet" ) PORT_DIPLOCATION("DSW2:7") // fixed at 1 in the service screen but shows 8 or 16 during attract
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PORT_DIPSETTING( 0x4000, "8" )
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PORT_DIPSETTING( 0x0000, "16" )
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PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:8")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
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PORT_START("DSW3")
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PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:1")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
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PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:2")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
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PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:3")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
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PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:4")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
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PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:5")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
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PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:6")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0020, DEF_STR( On ) )
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PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:7")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
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PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:8")
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PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
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PORT_START("DSW4")
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PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:1")
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PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:2")
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PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:3")
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PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:4")
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PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:5")
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PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:6")
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PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:7")
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PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:8")
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PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_START("DSW5")
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PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:1")
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PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:2")
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PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:3")
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PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:4")
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PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:5")
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PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:6")
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PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:7")
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PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:8")
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PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_START("DSW6")
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PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:1")
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PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:2")
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PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:3")
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PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:4")
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PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:5")
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PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:6")
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PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:7")
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PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:8")
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PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
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// test mode shows a 7th bank and it's read, but it wasn't populated on the dumped PCB. Leaving it here until the controls are done.
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PORT_START("DSW7")
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PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:1")
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PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:2")
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:3")
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:4")
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:5")
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:6")
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:7")
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW7:8")
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( cb5 )
|
||||
PORT_START("IN0")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
@ -1245,13 +1459,18 @@ void cb2001_state::cb5(machine_config &config)
|
||||
subdevice<ay8910_device>("aysnd")->port_b_read_callback().set_ioport("DSW3");
|
||||
}
|
||||
|
||||
void cb2001_state::ndongmul2(machine_config &config)
|
||||
void cb2001_state::scherrymp(machine_config &config)
|
||||
{
|
||||
cb2001(config);
|
||||
|
||||
m_maincpu->set_clock(24_MHz_XTAL);
|
||||
m_maincpu->p0_in_cb().set_ioport("DSW6");
|
||||
m_maincpu->p2_in_cb().set_ioport("DSW7");
|
||||
}
|
||||
|
||||
void cb2001_state::ndongmul2(machine_config &config)
|
||||
{
|
||||
scherrymp(config);
|
||||
|
||||
I80C51(config, "mcu", 12_MHz_XTAL).set_disable(); // Actually an AT89C51, currently undumped so disabled
|
||||
}
|
||||
@ -1271,15 +1490,15 @@ ROM_END
|
||||
|
||||
ROM_START( scherrymp ) // DYNA D9702 PCB; DYNA PLUS V1.6 in bookkeeping screen
|
||||
ROM_REGION16_LE( 0x040000, "boot_prg", 0 )
|
||||
ROM_LOAD16_WORD( "f11.bin", 0x000000, 0x40000, CRC(8967f58d) SHA1(eb01a16b7d108f5fbe5de8f611b4f77869aedbf1) )
|
||||
ROM_LOAD16_WORD( "supercherrymaster_v1.6d.11f", 0x000000, 0x40000, CRC(8967f58d) SHA1(eb01a16b7d108f5fbe5de8f611b4f77869aedbf1) )
|
||||
|
||||
ROM_REGION( 0x100000, "gfx", 0 )
|
||||
ROM_LOAD( "d9701.12c", 0x000000, 0x100000, CRC(07d711a6) SHA1(6b5a4017eb1d31dc184831f85d786331f4a8e01f) )
|
||||
|
||||
// these are confirmed correct, though it's the only set using the smaller PROMs.
|
||||
ROM_REGION( 0x400, "proms", 0 )
|
||||
ROM_LOAD( "n82s135-1.bin", 0x000, 0x100, CRC(66ed363f) SHA1(65bd37842c441c2e712844b07c0cfe37ef16d0ef) )
|
||||
ROM_LOAD( "n82s135-2.bin", 0x100, 0x100, CRC(a19821db) SHA1(62dda90dd67dfbc0b96f161f1f2b7a46a5805eae) )
|
||||
ROM_LOAD( "82s135.9b", 0x000, 0x100, CRC(66ed363f) SHA1(65bd37842c441c2e712844b07c0cfe37ef16d0ef) )
|
||||
ROM_LOAD( "82s135.11b", 0x100, 0x100, CRC(a19821db) SHA1(62dda90dd67dfbc0b96f161f1f2b7a46a5805eae) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( scherrymp10u ) // DYNA D9702 PCB; DYNA PLUS V1.0U in bookkeeping screen
|
||||
@ -1298,7 +1517,7 @@ ROM_START( cb5 ) // Wing W4 board + DYNA D9701 subboard; DYNA CB5 V1.3 in bookke
|
||||
ROM_REGION16_LE( 0x040000, "boot_prg", 0 )
|
||||
ROM_LOAD16_WORD( "cb5-131.1g", 0x020000, 0x20000, CRC(7d47192c) SHA1(bc65f0b3223789fbcd78a7f3ba4f1c0e2a1ee4da) )
|
||||
|
||||
ROM_REGION( 0x100000, "gfx", 0 ) // not dumped for this set, but seems to work fine. Marked as bad dump as precaution
|
||||
ROM_REGION( 0x100000, "gfx", 0 ) // not dumped for this set, but seems to work fine. Pics of another PCB show D9801 marked on the flash, so it could be different.
|
||||
ROM_LOAD( "flash", 0x000000, 0x100000, BAD_DUMP CRC(07d711a6) SHA1(6b5a4017eb1d31dc184831f85d786331f4a8e01f) )
|
||||
|
||||
ROM_REGION( 0x400, "proms", 0 ) // not dumped for this set, but seem to work fine. Marked as bad dump as precaution
|
||||
@ -1342,7 +1561,7 @@ ROM_END
|
||||
|_______________________________________________________________________________|
|
||||
|
||||
*/
|
||||
ROM_START( ndongmul2 ) // 뉴 동물동물 2 (bootleg MIA 94V-0 PCB; DYNA PLUS V1.2N in bookkeeping screen)
|
||||
ROM_START( ndongmul2 ) // 뉴 동물동물 2 (bootleg MIA 94V-0 PCB; DYNA PLUS V1.2N in bookkeeping screen - based on the Super Cherry Master Plus codebase)
|
||||
ROM_REGION16_LE( 0x080000, "boot_prg", 0 ) // CPU91A-011-9915JK001
|
||||
ROM_LOAD16_WORD( "am27c020.u10", 0x000000, 0x040000, CRC(550e53e5) SHA1(a90ee66e7ae9b58005b6ed412669d86532c75156) )
|
||||
|
||||
@ -1386,6 +1605,6 @@ void cb2001_state::init_smaller_proms()
|
||||
// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS
|
||||
GAME( 2000, cb2001, 0, cb2001, cb2001, cb2001_state, empty_init, ROT0, "Dyna", "Cherry Bonus 2001 (V1.1I)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1999, ndongmul2, 0, ndongmul2, ndongmul2, cb2001_state, empty_init, ROT0, "Dyna", "New DongmulDongmul 2 (V1.2N)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // goes into the weeds at various point, due to either missing MCU dump or incomplete decryption. Bad reels GFX.
|
||||
GAME( 1997, scherrymp, 0, cb2001, cb2001, cb2001_state, init_smaller_proms, ROT0, "Dyna", "Super Cherry Master Plus (V1.6)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // 2001 version? (we have bootlegs running on z80 hw of a 1996 version)
|
||||
GAME( 1997, scherrymp10u, scherrymp, cb2001, cb2001, cb2001_state, empty_init, ROT0, "Dyna", "Super Cherry Master Plus (V1.0U)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) //
|
||||
GAME( 1997, cb5, 0, cb5, cb5, cb2001_state, empty_init, ROT0, "Dyna", "Cherry Bonus V Five (V1.3)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1997, scherrymp, 0, scherrymp, scherrymp, cb2001_state, init_smaller_proms, ROT0, "Dyna", "Super Cherry Master Plus (V1.6)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // 2001 version? (we have bootlegs running on z80 hw of a 1996 version)
|
||||
GAME( 1997, scherrymp10u, scherrymp, scherrymp, scherrymp, cb2001_state, empty_init, ROT0, "Dyna", "Super Cherry Master Plus (V1.0U)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) //
|
||||
GAME( 1997, cb5, 0, cb5, cb5, cb2001_state, empty_init, ROT0, "Dyna", "Cherry Bonus V Five (V1.3)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
|
204
src/mame/skeleton/dyna_d0404.cpp
Normal file
204
src/mame/skeleton/dyna_d0404.cpp
Normal file
@ -0,0 +1,204 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:
|
||||
|
||||
/*
|
||||
Dyna D0404 PCB
|
||||
|
||||
This PCB is newer hardware than the one is misc/dyna_d0404.cpp, possibly the next one.
|
||||
It seems Dyna got rid of some legacy features like physical DIPs, color PROMs and AY sound.
|
||||
While the CPU is sanded off, ROM seems to contain valid ARM code.
|
||||
Currently unknown what produces the sound.
|
||||
|
||||
The main components are:
|
||||
208-pin custom (sanded off). MCU/CPU?
|
||||
176-pin custom (sanded off). GFX?
|
||||
4x AMIC LP61 1024S-12 SRAM or equivalent (for CPU?)
|
||||
2x IDT71024 SRAM or equivalent (for GFX?)
|
||||
2x A625308AM-70S SRAM or equivalent (for GFX?)
|
||||
24.000 MHz XTAL
|
||||
2x LH28F800SGE-L70 or equivalent flash ROMs
|
||||
2x GAL16V8D
|
||||
Oki M62X42B RTC
|
||||
*/
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#include "cpu/arm7/arm7.h"
|
||||
#include "machine/msm6242.h"
|
||||
|
||||
#include "emupal.h"
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
#include "tilemap.h"
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
class dyna_d0404_state : public driver_device
|
||||
{
|
||||
public:
|
||||
dyna_d0404_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu")
|
||||
{ }
|
||||
|
||||
void dyna_d0404(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
void program_map(address_map &map);
|
||||
};
|
||||
|
||||
|
||||
uint32_t dyna_d0404_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void dyna_d0404_state::video_start()
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
void dyna_d0404_state::program_map(address_map &map)
|
||||
{
|
||||
map(0x00000000, 0x000fffff).rom();
|
||||
}
|
||||
|
||||
|
||||
static INPUT_PORTS_START( cm2005 )
|
||||
PORT_START("IN0")
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static GFXDECODE_START( gfx_dyna_d0404 )
|
||||
// TODO
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
void dyna_d0404_state::dyna_d0404(machine_config &config)
|
||||
{
|
||||
ARM7(config, m_maincpu, 24_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &dyna_d0404_state::program_map);
|
||||
|
||||
MSM6242(config, "rtc", 32.768_kHz_XTAL);
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
|
||||
screen.set_size(64*8, 64*8);
|
||||
screen.set_visarea(0, 64*8-1, 0, 32*8-1);
|
||||
screen.set_screen_update(FUNC(dyna_d0404_state::screen_update));
|
||||
|
||||
GFXDECODE(config, "gfxdecode", "palette", gfx_dyna_d0404);
|
||||
|
||||
PALETTE(config, "palette").set_entries(0x100); // TODO
|
||||
|
||||
// sound hardware
|
||||
SPEAKER(config, "mono").front_center();
|
||||
// TODO: identify
|
||||
}
|
||||
|
||||
|
||||
ROM_START( cm2005 ) // DYNA CM2005 VER. 1.10U at 0xc0000 in ROM
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "a29800uv.11b", 0x000000, 0x100000, CRC(b86c6953) SHA1(73c78a2529abad6aa61fda8285c172bdb6c380cd) )
|
||||
|
||||
ROM_REGION( 0x100000, "gfx", 0 )
|
||||
ROM_LOAD( "a29800uv.12b", 0x000000, 0x100000, CRC(c1ae3e9a) SHA1(6cf883b586e074f7517aef4db1c7b006d0ed8df6) )
|
||||
|
||||
ROM_REGION( 0x80000, "plds", 0 ) // read as 27C020, need reduction
|
||||
ROM_LOAD( "gal16v8.10a", 0x00000, 0x40000, CRC(a9f2655a) SHA1(07d9b767b5929bbeac917697ac618c293206bf72) )
|
||||
ROM_LOAD( "gal16v8.10b", 0x40000, 0x40000, CRC(d8320940) SHA1(a65973fefaff03696cdbb60a02bfb5e352254951) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( cm2005a ) // DYNA CM2005 VER. 1.02U at 0xc0000 in ROM
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "lh28f800.11b", 0x000000, 0x100000, CRC(f567782c) SHA1(6138d3170dc4505e1ab2444f26e76e56d5393444) )
|
||||
|
||||
ROM_REGION( 0x100000, "gfx", 0 )
|
||||
ROM_LOAD( "lh28f800.12b", 0x000000, 0x100000, CRC(c1ae3e9a) SHA1(6cf883b586e074f7517aef4db1c7b006d0ed8df6) )
|
||||
|
||||
ROM_REGION( 0x80000, "plds", 0 ) // read as 27C020, need reduction
|
||||
ROM_LOAD( "gal16v8.10a", 0x00000, 0x40000, CRC(a9f2655a) SHA1(07d9b767b5929bbeac917697ac618c293206bf72) )
|
||||
ROM_LOAD( "gal16v8.10b", 0x40000, 0x40000, CRC(d8320940) SHA1(a65973fefaff03696cdbb60a02bfb5e352254951) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( cm2005b ) // DYNA CM2005 VER. 0.14H at 0xc0000 in ROM
|
||||
ROM_REGION( 0x100000, "maincpu", 0 )
|
||||
ROM_LOAD( "lh28f800.11b", 0x000000, 0x100000, CRC(1af9c956) SHA1(77daffbb8279098218e8401260363af9de4b1d7f) ) // SLDH
|
||||
|
||||
ROM_REGION( 0x100000, "gfx", 0 )
|
||||
ROM_LOAD( "lh28f800.12b", 0x000000, 0x100000, CRC(74163225) SHA1(14853e347e4e439166e218cd2713e372c871a984) ) // SLDH
|
||||
|
||||
ROM_REGION( 0x80000, "plds", 0 ) // read as 27C020, need reduction
|
||||
ROM_LOAD( "gal16v8.10a", 0x00000, 0x40000, CRC(a9f2655a) SHA1(07d9b767b5929bbeac917697ac618c293206bf72) )
|
||||
ROM_LOAD( "gal16v8.10b", 0x40000, 0x40000, CRC(d8320940) SHA1(a65973fefaff03696cdbb60a02bfb5e352254951) )
|
||||
ROM_END
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
|
||||
GAME( 2005, cm2005, 0, dyna_d0404, cm2005, dyna_d0404_state, empty_init, ROT0, "Dyna", "Cherry Master 2005 (Ver. 1.10U)", MACHINE_IS_SKELETON )
|
||||
GAME( 2005, cm2005a, cm2005, dyna_d0404, cm2005, dyna_d0404_state, empty_init, ROT0, "Dyna", "Cherry Master 2005 (Ver. 1.02U)", MACHINE_IS_SKELETON )
|
||||
GAME( 2005, cm2005b, cm2005, dyna_d0404, cm2005, dyna_d0404_state, empty_init, ROT0, "Dyna", "Cherry Master 2005 (Ver. 0.14H)", MACHINE_IS_SKELETON )
|
164
src/mame/skeleton/syvg.cpp
Normal file
164
src/mame/skeleton/syvg.cpp
Normal file
@ -0,0 +1,164 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:
|
||||
|
||||
/*
|
||||
SYVG (Shyh-Yuan VideoGames / Shyh-Yuan Electronics - spelt Shih Yuan on some stickers)
|
||||
|
||||
Z80 or Z180 based MCU (164 pin, correct arch / model currently unknown);
|
||||
CPLD (84 pin, model currently unknown);
|
||||
UT6264CPCL-70LL SRAM;
|
||||
UT61256JC-12 SRAM;
|
||||
2x SB61H1024AS-12 SRAM;
|
||||
U6295
|
||||
21.0000 MHz XTAL
|
||||
|
||||
PCB has no evident marking. One sticker: 15.75KHz (CGA)
|
||||
|
||||
*/
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "sound/okim6295.h"
|
||||
|
||||
#include "emupal.h"
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
#include "tilemap.h"
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
class syvg_state : public driver_device
|
||||
{
|
||||
public:
|
||||
syvg_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu")
|
||||
{ }
|
||||
|
||||
void syvg(machine_config &config);
|
||||
|
||||
void init_luckyvl();
|
||||
|
||||
protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
void program_map(address_map &map);
|
||||
};
|
||||
|
||||
|
||||
uint32_t syvg_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void syvg_state::video_start()
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
void syvg_state::program_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0xffff).rom();
|
||||
}
|
||||
|
||||
|
||||
static INPUT_PORTS_START( luckyvl )
|
||||
PORT_START("IN0")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
// no DSWs on PCB
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static GFXDECODE_START( gfx_syvg )
|
||||
// TODO
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
void syvg_state::syvg(machine_config &config)
|
||||
{
|
||||
Z80(config, m_maincpu, 21_MHz_XTAL / 4); // divider not verified
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &syvg_state::program_map);
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO
|
||||
screen.set_refresh_hz(60);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
|
||||
screen.set_size(64*8, 64*8);
|
||||
screen.set_visarea(0, 64*8-1, 0, 32*8-1);
|
||||
screen.set_screen_update(FUNC(syvg_state::screen_update));
|
||||
|
||||
GFXDECODE(config, "gfxdecode", "palette", gfx_syvg);
|
||||
|
||||
PALETTE(config, "palette").set_entries(0x100); // TODO
|
||||
|
||||
// sound hardware
|
||||
SPEAKER(config, "mono").front_center();
|
||||
|
||||
OKIM6295(config, "oki", 21_MHz_XTAL / 20, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 1.0); // TODO: divider and pin 7 not verified
|
||||
}
|
||||
|
||||
|
||||
ROM_START( luckyvl )
|
||||
ROM_REGION( 0x20000, "maincpu", 0 )
|
||||
ROM_LOAD( "lucky-v-line_202.u19", 0x00000, 0x20000, CRC(fe5aa9a6) SHA1(a64a5c2a74109595c5e37a6f12b7556a3a167d04) ) // encrypted
|
||||
|
||||
ROM_REGION( 0x100000, "gfx", 0 )
|
||||
ROM_LOAD16_BYTE( "lucky-v-line.u5", 0x00000, 0x80000, CRC(06916190) SHA1(af172259058eb39df8e559e848236e312fe70af2) ) // FIXED BITS (xxxxxxx0)
|
||||
ROM_LOAD16_BYTE( "lucky-v-line.u6", 0x00001, 0x80000, CRC(48cf0795) SHA1(baabf1cb0b658bddf8f5dfbf7752dc7f41dcbc93) )
|
||||
|
||||
ROM_REGION( 0x40000, "oki", 0 )
|
||||
ROM_LOAD( "lucky-v-line_sound.u17", 0x00000, 0x40000, CRC(dd548bf9) SHA1(7aa0a772b98dbfee27a4f437f5723075b44d3cb7) )
|
||||
ROM_END
|
||||
|
||||
|
||||
void syvg_state::init_luckyvl()
|
||||
{
|
||||
uint8_t *rom = memregion("maincpu")->base();
|
||||
|
||||
for (int i = 0; i < 0x20000; i++)
|
||||
{
|
||||
// TODO
|
||||
rom[i] = rom[i];
|
||||
}
|
||||
}
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
|
||||
GAME( 2003, luckyvl, 0, syvg, luckyvl, syvg_state, init_luckyvl, ROT0, "Shyh-Yuan Electronics", "Lucky V Line", MACHINE_IS_SKELETON )
|
Loading…
Reference in New Issue
Block a user