mirror of
https://github.com/holub/mame
synced 2025-07-05 18:08:04 +03:00
cage.cpp Cleanups (#3416)
* cage.cpp : Reduce runtime tag lookups, Minor cleanups atarigt.cpp : Convert m_expanded_mram into std::unique_ptr metalmx.cpp : Minor cleanup, Reduce duplicates * cage.cpp : Minor spacing fix * cage.cpp : Minor spacing fix * atarigt.cpp : Convert m_is_primrage into bool * cage.cpp : Fix build gen_latch.cpp : Add seperated acknowloge case * atarigt.cpp : Fix build * atarigt.cpp : Fix builds * cage.cpp : Fix logging * cage.cpp : device finder * cage.cpp : Fix communication (Revert many things)
This commit is contained in:
cam900
Vas Crabb
parent
c28f5f2a49
commit
708d9588f2
@ -89,6 +89,18 @@ void generic_latch_base_device::set_latch_written(bool latch_written)
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}
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}
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READ8_MEMBER(generic_latch_base_device::acknowledge_r)
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{
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if (!machine().side_effects_disabled())
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set_latch_written(false);
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return space.unmap();
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}
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WRITE8_MEMBER(generic_latch_base_device::acknowledge_w)
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{
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set_latch_written(false);
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}
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//-------------------------------------------------
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// generic_latch_8_device - constructor
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//-------------------------------------------------
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@ -131,18 +143,6 @@ WRITE_LINE_MEMBER( generic_latch_8_device::clear )
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m_latched_value = 0x00;
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}
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READ8_MEMBER( generic_latch_8_device::acknowledge_r )
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{
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if (!machine().side_effects_disabled())
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set_latch_written(false);
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return space.unmap();
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}
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WRITE8_MEMBER( generic_latch_8_device::acknowledge_w )
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{
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set_latch_written(false);
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}
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//-------------------------------------------------
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// soundlatch_sync_callback - time-delayed
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// callback to set a latch value
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@ -53,6 +53,9 @@ public:
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DECLARE_READ_LINE_MEMBER(pending_r);
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DECLARE_READ8_MEMBER( acknowledge_r );
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DECLARE_WRITE8_MEMBER( acknowledge_w );
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protected:
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// construction/destruction
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generic_latch_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
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@ -89,9 +92,6 @@ public:
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DECLARE_WRITE_LINE_MEMBER( preset );
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DECLARE_WRITE_LINE_MEMBER( clear );
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DECLARE_READ8_MEMBER( acknowledge_r );
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DECLARE_WRITE8_MEMBER( acknowledge_w );
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void preset_w(u8 value) { m_latched_value = value; }
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protected:
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@ -9,7 +9,6 @@
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#include "emu.h"
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#include "cage.h"
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#include "cpu/tms32031/tms32031.h"
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#include "speaker.h"
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@ -121,7 +120,15 @@ atari_cage_device::atari_cage_device(const machine_config &mconfig, const char *
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atari_cage_device::atari_cage_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
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device_t(mconfig, type, tag, owner, clock),
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m_cageram(*this, "cageram"),
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m_cpu(*this, "cpu"),
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m_soundlatch(*this, "soundlatch"),
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m_dma_timer(*this, "cage_dma_timer"),
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m_timer(*this, "cage_timer%u", 0U),
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m_dmadac(*this, "dac%u", 1U),
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m_bootbank(*this, "bootbank"),
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m_mainbank(*this, "mainbank"),
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m_bootrom(*this, "boot"),
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m_mainrom(*this, DEVICE_SELF),
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m_irqhandler(*this)
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{
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}
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@ -133,34 +140,21 @@ atari_cage_device::atari_cage_device(const machine_config &mconfig, device_type
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void atari_cage_device::device_start()
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{
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attotime cage_cpu_clock_period;
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int chan;
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// resolve callbacks
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m_irqhandler.resolve_safe();
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membank("bank10")->set_base(machine().root_device().memregion("cageboot")->base());
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membank("bank11")->set_base(machine().root_device().memregion("cage")->base());
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m_bootbank->set_base(m_bootrom->base());
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m_mainbank->set_base(m_mainrom->base());
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m_cpu = subdevice<cpu_device>("cage");
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cage_cpu_clock_period = attotime::from_hz(m_cpu->clock());
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m_cpu_h1_clock_period = cage_cpu_clock_period * 2;
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m_dma_timer = subdevice<timer_device>("cage_dma_timer");
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m_timer[0] = subdevice<timer_device>("cage_timer0");
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m_timer[1] = subdevice<timer_device>("cage_timer1");
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if (m_speedup) {
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m_cpu->space(AS_PROGRAM).install_write_handler(m_speedup, m_speedup, write32_delegate(FUNC(atari_cage_device::speedup_w),this));
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m_speedup_ram = m_cageram + m_speedup;
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}
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for (chan = 0; chan < DAC_BUFFER_CHANNELS; chan++)
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{
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char buffer[10];
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sprintf(buffer, "dac%d", chan + 1);
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m_dmadac[chan] = subdevice<dmadac_sound_device>(buffer);
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}
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save_item(NAME(m_cpu_to_cage_ready));
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save_item(NAME(m_cage_to_cpu_ready));
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save_item(NAME(m_serial_period_per_word));
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@ -189,8 +183,6 @@ void atari_cage_device::reset_w(int state)
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TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::dma_timer_callback )
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{
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uint32_t *tms32031_io_regs = m_tms32031_io_regs;
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/* if we weren't enabled, don't do anything, just shut ourself off */
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if (!m_dma_enabled)
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{
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@ -203,8 +195,8 @@ TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::dma_timer_callback )
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}
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/* set the final count to 0 and the source address to the final address */
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tms32031_io_regs[DMA_TRANSFER_COUNT] = 0;
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tms32031_io_regs[DMA_SOURCE_ADDR] = param;
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m_tms32031_io_regs[DMA_TRANSFER_COUNT] = 0;
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m_tms32031_io_regs[DMA_SOURCE_ADDR] = param;
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/* set the interrupt */
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m_cpu->set_input_line(TMS3203X_DINT, ASSERT_LINE);
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@ -214,10 +206,8 @@ TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::dma_timer_callback )
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void atari_cage_device::update_dma_state(address_space &space)
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{
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uint32_t *tms32031_io_regs = m_tms32031_io_regs;
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/* determine the new enabled state */
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int enabled = ((tms32031_io_regs[DMA_GLOBAL_CTL] & 3) == 3) && (tms32031_io_regs[DMA_TRANSFER_COUNT] != 0);
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int enabled = ((m_tms32031_io_regs[DMA_GLOBAL_CTL] & 3) == 3) && (m_tms32031_io_regs[DMA_TRANSFER_COUNT] != 0);
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/* see if we turned on */
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if (enabled && !m_dma_enabled)
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@ -227,28 +217,30 @@ void atari_cage_device::update_dma_state(address_space &space)
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int i;
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/* make sure our assumptions are correct */
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if (tms32031_io_regs[DMA_DEST_ADDR] != 0x808048)
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logerror("CAGE DMA: unexpected dest address %08X!\n", tms32031_io_regs[DMA_DEST_ADDR]);
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if ((tms32031_io_regs[DMA_GLOBAL_CTL] & 0xfef) != 0xe03)
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logerror("CAGE DMA: unexpected transfer params %08X!\n", tms32031_io_regs[DMA_GLOBAL_CTL]);
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if (m_tms32031_io_regs[DMA_DEST_ADDR] != 0x808048)
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logerror("CAGE DMA: unexpected dest address %08X!\n", m_tms32031_io_regs[DMA_DEST_ADDR]);
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if ((m_tms32031_io_regs[DMA_GLOBAL_CTL] & 0xfef) != 0xe03)
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logerror("CAGE DMA: unexpected transfer params %08X!\n", m_tms32031_io_regs[DMA_GLOBAL_CTL]);
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/* do the DMA up front */
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addr = tms32031_io_regs[DMA_SOURCE_ADDR];
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inc = (tms32031_io_regs[DMA_GLOBAL_CTL] >> 4) & 1;
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for (i = 0; i < tms32031_io_regs[DMA_TRANSFER_COUNT]; i++)
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addr = m_tms32031_io_regs[DMA_SOURCE_ADDR];
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inc = (m_tms32031_io_regs[DMA_GLOBAL_CTL] >> 4) & 1;
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for (i = 0; i < m_tms32031_io_regs[DMA_TRANSFER_COUNT]; i++)
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{
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sound_data[i % STACK_SOUND_BUFSIZE] = space.read_dword(addr);
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addr += inc;
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if (i % STACK_SOUND_BUFSIZE == STACK_SOUND_BUFSIZE - 1)
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dmadac_transfer(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
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for (int j = 0; j < DAC_BUFFER_CHANNELS; j++)
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m_dmadac[j]->transfer(j, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
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}
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if (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE != 0)
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dmadac_transfer(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data);
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if (m_tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE != 0)
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for (int j = 0; j < DAC_BUFFER_CHANNELS; j++)
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m_dmadac[j]->transfer(j, 1, DAC_BUFFER_CHANNELS, (m_tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data);
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/* compute the time of the interrupt and set the timer */
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if (!m_dma_timer_enabled)
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{
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attotime period = m_serial_period_per_word * tms32031_io_regs[DMA_TRANSFER_COUNT];
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attotime period = m_serial_period_per_word * m_tms32031_io_regs[DMA_TRANSFER_COUNT];
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m_dma_timer->adjust(period, addr, period);
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m_dma_timer_enabled = 1;
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}
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@ -285,20 +277,18 @@ TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::cage_timer_callback )
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void atari_cage_device::update_timer(int which)
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{
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uint32_t *tms32031_io_regs = m_tms32031_io_regs;
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/* determine the new enabled state */
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int base = 0x10 * which;
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int enabled = ((tms32031_io_regs[base + TIMER0_GLOBAL_CTL] & 0xc0) == 0xc0);
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int enabled = ((m_tms32031_io_regs[base + TIMER0_GLOBAL_CTL] & 0xc0) == 0xc0);
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/* see if we turned on */
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if (enabled && !m_timer_enabled[which])
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{
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attotime period = m_cpu_h1_clock_period * (2 * tms32031_io_regs[base + TIMER0_PERIOD]);
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attotime period = m_cpu_h1_clock_period * (2 * m_tms32031_io_regs[base + TIMER0_PERIOD]);
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/* make sure our assumptions are correct */
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if (tms32031_io_regs[base + TIMER0_GLOBAL_CTL] != 0x2c1)
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logerror("CAGE TIMER%d: unexpected timer config %08X!\n", which, tms32031_io_regs[base + TIMER0_GLOBAL_CTL]);
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if (m_tms32031_io_regs[base + TIMER0_GLOBAL_CTL] != 0x2c1)
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logerror("CAGE TIMER%d: unexpected timer config %08X!\n", which, m_tms32031_io_regs[base + TIMER0_GLOBAL_CTL]);
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m_timer[which]->adjust(period, which);
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}
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@ -323,7 +313,6 @@ void atari_cage_device::update_timer(int which)
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void atari_cage_device::update_serial()
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{
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uint32_t *tms32031_io_regs = m_tms32031_io_regs;
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attotime serial_clock_period, bit_clock_period;
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uint32_t freq;
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@ -331,21 +320,24 @@ void atari_cage_device::update_serial()
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serial_clock_period = m_cpu_h1_clock_period * 2;
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/* if we're in clock mode, muliply by another factor of 2 */
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if (tms32031_io_regs[SPORT_GLOBAL_CTL] & 4)
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if (m_tms32031_io_regs[SPORT_GLOBAL_CTL] & 4)
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serial_clock_period *= 2;
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/* now multiply by the timer period */
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bit_clock_period = serial_clock_period * (tms32031_io_regs[SPORT_TIMER_PERIOD] & 0xffff);
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bit_clock_period = serial_clock_period * (m_tms32031_io_regs[SPORT_TIMER_PERIOD] & 0xffff);
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/* and times the number of bits per sample */
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m_serial_period_per_word = bit_clock_period * (8 * (((tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1));
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m_serial_period_per_word = bit_clock_period * (8 * (((m_tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1));
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/* compute the step value to stretch this to the sample_rate */
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freq = ATTOSECONDS_TO_HZ(m_serial_period_per_word.attoseconds()) / DAC_BUFFER_CHANNELS;
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if (freq > 0 && freq < 100000)
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{
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dmadac_set_frequency(&m_dmadac[0], DAC_BUFFER_CHANNELS, freq);
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dmadac_enable(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1);
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for (int i = 0; i < 4; i++)
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{
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m_dmadac[i]->set_frequency(freq);
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m_dmadac[i]->enable(1);
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}
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}
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}
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@ -359,8 +351,7 @@ void atari_cage_device::update_serial()
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READ32_MEMBER( atari_cage_device::tms32031_io_r )
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{
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uint32_t *tms32031_io_regs = m_tms32031_io_regs;
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uint16_t result = tms32031_io_regs[offset];
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uint16_t result = m_tms32031_io_regs[offset];
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switch (offset)
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{
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@ -377,12 +368,10 @@ READ32_MEMBER( atari_cage_device::tms32031_io_r )
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WRITE32_MEMBER( atari_cage_device::tms32031_io_w )
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{
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uint32_t *tms32031_io_regs = m_tms32031_io_regs;
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COMBINE_DATA(&tms32031_io_regs[offset]);
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COMBINE_DATA(&m_tms32031_io_regs[offset]);
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if (LOG_32031_IOPORTS)
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logerror("%s CAGE:%s write = %08X\n", machine().describe_context(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
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logerror("%s CAGE:%s write = %08X\n", machine().describe_context(), register_names[offset & 0x7f], m_tms32031_io_regs[offset]);
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switch (offset)
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{
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@ -413,8 +402,8 @@ WRITE32_MEMBER( atari_cage_device::tms32031_io_w )
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case SPORT_DATA_TX:
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#if (DAC_BUFFER_CHANNELS == 4)
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if ((int)ATTOSECONDS_TO_HZ(m_serial_period_per_word.attoseconds()) == 22050*4 && (tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62)
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tms32031_io_regs[SPORT_RX_CTL] ^= 0x800;
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if ((int)ATTOSECONDS_TO_HZ(m_serial_period_per_word.attoseconds()) == 22050*4 && (m_tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62)
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m_tms32031_io_regs[SPORT_RX_CTL] ^= 0x800;
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#endif
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break;
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@ -539,8 +528,6 @@ uint16_t atari_cage_device::control_r()
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void atari_cage_device::control_w(uint16_t data)
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{
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uint32_t *tms32031_io_regs = m_tms32031_io_regs;
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m_control = data;
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/* CPU is reset if both control lines are 0 */
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@ -558,7 +545,7 @@ void atari_cage_device::control_w(uint16_t data)
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m_timer[0]->reset();
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m_timer[1]->reset();
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memset(tms32031_io_regs, 0, 0x60 * 4);
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memset(m_tms32031_io_regs, 0, 0x60 * 4);
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m_cpu_to_cage_ready = 0;
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m_cage_to_cpu_ready = 0;
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@ -599,11 +586,11 @@ void atari_cage_device::cage_map(address_map &map)
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{
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map(0x000000, 0x00ffff).ram().share("cageram");
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map(0x200000, 0x200000).nopw();
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map(0x400000, 0x47ffff).bankr("bank10");
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map(0x400000, 0x47ffff).bankr("bootbank");
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map(0x808000, 0x8080ff).rw(FUNC(atari_cage_device::tms32031_io_r), FUNC(atari_cage_device::tms32031_io_w));
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map(0x809800, 0x809fff).ram();
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map(0xa00000, 0xa00000).rw(FUNC(atari_cage_device::cage_from_main_r), FUNC(atari_cage_device::cage_to_main_w));
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map(0xc00000, 0xffffff).bankr("bank11");
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map(0xc00000, 0xffffff).bankr("mainbank");
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}
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@ -611,13 +598,13 @@ void atari_cage_seattle_device::cage_map_seattle(address_map &map)
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{
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map(0x000000, 0x00ffff).ram().share("cageram");
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map(0x200000, 0x200000).nopw();
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map(0x400000, 0x47ffff).bankr("bank10");
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map(0x400000, 0x47ffff).bankr("bootbank");
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map(0x808000, 0x8080ff).rw(FUNC(atari_cage_seattle_device::tms32031_io_r), FUNC(atari_cage_seattle_device::tms32031_io_w));
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map(0x809800, 0x809fff).ram();
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map(0xa00000, 0xa00000).rw(FUNC(atari_cage_seattle_device::cage_from_main_r), FUNC(atari_cage_seattle_device::cage_from_main_ack_w));
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map(0xa00001, 0xa00001).w(FUNC(atari_cage_seattle_device::cage_to_main_w));
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map(0xa00003, 0xa00003).r(FUNC(atari_cage_seattle_device::cage_io_status_r));
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map(0xc00000, 0xffffff).bankr("bank11");
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map(0xc00000, 0xffffff).bankr("mainbank");
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}
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@ -628,7 +615,7 @@ void atari_cage_seattle_device::cage_map_seattle(address_map &map)
|
||||
MACHINE_CONFIG_START(atari_cage_device::device_add_mconfig)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("cage", TMS32031, 33868800)
|
||||
MCFG_DEVICE_ADD("cpu", TMS32031, 33868800)
|
||||
MCFG_DEVICE_PROGRAM_MAP(cage_map)
|
||||
MCFG_TMS3203X_MCBL(true)
|
||||
|
||||
@ -686,6 +673,6 @@ MACHINE_CONFIG_START(atari_cage_seattle_device::device_add_mconfig)
|
||||
|
||||
atari_cage_device::device_add_mconfig(config);
|
||||
|
||||
MCFG_DEVICE_MODIFY("cage")
|
||||
MCFG_DEVICE_MODIFY("cpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP(cage_map_seattle)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -11,13 +11,11 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cpu/tms32031/tms32031.h"
|
||||
#include "machine/gen_latch.h"
|
||||
#include "machine/timer.h"
|
||||
#include "sound/dmadac.h"
|
||||
|
||||
#define CAGE_IRQ_REASON_DATA_READY (1)
|
||||
#define CAGE_IRQ_REASON_BUFFER_EMPTY (2)
|
||||
|
||||
#define MCFG_ATARI_CAGE_IRQ_CALLBACK(_write) \
|
||||
devcb = &downcast<atari_cage_device &>(*device).set_irqhandler_callback(DEVCB_##_write);
|
||||
|
||||
@ -27,6 +25,12 @@
|
||||
class atari_cage_device : public device_t
|
||||
{
|
||||
public:
|
||||
enum
|
||||
{
|
||||
CAGE_IRQ_REASON_DATA_READY = 0x01,
|
||||
CAGE_IRQ_REASON_BUFFER_EMPTY = 0x02
|
||||
};
|
||||
|
||||
// construction/destruction
|
||||
atari_cage_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
@ -67,8 +71,18 @@ protected:
|
||||
|
||||
private:
|
||||
required_shared_ptr<uint32_t> m_cageram;
|
||||
cpu_device *m_cpu;
|
||||
required_device<tms32031_device> m_cpu;
|
||||
required_device<generic_latch_16_device> m_soundlatch;
|
||||
required_device<timer_device> m_dma_timer;
|
||||
required_device_array<timer_device, 2> m_timer;
|
||||
optional_device_array<dmadac_sound_device, 4> m_dmadac;
|
||||
|
||||
required_memory_bank m_bootbank;
|
||||
required_memory_bank m_mainbank;
|
||||
|
||||
required_memory_region m_bootrom;
|
||||
required_memory_region m_mainrom;
|
||||
|
||||
attotime m_cpu_h1_clock_period;
|
||||
|
||||
uint8_t m_cpu_to_cage_ready;
|
||||
@ -76,22 +90,18 @@ private:
|
||||
|
||||
devcb_write8 m_irqhandler;
|
||||
|
||||
|
||||
attotime m_serial_period_per_word;
|
||||
|
||||
uint8_t m_dma_enabled;
|
||||
uint8_t m_dma_timer_enabled;
|
||||
timer_device *m_dma_timer;
|
||||
|
||||
uint8_t m_timer_enabled[2];
|
||||
timer_device *m_timer[2];
|
||||
|
||||
uint32_t m_tms32031_io_regs[0x100];
|
||||
uint16_t m_from_main;
|
||||
uint16_t m_control;
|
||||
|
||||
uint32_t *m_speedup_ram;
|
||||
dmadac_sound_device *m_dmadac[4];
|
||||
|
||||
offs_t m_speedup;
|
||||
};
|
||||
|
||||
@ -103,7 +103,7 @@ WRITE8_MEMBER(atarigt_state::cage_irq_callback)
|
||||
|
||||
READ32_MEMBER(atarigt_state::special_port2_r)
|
||||
{
|
||||
int temp = ioport("SERVICE")->read();
|
||||
int temp = m_service_io->read();
|
||||
temp ^= 0x0001; /* /A2DRDY always high for now */
|
||||
return (temp << 16) | temp;
|
||||
}
|
||||
@ -111,7 +111,7 @@ READ32_MEMBER(atarigt_state::special_port2_r)
|
||||
|
||||
READ32_MEMBER(atarigt_state::special_port3_r)
|
||||
{
|
||||
int temp = ioport("COIN")->read();
|
||||
int temp = m_coin_io->read();
|
||||
if (m_video_int_state) temp ^= 0x0001;
|
||||
if (m_scanline_int_state) temp ^= 0x0002;
|
||||
return (temp << 16) | temp;
|
||||
@ -121,7 +121,7 @@ READ32_MEMBER(atarigt_state::special_port3_r)
|
||||
inline void atarigt_state::compute_fake_pots(int *pots)
|
||||
{
|
||||
#if (HACK_TMEK_CONTROLS)
|
||||
int fake = ioport("FAKE")->read();
|
||||
int fake = m_fake_io->read();
|
||||
|
||||
pots[0] = pots[1] = pots[2] = pots[3] = 0x80;
|
||||
|
||||
@ -412,12 +412,12 @@ void atarigt_state::primrage_protection_w(address_space &space, offs_t offset, u
|
||||
primrage_update_mode(offset);
|
||||
|
||||
/* check for certain read sequences */
|
||||
if (m_protmode == 1 && offset >= 0xdc7800 && offset < 0xdc7800 + sizeof(m_protdata) * 2)
|
||||
m_protdata[(offset - 0xdc7800) / 2] = data;
|
||||
if (m_protmode == 1 && offset >= 0xdc7800 && offset < 0xdc7800 + (0x800 * 2))
|
||||
m_protdata[(offset - 0xdc7800) >> 1] = data;
|
||||
|
||||
if (m_protmode == 2)
|
||||
{
|
||||
int temp = (offset - 0xdc7800) / 2;
|
||||
int temp = (offset - 0xdc7800) >> 1;
|
||||
if (LOG_PROTECTION) logerror("prot:mode 2 param = %04X\n", temp);
|
||||
m_protresult = temp * 0x6915 + 0x6915;
|
||||
}
|
||||
@ -730,7 +730,7 @@ static const gfx_layout pflayout =
|
||||
5,
|
||||
{ 0, 0, 1, 2, 3 },
|
||||
{ RGN_FRAC(1,3)+0, RGN_FRAC(1,3)+4, 0, 4, RGN_FRAC(1,3)+8, RGN_FRAC(1,3)+12, 8, 12 },
|
||||
{ 0*8, 2*8, 4*8, 6*8, 8*8, 10*8, 12*8, 14*8 },
|
||||
{ STEP8(0,16) },
|
||||
16*8
|
||||
};
|
||||
|
||||
@ -742,7 +742,7 @@ static const gfx_layout pftoplayout =
|
||||
6,
|
||||
{ RGN_FRAC(2,3)+0, RGN_FRAC(2,3)+4, 0, 0, 0, 0 },
|
||||
{ 3, 2, 1, 0, 11, 10, 9, 8 },
|
||||
{ 0*8, 2*8, 4*8, 6*8, 8*8, 10*8, 12*8, 14*8 },
|
||||
{ STEP8(0,16) },
|
||||
16*8
|
||||
};
|
||||
|
||||
@ -752,9 +752,9 @@ static const gfx_layout anlayout =
|
||||
8,8,
|
||||
RGN_FRAC(1,1),
|
||||
4,
|
||||
{ 0, 1, 2, 3 },
|
||||
{ 0, 4, 8, 12, 16, 20, 24, 28 },
|
||||
{ 0*8, 4*8, 8*8, 12*8, 16*8, 20*8, 24*8, 28*8 },
|
||||
{ STEP4(0,1) },
|
||||
{ STEP8(0,4) },
|
||||
{ STEP8(0,4*8) },
|
||||
32*8
|
||||
};
|
||||
|
||||
@ -811,7 +811,7 @@ MACHINE_CONFIG_START(atarigt_state::atarigt)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_atarigt)
|
||||
MCFG_PALETTE_ADD("palette", 32768)
|
||||
MCFG_PALETTE_ADD("palette", MRAM_ENTRIES)
|
||||
|
||||
MCFG_TILEMAP_ADD_CUSTOM("playfield", "gfxdecode", 2, atarigt_state, get_playfield_tile_info, 8,8, atarigt_playfield_scan, 128,64)
|
||||
MCFG_TILEMAP_ADD_STANDARD("alpha", "gfxdecode", 2, atarigt_state, get_alpha_tile_info, 8,8, SCAN_ROWS, 64, 32)
|
||||
@ -869,7 +869,7 @@ ROM_START( tmek )
|
||||
ROM_LOAD32_BYTE( "0042d", 0x00002, 0x20000, CRC(ef9feda4) SHA1(9fb6e91d4c22e28ced61d0d1f28f5e43191c8762) )
|
||||
ROM_LOAD32_BYTE( "0041d", 0x00003, 0x20000, CRC(179da056) SHA1(5f7ddf44aab55beaf2c377b0c93279acb6273255) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "0078c", 0x000000, 0x080000, CRC(ff5b979a) SHA1(deb8ee454b6b7c7bddb2ba0c808869e45b19e55f) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -924,7 +924,7 @@ ROM_START( tmek51p )
|
||||
ROM_LOAD32_BYTE( "prog2", 0x00002, 0x20000, CRC(bdcf5942) SHA1(21c54694bfe1e5663e67a54afed2a0f37b0f00de) )
|
||||
ROM_LOAD32_BYTE( "prog3", 0x00003, 0x20000, CRC(7b59022a) SHA1(7395063ff0ecda0453dc7d981ca0b90b8411b715) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "0078c", 0x000000, 0x080000, CRC(ff5b979a) SHA1(deb8ee454b6b7c7bddb2ba0c808869e45b19e55f) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -979,7 +979,7 @@ ROM_START( tmek45 )
|
||||
ROM_LOAD32_BYTE( "0042c", 0x00002, 0x20000, CRC(ba8745be) SHA1(139a3132ea2c69e37e63868402fcf10852953e9b) )
|
||||
ROM_LOAD32_BYTE( "0041c", 0x00003, 0x20000, CRC(0285bc17) SHA1(346d9fcbea4b22986be04971074531bc0c014c79) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "0078b", 0x000000, 0x080000, CRC(a952771c) SHA1(49982ea864a99c07f45886ada7e2c9427a75f775) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -1034,7 +1034,7 @@ ROM_START( tmek44 )
|
||||
ROM_LOAD32_BYTE( "0042b", 0x00002, 0x20000, CRC(ce68a9b3) SHA1(47b7a0ac8cce3d40f3f7559ec1b137dfdeaf1d83) )
|
||||
ROM_LOAD32_BYTE( "0041b", 0x00003, 0x20000, CRC(b71ec759) SHA1(d4bed4bbab2c3bd278da4cd0f53580d7f66d8152) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "0078a", 0x000000, 0x080000, CRC(314d736f) SHA1(b23946fde6ea47d6a6e3430a9df4b06d453a94c8) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -1089,7 +1089,7 @@ ROM_START( tmek20 )
|
||||
ROM_LOAD32_BYTE( "pgm2", 0x00002, 0x20000, CRC(ce9a77d4) SHA1(025143b59d85180286086940b05c8e5ea0b4a7fe) )
|
||||
ROM_LOAD32_BYTE( "pgm3", 0x00003, 0x20000, CRC(28b0e210) SHA1(7567671beecc7d30e9d4b61cf7d3448bb1dbb072) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "0078", 0x000000, 0x080000, BAD_DUMP CRC(314d736f) SHA1(b23946fde6ea47d6a6e3430a9df4b06d453a94c8) ) // not dumped from this pcb, rom taken from another set instead
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -1144,7 +1144,7 @@ ROM_START( primrage )
|
||||
ROM_LOAD32_BYTE( "136102-1042b.27l", 0x000002, 0x80000, CRC(750e8095) SHA1(4660637136b1a25169d8c43646c8b87081763987) )
|
||||
ROM_LOAD32_BYTE( "136102-1041b.25l", 0x000003, 0x80000, CRC(6a90d283) SHA1(7c18c97cb5e5cdd26a52cd6bc099fbce87055311) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "136102-1078a.11a", 0x000000, 0x080000, CRC(0656435f) SHA1(f8e498171e754eb8703dad6b2351509bbb27e06b) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -1230,7 +1230,7 @@ ROM_START( primrage20 )
|
||||
ROM_LOAD32_BYTE( "136102-0042b.27l", 0x000002, 0x80000, CRC(cd6062b9) SHA1(2973fb561ab68cd48ec132b6720c04d10bedfd19) )
|
||||
ROM_LOAD32_BYTE( "136102-0041b.25l", 0x000003, 0x80000, CRC(3008f6f0) SHA1(45aac457b4584ee3bd3561e3b2e34e49aa61fbc5) )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "136102-0078a.11a", 0x000000, 0x080000, CRC(91df8d8f) SHA1(6d361f88de604b8f11dd9bfe85ff18bcd322862d) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -1308,7 +1308,7 @@ WRITE32_MEMBER(atarigt_state::tmek_pf_w)
|
||||
|
||||
void atarigt_state::init_tmek()
|
||||
{
|
||||
m_is_primrage = 0;
|
||||
m_is_primrage = false;
|
||||
|
||||
/* setup protection */
|
||||
m_protection_r = &atarigt_state::tmek_protection_r;
|
||||
@ -1321,11 +1321,14 @@ void atarigt_state::init_tmek()
|
||||
|
||||
void atarigt_state::init_primrage()
|
||||
{
|
||||
m_is_primrage = 1;
|
||||
m_is_primrage = true;
|
||||
|
||||
/* install protection */
|
||||
m_protection_r = &atarigt_state::primrage_protection_r;
|
||||
m_protection_w = &atarigt_state::primrage_protection_w;
|
||||
|
||||
m_protdata = make_unique_clear<uint8_t[]>(0x800);
|
||||
save_pointer(NAME(m_protdata), 0x800);
|
||||
}
|
||||
|
||||
/*************************************
|
||||
|
||||
@ -332,8 +332,8 @@ WRITE32_MEMBER(metalmx_state::reset_w)
|
||||
if (ACCESSING_BITS_16_31)
|
||||
{
|
||||
data >>= 16;
|
||||
m_dsp32c_1->set_input_line(INPUT_LINE_RESET, data & 2 ? CLEAR_LINE : ASSERT_LINE);
|
||||
m_dsp32c_2->set_input_line(INPUT_LINE_RESET, data & 1 ? CLEAR_LINE : ASSERT_LINE);
|
||||
m_dsp32c[0]->set_input_line(INPUT_LINE_RESET, data & 2 ? CLEAR_LINE : ASSERT_LINE);
|
||||
m_dsp32c[1]->set_input_line(INPUT_LINE_RESET, data & 1 ? CLEAR_LINE : ASSERT_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
@ -374,7 +374,8 @@ WRITE8_MEMBER(metalmx_state::cage_irq_callback)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE32_MEMBER(metalmx_state::dsp32c_1_w)
|
||||
template<int Chip>
|
||||
WRITE32_MEMBER(metalmx_state::dsp32c_w)
|
||||
{
|
||||
offset <<= 1;
|
||||
|
||||
@ -383,10 +384,11 @@ WRITE32_MEMBER(metalmx_state::dsp32c_1_w)
|
||||
else if (ACCESSING_BITS_16_31)
|
||||
data >>= 16;
|
||||
|
||||
m_dsp32c_1->pio_w(offset, data);
|
||||
m_dsp32c[Chip]->pio_w(offset, data);
|
||||
}
|
||||
|
||||
READ32_MEMBER(metalmx_state::dsp32c_1_r)
|
||||
template<int Chip>
|
||||
READ32_MEMBER(metalmx_state::dsp32c_r)
|
||||
{
|
||||
uint32_t data;
|
||||
|
||||
@ -395,36 +397,7 @@ READ32_MEMBER(metalmx_state::dsp32c_1_r)
|
||||
if (ACCESSING_BITS_0_15)
|
||||
offset += 1;
|
||||
|
||||
data = m_dsp32c_1->pio_r(offset);
|
||||
|
||||
if (ACCESSING_BITS_16_31)
|
||||
data <<= 16;
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(metalmx_state::dsp32c_2_w)
|
||||
{
|
||||
offset <<= 1;
|
||||
|
||||
if (ACCESSING_BITS_0_15)
|
||||
offset += 1;
|
||||
else if (ACCESSING_BITS_16_31)
|
||||
data >>= 16;
|
||||
|
||||
m_dsp32c_2->pio_w(offset, data);
|
||||
}
|
||||
|
||||
READ32_MEMBER(metalmx_state::dsp32c_2_r)
|
||||
{
|
||||
uint32_t data;
|
||||
|
||||
offset <<= 1;
|
||||
|
||||
if (ACCESSING_BITS_0_15)
|
||||
offset += 1;
|
||||
|
||||
data = m_dsp32c_2->pio_r(offset);
|
||||
data = m_dsp32c[Chip]->pio_r(offset);
|
||||
|
||||
if (ACCESSING_BITS_16_31)
|
||||
data <<= 16;
|
||||
@ -513,9 +486,9 @@ void metalmx_state::main_map(address_map &map)
|
||||
map(0x400000, 0x4000ff).rw(FUNC(metalmx_state::host_gsp_r), FUNC(metalmx_state::host_gsp_w));
|
||||
map(0x600000, 0x6fffff).rw(FUNC(metalmx_state::host_dram_r), FUNC(metalmx_state::host_dram_w));
|
||||
map(0x700000, 0x7fffff).rw(FUNC(metalmx_state::host_vram_r), FUNC(metalmx_state::host_vram_w));
|
||||
map(0x800000, 0x80001f).rw(FUNC(metalmx_state::dsp32c_2_r), FUNC(metalmx_state::dsp32c_2_w));
|
||||
map(0x800000, 0x80001f).rw(FUNC(metalmx_state::dsp32c_r<1>), FUNC(metalmx_state::dsp32c_w<1>));
|
||||
map(0x800020, 0x85ffff).noprw(); /* Unknown */
|
||||
map(0x880000, 0x88001f).rw(FUNC(metalmx_state::dsp32c_1_r), FUNC(metalmx_state::dsp32c_1_w));
|
||||
map(0x880000, 0x88001f).rw(FUNC(metalmx_state::dsp32c_r<0>), FUNC(metalmx_state::dsp32c_w<0>));
|
||||
map(0x980000, 0x9800ff).w(FUNC(metalmx_state::reset_w));
|
||||
map(0xb40000, 0xb40003).rw(FUNC(metalmx_state::sound_data_r), FUNC(metalmx_state::sound_data_w));
|
||||
map(0xf00000, 0xf00003).ram(); /* Network message port */
|
||||
@ -714,7 +687,6 @@ MACHINE_CONFIG_START(metalmx_state::metalmx)
|
||||
MCFG_DEVICE_ADD("dsp32c_2", DSP32C, 40000000) /* Unverified */
|
||||
MCFG_DEVICE_PROGRAM_MAP(dsp32c_2_map)
|
||||
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
@ -740,8 +712,8 @@ void metalmx_state::init_metalmx()
|
||||
|
||||
void metalmx_state::machine_reset()
|
||||
{
|
||||
m_dsp32c_1->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
m_dsp32c_2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
m_dsp32c[0]->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
m_dsp32c[1]->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
}
|
||||
|
||||
|
||||
@ -776,7 +748,7 @@ ROM_START( metalmx )
|
||||
/* ------------------------------------------------
|
||||
ROMCH31 A053443 (there are 2 of these boards)
|
||||
-------------------------------------------------*/
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 )
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 )
|
||||
ROM_LOAD32_BYTE( "bootmetl.r34", 0x00000, 0x80000, CRC(ec799644) SHA1(32c77abb70fee1da8e3d7141bce2032e73e0eb35) )
|
||||
|
||||
ROM_REGION32_LE( 0x80000, "cage", 0 )
|
||||
|
||||
@ -2196,7 +2196,7 @@ ROM_START( sfrush )
|
||||
|
||||
ROM_REGION32_LE( 0x100000, PCI_ID_GALILEO":update", ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM Version L1.0 */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM Version L1.0 */
|
||||
ROM_LOAD32_BYTE( "sndboot.u69", 0x000000, 0x080000, CRC(7e52cdc7) SHA1(f735063e19d2ca672cef6d761a2a47df272e8c59) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -2215,7 +2215,7 @@ ROM_START( sfrusha )
|
||||
|
||||
ROM_REGION32_LE( 0x100000, PCI_ID_GALILEO":update", ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM Version L1.0 */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM Version L1.0 */
|
||||
ROM_LOAD32_BYTE( "sndboot.u69", 0x000000, 0x080000, CRC(7e52cdc7) SHA1(f735063e19d2ca672cef6d761a2a47df272e8c59) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -2236,7 +2236,7 @@ ROM_START( sfrushrk )
|
||||
|
||||
ROM_REGION32_LE( 0x100000, PCI_ID_GALILEO":update", ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "audboot.bin", 0x000000, 0x080000, CRC(c70c060d) SHA1(dd014bd13efdf5adc5450836bd4650351abefc46) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -2256,7 +2256,7 @@ ROM_START( sfrushrkw )
|
||||
|
||||
ROM_REGION32_LE( 0x100000, PCI_ID_GALILEO":update", ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "audboot.bin", 0x000000, 0x080000, CRC(c70c060d) SHA1(dd014bd13efdf5adc5450836bd4650351abefc46) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
@ -2275,7 +2275,7 @@ ROM_START( sfrushrkwo )
|
||||
|
||||
ROM_REGION32_LE( 0x100000, PCI_ID_GALILEO":update", ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_REGION32_LE( 0x200000, "cage:boot", 0 ) /* TMS320C31 boot ROM */
|
||||
ROM_LOAD32_BYTE( "audboot.bin", 0x000000, 0x080000, CRC(c70c060d) SHA1(dd014bd13efdf5adc5450836bd4650351abefc46) )
|
||||
|
||||
ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
|
||||
|
||||
@ -20,17 +20,21 @@
|
||||
class atarigt_state : public atarigen_state
|
||||
{
|
||||
public:
|
||||
atarigt_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: atarigen_state(mconfig, type, tag),
|
||||
m_colorram(*this, "colorram", 32),
|
||||
m_adc(*this, "adc"),
|
||||
m_playfield_tilemap(*this, "playfield"),
|
||||
m_alpha_tilemap(*this, "alpha"),
|
||||
m_rle(*this, "rle"),
|
||||
m_mo_command(*this, "mo_command"),
|
||||
m_cage(*this, "cage") { }
|
||||
atarigt_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
atarigen_state(mconfig, type, tag),
|
||||
m_colorram(*this, "colorram", 32),
|
||||
m_adc(*this, "adc"),
|
||||
m_playfield_tilemap(*this, "playfield"),
|
||||
m_alpha_tilemap(*this, "alpha"),
|
||||
m_rle(*this, "rle"),
|
||||
m_service_io(*this, "SERVICE"),
|
||||
m_coin_io(*this, "COIN"),
|
||||
m_fake_io(*this, "FAKE"),
|
||||
m_mo_command(*this, "mo_command"),
|
||||
m_cage(*this, "cage")
|
||||
{ }
|
||||
|
||||
uint8_t m_is_primrage;
|
||||
bool m_is_primrage;
|
||||
required_shared_ptr<uint16_t> m_colorram;
|
||||
|
||||
optional_device<adc0808_device> m_adc;
|
||||
@ -39,6 +43,10 @@ public:
|
||||
required_device<tilemap_device> m_alpha_tilemap;
|
||||
required_device<atari_rle_objects_device> m_rle;
|
||||
|
||||
optional_ioport m_service_io;
|
||||
optional_ioport m_coin_io;
|
||||
optional_ioport m_fake_io;
|
||||
|
||||
bitmap_ind16 m_pf_bitmap;
|
||||
bitmap_ind16 m_an_bitmap;
|
||||
|
||||
@ -49,8 +57,6 @@ public:
|
||||
|
||||
uint32_t m_tram_checksum;
|
||||
|
||||
uint32_t m_expanded_mram[MRAM_ENTRIES * 3];
|
||||
|
||||
required_shared_ptr<uint32_t> m_mo_command;
|
||||
optional_device<atari_cage_device> m_cage;
|
||||
|
||||
@ -61,7 +67,7 @@ public:
|
||||
offs_t m_protaddr[ADDRSEQ_COUNT];
|
||||
uint8_t m_protmode;
|
||||
uint16_t m_protresult;
|
||||
uint8_t m_protdata[0x800];
|
||||
std::unique_ptr<uint8_t[]> m_protdata;
|
||||
|
||||
virtual void update_interrupts() override;
|
||||
virtual void scanline_update(screen_device &screen, int scanline) override;
|
||||
|
||||
@ -20,8 +20,7 @@ public:
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_gsp(*this, "gsp"),
|
||||
m_adsp(*this, "adsp"),
|
||||
m_dsp32c_1(*this, "dsp32c_1"),
|
||||
m_dsp32c_2(*this, "dsp32c_2"),
|
||||
m_dsp32c(*this, "dsp32c_%u", 1U),
|
||||
m_cage(*this, "cage"),
|
||||
m_adsp_internal_program_ram(*this, "adsp_intprog"),
|
||||
m_gsp_dram(*this, "gsp_dram"),
|
||||
@ -39,10 +38,8 @@ protected:
|
||||
DECLARE_WRITE32_MEMBER(reset_w);
|
||||
DECLARE_READ32_MEMBER(sound_data_r);
|
||||
DECLARE_WRITE32_MEMBER(sound_data_w);
|
||||
DECLARE_WRITE32_MEMBER(dsp32c_1_w);
|
||||
DECLARE_READ32_MEMBER(dsp32c_1_r);
|
||||
DECLARE_WRITE32_MEMBER(dsp32c_2_w);
|
||||
DECLARE_READ32_MEMBER(dsp32c_2_r);
|
||||
template<int Chip> DECLARE_WRITE32_MEMBER(dsp32c_w);
|
||||
template<int Chip> DECLARE_READ32_MEMBER(dsp32c_r);
|
||||
DECLARE_WRITE32_MEMBER(host_gsp_w);
|
||||
DECLARE_READ32_MEMBER(host_gsp_r);
|
||||
DECLARE_READ32_MEMBER(host_dram_r);
|
||||
@ -65,8 +62,7 @@ private:
|
||||
required_device<m68ec020_device> m_maincpu;
|
||||
required_device<tms34020_device> m_gsp;
|
||||
required_device<adsp2105_device> m_adsp;
|
||||
required_device<dsp32c_device> m_dsp32c_1;
|
||||
required_device<dsp32c_device> m_dsp32c_2;
|
||||
required_device_array<dsp32c_device, 2> m_dsp32c;
|
||||
required_device<atari_cage_device> m_cage;
|
||||
|
||||
required_shared_ptr<uint32_t> m_adsp_internal_program_ram;
|
||||
|
||||
@ -778,9 +778,9 @@ WRITE8_MEMBER(midway_ioasic_device::cage_irq_handler)
|
||||
{
|
||||
logerror("CAGE irq handler: %d\n", data);
|
||||
m_sound_irq_state = 0;
|
||||
if (data & CAGE_IRQ_REASON_DATA_READY)
|
||||
if (data & atari_cage_device::CAGE_IRQ_REASON_DATA_READY)
|
||||
m_sound_irq_state |= 0x0040;
|
||||
if (data & CAGE_IRQ_REASON_BUFFER_EMPTY)
|
||||
if (data & atari_cage_device::CAGE_IRQ_REASON_BUFFER_EMPTY)
|
||||
m_sound_irq_state |= 0x0080;
|
||||
update_ioasic_irq();
|
||||
}
|
||||
|
||||
@ -94,7 +94,6 @@ VIDEO_START_MEMBER(atarigt_state,atarigt)
|
||||
save_item(NAME(m_playfield_xscroll));
|
||||
save_item(NAME(m_playfield_yscroll));
|
||||
save_item(NAME(m_tram_checksum));
|
||||
save_item(NAME(m_expanded_mram));
|
||||
}
|
||||
|
||||
|
||||
@ -110,7 +109,7 @@ void atarigt_state::atarigt_colorram_w(offs_t address, uint16_t data, uint16_t m
|
||||
uint16_t olddata;
|
||||
|
||||
/* update the raw data */
|
||||
address = (address & 0x7ffff) / 2;
|
||||
address = (address & 0x7ffff) >> 1;
|
||||
olddata = m_colorram[address];
|
||||
COMBINE_DATA(&m_colorram[address]);
|
||||
|
||||
@ -121,18 +120,18 @@ void atarigt_state::atarigt_colorram_w(offs_t address, uint16_t data, uint16_t m
|
||||
/* update expanded MRAM */
|
||||
else if (address >= 0x20000 && address < 0x28000)
|
||||
{
|
||||
m_expanded_mram[0 * MRAM_ENTRIES + (address & 0x7fff)] = (m_colorram[address] >> 8) << RSHIFT;
|
||||
m_expanded_mram[1 * MRAM_ENTRIES + (address & 0x7fff)] = (m_colorram[address] & 0xff) << GSHIFT;
|
||||
m_palette->set_pen_red_level(address & 0x7fff, (m_colorram[address] >> 8));
|
||||
m_palette->set_pen_green_level(address & 0x7fff, (m_colorram[address] & 0xff));
|
||||
}
|
||||
else if (address >= 0x30000 && address < 0x38000)
|
||||
m_expanded_mram[2 * MRAM_ENTRIES + (address & 0x7fff)] = (m_colorram[address] & 0xff) << BSHIFT;
|
||||
m_palette->set_pen_blue_level(address & 0x7fff, (m_colorram[address] & 0xff));
|
||||
}
|
||||
|
||||
|
||||
uint16_t atarigt_state::atarigt_colorram_r(offs_t address)
|
||||
{
|
||||
address &= 0x7ffff;
|
||||
return m_colorram[address / 2];
|
||||
return m_colorram[address >> 1];
|
||||
}
|
||||
|
||||
|
||||
@ -148,7 +147,7 @@ void atarigt_state::scanline_update(screen_device &screen, int scanline)
|
||||
int i;
|
||||
|
||||
/* keep in range */
|
||||
int offset = (scanline / 8) * 64 + 48;
|
||||
int offset = ((scanline & ~7) << 3) + 48;
|
||||
if (offset >= 0x800)
|
||||
return;
|
||||
|
||||
@ -490,7 +489,6 @@ uint32_t atarigt_state::screen_update_atarigt(screen_device &screen, bitmap_rgb3
|
||||
bitmap_ind16 &tm_bitmap = m_rle->vram(1);
|
||||
uint16_t *cram, *tram;
|
||||
int color_latch;
|
||||
uint32_t *mram;
|
||||
int x, y;
|
||||
|
||||
/* draw the playfield */
|
||||
@ -500,10 +498,10 @@ uint32_t atarigt_state::screen_update_atarigt(screen_device &screen, bitmap_rgb3
|
||||
m_alpha_tilemap->draw(screen, m_an_bitmap, cliprect, 0, 0);
|
||||
|
||||
/* cache pointers */
|
||||
color_latch = m_colorram[0x30000/2];
|
||||
cram = (uint16_t *)&m_colorram[0x00000/2] + 0x2000 * ((color_latch >> 3) & 1);
|
||||
tram = (uint16_t *)&m_colorram[0x20000/2] + 0x1000 * ((color_latch >> 4) & 3);
|
||||
mram = m_expanded_mram + 0x2000 * ((color_latch >> 6) & 3);
|
||||
color_latch = m_colorram[0x30000>>1];
|
||||
cram = (uint16_t *)&m_colorram[0x00000>>1] + ((color_latch & 0x08) << 10);
|
||||
tram = (uint16_t *)&m_colorram[0x20000>>1] + ((color_latch & 0x30) << 8);
|
||||
const pen_t *mram = &m_palette->pens()[(color_latch & 0xc0) << 7];
|
||||
|
||||
/* now do the nasty blend */
|
||||
for (y = cliprect.min_y; y <= cliprect.max_y; y++)
|
||||
@ -535,9 +533,9 @@ uint32_t atarigt_state::screen_update_atarigt(screen_device &screen, bitmap_rgb3
|
||||
cra = cram[cra];
|
||||
|
||||
/* compute the result */
|
||||
rgb = mram[0 * MRAM_ENTRIES + ((cra >> 10) & 0x01f)];
|
||||
rgb |= mram[1 * MRAM_ENTRIES + ((cra >> 5) & 0x01f)];
|
||||
rgb |= mram[2 * MRAM_ENTRIES + ((cra >> 0) & 0x01f)];
|
||||
rgb = mram[((cra >> 10) & 0x01f)] & 0xff0000;
|
||||
rgb |= mram[((cra >> 5) & 0x01f)] & 0x00ff00;
|
||||
rgb |= mram[((cra >> 0) & 0x01f)] & 0x0000ff;
|
||||
|
||||
/* final override */
|
||||
if (color_latch & 7)
|
||||
@ -593,9 +591,9 @@ uint32_t atarigt_state::screen_update_atarigt(screen_device &screen, bitmap_rgb3
|
||||
tra = 0;
|
||||
|
||||
/* compute the result */
|
||||
rgb = mram[0 * MRAM_ENTRIES + mra + ((cra >> 10) & 0x01f) + ((tra >> 5) & 0x3e0)];
|
||||
rgb |= mram[1 * MRAM_ENTRIES + mra + ((cra >> 5) & 0x01f) + ((tra >> 0) & 0x3e0)];
|
||||
rgb |= mram[2 * MRAM_ENTRIES + mra + ((cra >> 0) & 0x01f) + ((tra << 5) & 0x3e0)];
|
||||
rgb = mram[mra | ((cra >> 10) & 0x01f) | ((tra >> 5) & 0x3e0)] & 0xff0000;
|
||||
rgb |= mram[mra | ((cra >> 5) & 0x01f) | ((tra >> 0) & 0x3e0)] & 0x00ff00;
|
||||
rgb |= mram[mra | ((cra >> 0) & 0x01f) | ((tra << 5) & 0x3e0)] & 0x0000ff;
|
||||
|
||||
/* final override */
|
||||
if (color_latch & 7)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user