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https://github.com/holub/mame
synced 2025-05-11 00:28:49 +03:00
concept: Add master oscillator and some derivved clocks; hook up slot interrupts (nw)
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AJR
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e4b7c93b07
commit
709559b754
@ -220,6 +220,7 @@ const double XTAL::known_xtals[] = {
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16'000'000, /* 16_MHz_XTAL Extremely common, used on 100's of PCBs */
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16'097'280, /* 16.09728_MHz_XTAL DEC VT240 (1024 * 262 * 60) */
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16'128'000, /* 16.128_MHz_XTAL Fujitsu FM-7 */
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16'364'000, /* 16.364_MHz_XTAL Corvus Concept */
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16'384'000, /* 16.384_MHz_XTAL - */
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16'400'000, /* 16.4_MHz_XTAL MS 6102 */
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16'572'000, /* 16.572_MHz_XTAL Micro-Term ACT-5A */
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@ -13,7 +13,7 @@
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LAN port (seems more or less similar to AppleTalk)
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* 4 expansion ports enable to add expansion cards, namely floppy disk
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and hard disk controllers (the expansion ports are partially compatible
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with Apple 2 expansion ports)
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with Apple 2 expansion ports; DMA is not supported)
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Video: monochrome bitmapped display, 720*560 visible area (bitmaps are 768
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pixels wide in memory). One interesting feature is the fact that the
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@ -39,6 +39,7 @@
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#include "bus/a2bus/corvfdc01.h"
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#include "bus/a2bus/corvfdc02.h"
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#include "bus/rs232/rs232.h"
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#include "machine/input_merger.h"
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#include "emupal.h"
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#include "screen.h"
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#include "speaker.h"
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@ -49,7 +50,7 @@ void concept_state::concept_memmap(address_map &map)
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map(0x000008, 0x000fff).ram(); /* static RAM */
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map(0x010000, 0x011fff).rom().region("maincpu", 0x010000); /* boot ROM */
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map(0x020000, 0x021fff).rom().region("macsbug", 0x0); /* macsbugs ROM (optional) */
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map(0x030000, 0x03ffff).rw(FUNC(concept_state::concept_io_r), FUNC(concept_state::concept_io_w)); /* I/O space */
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map(0x030000, 0x03ffff).rw(FUNC(concept_state::io_r), FUNC(concept_state::io_w)).umask16(0x00ff); /* I/O space */
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map(0x080000, 0x0fffff).ram().share("videoram");/* AM_RAMBANK(2) */ /* DRAM */
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}
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@ -209,7 +210,7 @@ void concept_a2_cards(device_slot_interface &device)
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void concept_state::concept(machine_config &config)
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{
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/* basic machine hardware */
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M68000(config, m_maincpu, 8182000); /* 16.364 MHz / 2 */
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M68000(config, m_maincpu, 16.364_MHz_XTAL / 2);
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m_maincpu->set_addrmap(AS_PROGRAM, &concept_state::concept_memmap);
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config.m_minimum_quantum = attotime::from_hz(60);
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@ -232,12 +233,12 @@ void concept_state::concept(machine_config &config)
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SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 1.00);
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/* rtc */
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MM58274C(config, m_mm58274, 0);
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MM58274C(config, m_mm58274, 32.768_kHz_XTAL);
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m_mm58274->set_mode24(0); // 12 hour
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m_mm58274->set_day1(1); // monday
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/* via */
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VIA6522(config, m_via0, 1022750);
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VIA6522(config, m_via0, 16.364_MHz_XTAL / 16);
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m_via0->readpa_handler().set(FUNC(concept_state::via_in_a));
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m_via0->readpb_handler().set(FUNC(concept_state::via_in_b));
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m_via0->writepa_handler().set(FUNC(concept_state::via_out_a));
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@ -246,24 +247,28 @@ void concept_state::concept(machine_config &config)
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m_via0->irq_handler().set(FUNC(concept_state::via_irq_func));
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/* ACIAs */
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MOS6551(config, m_acia0, 0);
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m_acia0->set_xtal(XTAL(1'843'200));
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MOS6551(config, m_acia0, 16.364_MHz_XTAL / 16);
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m_acia0->set_xtal(16.364_MHz_XTAL / 9);
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m_acia0->txd_handler().set("rs232a", FUNC(rs232_port_device::write_txd));
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MOS6551(config, m_acia1, 0);
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m_acia1->set_xtal(XTAL(1'843'200));
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MOS6551(config, m_acia1, 16.364_MHz_XTAL / 16);
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m_acia1->set_xtal(16.364_MHz_XTAL / 9);
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m_acia1->txd_handler().set("rs232b", FUNC(rs232_port_device::write_txd));
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MOS6551(config, m_kbdacia, 0);
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m_kbdacia->set_xtal(XTAL(1'843'200));
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MOS6551(config, m_kbdacia, 16.364_MHz_XTAL / 16);
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m_kbdacia->set_xtal(16.364_MHz_XTAL / 9);
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/* Apple II bus */
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A2BUS(config, m_a2bus, 0).set_space(m_maincpu, AS_PROGRAM);
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m_a2bus->nmi_w().set("iocint", FUNC(input_merger_device::in_w<0>));
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m_a2bus->irq_w().set("iocint", FUNC(input_merger_device::in_w<1>));
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A2BUS_SLOT(config, "sl1", m_a2bus, concept_a2_cards, nullptr);
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A2BUS_SLOT(config, "sl2", m_a2bus, concept_a2_cards, nullptr);
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A2BUS_SLOT(config, "sl3", m_a2bus, concept_a2_cards, nullptr);
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A2BUS_SLOT(config, "sl4", m_a2bus, concept_a2_cards, "fdc01");
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INPUT_MERGER_ANY_HIGH(config, "iocint").output_handler().set(FUNC(concept_state::ioc_interrupt));
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/* 2x RS232 ports */
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rs232_port_device &rs232a(RS232_PORT(config, "rs232a", default_rs232_devices, nullptr));
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rs232a.rxd_handler().set(m_acia0, FUNC(mos6551_device::write_rxd));
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@ -41,6 +41,9 @@ public:
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m_videoram(*this,"videoram")
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{ }
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void concept(machine_config &config);
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private:
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required_device<cpu_device> m_maincpu;
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required_device<mos6551_device> m_acia0;
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required_device<mos6551_device> m_acia1;
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@ -54,8 +57,8 @@ public:
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uint8_t m_pending_interrupts;
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bool m_clock_enable;
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uint8_t m_clock_address;
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DECLARE_READ16_MEMBER(concept_io_r);
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DECLARE_WRITE16_MEMBER(concept_io_w);
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DECLARE_READ8_MEMBER(io_r);
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DECLARE_WRITE8_MEMBER(io_w);
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virtual void machine_start() override;
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virtual void machine_reset() override;
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virtual void video_start() override;
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@ -67,8 +70,9 @@ public:
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DECLARE_WRITE8_MEMBER(via_out_b);
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DECLARE_WRITE_LINE_MEMBER(via_out_cb2);
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DECLARE_WRITE_LINE_MEMBER(via_irq_func);
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DECLARE_WRITE_LINE_MEMBER(ioc_interrupt);
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void concept_set_interrupt(int level, int state);
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void concept(machine_config &config);
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void concept_memmap(address_map &map);
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};
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@ -73,6 +73,11 @@ uint32_t concept_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
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return 0;
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}
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WRITE_LINE_MEMBER(concept_state::ioc_interrupt)
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{
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concept_set_interrupt(IOCINT_level, state);
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}
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void concept_state::concept_set_interrupt(int level, int state)
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{
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int interrupt_mask;
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@ -164,11 +169,8 @@ WRITE_LINE_MEMBER(concept_state::via_irq_func)
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concept_set_interrupt(TIMINT_level, state);
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}
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READ16_MEMBER(concept_state::concept_io_r)
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READ8_MEMBER(concept_state::io_r)
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{
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if (! ACCESSING_BITS_0_7)
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return 0;
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switch ((offset >> 8) & 7)
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{
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case 0:
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@ -216,7 +218,7 @@ READ16_MEMBER(concept_state::concept_io_r)
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case 5:
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/* slot status */
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LOG(("concept_io_r: Slot status read at address 0x03%4.4x\n", offset << 1));
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break;
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return (~m_a2bus->get_a2bus_nmi_mask() & 0x0f) | (~m_a2bus->get_a2bus_irq_mask() & 0x0f) << 4;
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case 6:
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/* calendar R/W */
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@ -275,13 +277,8 @@ READ16_MEMBER(concept_state::concept_io_r)
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return 0;
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}
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WRITE16_MEMBER(concept_state::concept_io_w)
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WRITE8_MEMBER(concept_state::io_w)
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{
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if (! ACCESSING_BITS_0_7)
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return;
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data &= 0xff;
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switch ((offset >> 8) & 7)
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{
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case 0:
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