Merge pull request #3069 from daveshah1/new_vtxx

Add initial support for new VTxx handeld, SY-889 [David Shah]
This commit is contained in:
Miodrag Milanović 2018-01-14 19:13:03 +01:00 committed by GitHub
commit 70b4620ab3
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 122 additions and 16 deletions

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@ -40,11 +40,19 @@ READ8_MEMBER(ppu_vt03_device::palette_read)
void ppu_vt03_device::set_new_pen(int i) void ppu_vt03_device::set_new_pen(int i)
{ {
if(m_pal_mode == PAL_MODE_NEW_RGB) {
uint16_t rgbval = (m_newpal[i&0x7f] & 0xff) | ((m_newpal[(i&0x7f)+0x80] & 0xff)<<8);
uint8_t blue = (rgbval & 0x001f) << 3;
uint8_t green = (rgbval & 0x3e0) >> 2;
uint8_t red = (rgbval & 0x7C00) >> 7;
m_palette->set_pen_color(i & 0x7f, rgb_t(red, green, blue));
} else {
uint16_t palval = (m_newpal[i&0x7f] & 0x3f) | ((m_newpal[(i&0x7f)+0x80] & 0x3f)<<6); uint16_t palval = (m_newpal[i&0x7f] & 0x3f) | ((m_newpal[(i&0x7f)+0x80] & 0x3f)<<6);
// &0x3f so we don't attempt to use any of the extended colours right now because // &0x3f so we don't attempt to use any of the extended colours right now because
// I haven't managed to work out the format // I haven't managed to work out the format
m_palette->set_pen_indirect(i&0x7f,palval&0x3f); m_palette->set_pen_indirect(i&0x7f,palval&0x3f);
}
} }
WRITE8_MEMBER(ppu_vt03_device::palette_write) WRITE8_MEMBER(ppu_vt03_device::palette_write)
@ -100,13 +108,17 @@ void ppu_vt03_device::device_reset()
m_read_bg.resolve_safe(0); m_read_bg.resolve_safe(0);
m_read_sp.resolve_safe(0); m_read_sp.resolve_safe(0);
for (int i = 0;i < 0xff;i++)
m_newpal[i] = 0x0;
set_2010_reg(0x00);
set_2010_reg(0x80);
set_2010_reg(0x00); set_2010_reg(0x00);
// todo: what are the actual defaults for these? // todo: what are the actual defaults for these?
for (int i = 0;i < 0x20;i++) for (int i = 0;i < 0x20;i++)
set_201x_reg(i, 0x00); set_201x_reg(i, 0x00);
m_read_bg4_bg3 = 0; m_read_bg4_bg3 = 0;
m_va34 = 0; m_va34 = 0;
} }
@ -312,15 +324,14 @@ WRITE8_MEMBER(ppu_vt03_device::write)
} }
else else
{ {
logerror("%s: write to reg 0x20%02x %02x\n", machine().describe_context(), offset, data);
switch (offset) switch (offset)
{ {
case 0x10: case 0x10:
logerror("%s: write to reg 0x2010 %02x\n", machine().describe_context(), data);
set_2010_reg(data); set_2010_reg(data);
break; break;
case 0x11: case 0x11:
logerror("%s: write to reg 0x2011 %02x\n", machine().describe_context(), data);
break; break;
case 0x12: case 0x12:

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@ -25,6 +25,16 @@
#define MCFG_PPU_VT03_READ_SP_CB(_devcb) \ #define MCFG_PPU_VT03_READ_SP_CB(_devcb) \
devcb = &ppu_vt03_device::set_read_sp_callback(*device, DEVCB_##_devcb); devcb = &ppu_vt03_device::set_read_sp_callback(*device, DEVCB_##_devcb);
#define MCFG_PPU_VT03_MODIFY MCFG_DEVICE_MODIFY
#define MCFG_PPU_VT03_SET_PAL_MODE(pmode) \
ppu_vt03_device::set_palette_mode(*device, pmode);
enum vtxx_pal_mode {
PAL_MODE_VT0x,
PAL_MODE_NEW_RGB,
};
class ppu_vt03_device : public ppu2c0x_device { class ppu_vt03_device : public ppu2c0x_device {
public: public:
ppu_vt03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); ppu_vt03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -32,6 +42,8 @@ public:
template <class Object> static devcb_base &set_read_bg_callback(device_t &device, Object &&cb) { return downcast<ppu_vt03_device &>(device).m_read_bg.set_callback(std::forward<Object>(cb)); } template <class Object> static devcb_base &set_read_bg_callback(device_t &device, Object &&cb) { return downcast<ppu_vt03_device &>(device).m_read_bg.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_read_sp_callback(device_t &device, Object &&cb) { return downcast<ppu_vt03_device &>(device).m_read_sp.set_callback(std::forward<Object>(cb)); } template <class Object> static devcb_base &set_read_sp_callback(device_t &device, Object &&cb) { return downcast<ppu_vt03_device &>(device).m_read_sp.set_callback(std::forward<Object>(cb)); }
static void set_palette_mode(device_t &device, vtxx_pal_mode pmode) { downcast<ppu_vt03_device &>(device).m_pal_mode = pmode; }
virtual DECLARE_READ8_MEMBER(read) override; virtual DECLARE_READ8_MEMBER(read) override;
virtual DECLARE_WRITE8_MEMBER(write) override; virtual DECLARE_WRITE8_MEMBER(write) override;
virtual DECLARE_READ8_MEMBER(palette_read) override; virtual DECLARE_READ8_MEMBER(palette_read) override;
@ -74,6 +86,8 @@ private:
uint8_t m_201x_regs[0x20]; uint8_t m_201x_regs[0x20];
vtxx_pal_mode m_pal_mode = PAL_MODE_VT0x;
void set_2010_reg(uint8_t data); void set_2010_reg(uint8_t data);
void set_new_pen(int i); void set_new_pen(int i);

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@ -21,6 +21,12 @@
VT16 - ? VT16 - ?
VT18 - ? VT18 - ?
Mystery handheld SoC, may or may not be VRT:
Uses SQI rather than parallel flash
Vaguely OneBus compatible but some registers different ($411C in particular)
Uses RGB format for palettes
Credit to NewRisingSun2 for much of the reverse engineering
(more) (more)
VT1682 - NOT compatible with NES, different video system, sound CPU (4x VT1682 - NOT compatible with NES, different video system, sound CPU (4x
@ -91,6 +97,7 @@ public:
/* Misc PPU */ /* Misc PPU */
DECLARE_WRITE8_MEMBER(nes_vh_sprite_dma_w); DECLARE_WRITE8_MEMBER(nes_vh_sprite_dma_w);
DECLARE_WRITE8_MEMBER(vt_hh_sprite_dma_w);
void ppu_nmi(int *ppu_regs); void ppu_nmi(int *ppu_regs);
uint32_t screen_update_vt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); uint32_t screen_update_vt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_PALETTE_INIT(nesvt); DECLARE_PALETTE_INIT(nesvt);
@ -98,6 +105,7 @@ public:
/* VT03 extension handling */ /* VT03 extension handling */
DECLARE_WRITE8_MEMBER(vt03_410x_w); DECLARE_WRITE8_MEMBER(vt03_410x_w);
DECLARE_WRITE8_MEMBER(vt03_8000_w); DECLARE_WRITE8_MEMBER(vt03_8000_w);
DECLARE_WRITE8_MEMBER(vt03_4034_w);
/* OneBus read callbacks for getting sprite and tile data during rendering*/ /* OneBus read callbacks for getting sprite and tile data during rendering*/
DECLARE_READ8_MEMBER(spr_r); DECLARE_READ8_MEMBER(spr_r);
@ -113,6 +121,8 @@ private:
void scanline_irq(int scanline, int vblank, int blanked); void scanline_irq(int scanline, int vblank, int blanked);
uint8_t m_410x[0xc]; uint8_t m_410x[0xc];
uint8_t m_vdma_ctrl;
int m_timer_irq_enabled; int m_timer_irq_enabled;
int m_timer_running; int m_timer_running;
int m_timer_val; int m_timer_val;
@ -316,10 +326,11 @@ void nes_vt_state::scanline_irq(int scanline, int vblank, int blanked)
{ {
m_timer_val--; m_timer_val--;
if (m_timer_val < 0) if (m_timer_val < 1)
{ {
if (m_timer_irq_enabled) if (m_timer_irq_enabled)
{ {
logerror("scanline_irq %d\n", scanline);
irqstate = 1; irqstate = 1;
} }
} }
@ -389,6 +400,7 @@ void nes_vt_state::machine_reset()
m_timer_irq_enabled = 0; m_timer_irq_enabled = 0;
m_timer_running = 0; m_timer_running = 0;
m_timer_val = 0; m_timer_val = 0;
m_vdma_ctrl = 0;
update_banks(); update_banks();
} }
@ -737,6 +749,43 @@ WRITE8_MEMBER(nes_vt_state::nes_vh_sprite_dma_w)
m_ppu->spriteram_dma(space, data); m_ppu->spriteram_dma(space, data);
} }
WRITE8_MEMBER(nes_vt_state::vt_hh_sprite_dma_w)
{
uint8_t dma_mode = m_vdma_ctrl & 0x01;
uint8_t dma_len = (m_vdma_ctrl >> 1) & 0x07;
uint8_t src_nib_74 = (m_vdma_ctrl >> 4) & 0x0F;
int length = 256;
switch(dma_len) {
case 0x0: length = 256; break;
case 0x4: length = 16; break;
case 0x5: length = 32; break;
case 0x6: length = 64; break;
case 0x7: length = 128; break;
}
uint16_t src_addr = (data << 8) | (src_nib_74 << 4);
logerror("vthh dma start ctrl=%02x addr=%04x\n", m_vdma_ctrl, src_addr);
for (int i = 0; i < length; i++)
{
uint8_t spriteData = space.read_byte(src_addr + i);
if(dma_mode) {
space.write_byte(0x2007, spriteData);
} else {
space.write_byte(0x2004, spriteData);
}
if(((src_addr + i) & 0xFF) == length) break;
}
// should last (length * 4 - 1) CPU cycles.
space.device().execute().adjust_icount(-(length * 4 - 1));
}
WRITE8_MEMBER(nes_vt_state::vt03_4034_w)
{
m_vdma_ctrl = data;
}
static ADDRESS_MAP_START( nes_vt_map, AS_PROGRAM, 8, nes_vt_state ) static ADDRESS_MAP_START( nes_vt_map, AS_PROGRAM, 8, nes_vt_state )
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_RANGE(0x0000, 0x07ff) AM_RAM
AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) /* PPU registers */ AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) /* PPU registers */
@ -759,6 +808,25 @@ static ADDRESS_MAP_START( nes_vt_xx_map, AS_PROGRAM, 8, nes_vt_state )
AM_RANGE(0x0800, 0x0fff) AM_RAM AM_RANGE(0x0800, 0x0fff) AM_RAM
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( nes_vt_hh_map, AS_PROGRAM, 8, nes_vt_state )
AM_RANGE(0x0000, 0x0fff) AM_RAM
AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) /* PPU registers */
AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE("apu", nesapu_device, read, write)
AM_RANGE(0x4015, 0x4015) AM_READWRITE(psg1_4015_r, psg1_4015_w) /* PSG status / first control register */
AM_RANGE(0x4016, 0x4016) AM_READWRITE(nes_in0_r, nes_in0_w)
AM_RANGE(0x4017, 0x4017) AM_READ(nes_in1_r) AM_WRITE(psg1_4017_w)
AM_RANGE(0x4100, 0x410b) AM_WRITE(vt03_410x_w)
AM_RANGE(0x8000, 0xffff) AM_WRITE(vt03_8000_w)
AM_RANGE(0x8000, 0xffff) AM_DEVICE("prg", address_map_bank_device, amap8)
AM_RANGE(0x4034, 0x4034) AM_WRITE(vt03_4034_w)
AM_RANGE(0x4014, 0x4014) AM_READ(psg1_4014_r) AM_WRITE(vt_hh_sprite_dma_w)
AM_RANGE(0x6000, 0x6fff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, nes_vt_state ) static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, nes_vt_state )
AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("prg_bank0") AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("prg_bank0")
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("prg_bank1") AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("prg_bank1")
@ -867,6 +935,13 @@ static MACHINE_CONFIG_DERIVED( nes_vt_xx, nes_vt )
MCFG_CPU_PROGRAM_MAP(nes_vt_xx_map) MCFG_CPU_PROGRAM_MAP(nes_vt_xx_map)
MACHINE_CONFIG_END MACHINE_CONFIG_END
// New mystery handheld architecture, VTxx derived
static MACHINE_CONFIG_DERIVED( nes_vt_hh, nes_vt_xx )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(nes_vt_hh_map)
MCFG_PPU_VT03_MODIFY("ppu")
MCFG_PPU_VT03_SET_PAL_MODE(PAL_MODE_NEW_RGB);
MACHINE_CONFIG_END
static INPUT_PORTS_START( nes_vt ) static INPUT_PORTS_START( nes_vt )
INPUT_PORTS_END INPUT_PORTS_END
@ -1043,6 +1118,11 @@ ROM_START( vgpmini )
// there was a dump of a 'secure' area with this, but it was just the bottom 0x10000 bytes of the existing rom. // there was a dump of a 'secure' area with this, but it was just the bottom 0x10000 bytes of the existing rom.
ROM_END ROM_END
ROM_START( sy889 )
ROM_REGION( 0x800000, "mainrom", 0 )
ROM_LOAD( "sy889_w25q64.bin", 0x00000, 0x800000, CRC(fcdaa6fc) SHA1(0493747facf2172b8af22010851668bb18cbb3e4) )
ROM_END
// earlier version of vdogdemo // earlier version of vdogdemo
CONS( 200?, vdogdeme, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "VRT", "V-Dog (prototype, earlier)", MACHINE_NOT_WORKING ) CONS( 200?, vdogdeme, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "VRT", "V-Dog (prototype, earlier)", MACHINE_NOT_WORKING )
@ -1067,7 +1147,8 @@ CONS( 200?, dgun2500, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "dreamGEAR",
CONS( 2012, dgun2561, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "dreamGEAR", "dreamGEAR My Arcade Portable Gaming System (DGUN-2561)", MACHINE_NOT_WORKING ) CONS( 2012, dgun2561, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "dreamGEAR", "dreamGEAR My Arcade Portable Gaming System (DGUN-2561)", MACHINE_NOT_WORKING )
CONS( 200?, lexcyber, 0, 0, nes_vt_xx, nes_vt, nes_vt_state, 0, "Lexibook", "Lexibook Compact Cyber Arcade", MACHINE_NOT_WORKING ) CONS( 200?, lexcyber, 0, 0, nes_vt_xx, nes_vt, nes_vt_state, 0, "Lexibook", "Lexibook Compact Cyber Arcade", MACHINE_NOT_WORKING )
// these seem to have custom CPU opcodes? looks similar to the above, has many of the same games, but isn't 100% valid 6502 // these are VT1682 based and have scrambled CPU opcodes. Will need VT1682 CPU and PPU
// to be emulated
// (no visible tiles in ROM using standard decodes tho, might need moving out of here) // (no visible tiles in ROM using standard decodes tho, might need moving out of here)
CONS( 200?, ii8in1, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "Intec", "InterAct 8-in-1", MACHINE_NOT_WORKING ) CONS( 200?, ii8in1, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "Intec", "InterAct 8-in-1", MACHINE_NOT_WORKING )
CONS( 200?, ii32in1, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "Intec", "InterAct 32-in-1", MACHINE_NOT_WORKING ) CONS( 200?, ii32in1, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "Intec", "InterAct 32-in-1", MACHINE_NOT_WORKING )
@ -1105,4 +1186,4 @@ CONS( 200?, mc_8x6ss, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "<unk
CONS( 2004, mc_dcat8, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "<unknown>", "100 in 1 (D-CAT8 8bit Console, set 1) (v5.01.11-frd, BL 20041217)", MACHINE_NOT_WORKING ) CONS( 2004, mc_dcat8, 0, 0, nes_vt, nes_vt, nes_vt_state, 0, "<unknown>", "100 in 1 (D-CAT8 8bit Console, set 1) (v5.01.11-frd, BL 20041217)", MACHINE_NOT_WORKING )
CONS( 2004, mc_dcat8a, mc_dcat8, 0, nes_vt, nes_vt, nes_vt_state, 0, "<unknown>", "100 in 1 (D-CAT8 8bit Console, set 2)", MACHINE_NOT_WORKING ) CONS( 2004, mc_dcat8a, mc_dcat8, 0, nes_vt, nes_vt, nes_vt_state, 0, "<unknown>", "100 in 1 (D-CAT8 8bit Console, set 2)", MACHINE_NOT_WORKING )
CONS( 2017, sy889, 0, 0, nes_vt_hh, nes_vt, nes_vt_state, 0, "SY Corp", "SY-889 300 in 1 Handheld", MACHINE_NOT_WORKING )

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@ -29773,6 +29773,7 @@ gprnrs1
gprnrs16 gprnrs16
vgpocket vgpocket
vgpmini vgpmini
sy889
@source:newbrain.cpp @source:newbrain.cpp
newbrain // newbrain //
@ -39236,4 +39237,3 @@ vgmplay
@source:ldplayer.cpp @source:ldplayer.cpp
simldv1000 // Pioneer LD-V1000 simldv1000 // Pioneer LD-V1000
simpr8210 // Pioneer PR-8210 simpr8210 // Pioneer PR-8210