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https://github.com/holub/mame
synced 2025-04-21 07:52:35 +03:00
chihiro.c: some cleanup, wait vblank enabled by default (nw)
This commit is contained in:
yz70s
parent
4884956b4e
commit
71ceab74c5
@ -232,11 +232,10 @@ public:
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depthbuffer = NULL;
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displayedtarget = NULL;
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puller_channel = 0;
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puller_subchannel = 0;
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puller_waiting = 0;
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debug_grab_texttype = -1;
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debug_grab_textfile = NULL;
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waitvblank_used = 0;
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waitvblank_used = 1;
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memset(vertex_attribute_words, 0, sizeof(vertex_attribute_words));
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memset(vertex_attribute_offset, 0, sizeof(vertex_attribute_offset));
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}
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@ -254,9 +253,10 @@ public:
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int geforce_commandkind(UINT32 word);
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UINT32 geforce_object_offset(UINT32 handle);
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void geforce_read_dma_object(UINT32 handle, UINT32 &offset, UINT32 &size);
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void geforce_assign_object(address_space &space, UINT32 chanel, UINT32 subchannel, UINT32 address);
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int geforce_exec_method(address_space &space, UINT32 channel, UINT32 subchannel, UINT32 method, UINT32 address, int &countlen);
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UINT32 texture_get_texel(int number, int x, int y);
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UINT8 *read_pixel(int x, int y, UINT32 c[4]);
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UINT8 *read_pixel(int x, int y, INT32 c[4]);
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void write_pixel(int x, int y, UINT32 color, UINT32 depth);
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void combiner_initialize_registers(UINT32 argb8[6]);
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void combiner_initialize_stage(int stage_number);
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@ -496,7 +496,6 @@ public:
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int vertex_attribute_offset[16];
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emu_timer *puller_timer;
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int puller_channel;
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int puller_subchannel;
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int puller_waiting;
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address_space *puller_space;
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UINT32 dilated0[16][2048];
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@ -660,15 +659,16 @@ public:
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NV2A_RT_DEPTH_FORMAT_Z16 = 0x0001,
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NV2A_RT_DEPTH_FORMAT_Z24S8 = 0x0002
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};
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enum NV2A_COLOR_FORMAT {
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NV2A_COLOR_FORMAT_X1R5G6B5 = 0x0002,
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NV2A_COLOR_FORMAT_R5G6B5 = 0x0003,
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NV2A_COLOR_FORMAT_UNKNOWN4 = 0x0004,
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NV2A_COLOR_FORMAT_X8R8G8B8 = 0x0005,
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NV2A_COLOR_FORMAT_X1A7R8G8B8 = 0x0007,
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NV2A_COLOR_FORMAT_A8R8G8B8 = 0x0008,
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NV2A_COLOR_FORMAT_B8 = 0x0009,
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NV2A_COLOR_FORMAT_G8B8 = 0x000a
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NV2A_COLOR_FORMAT_X1R5G5B5_Z1R5G5B5 = 1,
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NV2A_COLOR_FORMAT_X1R5G5B5_X1R5G5B5 = 2,
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NV2A_COLOR_FORMAT_R5G6B5 = 3,
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NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8 = 4,
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NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8 = 5,
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NV2A_COLOR_FORMAT_X1A7R8G8B8_Z1A7R8G8B8 = 6,
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NV2A_COLOR_FORMAT_X1A7R8G8B8_X1A7R8G8B8 = 7,
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NV2A_COLOR_FORMAT_A8R8G8B8 = 8,
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NV2A_COLOR_FORMAT_B8 = 9,
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NV2A_COLOR_FORMAT_G8B8 = 10
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};
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};
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@ -1190,7 +1190,7 @@ static UINT32 hubintiasbridg_pci_r(device_t *busdevice, device_t *device, int fu
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static void hubintiasbridg_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
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{
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#ifdef LOG_PCI
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if (reg >= 16) device->logerror(" bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
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if (reg >= 16) busdevice->logerror(" bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
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#endif
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}
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@ -1209,7 +1209,7 @@ static UINT32 dummy_pci_r(device_t *busdevice, device_t *device, int function, i
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static void dummy_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
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{
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#ifdef LOG_PCI
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if (reg >= 16) device->logerror(" bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
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if (reg >= 16) busdevice->logerror(" bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
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#endif
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}
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@ -1240,7 +1240,7 @@ UINT32 nv2a_renderer::texture_get_texel(int number, int x, int y)
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}
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}
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inline UINT8 *nv2a_renderer::read_pixel(int x, int y, UINT32 c[4])
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inline UINT8 *nv2a_renderer::read_pixel(int x, int y, INT32 c[4])
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{
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UINT32 offset;
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UINT32 color;
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@ -1261,8 +1261,8 @@ inline UINT8 *nv2a_renderer::read_pixel(int x, int y, UINT32 c[4])
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c[1] = pal6bit((color & 0x07e0) >> 5);
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c[0] = pal5bit(color & 0x1f);
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return (UINT8 *)addr16;
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case NV2A_COLOR_FORMAT_UNKNOWN4:
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case NV2A_COLOR_FORMAT_X8R8G8B8:
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case NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8:
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case NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8:
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addr = (UINT32 *)((UINT8 *)rendertarget + offset);
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color = *addr;
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@ -1295,7 +1295,7 @@ void nv2a_renderer::write_pixel(int x, int y, UINT32 color, UINT32 depth)
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UINT32 *daddr32;
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UINT16 *daddr16;
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UINT32 deptsten;
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UINT32 c[4], fb[4], s[4], d[4], cc[4];
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INT32 c[4], fb[4], s[4], d[4], cc[4];
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UINT32 dep, sten, stenc, stenv;
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bool stencil_passed;
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bool depth_passed;
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@ -1854,16 +1854,16 @@ void nv2a_renderer::write_pixel(int x, int y, UINT32 color, UINT32 depth)
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if (color_mask != 0) {
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UINT32 ct,ft,w;
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ct = (c[3] << 24) | (c[2] << 16) | (c[1] << 8) | c[0];
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ft = (fb[3] << 24) | (fb[2] << 16) | (fb[1] << 8) | fb[0];
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ct = ((UINT32)c[3] << 24) | ((UINT32)c[2] << 16) | ((UINT32)c[1] << 8) | (UINT32)c[0];
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ft = ((UINT32)fb[3] << 24) | ((UINT32)fb[2] << 16) | ((UINT32)fb[1] << 8) | (UINT32)fb[0];
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w = (ft & ~color_mask) | (ct & color_mask);
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switch (colorformat_rendertarget) {
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case NV2A_COLOR_FORMAT_R5G6B5:
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w = ((w >> 8) & 0xf800) + ((w >> 5) & 0x7e0) + ((w >> 3) & 0x1f);
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*((UINT16 *)addr) = (UINT16)w;
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break;
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case NV2A_COLOR_FORMAT_UNKNOWN4:
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case NV2A_COLOR_FORMAT_X8R8G8B8:
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case NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8:
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case NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8:
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*((UINT32 *)addr) = w;
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break;
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case NV2A_COLOR_FORMAT_A8R8G8B8:
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@ -2862,7 +2862,7 @@ int nv2a_renderer::geforce_exec_method(address_space & space, UINT32 chanel, UIN
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m = 1;
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// possible buffers: color, depth, stencil
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// clear framebuffer
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if (data & 0xf0) {
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if ((data & 0xf0) == 0xf0) {
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if (bytespixel_rendertarget == 4) {
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bitmap_rgb32 bm(rendertarget, (limits_rendertarget.right() + 1) * m, (limits_rendertarget.bottom() + 1) * m, pitch_rendertarget / 4);
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@ -2913,8 +2913,8 @@ int nv2a_renderer::geforce_exec_method(address_space & space, UINT32 chanel, UIN
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case NV2A_COLOR_FORMAT_R5G6B5:
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bytespixel_rendertarget = 2;
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break;
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case NV2A_COLOR_FORMAT_UNKNOWN4:
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case NV2A_COLOR_FORMAT_X8R8G8B8:
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case NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8:
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case NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8:
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case NV2A_COLOR_FORMAT_A8R8G8B8:
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bytespixel_rendertarget = 4;
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break;
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@ -4018,10 +4018,28 @@ UINT32 nv2a_renderer::screen_update_callback(screen_device &screen, bitmap_rgb32
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return 0;
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}
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void nv2a_renderer::geforce_assign_object(address_space & space, UINT32 chanel, UINT32 subchannel, UINT32 address)
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{
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int handle, objclass;
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handle = space.read_dword(address);
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handle = geforce_object_offset(handle);
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#ifdef LOG_NV2A
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machine().logerror(" assign to subchannel %d object at %d", subch, handle);
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#endif
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channel[chanel][subchannel].object.objhandle = handle;
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handle = ramin[handle / 4];
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objclass = handle & 0xff;
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#ifdef LOG_NV2A
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machine().logerror(" class %03X\n", objclass);
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#endif
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channel[chanel][subchannel].object.objclass = objclass;
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}
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TIMER_CALLBACK_MEMBER(nv2a_renderer::puller_timer_work)
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{
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int chanel, subchannel;
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int method, count, handle, objclass;
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int chanel;
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int method, count;
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UINT32 *dmaput, *dmaget;
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UINT32 cmd, cmdtype;
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int countlen;
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@ -4030,9 +4048,8 @@ TIMER_CALLBACK_MEMBER(nv2a_renderer::puller_timer_work)
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UINT32 subch;
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chanel = puller_channel;
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subchannel = puller_subchannel;
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dmaput = &channel[chanel][subchannel].regs[0x40 / 4];
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dmaget = &channel[chanel][subchannel].regs[0x44 / 4];
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dmaput = &channel[chanel][0].regs[0x40 / 4];
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dmaget = &channel[chanel][0].regs[0x44 / 4];
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while (*dmaget != *dmaput) {
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cmd = space->read_dword(*dmaget);
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*dmaget += 4;
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@ -4041,11 +4058,11 @@ TIMER_CALLBACK_MEMBER(nv2a_renderer::puller_timer_work)
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{
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case 6: // jump
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#ifdef LOG_NV2A
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printf("jump dmaget %08X", *dmaget);
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machine().logerror("jump dmaget %08X", *dmaget);
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#endif
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*dmaget = cmd & 0xfffffffc;
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#ifdef LOG_NV2A
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printf(" -> %08X\n\r", *dmaget);
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machine().logerror(" -> %08X\n\r", *dmaget);
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#endif
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break;
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case 0: // increasing method
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@ -4053,18 +4070,7 @@ TIMER_CALLBACK_MEMBER(nv2a_renderer::puller_timer_work)
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subch = (cmd >> 13) & 7;
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count = (cmd >> 18) & 2047;
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if ((method == 0) && (count == 1)) {
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handle = space->read_dword(*dmaget);
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handle = geforce_object_offset(handle);
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#ifdef LOG_NV2A
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machine().logerror(" assign to subchannel %d object at %d", subch, handle);
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#endif
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channel[chanel][subch].object.objhandle = handle;
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handle = ramin[handle / 4];
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objclass = handle & 0xff;
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#ifdef LOG_NV2A
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machine().logerror(" class %03X\n", objclass);
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#endif
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channel[chanel][subch].object.objclass = objclass;
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geforce_assign_object(*space, chanel, subch, *dmaget);
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*dmaget += 4;
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}
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else {
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@ -4093,18 +4099,7 @@ TIMER_CALLBACK_MEMBER(nv2a_renderer::puller_timer_work)
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subch = (cmd >> 13) & 7;
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count = (cmd >> 18) & 2047;
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if ((method == 0) && (count == 1)) {
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handle = space->read_dword(*dmaget);
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handle = geforce_object_offset(handle);
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#ifdef LOG_NV2A
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machine().logerror(" assign to subchannel %d object at %d", subch, handle);
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#endif
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channel[chanel][subch].object.objhandle = handle;
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handle = ramin[handle / 4];
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objclass = handle & 0xff;
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#ifdef LOG_NV2A
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machine().logerror(" class %03X\n", objclass);
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#endif
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channel[chanel][subch].object.objclass = objclass;
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geforce_assign_object(*space, chanel, subch, *dmaget);
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*dmaget += 4;
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}
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else {
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@ -4125,18 +4120,7 @@ TIMER_CALLBACK_MEMBER(nv2a_renderer::puller_timer_work)
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count = space->read_dword(*dmaget);
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*dmaget += 4;
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if ((method == 0) && (count == 1)) {
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handle = space->read_dword(*dmaget);
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handle = geforce_object_offset(handle);
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#ifdef LOG_NV2A
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machine().logerror(" assign to subchannel %d object at %d", subch, handle);
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#endif
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channel[chanel][subch].object.objhandle = handle;
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handle = ramin[handle / 4];
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objclass = handle & 0xff;
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#ifdef LOG_NV2A
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machine().logerror(" class %03X\n", objclass);
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#endif
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channel[chanel][subch].object.objclass = objclass;
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geforce_assign_object(*space, chanel, subch, *dmaget);
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*dmaget += 4;
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}
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else {
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@ -4294,16 +4278,16 @@ WRITE32_MEMBER(nv2a_renderer::geforce_w)
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subchannel = (suboffset >> (13 - 2)) & 7;
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suboffset = suboffset & 0x7ff;
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//machine().logerror("NV_2A: write channel[%02X,%d,%04X]=%08X\n",chanel,subchannel,suboffset*4,data & mem_mask);
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COMBINE_DATA(&channel[chanel][subchannel].regs[suboffset]);
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if (suboffset >= 0x80 / 4)
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return;
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COMBINE_DATA(&channel[chanel][subchannel].regs[suboffset]);
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if ((suboffset == 0x40 / 4) || (suboffset == 0x44 / 4)) { // DMA_PUT or DMA_GET
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UINT32 *dmaput, *dmaget;
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dmaput = &channel[chanel][subchannel].regs[0x40 / 4];
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dmaget = &channel[chanel][subchannel].regs[0x44 / 4];
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dmaput = &channel[chanel][0].regs[0x40 / 4];
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dmaget = &channel[chanel][0].regs[0x44 / 4];
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//printf("dmaget %08X dmaput %08X\n\r",*dmaget,*dmaput);
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if ((*dmaput == 0x048cf000) && (*dmaget == 0x07f4d000)) {
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if ((*dmaput == 0x048cf000) && (*dmaget == 0x07f4d000)) { // only for outr2
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*dmaget = *dmaput;
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puller_waiting = 0;
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puller_timer->enable(false);
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@ -4312,7 +4296,6 @@ WRITE32_MEMBER(nv2a_renderer::geforce_w)
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if (*dmaget != *dmaput) {
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if (puller_waiting == 0) {
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puller_channel = chanel;
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puller_subchannel = subchannel;
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puller_space = &space;
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puller_timer->enable();
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puller_timer->adjust(attotime::zero);
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