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https://github.com/holub/mame
synced 2025-05-29 17:13:05 +03:00
Work on et4000 16bbp and 24bbp modes - from mess (nw)
This commit is contained in:
Scott Stone
parent
f84735dcef
commit
71d1559108
@ -171,6 +171,7 @@ static struct
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UINT8 rgb8_en;
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UINT8 rgb15_en;
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UINT8 rgb16_en;
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UINT8 rgb24_en;
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UINT8 rgb32_en;
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UINT8 id;
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}svga;
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@ -178,6 +179,10 @@ static struct
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static struct
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{
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UINT8 reg_3d8;
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UINT8 dac_ctrl;
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UINT8 dac_state;
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UINT8 horz_overflow;
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UINT8 aux_ctrl;
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bool ext_reg_ena;
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}et4k;
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@ -647,6 +652,47 @@ static void svga_vh_rgb16(running_machine &machine, bitmap_rgb32 &bitmap, const
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}
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}
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static void svga_vh_rgb24(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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#define MD(x) (vga.memory[x]+(vga.memory[x+1]<<8)+(vga.memory[x+2]<<16))
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#define ID 0xff000000
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int height = vga.crtc.maximum_scan_line * (vga.crtc.scan_doubling + 1);
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int xi;
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int yi;
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int xm;
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int pos, line, column, c, addr, curr_addr;
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UINT32 *bitmapline;
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// UINT16 mask_comp;
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/* line compare is screen sensitive */
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// mask_comp = 0xff | (TLINES & 0x300);
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curr_addr = 0;
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yi=0;
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for (addr = TGA_START_ADDRESS<<1, line=0; line<TLINES; line+=height, addr+=TGA_LINE_LENGTH, curr_addr+=TGA_LINE_LENGTH)
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{
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bitmapline = &bitmap.pix32(line);
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addr %= vga.svga_intf.vram_size;
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for (pos=addr, c=0, column=0; column<TGA_COLUMNS; column++, c+=8, pos+=24)
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{
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if(pos + 24 > 0x100000)
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return;
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for(xi=0,xm=0;xi<8;xi++,xm+=3)
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{
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int r,g,b;
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if(!machine.primary_screen->visible_area().contains(c+xi, line + yi))
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continue;
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r = (MD(pos+xm)&0xff0000)>>16;
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g = (MD(pos+xm)&0x00ff00)>>8;
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b = (MD(pos+xm)&0x0000ff)>>0;
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bitmapline[c+xi] = IV|(r<<16)|(g<<8)|(b<<0);
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}
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}
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}
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}
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static void svga_vh_rgb32(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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#define MD(x) (vga.memory[x]+(vga.memory[x+1]<<8)+(vga.memory[x+2]<<16))
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@ -699,6 +745,7 @@ enum
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RGB8_MODE,
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RGB15_MODE,
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RGB16_MODE,
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RGB24_MODE,
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RGB32_MODE,
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SVGA_HACK
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};
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@ -746,6 +793,10 @@ static UINT8 pc_vga_choosevideomode(running_machine &machine)
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{
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return RGB32_MODE;
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}
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else if (svga.rgb24_en)
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{
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return RGB24_MODE;
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}
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else if (svga.rgb16_en)
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{
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return RGB16_MODE;
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@ -816,6 +867,7 @@ SCREEN_UPDATE_RGB32( pc_video )
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case RGB8_MODE: svga_vh_rgb8 (screen.machine(), bitmap, cliprect); break;
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case RGB15_MODE: svga_vh_rgb15(screen.machine(), bitmap, cliprect); break;
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case RGB16_MODE: svga_vh_rgb16(screen.machine(), bitmap, cliprect); break;
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case RGB24_MODE: svga_vh_rgb24(screen.machine(), bitmap, cliprect); break;
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case RGB32_MODE: svga_vh_rgb32(screen.machine(), bitmap, cliprect); break;
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case SVGA_HACK: vga.svga_intf.choosevideomode(screen.machine(), bitmap, cliprect, vga.sequencer.data, vga.crtc.data, &w, &h); break;
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}
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@ -896,27 +948,24 @@ static UINT8 crtc_reg_read(UINT8 index)
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}
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#endif
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static void recompute_params(running_machine &machine)
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static void recompute_params_clock(running_machine &machine, int divisor, int xtal)
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{
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int vblank_period,hblank_period;
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attoseconds_t refresh;
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UINT8 hclock_m;
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UINT8 hclock_m = (!GRAPHIC_MODE) ? CHAR_WIDTH : 8;
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int pixel_clock;
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hclock_m = (!GRAPHIC_MODE) ? CHAR_WIDTH : 8;
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/* safety check */
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if(!vga.crtc.horz_disp_end || !vga.crtc.vert_disp_end || !vga.crtc.horz_total || !vga.crtc.vert_total)
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return;
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rectangle visarea(0, ((vga.crtc.horz_disp_end + 1) * hclock_m)-1, 0, vga.crtc.vert_disp_end);
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rectangle visarea(0, ((vga.crtc.horz_disp_end + 1) * ((float)(hclock_m)/divisor))-1, 0, vga.crtc.vert_disp_end);
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vblank_period = (vga.crtc.vert_total + 2);
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hblank_period = ((vga.crtc.horz_total + 5) * hclock_m);
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hblank_period = ((vga.crtc.horz_total + 5) * ((float)(hclock_m)/divisor));
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/* TODO: 10b and 11b settings aren't known */
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pixel_clock = (vga.miscellaneous_output & 0xc) ? XTAL_28_63636MHz : XTAL_25_1748MHz;
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pixel_clock /= (((vga.sequencer.data[1]&8) >> 3) + 1);
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pixel_clock = xtal / (((vga.sequencer.data[1]&8) >> 3) + 1);
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refresh = HZ_TO_ATTOSECONDS(pixel_clock) * (hblank_period) * vblank_period;
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@ -924,6 +973,11 @@ static void recompute_params(running_machine &machine)
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// popmessage("%d %d\n",vga.crtc.horz_total * 8,vga.crtc.vert_total);
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}
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static void recompute_params(running_machine &machine)
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{
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recompute_params_clock(machine, 1, (vga.miscellaneous_output & 0xc) ? XTAL_28_63636MHz : XTAL_25_1748MHz);
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}
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static void crtc_reg_write(running_machine &machine, UINT8 index, UINT8 data)
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{
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/* Doom does this */
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@ -933,7 +987,7 @@ static void crtc_reg_write(running_machine &machine, UINT8 index, UINT8 data)
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switch(index)
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{
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case 0x00:
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vga.crtc.horz_total = (data & 0xff);
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vga.crtc.horz_total = (vga.crtc.horz_total & ~0xff) | (data & 0xff);
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recompute_params(machine);
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break;
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case 0x01:
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@ -1758,6 +1812,64 @@ Tseng ET4000k implementation
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******************************************/
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static void tseng_define_video_mode(running_machine &machine)
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{
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int divisor;
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int xtal;
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svga.rgb8_en = 0;
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svga.rgb15_en = 0;
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svga.rgb16_en = 0;
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svga.rgb24_en = 0;
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switch(((et4k.aux_ctrl << 1) & 4)|(vga.miscellaneous_output & 0xc)>>2)
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{
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case 0:
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xtal = XTAL_25_1748MHz;
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break;
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case 1:
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xtal = XTAL_28_63636MHz;
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break;
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case 2:
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xtal = 16257000*2; //2xEGA clock
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break;
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case 3:
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xtal = XTAL_40MHz;
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break;
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case 4:
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xtal = XTAL_36MHz;
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break;
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case 5:
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xtal = XTAL_45MHz;
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break;
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case 6:
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xtal = 31000000;
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break;
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case 7:
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xtal = 38000000;
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break;
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}
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switch(et4k.dac_ctrl & 0xe0)
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{
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case 0xa0:
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svga.rgb15_en = 1;
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divisor = 2;
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break;
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case 0xe0:
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svga.rgb16_en = 1;
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divisor = 2;
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break;
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case 0x60:
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svga.rgb24_en = 1;
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divisor = 3;
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xtal *= 2.0f/3.0f;
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break;
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default:
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svga.rgb8_en = (!(vga.sequencer.data[1] & 8) && (vga.sequencer.data[4] & 8) && vga.gc.shift256 && vga.crtc.div2 && GRAPHIC_MODE);
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divisor = 1;
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break;
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}
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recompute_params_clock(machine, divisor, xtal);
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}
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static UINT8 tseng_crtc_reg_read(running_machine &machine, UINT8 index)
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{
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UINT8 res;
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@ -1769,6 +1881,12 @@ static UINT8 tseng_crtc_reg_read(running_machine &machine, UINT8 index)
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{
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switch(index)
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{
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case 0x34:
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res = et4k.aux_ctrl;
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break;
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case 0x3f:
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res = et4k.horz_overflow;
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break;
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default:
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res = vga.crtc.data[index];
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//printf("%02x\n",index);
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@ -1788,6 +1906,13 @@ static void tseng_crtc_reg_write(running_machine &machine, UINT8 index, UINT8 da
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{
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switch(index)
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{
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case 0x34:
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et4k.aux_ctrl = data;
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break;
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case 0x3f:
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et4k.horz_overflow = data;
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vga.crtc.horz_total = (vga.crtc.horz_total & 0xff) | ((data & 1) << 8);
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break;
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default:
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//printf("%02x %02x\n",index,data);
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break;
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@ -1823,7 +1948,6 @@ static void tseng_seq_reg_write(running_machine &machine, UINT8 index, UINT8 dat
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{
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vga.sequencer.data[vga.sequencer.index] = data;
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seq_reg_write(machine,vga.sequencer.index,data);
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recompute_params(machine);
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}
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else
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{
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@ -1835,8 +1959,6 @@ static void tseng_seq_reg_write(running_machine &machine, UINT8 index, UINT8 dat
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break;
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}
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}
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svga.rgb8_en = (!(vga.sequencer.data[1] & 8) && (vga.sequencer.data[4] & 8) && vga.gc.shift256 && vga.crtc.div2 && GRAPHIC_MODE);
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}
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READ8_HANDLER(tseng_et4k_03c0_r)
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@ -1852,6 +1974,19 @@ READ8_HANDLER(tseng_et4k_03c0_r)
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res = svga.bank_w & 0xf;
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res |= (svga.bank_r & 0xf) << 4;
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break;
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case 0x06:
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if(et4k.dac_state == 4)
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{
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if(!et4k.dac_ctrl)
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et4k.dac_ctrl = 0x80;
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res = et4k.dac_ctrl;
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break;
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}
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et4k.dac_state++;
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res = vga_port_03c0_r(space,offset);
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break;
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case 0x08:
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et4k.dac_state = 0;
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default:
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res = vga_port_03c0_r(space,offset);
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break;
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@ -1871,10 +2006,17 @@ WRITE8_HANDLER(tseng_et4k_03c0_w)
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svga.bank_w = data & 0xf;
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svga.bank_r = (data & 0xf0) >> 4;
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break;
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case 0x06:
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if(et4k.dac_state == 4)
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{
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et4k.dac_ctrl = data;
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break;
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}
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default:
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vga_port_03c0_w(space,offset,data);
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break;
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}
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tseng_define_video_mode(space->machine());
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}
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READ8_HANDLER(tseng_et4k_03d0_r)
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@ -1922,11 +2064,13 @@ WRITE8_HANDLER(tseng_et4k_03d0_w)
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break;
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}
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}
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tseng_define_video_mode(space->machine());
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}
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READ8_HANDLER( tseng_mem_r )
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{
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if(svga.rgb8_en)
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if(svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en)
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{
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offset &= 0xffff;
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return vga.memory[(offset+svga.bank_r*0x10000)];
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@ -1937,7 +2081,7 @@ READ8_HANDLER( tseng_mem_r )
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WRITE8_HANDLER( tseng_mem_w )
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{
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if(svga.rgb8_en)
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if(svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en)
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{
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offset &= 0xffff;
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vga.memory[(offset+svga.bank_w*0x10000)] = data;
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