mirror of
https://github.com/holub/mame
synced 2025-04-24 01:11:11 +03:00
segaybd.cpp: Read inputs through 315-5296
This commit is contained in:
AJR
parent
9791d2fdb6
commit
7330bd8ed9
@ -62,6 +62,7 @@ MB89372 - Uses 3 serial data transfer protocols: ASYNC, COP & BOP. Has a built
|
||||
|
||||
#include "machine/mb8421.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "machine/315_5296.h"
|
||||
#include "sound/segapcm.h"
|
||||
#include "sound/ym2151.h"
|
||||
#include "speaker.h"
|
||||
@ -89,7 +90,7 @@ const uint32_t SOUND_CLOCK = 32215900;
|
||||
// analog_r - handle analog input reads
|
||||
//-------------------------------------------------
|
||||
|
||||
READ16_MEMBER( segaybd_state::analog_r )
|
||||
READ16_MEMBER(segaybd_state::analog_r)
|
||||
{
|
||||
int result = 0xff;
|
||||
if (ACCESSING_BITS_0_7)
|
||||
@ -105,127 +106,62 @@ READ16_MEMBER( segaybd_state::analog_r )
|
||||
// analog_w - handle analog input control writes
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE16_MEMBER( segaybd_state::analog_w )
|
||||
WRITE16_MEMBER(segaybd_state::analog_w)
|
||||
{
|
||||
int selected = ((offset & 3) == 3) ? (3 + (m_misc_io_data[0x08/2] & 3)) : (offset & 3);
|
||||
int selected = ((offset & 3) == 3) ? (3 + (m_misc_io_data & 3)) : (offset & 3);
|
||||
m_analog_data[offset & 3] = m_adc_ports[selected].read_safe(0xff);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// io_chip_r - handle reads from the I/O chip
|
||||
// output1_w - handle writes to I/O port D
|
||||
//-------------------------------------------------
|
||||
|
||||
READ16_MEMBER( segaybd_state::io_chip_r )
|
||||
WRITE8_MEMBER(segaybd_state::output1_w)
|
||||
{
|
||||
offset &= 0x1f/2;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
// I/O ports
|
||||
case 0x00/2:
|
||||
case 0x02/2:
|
||||
case 0x04/2:
|
||||
case 0x06/2:
|
||||
case 0x08/2:
|
||||
case 0x0a/2:
|
||||
case 0x0c/2:
|
||||
case 0x0e/2:
|
||||
// if the port is configured as an output, return the last thing written
|
||||
if (m_misc_io_data[0x1e/2] & (1 << offset))
|
||||
return m_misc_io_data[offset];
|
||||
|
||||
// otherwise, return an input port
|
||||
return m_digital_ports[offset]->read();
|
||||
|
||||
// 'SEGA' protection
|
||||
case 0x10/2:
|
||||
return 'S';
|
||||
case 0x12/2:
|
||||
return 'E';
|
||||
case 0x14/2:
|
||||
return 'G';
|
||||
case 0x16/2:
|
||||
return 'A';
|
||||
|
||||
// CNT register & mirror
|
||||
case 0x18/2:
|
||||
case 0x1c/2:
|
||||
return m_misc_io_data[0x1c/2];
|
||||
|
||||
// port direction register & mirror
|
||||
case 0x1a/2:
|
||||
case 0x1e/2:
|
||||
return m_misc_io_data[0x1e/2];
|
||||
}
|
||||
return 0xffff;
|
||||
if (!m_output_cb1.isnull())
|
||||
m_output_cb1(data);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// io_chip_w - handle writes to the I/O chip
|
||||
// misc_output_w - handle writes to I/O port E
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE16_MEMBER( segaybd_state::io_chip_w )
|
||||
WRITE8_MEMBER(segaybd_state::misc_output_w)
|
||||
{
|
||||
uint8_t old;
|
||||
//
|
||||
// D7 = /KILL
|
||||
// D6 = CONT
|
||||
// D5 = /WDCL
|
||||
// D4 = /SRES
|
||||
// D3 = XRES
|
||||
// D2 = YRES
|
||||
// D1-D0 = ADC0-1
|
||||
//
|
||||
m_segaic16vid->set_display_enable(data & 0x80);
|
||||
if (((m_misc_io_data ^ data) & 0x20) && !(data & 0x20))
|
||||
m_watchdog->watchdog_reset();
|
||||
m_soundcpu->set_input_line(INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
|
||||
m_subx->set_input_line(INPUT_LINE_RESET, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_suby->set_input_line(INPUT_LINE_RESET, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
|
||||
|
||||
// generic implementation
|
||||
offset &= 0x1f/2;
|
||||
old = m_misc_io_data[offset];
|
||||
m_misc_io_data[offset] = data;
|
||||
m_misc_io_data = data;
|
||||
}
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
// I/O ports
|
||||
case 0x00/2:
|
||||
break;
|
||||
case 0x02/2:
|
||||
break;
|
||||
case 0x04/2:
|
||||
break;
|
||||
case 0x06/2:
|
||||
if (!m_output_cb1.isnull())
|
||||
m_output_cb1(data);
|
||||
break;
|
||||
case 0x0a/2:
|
||||
case 0x0c/2:
|
||||
break;
|
||||
|
||||
// miscellaneous output
|
||||
case 0x08/2:
|
||||
//
|
||||
// D7 = /KILL
|
||||
// D6 = CONT
|
||||
// D5 = /WDCL
|
||||
// D4 = /SRES
|
||||
// D3 = XRES
|
||||
// D2 = YRES
|
||||
// D1-D0 = ADC0-1
|
||||
//
|
||||
m_segaic16vid->set_display_enable(data & 0x80);
|
||||
if (((old ^ data) & 0x20) && !(data & 0x20))
|
||||
m_watchdog->watchdog_reset();
|
||||
m_soundcpu->set_input_line(INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
|
||||
m_subx->set_input_line(INPUT_LINE_RESET, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_suby->set_input_line(INPUT_LINE_RESET, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
|
||||
break;
|
||||
//-------------------------------------------------
|
||||
// output2_w - handle writes to I/O port H
|
||||
//-------------------------------------------------
|
||||
|
||||
// mute
|
||||
WRITE8_MEMBER(segaybd_state::output2_w)
|
||||
{
|
||||
if (!m_output_cb2.isnull())
|
||||
m_output_cb2(data);
|
||||
|
||||
case 0x0e/2:
|
||||
if (!m_output_cb2.isnull())
|
||||
m_output_cb2(data);
|
||||
|
||||
// D7 = /MUTE
|
||||
// D6-D0 = FLT31-25
|
||||
machine().sound().system_enable(data & 0x80);
|
||||
break;
|
||||
|
||||
// CNT register
|
||||
case 0x1c/2:
|
||||
break;
|
||||
}
|
||||
// D7 = /MUTE
|
||||
// D6-D0 = FLT31-25
|
||||
machine().sound().system_enable(data & 0x80);
|
||||
}
|
||||
|
||||
|
||||
@ -234,7 +170,7 @@ WRITE16_MEMBER( segaybd_state::io_chip_w )
|
||||
// port
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE16_MEMBER( segaybd_state::sound_data_w )
|
||||
WRITE16_MEMBER(segaybd_state::sound_data_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
synchronize(TID_SOUND_WRITE, data & 0xff);
|
||||
@ -250,7 +186,7 @@ WRITE16_MEMBER( segaybd_state::sound_data_w )
|
||||
// sound_data_r - read latched sound data
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( segaybd_state::sound_data_r )
|
||||
READ8_MEMBER(segaybd_state::sound_data_r)
|
||||
{
|
||||
m_soundcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
return m_soundlatch->read(space, 0);
|
||||
@ -705,7 +641,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, segaybd_state )
|
||||
AM_RANGE(0x084000, 0x08401f) AM_MIRROR(0x001fe0) AM_DEVREADWRITE("divider_main", sega_315_5249_divider_device, read, write)
|
||||
// AM_RANGE(0x086000, 0x087fff) /DEA0
|
||||
AM_RANGE(0x0c0000, 0x0cffff) AM_RAM AM_SHARE("shareram")
|
||||
AM_RANGE(0x100000, 0x10001f) AM_READWRITE(io_chip_r, io_chip_w)
|
||||
AM_RANGE(0x100000, 0x10001f) AM_DEVREADWRITE8("io", sega_315_5296_device, read, write, 0x00ff)
|
||||
AM_RANGE(0x100040, 0x100047) AM_READWRITE(analog_r, analog_w)
|
||||
AM_RANGE(0x1f0000, 0x1fffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
@ -860,12 +796,6 @@ static INPUT_PORTS_START( yboard_generic )
|
||||
PORT_START("LIMITSW")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PORTD")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("PORTE")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("DSW")
|
||||
PORT_DIPUNUSED_DIPLOC( 0x01, IP_ACTIVE_LOW, "SWB:1" )
|
||||
PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "SWB:2" )
|
||||
@ -878,9 +808,6 @@ static INPUT_PORTS_START( yboard_generic )
|
||||
|
||||
PORT_START("COINAGE")
|
||||
SEGA_COINAGE_LOC(SWA)
|
||||
|
||||
PORT_START("PORTH")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -1413,6 +1340,16 @@ static MACHINE_CONFIG_START( yboard, segaybd_state )
|
||||
|
||||
MCFG_WATCHDOG_ADD("watchdog")
|
||||
|
||||
MCFG_DEVICE_ADD("io", SEGA_315_5296, 16000000)
|
||||
MCFG_315_5296_IN_PORTA_CB(IOPORT("P1"))
|
||||
MCFG_315_5296_IN_PORTB_CB(IOPORT("GENERAL"))
|
||||
MCFG_315_5296_IN_PORTC_CB(IOPORT("LIMITSW"))
|
||||
MCFG_315_5296_OUT_PORTD_CB(WRITE8(segaybd_state, output1_w))
|
||||
MCFG_315_5296_OUT_PORTE_CB(WRITE8(segaybd_state, misc_output_w))
|
||||
MCFG_315_5296_IN_PORTF_CB(IOPORT("DSW"))
|
||||
MCFG_315_5296_IN_PORTG_CB(IOPORT("COINAGE"))
|
||||
MCFG_315_5296_OUT_PORTH_CB(WRITE8(segaybd_state, output2_w))
|
||||
|
||||
MCFG_SEGA_315_5248_MULTIPLIER_ADD("multiplier_main")
|
||||
MCFG_SEGA_315_5248_MULTIPLIER_ADD("multiplier_subx")
|
||||
MCFG_SEGA_315_5248_MULTIPLIER_ADD("multiplier_suby")
|
||||
|
||||
@ -33,36 +33,36 @@ public:
|
||||
, m_ysprites(*this, "ysprites")
|
||||
, m_segaic16vid(*this, "segaic16vid")
|
||||
, m_soundlatch(*this, "soundlatch")
|
||||
, m_digital_ports(*this, { { "P1", "GENERAL", "LIMITSW", "PORTD", "PORTE", "DSW", "COINAGE", "PORTH" } })
|
||||
, m_adc_ports(*this, "ADC.%u", 0)
|
||||
, m_pdrift_bank(0)
|
||||
, m_scanline_timer(nullptr)
|
||||
, m_irq2_scanline(0)
|
||||
, m_timer_irq_state(0)
|
||||
, m_vblank_irq_state(0)
|
||||
, m_misc_io_data(0)
|
||||
, m_tmp_bitmap(512, 512)
|
||||
{
|
||||
memset(m_analog_data, 0, sizeof(m_analog_data));
|
||||
memset(m_misc_io_data, 0, sizeof(m_misc_io_data));
|
||||
}
|
||||
|
||||
// main CPU read/write handlers
|
||||
DECLARE_READ16_MEMBER( analog_r );
|
||||
DECLARE_WRITE16_MEMBER( analog_w );
|
||||
DECLARE_READ16_MEMBER( io_chip_r );
|
||||
DECLARE_WRITE16_MEMBER( io_chip_w );
|
||||
DECLARE_WRITE16_MEMBER( sound_data_w );
|
||||
DECLARE_READ16_MEMBER(analog_r);
|
||||
DECLARE_WRITE16_MEMBER(analog_w);
|
||||
DECLARE_WRITE8_MEMBER(output1_w);
|
||||
DECLARE_WRITE8_MEMBER(misc_output_w);
|
||||
DECLARE_WRITE8_MEMBER(output2_w);
|
||||
DECLARE_WRITE16_MEMBER(sound_data_w);
|
||||
|
||||
// sound Z80 CPU read/write handlers
|
||||
DECLARE_READ8_MEMBER( sound_data_r );
|
||||
DECLARE_READ8_MEMBER(sound_data_r);
|
||||
|
||||
// linked cabinet specific handlers
|
||||
DECLARE_WRITE_LINE_MEMBER( mb8421_intl );
|
||||
DECLARE_WRITE_LINE_MEMBER( mb8421_intr );
|
||||
DECLARE_READ16_MEMBER( link_r );
|
||||
DECLARE_READ16_MEMBER( link2_r );
|
||||
DECLARE_WRITE16_MEMBER( link2_w );
|
||||
// DECLARE_READ8_MEMBER( link_portc0_r );
|
||||
DECLARE_WRITE_LINE_MEMBER(mb8421_intl);
|
||||
DECLARE_WRITE_LINE_MEMBER(mb8421_intr);
|
||||
DECLARE_READ16_MEMBER(link_r);
|
||||
DECLARE_READ16_MEMBER(link2_r);
|
||||
DECLARE_WRITE16_MEMBER(link2_w);
|
||||
// DECLARE_READ8_MEMBER(link_portc0_r);
|
||||
|
||||
// game-specific output handlers
|
||||
void gforce2_output_cb1(uint16_t data);
|
||||
@ -117,7 +117,6 @@ protected:
|
||||
required_device<generic_latch_8_device> m_soundlatch;
|
||||
|
||||
// input ports
|
||||
required_ioport_array<8> m_digital_ports;
|
||||
optional_ioport_array<6> m_adc_ports;
|
||||
|
||||
// configuration
|
||||
@ -131,6 +130,6 @@ protected:
|
||||
int m_irq2_scanline;
|
||||
uint8_t m_timer_irq_state;
|
||||
uint8_t m_vblank_irq_state;
|
||||
uint8_t m_misc_io_data[0x10];
|
||||
uint8_t m_misc_io_data;
|
||||
bitmap_ind16 m_tmp_bitmap;
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user