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xtal.h: Major addition of terminal XTAL frequencies (nw)
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AJR
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@ -158,6 +158,7 @@ enum
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XTAL_14_705882MHz = 14705882, /* Aleck64 */
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XTAL_14_7456MHz = 14745600, /* Namco System 12 & System Super 22/23 for JVS */
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XTAL_15MHz = 15000000, /* Sinclair QL, Amusco Poker */
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XTAL_15_30072MHz = 15300720, /* Microterm 420 */
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XTAL_15_36MHz = 15360000, /* Visual 1050 */
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XTAL_15_4MHz = 15400000, /* DVK KSM */
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XTAL_15_468MHz = 15468480, /* Bank Panic h/w, Sega G80 */
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@ -168,6 +169,7 @@ enum
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XTAL_16_384MHz = 16384000,
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XTAL_16_4MHz = 16400000, /* MS 6102 */
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XTAL_16_5888MHz = 16588800, /* SM 7238 */
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XTAL_16_6698MHz = 16669800, /* Qume QVT-102 */
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XTAL_16_67MHz = 16670000,
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XTAL_16_777216MHz = 16777216, /* Nintendo Game Boy Advance */
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XTAL_16_9344MHz = 16934400, /* Usually used to drive 90's Yamaha OPL/FM chips (44100 * 384) */
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@ -178,8 +180,10 @@ enum
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XTAL_17_9712MHz = 17971200,
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XTAL_18MHz = 18000000, /* S.A.R, Ikari Warriors 3 */
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XTAL_18_432MHz = 18432000, /* Extremely common, used on 100's of PCBs (48000 * 384) */
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XTAL_18_575MHz = 18575000, /* Visual 102 */
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XTAL_18_720MHz = 18720000, /* Nokia MikroMikko 1 */
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XTAL_18_8696MHz = 18869600, /* Memorex 2178 */
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XTAL_19_3396MHz = 19339600, /* TeleVideo TVI-955 80-column display clock */
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XTAL_19_6MHz = 19600000, /* Universal Mr. Do - Model 8021 PCB */
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XTAL_19_6608MHz = 19660800, /* Euro League (bootleg), labeled as "UKI 19.6608 20PF" */
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XTAL_19_923MHz = 19923000, /* Cinematronics vectors */
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@ -195,6 +199,7 @@ enum
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XTAL_22_1184MHz = 22118400, /* Amusco Poker */
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XTAL_22_3210MHz = 22321000, /* Apple LaserWriter II NT */
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XTAL_22_656MHz = 22656000, /* Super Pinball Action (~1440x NTSC line rate) */
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XTAL_23_814MHz = 23814000, /* TeleVideo TVI-912C & 950 */
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XTAL_23_9616MHz = 23961600, /* Osborne 4 (Vixen) */
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XTAL_24MHz = 24000000, /* Mario, 80's Data East games, 80's Konami games */
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XTAL_24_0734MHz = 24073400, /* DEC Rainbow 100 */
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@ -206,10 +211,12 @@ enum
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XTAL_25_447MHz = 25447000, /* Namco EVA3A (Funcube2) */
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XTAL_25_590906MHz = 25590906, /* Atari Jaguar NTSC */
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XTAL_25_593900MHz = 25593900, /* Atari Jaguar PAL */
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XTAL_25_7715MHz = 25771500, /* HP-2622A */
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XTAL_26MHz = 26000000, /* Gaelco PCBs */
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XTAL_26_601712MHz = 26601712, /* Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */
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XTAL_26_66666MHz = 26666666, /* Irem M92 but most use 27MHz */
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XTAL_26_686MHz = 26686000, /* Typically used on 90's Taito PCBs to drive the custom chips */
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XTAL_26_9892MHz = 26989200, /* TeleVideo 965 */
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XTAL_27MHz = 27000000, /* Some Banpresto games macrossp, Irem M92 and 90's Toaplan games */
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XTAL_27_164MHz = 27164000, /* Typically used on 90's Taito PCBs to drive the custom chips */
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XTAL_27_2109MHz = 27210900, /* LA Girl */
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@ -221,9 +228,11 @@ enum
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XTAL_28_64MHz = 28640000, /* Fukki FG-1c AI AM-2 PCB */
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XTAL_28_7MHz = 28700000,
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XTAL_29_4912MHz = 29491200, /* Xerox Alto-II system clock (tagged 29.4MHz in the schematics) */
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XTAL_29_876MHz = 29876000, /* Qume QVT-103 */
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XTAL_30MHz = 30000000, /* Impera Magic Card */
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XTAL_30_4761MHz = 30476100, /* Taito JC */
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XTAL_30_8MHz = 30800000, /* 15IE-00-013 */
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XTAL_31_684MHz = 31684000, /* TeleVideo TVI-955 132-column display clock */
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XTAL_32MHz = 32000000,
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XTAL_32_22MHz = 32220000, /* Typically used on 90's Data East PCBs (close to 9x NTSC subcarrier which is 32.215905Mhz*/
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XTAL_32_5304MHz = 32530400, /* Seta 2 */
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@ -239,12 +248,18 @@ enum
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XTAL_40MHz = 40000000,
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XTAL_42MHz = 42000000, /* BMC A-00211 - Popo Bear */
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XTAL_42_9545MHz = 42954545, /* CPS3 (12x NTSC subcarrier)*/
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XTAL_43_320MHz = 43320000, /* DEC VT420 */
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XTAL_44_1MHz = 44100000, /* Subsino's Bishou Jan */
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XTAL_44_4528MHz = 44452800, /* TeleVideo 965 */
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XTAL_45MHz = 45000000, /* Eolith with Hyperstone CPUs */
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XTAL_45_158MHz = 45158000, /* Sega Model 2A video board, Model 3 CPU board */
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XTAL_45_6192Mhz = 45619200, /* DEC VK100 */
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XTAL_45_582MHz = 45582000, /* Zentec Zephyr */
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XTAL_45_6192MHz = 45619200, /* DEC VK100 */
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XTAL_45_8304MHz = 45830400, /* Microterm 5510 */
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XTAL_47_736MHz = 47736000, /* Visual 100 */
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XTAL_48MHz = 48000000, /* Williams/Midway Y/Z-unit system / SSV board */
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XTAL_48_384MHz = 48384000, /* Namco NB-1 */
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XTAL_48_654MHz = 48654000, /* Qume QVT-201 */
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XTAL_48_66MHz = 48660000, /* Zaxxon */
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XTAL_49_152MHz = 49152000, /* Used on some Namco PCBs, Baraduke h/w, System 21, Super System 22 */
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XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */
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@ -258,6 +273,7 @@ enum
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XTAL_55MHz = 55000000, /* Eolith Vega */
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XTAL_57_2727MHz = 57272727, /* Psikyo SH2 with /2 divider (16x NTSC subcarrier)*/
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XTAL_58MHz = 58000000, /* Magic Reel (Play System) */
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XTAL_59_2920MHz = 59292000, /* Data General D461 */
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XTAL_60MHz = 60000000,
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XTAL_61_44MHz = 61440000, /* dkong */
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XTAL_64MHz = 64000000, /* BattleToads */
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@ -266,6 +282,7 @@ enum
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XTAL_72MHz = 72000000, /* Aristocrat MKV */
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XTAL_72_576MHz = 72576000, /* Centipede, Millipede, Missile Command, Let's Go Bowling "Multipede" */
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XTAL_73_728MHz = 73728000, /* Ms. Pac-Man/Galaga 20th Anniversary */
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XTAL_87_18336MHz = 87183360, /* AT&T 630 MTG */
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XTAL_100MHz = 100000000, /* PSX-based Namco System 12, Vegas, Sony ZN1-2-based */
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XTAL_101_4912MHz = 101491200, /* PSX-based Namco System 10 */
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XTAL_200MHz = 200000000, /* Base SH4 CPU (Naomi, Hikaru etc.) */
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@ -50,7 +50,7 @@
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#define RS232A_TAG "rs232a"
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#define RS232B_TAG "rs232b"
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#define MASTER_CLOCK (23814000)
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#define MASTER_CLOCK XTAL_23_814MHz
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class tv950_state : public driver_device
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{
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@ -329,4 +329,4 @@ ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
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COMP( 1981, tv950, 0, 0, tv950, tv950, tv950_state, 0, "TeleVideo", "TV950", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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COMP( 1981, tv950, 0, 0, tv950, tv950, tv950_state, 0, "TeleVideo", "Model 950 Video Display Terminal", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
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@ -422,7 +422,7 @@ TIMER_CALLBACK_MEMBER(vk100_state::execute_vg)
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m_vgPAT_Mask >>= 1; // shift the mask
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if (m_vgPAT_Mask == 0) m_vgPAT_Mask = 0x80; // reset mask if it hits 0
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}
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if (m_vgGO) timer_set(attotime::from_hz(XTAL_45_6192Mhz/3/12/2), TIMER_EXECUTE_VG); // /3/12/2 is correct. the sync counter is clocked by the dot clock, despite the error on figure 5-21
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if (m_vgGO) timer_set(attotime::from_hz(XTAL_45_6192MHz/3/12/2), TIMER_EXECUTE_VG); // /3/12/2 is correct. the sync counter is clocked by the dot clock, despite the error on figure 5-21
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}
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/* ports 0x40 and 0x41: load low and high bytes of vector gen X register */
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@ -1040,10 +1040,10 @@ static MACHINE_CONFIG_START( vk100 )
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_RAW_PARAMS(XTAL_45_6192Mhz/3, 882, 0, 720, 370, 0, 350 ) // fake screen timings for startup until 6845 sets real ones
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MCFG_SCREEN_RAW_PARAMS(XTAL_45_6192MHz/3, 882, 0, 720, 370, 0, 350 ) // fake screen timings for startup until 6845 sets real ones
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MCFG_SCREEN_UPDATE_DEVICE( "crtc", mc6845_device, screen_update )
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MCFG_MC6845_ADD( "crtc", H46505, "screen", XTAL_45_6192Mhz/3/12)
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MCFG_MC6845_ADD( "crtc", H46505, "screen", XTAL_45_6192MHz/3/12)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(12)
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MCFG_MC6845_UPDATE_ROW_CB(vk100_state, crtc_update_row)
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