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Merge branch 'master' of https://github.com/mamedev/mame

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This commit is contained in:
RobertoFresca 2016-08-02 21:58:15 -03:00
commit 733352ca12
156 changed files with 2973 additions and 1619 deletions
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2
.gitignore vendored
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@ -1,8 +1,10 @@
*~
.*.sw?
*.mo
*.orig
*.pyc
*.pyo
*.rej
.DS_Store
/*

2
src/devices/bus/apricot/keyboard/hle.h
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@ -24,7 +24,7 @@
// ======================> apricot_keyboard_hle_device
class apricot_keyboard_hle_device : public device_t,
public device_apricot_keyboard_interface,
public device_apricot_keyboard_interface,
public device_buffered_serial_interface<16>,
protected device_matrix_keyboard_interface<13>
{

34
src/devices/bus/apricot/keyboard/keyboard.h
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@ -4,26 +4,26 @@
ACT Apricot Keyboard Interface
Host interface: 9-pin D-SUB
Host interface: 9-pin D-SUB
1 +12V
2 OUT
3 IN
4 N/C
5 N/C
6 GND
7 -12V
8 0V
9 N/C
1 +12V
2 OUT
3 IN
4 N/C
5 N/C
6 GND
7 -12V
8 0V
9 N/C
Keyboard interface:
Keyboard interface:
A 0V
B +12V
C -12V
D N/C
E OUT
F IN
A 0V
B +12V
C -12V
D N/C
E OUT
F IN
***************************************************************************/

18
src/devices/bus/nes/nes_pcb.hxx
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@ -169,8 +169,8 @@ static const nes_pcb pcb_list[] =
{ "ks7031", KAISER_KS7031 }, // used in Dracula II (FDS Conversion)
{ "ks7012", KAISER_KS7012 }, // used in Zanac (FDS Conversion)
{ "ks7013b", KAISER_KS7013B }, // used in Highway Star (FDS Conversion)
{ "ks7016", KAISER_KS7016 }, // used in Exciting Basketball (FDS Conversion)
{ "ks7037", KAISER_KS7037 }, // Metroid FDS Chinese
{ "ks7016", KAISER_KS7016 }, // used in Exciting Basketball (FDS Conversion)
{ "ks7037", KAISER_KS7037 }, // Metroid FDS Chinese
{ "gs2015", RCM_GS2015 },
{ "gs2004", RCM_GS2004 },
{ "gs2013", RCM_GS2013 },
@ -301,7 +301,7 @@ static const nes_pcb pcb_list[] =
{ "unl_bb", UNL_BB },
{ "unl_malisb", UNL_MALISB },
{ "sgpipe", BTL_SHUIGUAN },
{ "rt01", UNL_RT01 }, // Russian Test Cart
{ "rt01", UNL_RT01 }, // Russian Test Cart
{ "unl_whero", UNL_WORLDHERO },
{ "unl_43272", UNL_43272 },
{ "tf1201", UNL_TF1201 },
@ -322,12 +322,12 @@ static const nes_pcb pcb_list[] =
{ "a9746", UNSUPPORTED_BOARD },
{ "dance2k", UNSUPPORTED_BOARD },
{ "pec586", UNSUPPORTED_BOARD },
{ "bmc_f15", UNSUPPORTED_BOARD }, // 150-in-1 Unchained Melody
{ "bmc_hp898f", UNSUPPORTED_BOARD }, // Primasoft 9999999-in-1
{ "bmc_8in1", UNSUPPORTED_BOARD }, // Super 8-in-1 (Incl. Rockin' Kats)
{ "unl_eh8813a", UNSUPPORTED_BOARD }, // Dr. Mario II
{ "unl_158b", UNSUPPORTED_BOARD }, // Blood of Jurassic
{ "unl_drgnfgt", UNSUPPORTED_BOARD }, // Dragon Fighter by Flying Star
{ "bmc_f15", UNSUPPORTED_BOARD }, // 150-in-1 Unchained Melody
{ "bmc_hp898f", UNSUPPORTED_BOARD }, // Primasoft 9999999-in-1
{ "bmc_8in1", UNSUPPORTED_BOARD }, // Super 8-in-1 (Incl. Rockin' Kats)
{ "unl_eh8813a", UNSUPPORTED_BOARD }, // Dr. Mario II
{ "unl_158b", UNSUPPORTED_BOARD }, // Blood of Jurassic
{ "unl_drgnfgt", UNSUPPORTED_BOARD }, // Dragon Fighter by Flying Star
{ "test", TEST_BOARD },
{ "unknown", UNKNOWN_BOARD } // a few pirate dumps uses the wrong mapper...
};

18
src/devices/bus/nes/nes_unif.hxx
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@ -137,15 +137,15 @@ static const unif unif_list[] =
{ "BMC-70IN1", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // mapper 236?
{ "BMC-70IN1B", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // mapper 236?
{ "BMC-42IN1RESETSWITCH", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // mapper 60?
{ "BMC-F-15", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // 150-in-1 Unchained Melody
{ "BMC-HP898F", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Primasoft 9999999-in-1
{ "BMC-8-IN-1", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Super 8-in-1 (Incl. Rockin' Kats)
{ "UNL-EH8813A", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Dr. Mario II
{ "UNL-158B", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Blood of Jurassic
{ "UNL-DRAGONFIGHTER", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Dragon Fighter by Flying Star
{ "UNL-KS7016", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Exciting Basketball FDS
{ "UNL-KS7037", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Metroid FDS Chinese
{ "UNL-RT-01", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Russian Test Cart
{ "BMC-F-15", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // 150-in-1 Unchained Melody
{ "BMC-HP898F", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Primasoft 9999999-in-1
{ "BMC-8-IN-1", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Super 8-in-1 (Incl. Rockin' Kats)
{ "UNL-EH8813A", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Dr. Mario II
{ "UNL-158B", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Blood of Jurassic
{ "UNL-DRAGONFIGHTER", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Dragon Fighter by Flying Star
{ "UNL-KS7016", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Exciting Basketball FDS
{ "UNL-KS7037", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Metroid FDS Chinese
{ "UNL-RT-01", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // Russian Test Cart
{ "PEC-586", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD},
{ "UNL-DANCE", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD},
{ "UNL-DRIPGAME", 0, 0, CHRRAM_0, UNSUPPORTED_BOARD}, // [by Quietust - we need more info]

2
src/devices/bus/ti99x/990_hd.cpp
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@ -122,7 +122,7 @@ enum
static const UINT16 w_mask[8] =
{
0x000f, /* Controllers should prevent overwriting of w0 status bits, and I know
that some controllers do so. */
that some controllers do so. */
0xffff,
0xffff,
0xffff,

2
src/devices/bus/ti99x/990_tap.cpp
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@ -72,7 +72,7 @@ enum
static const UINT16 w_mask[8] =
{
0x000f, /* Controllers should prevent overwriting of w0 status bits, and I know
that some controllers do so. */
that some controllers do so. */
0xffff,
0xffff,
0xffff,

3
src/devices/bus/ti99x/genboard.cpp
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@ -203,6 +203,7 @@
#define TRACE_CLOCK 0
#define TRACE_LINES 0
#define TRACE_SETTING 1
#define TRACE_VIDEOWS 0
#define TRACE_PFM 0
geneve_mapper_device::geneve_mapper_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@ -395,7 +396,7 @@ void geneve_mapper_device::set_cartridge_writable(int base, bool write)
void geneve_mapper_device::set_video_waitstates(bool wait)
{
if (TRACE_SETTING) logerror("%s: Setting video waitstates = %d\n", tag(), wait);
if (TRACE_VIDEOWS) logerror("%s: Setting video waitstates = %d\n", tag(), wait);
m_video_waitstates = wait;
}

78
src/devices/bus/wswan/rom.cpp
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@ -405,20 +405,20 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
switch (offset)
{
case 0x06: /* EEPROM address lower bits port/EEPROM address and command port
1KBit EEPROM:
Bit 0-5 - EEPROM address bit 1-6
Bit 6-7 - Command
00 - Extended command address bit 4-5:
00 - Write disable
01 - Write all
10 - Erase all
11 - Write enable
01 - Write
10 - Read
11 - Erase
16KBit EEPROM:
Bit 0-7 - EEPROM address bit 1-8
*/
1KBit EEPROM:
Bit 0-5 - EEPROM address bit 1-6
Bit 6-7 - Command
00 - Extended command address bit 4-5:
00 - Write disable
01 - Write all
10 - Erase all
11 - Write enable
01 - Write
10 - Read
11 - Erase
16KBit EEPROM:
Bit 0-7 - EEPROM address bit 1-8
*/
switch (m_eeprom_mode)
{
case EEPROM_1K:
@ -440,23 +440,23 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
break;
case 0x07: /* EEPROM higher bits/command bits port
1KBit EEPROM:
Bit 0 - Start
Bit 1-7 - Unknown
16KBit EEPROM:
Bit 0-1 - EEPROM address bit 9-10
Bit 2-3 - Command
00 - Extended command address bit 0-1:
00 - Write disable
01 - Write all
10 - Erase all
11 - Write enable
01 - Write
10 - Read
11 - Erase
Bit 4 - Start
Bit 5-7 - Unknown
*/
1KBit EEPROM:
Bit 0 - Start
Bit 1-7 - Unknown
16KBit EEPROM:
Bit 0-1 - EEPROM address bit 9-10
Bit 2-3 - Command
00 - Extended command address bit 0-1:
00 - Write disable
01 - Write all
10 - Erase all
11 - Write enable
01 - Write
10 - Read
11 - Erase
Bit 4 - Start
Bit 5-7 - Unknown
*/
switch (m_eeprom_mode)
{
case EEPROM_1K:
@ -486,14 +486,14 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
break;
case 0x08: /* EEPROM command
Bit 0 - Read complete (read only)
Bit 1 - Write complete (read only)
Bit 2-3 - Unknown
Bit 4 - Read
Bit 5 - Write
Bit 6 - Protect
Bit 7 - Initialize
*/
Bit 0 - Read complete (read only)
Bit 1 - Write complete (read only)
Bit 2-3 - Unknown
Bit 4 - Read
Bit 5 - Write
Bit 6 - Protect
Bit 7 - Initialize
*/
if (data & 0x80) // Initialize
logerror("Unsupported EEPROM command 'Initialize'\n");

8
src/devices/cpu/apexc/apexc.cpp
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@ -536,14 +536,14 @@ void apexc_cpu_device::execute()
the 5 bits must be cleared initially, an OR kind of makes sense */
m_r |= papertape_read() << 27;
delay2 = 32; /* no idea whether this should be counted as an absolute delay
or as a value in delay2 */
or as a value in delay2 */
break;
case 4:
/* P */
papertape_punch((m_r >> 27) & 0x1f);
delay2 = 32; /* no idea whether this should be counted as an absolute delay
or as a value in delay2 */
or as a value in delay2 */
break;
case 6:
@ -723,7 +723,7 @@ void apexc_cpu_device::execute()
/* S(x) */
m_working_store = (x >> 5) & 0xf; /* or is it (x >> 6)? */
DELAY(32); /* no idea what the value is... All I know is that it takes much
more time than track switching (which takes 6 cycles) */
more time than track switching (which takes 6 cycles) */
break;
}
if (vector)
@ -835,7 +835,7 @@ void apexc_cpu_device::device_reset()
/* next two lines are just the product of my bold fantasy */
m_cr = 0; /* first instruction executed will be a stop */
m_running = TRUE; /* this causes the CPU to load the instruction at 0/0,
which enables easy booting (just press run on the panel) */
which enables easy booting (just press run on the panel) */
m_a = 0;
m_r = 0;
m_pc = 0;

4
src/devices/cpu/apexc/apexc.h
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@ -16,8 +16,8 @@ enum
APEXC_STATE, /* whether CPU is running */
APEXC_ML_FULL, /* read-only pseudo-register for exclusive use by the control panel code
in the apexc driver : enables it to get the complete address computed
from the contents of ML and WS */
in the apexc driver : enables it to get the complete address computed
from the contents of ML and WS */
APEXC_PC /* doesn't actually exist; is there for the disassembler */
};

2
src/devices/cpu/i86/i186.cpp
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@ -28,7 +28,7 @@
#define DEST_INCREMENT 0x2000
#define DEST_NO_CHANGE (DEST_DECREMENT | DEST_INCREMENT)
#define DEST_INCDEC_MASK (DEST_DECREMENT | DEST_INCREMENT)
#define SRC_MIO 0X1000
#define SRC_MIO 0x1000
#define SRC_DECREMENT 0x0800
#define SRC_INCREMENT 0x0400
#define SRC_NO_CHANGE (SRC_DECREMENT | SRC_INCREMENT)

4
src/devices/cpu/m68000/m68000.h
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@ -254,8 +254,8 @@ public:
write32_delegate cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
write_line_delegate rte_instr_callback; /* Called when a RTE instruction is encountered */
write8_delegate tas_write_callback; /* Called instead of normal write8 by the TAS instruction,
allowing writeback to be disabled globally or selectively
or other side effects to be implemented */
allowing writeback to be disabled globally or selectively
or other side effects to be implemented */
address_space *program, *oprogram;

14
src/devices/cpu/patinhofeio/patinhofeio_cpu.h
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@ -76,14 +76,14 @@ protected:
/* processor registers */
unsigned char m_acc; /* accumulator (8 bits) */
unsigned int m_pc; /* program counter (12 bits)
* Actual register name is CI, which
* stands for "Contador de Instrucao"
* or "instructions counter".
*/
* Actual register name is CI, which
* stands for "Contador de Instrucao"
* or "instructions counter".
*/
unsigned int m_rc; /* RC = "Registrador de Chaves" (Keys Register)
* It represents the 12 bits of input data
* from toggle switches in the computer panel
*/
* It represents the 12 bits of input data
* from toggle switches in the computer panel
*/
unsigned char m_idx; /* IDX = Index Register */
unsigned char m_ext; /* EXT = Accumulator Extension Register */

8
src/devices/cpu/pdp1/pdp1.cpp
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@ -834,7 +834,7 @@ void pdp1_device::execute_run()
}
else if ((IR == DIO) || (IR == DAC)) /* dio or dac instruction ? */
{ /* there is a discrepancy: the pdp1 handbook tells that only dio should be used,
but the lisp tape uses the dac instruction instead */
but the lisp tape uses the dac instruction instead */
/* Yet maintenance manual p. 6-25 states clearly that the data is located
in IO and transfered to MB, so DAC is likely to be a mistake. */
m_rim_step = 2;
@ -1122,9 +1122,9 @@ void pdp1_device::execute_instruction()
}
case SUB: /* Subtract */
{ /* maintenance manual 7-14 seems to imply that substract does not test for -0.
The sim 2.3 source says so explicitely, though they do not give a reference.
It sounds a bit weird, but the reason is probably that doing so would
require additionnal logic that does not exist. */
The sim 2.3 source says so explicitely, though they do not give a reference.
It sounds a bit weird, but the reason is probably that doing so would
require additionnal logic that does not exist. */
/* overflow is set if the 2 operands have the same sign and the final result has another */
int ov2; /* 1 if the operands have the same sign*/

42
src/devices/cpu/pdp1/tx0.cpp
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@ -465,7 +465,7 @@ void tx0_64kw_device::execute_instruction_64kw()
{
PC = MAR & ADDRESS_MASK_64KW;
m_cycle = 0; /* instruction only takes one cycle if branch
is taken */
is taken */
}
break;
@ -596,18 +596,18 @@ void tx0_64kw_device::execute_instruction_64kw()
if (MAR & 0000010)
{ /* (1.7) CRY = Partial add the 18 digits of the AC to the
corresponding 18 digits of the carry.
corresponding 18 digits of the carry.
To determine what the 18 digits of the carry are, use the
following rule:
To determine what the 18 digits of the carry are, use the
following rule:
"Grouping the AC and MBR digits into pairs and proceeding from
right to left, assign the carry digit of the next pair to a one
if in the present pair MBR = 1 and AC = 0 or if in the present
pair AC = 1 and carry 1.
"Grouping the AC and MBR digits into pairs and proceeding from
right to left, assign the carry digit of the next pair to a one
if in the present pair MBR = 1 and AC = 0 or if in the present
pair AC = 1 and carry 1.
(Note: the 0th digit pair determines the 17th pair's carry
digit)" */
(Note: the 0th digit pair determines the 17th pair's carry
digit)" */
AC ^= MBR;
AC = AC + MBR;
@ -666,7 +666,7 @@ void tx0_8kw_device::execute_instruction_8kw()
{
PC = MAR & 0017777;
m_cycle = 0; /* instruction only takes one cycle if branch
is taken */
is taken */
}
break;
@ -675,7 +675,7 @@ void tx0_8kw_device::execute_instruction_8kw()
{
PC = MAR & 0017777;
m_cycle = 0; /* instruction only takes one cycle if branch
is taken */
is taken */
}
break;
@ -683,7 +683,7 @@ void tx0_8kw_device::execute_instruction_8kw()
XR = PC;
PC = MAR & 0017777;
m_cycle = 0; /* instruction only takes one cycle if branch
is taken */
is taken */
break;
case 19: /* Transfer and IndeX */
@ -695,7 +695,7 @@ void tx0_8kw_device::execute_instruction_8kw()
XR--;
PC = MAR & 0017777;
m_cycle = 0; /* instruction only takes one cycle if branch
is taken */
is taken */
}
break;
@ -704,7 +704,7 @@ void tx0_8kw_device::execute_instruction_8kw()
case 20: /* TRAnsfer */
PC = MAR & 0017777;
m_cycle = 0; /* instruction only takes one cycle if branch
is taken */
is taken */
break;
case 22: /* Transfer on external LeVel */
@ -712,7 +712,7 @@ void tx0_8kw_device::execute_instruction_8kw()
{
PC = MAR & 0017777;
m_cycle = 0;*/ /* instruction only takes one cycle if branch
is taken */
is taken */
/*}*/
break;
@ -915,8 +915,8 @@ void tx0_8kw_device::execute_instruction_8kw()
{ /* Normal operate class instruction */
if (((IR & 001) == 00) && ((MAR & 017000) == 003000))
{ /* (1.1) PEN = set ac bit 0 from light PEN ff, and ac bit 1 from
light gun ff. (ffs contain one if pen or gun saw displayed
point.) Then clear both light pen and light gun ffs */
light gun ff. (ffs contain one if pen or gun saw displayed
point.) Then clear both light pen and light gun ffs */
/*AC = (AC & 0177777) |?...;*/
/*... = 0;*/
}
@ -985,12 +985,12 @@ void tx0_8kw_device::execute_instruction_8kw()
switch (MAR & 0000300)
{
case 0000000: /* (1.6) CYR = CYcle ac contents Right one binary
position (AC(17) -> AC(0)) */
position (AC(17) -> AC(0)) */
AC = (AC >> 1) | ((AC & 1) << 17);
break;
case 0000200: /* (1.6) CYcle ac contents Right one binary
position (AC(0) unchanged) */
position (AC(0) unchanged) */
AC = (AC >> 1) | (AC & 0400000);
break;
@ -1007,7 +1007,7 @@ void tx0_8kw_device::execute_instruction_8kw()
if (MAR & 0000010)
{ /* (1.7?) CRY = Partial ADd the 18 digits of the AC to the
corresponding 18 digits of the carry. */
corresponding 18 digits of the carry. */
AC ^= MBR;
AC = AC + MBR;

150
src/devices/cpu/sparc/sparcv8ops.ipp
View File

@ -16,49 +16,49 @@ void mb86901_device::execute_swap(UINT32 op)
/* The SPARC Instruction Manual: Version 8, page 169, "Appendix C - ISP Descriptions - Atomic Load-Store Unsigned Byte Instructions" (SPARCv8.pdf, pg. 166)
if (SWAP) then (
address <- r[rs1] + (if (i = 0) then r[rs2] else sign_extend(simm13));
addr_space <- (if (S = 0) then 10 else 11)
address <- r[rs1] + (if (i = 0) then r[rs2] else sign_extend(simm13));
addr_space <- (if (S = 0) then 10 else 11)
) else if (SWAPA) then (
if (S = 0) then (
trap <- 1;
privileged_instruction <- 1
) else if (i = 1) then (
trap <- 1;
illegal_instruction <- 1
) else (
address <- r[rs1] + r[rs1];
addr_space <- asi
)
if (S = 0) then (
trap <- 1;
privileged_instruction <- 1
) else if (i = 1) then (
trap <- 1;
illegal_instruction <- 1
) else (
address <- r[rs1] + r[rs1];
addr_space <- asi
)
);
next;
if (trap = 0) then (
temp <- r[rd];
while ( (pb_block_ldst_byte = 1) or (pb_block_ldst_word = 1) ) (
{ wait for lock(s) to be lifted }
{ an implementation actually need only block when another SWAP is pending on
the same word in memory as the one addressed by this SWAP, or a LDSTUB is
pending on any byte of the word in memory addressed by this SWAP }
);
next;
pb_block_ldst_word <- 1;
next;
(word, MAE) <- memory_read(addr_space, address);
next;
if (MAE = 1) then (
trap <- 1;
data_access_exception = 1
)
temp <- r[rd];
while ( (pb_block_ldst_byte = 1) or (pb_block_ldst_word = 1) ) (
{ wait for lock(s) to be lifted }
{ an implementation actually need only block when another SWAP is pending on
the same word in memory as the one addressed by this SWAP, or a LDSTUB is
pending on any byte of the word in memory addressed by this SWAP }
);
next;
pb_block_ldst_word <- 1;
next;
(word, MAE) <- memory_read(addr_space, address);
next;
if (MAE = 1) then (
trap <- 1;
data_access_exception = 1
)
next;
if (trap = 0) then (
MAE <- memory_write(addr_space, address, 1111, temp);
next;
pb_block_ldst_word <- 0;
if (MAE = 1) then ( { MAE = 1 only due to a "non-resumable machine-check error" }
trap <- 1;
data_access_exception <- 1
) else (
if (rd != 0) then r[rd] <- word
)
MAE <- memory_write(addr_space, address, 1111, temp);
next;
pb_block_ldst_word <- 0;
if (MAE = 1) then ( { MAE = 1 only due to a "non-resumable machine-check error" }
trap <- 1;
data_access_exception <- 1
) else (
if (rd != 0) then r[rd] <- word
)
);
*/
@ -144,13 +144,13 @@ void mb86901_device::execute_mul(UINT32 op)
else if (SMUL or SMULcc) then (Y, result) <- multiply_signed(r[rs1], operand2)
next;
if (rd != 0) then (
r[rd] <- result;
r[rd] <- result;
)
if (UMULcc or SMULcc) then (
N <- result<31>;
Z <- if (result = 0) then 1 else 0;
V <- 0
C <- 0
N <- result<31>;
Z <- if (result = 0) then 1 else 0;
V <- 0
C <- 0
);
*/
@ -195,42 +195,42 @@ void mb86901_device::execute_div(UINT32 op)
next;
if (operand2 = 0) then (
trap <- 1;
division_by_zero <- 1
trap <- 1;
division_by_zero <- 1
) else (
if (UDIV or UDIVcc) then (
temp_64bit <- divide_unsigned(Y[]r[rs1], operand2);
next;
result <- temp_64bit<31:0>;
temp_V <- if (temp_64bit<63:32> = 0) then 0 else 1;
) else if (SDIV or SDIVcc) then (
temp_64bit <- divide_signed(Y[]r[rs1], operand2);
next;
result <- temp_64bit<31:0>;
temp_V <- if (temp_64bit<63:31> = 0) or
(temp_64bit<63:31> = (2^33 - 1)) ) then 0 else 1;
) ;
next;
if (UDIV or UDIVcc) then (
temp_64bit <- divide_unsigned(Y[]r[rs1], operand2);
next;
result <- temp_64bit<31:0>;
temp_V <- if (temp_64bit<63:32> = 0) then 0 else 1;
) else if (SDIV or SDIVcc) then (
temp_64bit <- divide_signed(Y[]r[rs1], operand2);
next;
result <- temp_64bit<31:0>;
temp_V <- if (temp_64bit<63:31> = 0) or
(temp_64bit<63:31> = (2^33 - 1)) ) then 0 else 1;
) ;
next;
if (temp_V) then (
{ result overflowed 32 bits; return largest appropriate integer }
if (UDIV or UDIVcc) then result <- 2^32 - 1;
else if (SDIV or SDIVcc) then (
if (temp_64bit > 0) then result <- 2^31 - 1;
else result <- -2^31
)
);
next;
if (temp_V) then (
{ result overflowed 32 bits; return largest appropriate integer }
if (UDIV or UDIVcc) then result <- 2^32 - 1;
else if (SDIV or SDIVcc) then (
if (temp_64bit > 0) then result <- 2^31 - 1;
else result <- -2^31
)
);
next;
if (rd != 0) then (
r[rd] <- result
) ;
if (UDIVcc or SDIVcc) then (
N <- result<31>;
Z <- if (result = 0) then 1 else 0;
V <- temp_V;
C <- 0
)
if (rd != 0) then (
r[rd] <- result
) ;
if (UDIVcc or SDIVcc) then (
N <- result<31>;
Z <- if (result = 0) then 1 else 0;
V <- temp_V;
C <- 0
)
);
*/

10
src/devices/cpu/sparc/ss1fcode.ipp
View File

@ -11,7 +11,7 @@ void mb86901_device::log_fcodes()
{
if (PC != 0xffef0000 && PC != m_ss1_next_entry_point)
return;
if (PC == 0xffef0000)
{
UINT32 opcode = read_sized_word(11, REG(5), 2);
@ -31,7 +31,7 @@ void mb86901_device::log_fcodes()
}
//else if (opcode == 0x0cb8)
//{
// m_log_fcodes = false;
// m_log_fcodes = false;
//}
UINT32 handler_base = opcode << 2;
handler_base += REG(2); // l1 = r2 + opcode << 2
@ -64,7 +64,7 @@ void mb86901_device::indent()
if (program_depth < 15)
return;
program_depth -= 15;
for (int i = 0; i < program_depth; i++)
{
printf(" ");
@ -76,7 +76,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
std::string opdesc = m_ss1_fcode_table[opcode];
if (opdesc.length() == 0)
opdesc = "[unknown]";
indent(); printf("\n");
indent(); printf("Stacks before this forth code:\n");
indent(); printf("Data Return\n");
@ -130,7 +130,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
while (m_ss1_fcode_table[base_op].length() == 0)
base_op--;
UINT32 dist = (exact_op - base_op) * 4;
if (entry_point == 0xffe87964)
{
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; call %08x\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), handler_base + 2);

4
src/devices/cpu/tms9900/9900dasm.cpp
View File

@ -51,7 +51,7 @@ enum
/* processor set on which opcodes are available */
ps_any = 0x01, /* every processor in the tms9900/ti990 family */
ps_mapper = 0x02, /* processors with memory mapper (ti990/10, ti990/12,
and tms99000 with mapper coprocessor) */
and tms99000 with mapper coprocessor) */
ps_tms9995 = 0x04, /* ti990/12, tms9995, and later */
ps_tms99000 = 0x08, /* ti990/12, tms99000, and later */
ps_ti990_12 = 0x10, /* ti990/12 only */
@ -360,7 +360,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
if ((model_id == TI990_10_ID) /*|| (model_id == TI990_12_ID)*/ || (model_id >= TMS99000_ID))
processor_mask |= ps_mapper; /* processors with memory mapper (ti990/10, ti990/12,
and tms99000 with mapper coprocessor) */
and tms99000 with mapper coprocessor) */
if (/*(model_id == TI990_12_ID) ||*/ (model_id >= TMS9995_ID))
processor_mask |= ps_tms9995; /* ti990/12, tms9995, and later */

2
src/devices/cpu/tms9900/99xxcore.h
View File

@ -466,7 +466,7 @@ struct tms99xx_state
int icount;
UINT8 IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing
special data on CRU bus */
special data on CRU bus */
#if HAS_MAPPING
UINT8 mapping_on; /* set by a CRU write */

2
src/devices/machine/hdc92x4.cpp
View File

@ -242,7 +242,7 @@ enum
{
GEN_TIMER = 1,
COM_TIMER /*,
LIVE_TIMER */
LIVE_TIMER */
};
/*

16
src/devices/machine/keyboard.cpp
View File

@ -31,13 +31,13 @@ WRITE8_MEMBER( xxx_state::kbd_put )
namespace {
UINT8 const TRANSLATION_TABLE[][2][4][16] = {
{
{ // ANSI
{ // ANSI
{ '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=', 0x08U, 0x7fU, 0x1bU },
{ 0x09U, 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\\', 0xffU, 0xffU },
{ 0xffU, 'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'', 0x0dU, 0xffU, 0xffU, 0x0aU },
{ 0xffU, '\\', 'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/', 0xffU, 0xffU, 0xffU, ' ' }
},
{ // JIS
{ // JIS
{ '\\', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '^', 0x08U, 0x7fU, 0x1bU },
{ 0x09U, 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '@', '[', ']', 0xffU, 0xffU },
{ 0xffU, 'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', ':', 0x0dU, 0xffU, 0xffU, 0x0aU },
@ -45,13 +45,13 @@ UINT8 const TRANSLATION_TABLE[][2][4][16] = {
}
},
{
{ // ANSI shift
{ // ANSI shift
{ '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+', 0x08U, 0x7fU, 0x1bU },
{ 0x09U, 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '|', 0xffU, 0xffU },
{ 0xffU, 'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', 0x0dU, 0xffU, 0xffU, 0x0aU },
{ 0xffU, '_', 'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?', 0xffU, 0xffU, 0xffU, ' ' }
},
{ // JIS shift
{ // JIS shift
{ '|', '!', '"', '#', '$', '%', '&', '\'', '(', ')', 0xffU, '=', '~', 0x08U, 0x7fU, 0x1bU },
{ 0x09U, 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '`', '{', '}', 0xffU, 0xffU },
{ 0xffU, 'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', '+', '*', 0x0dU, 0xffU, 0xffU, 0x0aU },
@ -59,13 +59,13 @@ UINT8 const TRANSLATION_TABLE[][2][4][16] = {
}
},
{
{ // ANSI ctrl
{ // ANSI ctrl
{ 0x00U, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', 0x1fU, 0x1eU, 0x08U, 0x7fU, 0x1bU },
{ 0x09U, 0x11U, 0x17U, 0x05U, 0x12U, 0x14U, 0x19U, 0x15U, 0x09U, 0x0fU, 0x10U, 0x1bU, 0x1dU, 0x1cU, 0xffU, 0xffU },
{ 0xffU, 0x01U, 0x13U, 0x04U, 0x06U, 0x07U, 0x08U, 0x0aU, 0x0bU, 0x0cU, ';', '\'', 0x0dU, 0xffU, 0xffU, 0x0aU },
{ 0xffU, 0x1cU, 0x1aU, 0x18U, 0x03U, 0x16U, 0x02U, 0x0eU, 0x0dU, ',', '.', 0x1fU, 0xffU, 0xffU, 0xffU, 0x00U }
},
{ // JIS ctrl
{ // JIS ctrl
{ 0x1cU, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', 0x1fU, 0x1eU, 0x08U, 0x7fU, 0x1bU },
{ 0x09U, 0x11U, 0x17U, 0x05U, 0x12U, 0x14U, 0x19U, 0x15U, 0x09U, 0x0fU, 0x10U, 0x00U, 0x1bU, 0x1dU, 0xffU, 0xffU },
{ 0xffU, 0x01U, 0x13U, 0x04U, 0x06U, 0x07U, 0x08U, 0x0aU, 0x0bU, 0x0cU, ';', ':', 0x0dU, 0xffU, 0xffU, 0x0aU },
@ -180,7 +180,7 @@ INPUT_PORTS_START( generic_keyboard )
PORT_BIT( 0x0200U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x00) PORT_CHAR('[') PORT_CHAR('{')
PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x01) PORT_CHAR('@') PORT_CHAR('`')
PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x01) PORT_CHAR('@') PORT_CHAR('`')
PORT_BIT( 0x1000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x00) PORT_CHAR(']') PORT_CHAR('}')
PORT_BIT( 0x1000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x01) PORT_CHAR('[') PORT_CHAR('{')
PORT_BIT( 0x2000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x00) PORT_CHAR('\\') PORT_CHAR('|')
@ -202,7 +202,7 @@ INPUT_PORTS_START( generic_keyboard )
PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x00) PORT_CHAR(';') PORT_CHAR(':')
PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x01) PORT_CHAR(';') PORT_CHAR('+')
PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x00) PORT_CHAR('\'') PORT_CHAR('"')
PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x01) PORT_CHAR(':') PORT_CHAR('*')
PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CONDITION("GENKBD_CFG", 0x01, EQUALS, 0x01) PORT_CHAR(':') PORT_CHAR('*')
PORT_BIT( 0x1000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_NAME("Return") PORT_CHAR(0x0dU)
PORT_BIT( 0x2000U, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x4000U, IP_ACTIVE_HIGH, IPT_UNUSED )

2
src/devices/machine/terminal.cpp
View File

@ -427,7 +427,7 @@ INPUT_PORTS_START( generic_terminal )
PORT_CONFSETTING( 0x000, "Green" )
PORT_CONFSETTING( 0x010, "Amber" )
PORT_CONFSETTING( 0x020, "White" )
PORT_CONFNAME( 0x040, 0x000, "Auto CR on LF" )
PORT_CONFNAME( 0x040, 0x040, "Auto CR on LF" )
PORT_CONFSETTING( 0x000, DEF_STR(No) )
PORT_CONFSETTING( 0x040, DEF_STR(Yes) )
PORT_CONFNAME( 0x080, 0x000, "Auto LF on CR" )

75
src/devices/machine/tms9902.cpp
View File

@ -41,8 +41,12 @@
#include <math.h>
#include "tms9902.h"
#define VERBOSE 1
#define LOG logerror
#define TRACE_LINES 0
#define TRACE_CRU 0
#define TRACE_DETAIL 0
#define TRACE_BUFFER 0
#define TRACE_ERROR 1
#define TRACE_SETTING 0
enum
{
@ -78,14 +82,14 @@ void tms9902_device::field_interrupts()
|| (m_RBRL && m_RIENB)
|| (m_XBRE && m_XBIENB)
|| (m_TIMELP && m_TIMENB);
if (VERBOSE>8) LOG("TMS9902: interrupt flags (DSCH = %02x, DSCENB = %02x), (RBRL = %02x, RIENB = %02x), (XBRE = %02x, XBIENB = %02x), (TIMELP = %02x, TIMENB = %02x)\n",
if (TRACE_DETAIL) logerror("interrupt flags (DSCH = %02x, DSCENB = %02x), (RBRL = %02x, RIENB = %02x), (XBRE = %02x, XBIENB = %02x), (TIMELP = %02x, TIMENB = %02x)\n",
m_DSCH, m_DSCENB, m_RBRL, m_RIENB, m_XBRE, m_XBIENB, m_TIMELP, m_TIMENB);
if (new_int != m_INT)
{
// Only consider edges
m_INT = new_int;
if (VERBOSE>3) LOG("TMS9902: /INT = %s\n", (m_INT)? "asserted" : "cleared");
if (TRACE_LINES) logerror("/INT = %s\n", (m_INT)? "asserted" : "cleared");
m_int_cb(m_INT? ASSERT_LINE : CLEAR_LINE);
}
}
@ -101,7 +105,7 @@ void tms9902_device::rcv_cts(line_state state)
// CTSin is an internal register of the TMS9902 with positive logic
m_CTSin = (state==ASSERT_LINE);
if (VERBOSE>3) LOG("TMS9902: CTS* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
if (TRACE_LINES) logerror("CTS* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
if (m_CTSin != previous)
{
@ -131,7 +135,7 @@ void tms9902_device::rcv_cts(line_state state)
else
{
m_DSCH = false;
if (VERBOSE>4) LOG("TMS9902: no change in CTS line, no interrupt.");
if (TRACE_LINES) logerror("no change in CTS line, no interrupt.");
}
}
@ -150,7 +154,7 @@ void tms9902_device::set_clock(bool state)
void tms9902_device::rcv_dsr(line_state state)
{
bool previous = m_DSRin;
if (VERBOSE>3) LOG("TMS9902: DSR* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
if (TRACE_LINES) logerror("DSR* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
m_DSRin = (state==ASSERT_LINE);
if (m_DSRin != previous)
@ -161,7 +165,7 @@ void tms9902_device::rcv_dsr(line_state state)
else
{
m_DSCH = false;
if (VERBOSE>4) LOG("TMS9902: no change in DSR line, no interrupt.");
if (TRACE_LINES) logerror("no change in DSR line, no interrupt.");
}
}
@ -184,14 +188,14 @@ void tms9902_device::rcv_data(UINT8 data)
// Receive buffer was empty
m_RBRL = true;
m_ROVER = false;
if (VERBOSE>3) LOG("TMS9902: Receive buffer loaded with byte %02x\n", data);
if (TRACE_BUFFER) logerror("Receive buffer loaded with byte %02x\n", data);
field_interrupts();
}
else
{
// Receive buffer was full
m_ROVER = true;
if (VERBOSE>1) LOG("TMS9902: Receive buffer still loaded; overflow error\n");
if (TRACE_ERROR) logerror("Receive buffer still loaded; overflow error\n");
}
}
@ -205,7 +209,7 @@ void tms9902_device::rcv_data(UINT8 data)
*/
void tms9902_device::rcv_framing_error()
{
if (VERBOSE>2) LOG("TMS9902: Detected framing error\n");
if (TRACE_ERROR) logerror("Detected framing error\n");
m_RFER = true;
}
@ -217,7 +221,7 @@ void tms9902_device::rcv_framing_error()
*/
void tms9902_device::rcv_parity_error()
{
if (VERBOSE>2) LOG("TMS9902: Detected parity error\n");
if (TRACE_ERROR) logerror("Detected parity error\n");
m_RPER = true;
}
@ -229,7 +233,7 @@ void tms9902_device::rcv_parity_error()
*/
void tms9902_device::rcv_break(bool value)
{
if (VERBOSE>2) LOG("TMS9902: Receive BREAK=%d (no effect)\n", value? 1:0);
if (TRACE_ERROR) logerror("Receive BREAK=%d (no effect)\n", value? 1:0);
}
//------------------------------------------------
@ -292,7 +296,7 @@ void tms9902_device::send_break(bool state)
if (state != m_BRKout)
{
m_BRKout = state;
if (VERBOSE>2) LOG("TMS9902: Sending BREAK=%d\n", state? 1:0);
if (TRACE_LINES) logerror("Sending BREAK=%d\n", state? 1:0);
// Signal BRK (on/off) to the remote site
m_ctrl_cb((offs_t)(EXCEPT | BRK), state? 1:0);
@ -324,7 +328,7 @@ double tms9902_device::get_baudpoll()
void tms9902_device::set_receive_data_rate()
{
int value = (m_CLK4M? 0x800 : 0) | (m_RDV8? 0x400 : 0) | m_RDR;
if (VERBOSE>3) LOG("TMS9902: receive rate = %04x\n", value);
if (TRACE_SETTING) logerror("receive rate = %04x\n", value);
// Calculate the ratio between receive baud rate and polling frequency
double fint = m_clock_rate / ((m_CLK4M) ? 4.0 : 3.0);
@ -335,7 +339,7 @@ void tms9902_device::set_receive_data_rate()
// Thus the callback function should add up this value on each poll
// and deliver a data input not before it sums up to 1.
m_baudpoll = (double)(baud / (10*POLLING_FREQ));
if (VERBOSE>3) LOG ("TMS9902: baudpoll = %f\n", m_baudpoll);
if (TRACE_SETTING) logerror ("baudpoll = %f\n", m_baudpoll);
m_last_config_value = value;
m_ctrl_cb((offs_t)CONFIG, RATERECV);
@ -348,7 +352,7 @@ void tms9902_device::set_receive_data_rate()
void tms9902_device::set_transmit_data_rate()
{
int value = (m_CLK4M? 0x800 : 0) | (m_XDV8? 0x400 : 0) | m_XDR;
if (VERBOSE>3) LOG("TMS9902: set transmit rate = %04x\n", value);
if (TRACE_SETTING) logerror("set transmit rate = %04x\n", value);
m_last_config_value = value;
m_ctrl_cb((offs_t)CONFIG, RATEXMIT);
}
@ -356,7 +360,7 @@ void tms9902_device::set_transmit_data_rate()
void tms9902_device::set_stop_bits()
{
int value = m_STOPB;
if (VERBOSE>3) LOG("TMS9902: set stop bits = %02x\n", value);
if (TRACE_SETTING) logerror("set stop bits = %02x\n", value);
m_last_config_value = value;
m_ctrl_cb((offs_t)CONFIG, STOPBITS);
}
@ -364,7 +368,7 @@ void tms9902_device::set_stop_bits()
void tms9902_device::set_data_bits()
{
int value = m_RCL;
if (VERBOSE>3) LOG("TMS9902: set data bits = %02x\n", value);
if (TRACE_SETTING) logerror("set data bits = %02x\n", value);
m_last_config_value = value;
m_ctrl_cb((offs_t)CONFIG, DATABITS);
}
@ -372,7 +376,7 @@ void tms9902_device::set_data_bits()
void tms9902_device::set_parity()
{
int value = (m_PENB? 2:0) | (m_ODDP? 1:0);
if (VERBOSE>3) LOG("TMS9902: set parity = %02x\n", value);
if (TRACE_SETTING) logerror("set parity = %02x\n", value);
m_last_config_value = value;
m_ctrl_cb((offs_t)CONFIG, PARITY);
}
@ -381,7 +385,7 @@ void tms9902_device::transmit_line_state()
{
// 00ab cdef = setting line RTS=a, CTS=b, DSR=c, DCD=d, DTR=e, RI=f
// The 9902 only outputs RTS and BRK
if (VERBOSE>3) LOG("TMS9902: transmitting line state (only RTS) = %02x\n", (m_RTSout)? 1:0);
if (TRACE_SETTING) logerror("transmitting line state (only RTS) = %02x\n", (m_RTSout)? 1:0);
m_last_config_value = (m_RTSout)? RTS : 0;
m_ctrl_cb((offs_t)LINES, RTS);
}
@ -393,7 +397,7 @@ void tms9902_device::set_rts(line_state state)
if (lstate != m_RTSout)
{
// Signal RTS to the modem
if (VERBOSE>3) LOG("TMS9902: Set RTS=%d\n", lstate? 1:0);
if (TRACE_SETTING) logerror("Set RTS=%d\n", lstate? 1:0);
m_RTSout = lstate;
transmit_line_state();
}
@ -418,14 +422,14 @@ void tms9902_device::initiate_transmit()
set_rts(CLEAR_LINE);
else
{
if (VERBOSE>5) LOG("TMS9902: transferring XBR to XSR; XSRE=false, XBRE=true\n");
if (TRACE_BUFFER) logerror("transferring XBR to XSR; XSRE=false, XBRE=true\n");
m_XSR = m_XBR;
m_XSRE = false;
m_XBRE = true;
field_interrupts();
if (VERBOSE>4) LOG("TMS9902: transmit XSR=%02x, RCL=%02x\n", m_XSR, m_RCL);
if (TRACE_BUFFER) logerror("transmit XSR=%02x, RCL=%02x\n", m_XSR, m_RCL);
m_xmit_cb((offs_t)0, m_XSR & (0xff >> (3-m_RCL)));
@ -501,7 +505,7 @@ READ8_MEMBER( tms9902_device::cruread )
answer = m_RBR;
break;
}
if (VERBOSE>7) LOG("TMS9902: Reading flag bits %d - %d = %02x\n", ((offset+1)*8-1), offset*8, answer);
if (TRACE_CRU) logerror("Reading flag bits %d - %d = %02x\n", ((offset+1)*8-1), offset*8, answer);
return answer;
}
@ -523,7 +527,7 @@ static inline void set_bits16(UINT16 *reg, UINT16 bits, bool set)
void tms9902_device::reset_uart()
{
if (VERBOSE>1) LOG("TMS9902: resetting\n");
logerror("resetting UART\n");
/* disable all interrupts */
m_DSCENB = false; // Data Set Change Interrupt Enable
@ -556,7 +560,6 @@ void tms9902_device::reset_uart()
m_DSCH = false;
m_TIMELP = false;
m_INT = false;
m_CTSin = false;
m_TMR = 0;
@ -568,7 +571,9 @@ void tms9902_device::reset_uart()
m_XBR = 0;
m_XSR = 0;
// m_INT will be cleared in field_interrupts
// m_INT will be cleared in field_interrupts; setting to true is required
// to trigger the INT line update
m_INT = true;
field_interrupts();
}
@ -580,7 +585,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
data &= 1; /* clear extra bits */
offset &= 0x1F;
if (VERBOSE>5) LOG("TMS9902: Setting bit %d = %02x\n", offset, data);
if (TRACE_CRU) logerror("Setting bit %d = %02x\n", offset, data);
if (offset <= 10)
{
@ -624,7 +629,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
set_stop_bits();
break;
default:
if (VERBOSE>1) LOG("tms9902: Invalid control register address %d\n", offset);
logerror("tms9902: Invalid control register address %d\n", offset);
}
}
else if (m_LDIR)
@ -744,7 +749,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
}
return;
case 17:
if (VERBOSE>3) LOG("TMS9902: set BRKON=%d; BRK=%d\n", data, m_BRKout? 1:0);
if (TRACE_CRU) logerror("set BRKON=%d; BRK=%d\n", data, m_BRKout? 1:0);
m_BRKON = (data!=0);
if (m_BRKout && data==0)
{
@ -772,13 +777,13 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
// (the only way to clear the flag!)
m_RIENB = (data!=0);
m_RBRL = false;
if (VERBOSE>4) LOG("TMS9902: set RBRL=0, set RIENB=%d\n", data);
if (TRACE_CRU) logerror("set RBRL=0, set RIENB=%d\n", data);
field_interrupts();
return;
case 19:
/* Transmit Buffer Interrupt Enable */
m_XBIENB = (data!=0);
if (VERBOSE>4) LOG("TMS9902: set XBIENB=%d\n", data);
if (TRACE_CRU) logerror("set XBIENB=%d\n", data);
field_interrupts();
return;
case 20:
@ -792,7 +797,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
/* Data Set Change Interrupt Enable */
m_DSCENB = (data!=0);
m_DSCH = false;
if (VERBOSE>4) LOG("TMS9902: set DSCH=0, set DSCENB=%d\n", data);
if (TRACE_CRU) logerror("set DSCH=0, set DSCENB=%d\n", data);
field_interrupts();
return;
case 31:
@ -800,7 +805,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
reset_uart();
return;
default:
if (VERBOSE>1) LOG("TMS9902: Writing to undefined flag bit position %d = %01x\n", offset, data);
logerror("Writing to undefined flag bit position %d = %01x\n", offset, data);
}
}

2
src/devices/sound/okim6258.h
View File

@ -87,7 +87,7 @@ private:
sound_stream *m_stream; /* which stream are we playing on? */
UINT8 m_output_bits; /* D/A precision is 10-bits but 12-bit data can be
output serially to an external DAC */
output serially to an external DAC */
INT32 m_signal;
INT32 m_step;

4
src/devices/sound/sn76477.h
View File

@ -172,8 +172,8 @@ public:
/* these functions take a capacitor value in Farads or the voltage on it in Volts */
#define SN76477_EXTERNAL_VOLTAGE_DISCONNECT (-1.0) /* indicates that the voltage is internally computed,
can be used in all the functions that take a
voltage on a capacitor */
can be used in all the functions that take a
voltage on a capacitor */
void one_shot_cap_w(double data);
void one_shot_cap_voltage_w(double data);
void slf_cap_w(double data);

12
src/devices/sound/spu.cpp
View File

@ -140,13 +140,13 @@ static const unsigned int /*sound_buffer_size=65536*4,*/
output_buffer_size=65536/8/*,
sample_loop_cache_pool_size=64,
sample_loop_cache_extend_size=64,
sample_cache_pool_size=64,
sample_cache_extend_size=64,
sample_loop_cache_pool_size=64,
sample_loop_cache_extend_size=64,
sample_cache_pool_size=64,
sample_cache_extend_size=64,
stream_marker_pool_size=64,
stream_marker_extend_size=64*/;
stream_marker_pool_size=64,
stream_marker_extend_size=64*/;
//
//

8
src/devices/sound/ymdeltat.h
View File

@ -43,12 +43,12 @@ struct YM_DELTAT { /* AT: rearranged and tigntened structure */
UINT8 portstate; /* port status */
UINT8 control2; /* control reg: SAMPLE, DA/AD, RAM TYPE (x8bit / x1bit), ROM/RAM */
UINT8 portshift; /* address bits shift-left:
** 8 for YM2610,
** 5 for Y8950 and YM2608 */
** 8 for YM2610,
** 5 for Y8950 and YM2608 */
UINT8 DRAMportshift; /* address bits shift-right:
** 0 for ROM and x8bit DRAMs,
** 3 for x1 DRAMs */
** 0 for ROM and x8bit DRAMs,
** 3 for x1 DRAMs */
UINT8 memread; /* needed for reading/writing external memory */

16
src/devices/video/hd44780.h
View File

@ -70,14 +70,14 @@ protected:
{
CHARSET_HD44780_A00,
CHARSET_KS0066_F05 /*,
CHARSET_HD44780_A01,
CHARSET_HD44780_A02,
CHARSET_KS0066_F00,
CHARSET_KS0066_F03,
CHARSET_KS0066_F04,
CHARSET_KS0066_F06,
CHARSET_KS0066_F59
*/
CHARSET_HD44780_A01,
CHARSET_HD44780_A02,
CHARSET_KS0066_F00,
CHARSET_KS0066_F03,
CHARSET_KS0066_F04,
CHARSET_KS0066_F06,
CHARSET_KS0066_F59
*/
};
void set_charset_type(int type);

8
src/devices/video/huc6202.cpp
View File

@ -94,10 +94,10 @@ READ16_MEMBER( huc6202_device::next_pixel )
break;
case 2: /* Back - BG0 + SP1 => BG0 - Front
BG0 + BG1 => BG0
BG1 + SP0 => BG1
SP0 + SP1 => SP0
*/
BG0 + BG1 => BG0
BG1 + SP0 => BG1
SP0 + SP1 => SP0
*/
if ( data_1 > huc6270_device::HUC6270_SPRITE )
{
if ( data_0 > huc6270_device::HUC6270_SPRITE )

2
src/devices/video/snes_ppu.h
View File

@ -190,7 +190,7 @@ public:
UINT8 m_bg3_priority_bit;
UINT8 m_direct_color;
UINT8 m_ppu_last_scroll; /* as per Anomie's doc and Theme Park, all scroll regs shares (but mode 7 ones) the same
'previous' scroll value */
'previous' scroll value */
UINT8 m_mode7_last_scroll; /* as per Anomie's doc mode 7 scroll regs use a different value, shared with mode 7 matrix! */
UINT8 m_ppu1_open_bus, m_ppu2_open_bus;

18
src/emu/diimage.cpp
View File

@ -340,18 +340,18 @@ void device_image_interface::message(const char *format, ...)
// actually exists
//-------------------------------------------------
bool device_image_interface::try_change_working_directory(const char *subdir)
bool device_image_interface::try_change_working_directory(const std::string &subdir)
{
const osd::directory::entry *entry;
bool success = false;
bool done = false;
auto directory = osd::directory::open(m_working_directory.c_str());
auto directory = osd::directory::open(m_working_directory);
if (directory)
{
while (!done && (entry = directory->read()) != nullptr)
{
if (!core_stricmp(subdir, entry->name))
if (!core_stricmp(subdir.c_str(), entry->name))
{
done = true;
success = entry->type == osd::directory::entry::entry_type::DIR;
@ -656,7 +656,7 @@ bool device_image_interface::is_loaded()
//-------------------------------------------------
// image_error_from_file_error - converts an image
// error to a file error
// error to a file error
//-------------------------------------------------
image_error_t device_image_interface::image_error_from_file_error(osd_file::error filerr)
@ -714,7 +714,7 @@ image_error_t device_image_interface::load_image_by_path(UINT32 open_flags, cons
// reopen_for_write
//-------------------------------------------------
int device_image_interface::reopen_for_write(const char *path)
int device_image_interface::reopen_for_write(const std::string &path)
{
m_file.reset();
@ -1018,7 +1018,7 @@ bool device_image_interface::schedule_postload_hard_reset_if_needed()
// load - load an image into MAME
//-------------------------------------------------
image_init_result device_image_interface::load(const char *path)
image_init_result device_image_interface::load(const std::string &path)
{
return load_internal(path, false, 0, nullptr, false);
}
@ -1164,7 +1164,7 @@ image_init_result device_image_interface::finish_load()
// create - create a image
//-------------------------------------------------
image_init_result device_image_interface::create(const char *path, const image_device_format *create_format, util::option_resolution *create_args)
image_init_result device_image_interface::create(const std::string &path, const image_device_format *create_format, util::option_resolution *create_args)
{
int format_index = 0;
int cnt = 0;
@ -1370,6 +1370,10 @@ bool device_image_interface::load_software_part(const char *path, const software
return false;
}
// I'm not sure what m_init_phase is all about; but for now I'm preserving this behavior
if (is_reset_on_load())
set_init_phase();
// Load the software part
software_list_device &swlist = swpart->info().list();
const char *swname = swpart->info().shortname().c_str();

8
src/emu/diimage.h
View File

@ -228,7 +228,7 @@ public:
const formatlist_type &formatlist() const { return m_formatlist; }
// loads an image file
image_init_result load(const char *path);
image_init_result load(const std::string &path);
// loads a softlist item by name
image_init_result load_software(const std::string &softlist_name);
@ -236,9 +236,9 @@ public:
bool open_image_file(emu_options &options);
image_init_result finish_load();
void unload();
image_init_result create(const char *path, const image_device_format *create_format, util::option_resolution *create_args);
image_init_result create(const std::string &path, const image_device_format *create_format, util::option_resolution *create_args);
bool load_software(software_list_device &swlist, const char *swname, const rom_entry *entry);
int reopen_for_write(const char *path);
int reopen_for_write(const std::string &path);
static void software_name_split(const char *swlist_swname, std::string &swlist_name, std::string &swname, std::string &swpart);
static void static_set_user_loadable(device_t &device, bool user_loadable) {
@ -267,7 +267,7 @@ protected:
void check_for_file() const { assert_always(m_file, "Illegal operation on unmounted image"); }
void setup_working_directory();
bool try_change_working_directory(const char *subdir);
bool try_change_working_directory(const std::string &subdir);
void run_hash(void (*partialhash)(util::hash_collection &, const unsigned char *, unsigned long, const char *), util::hash_collection &hashes, const char *types);
void image_checkhash();

2
src/emu/fileio.cpp
View File

@ -78,7 +78,7 @@ bool path_iterator::next(std::string &buffer, const char *name)
file_enumerator::file_enumerator(const char *searchpath)
: m_iterator(searchpath),
m_curdir(nullptr)/*,
m_buflen(0)*/
m_buflen(0)*/
{
}

15
src/emu/image.cpp
View File

@ -22,7 +22,7 @@
// STATIC VARIABLES
//**************************************************************************
static std::regex s_softlist_regex("\\w+\\:\\w+\\:\\w+");
static std::regex s_potenial_softlist_regex("\\w+(\\:\\w+\\:\\w+)?");
//**************************************************************************
@ -47,18 +47,19 @@ image_manager::image_manager(running_machine &machine)
const char *image_name_ptr = machine.options().value(image.instance_name());
if ((image_name_ptr != nullptr) && (image_name_ptr[0] != '\0'))
{
image_init_result result = image_init_result::FAIL;
std::string image_name(image_name_ptr);
// mark init state
image.set_init_phase();
// is this image really a softlist part?
bool is_softlist_part = std::regex_match(image_name, s_softlist_regex);
// try as a softlist
if (std::regex_match(image_name, s_potenial_softlist_regex))
result = image.load_software(image_name);
// try to load this image
image_init_result result = is_softlist_part
? image.load_software(image_name)
: image.load(image_name.c_str());
// failing that, try as an image
if (result != image_init_result::PASS)
result = image.load(image_name);
// did the image load fail?
if (result != image_init_result::PASS)

14
src/emu/romentry.h
View File

@ -2,9 +2,9 @@
// copyright-holders:Nicola Salmoria,Aaron Giles
/*********************************************************************
romentry.h
romentry.h
ROM loading functions.
ROM loading functions.
*********************************************************************/
@ -146,11 +146,11 @@ public:
void set_flags(UINT32 flags) { m_flags = flags; }
private:
std::string m_name;
std::string m_hashdata;
UINT32 m_offset;
UINT32 m_length;
UINT32 m_flags;
std::string m_name;
std::string m_hashdata;
UINT32 m_offset;
UINT32 m_length;
UINT32 m_flags;
};

13
src/emu/romload.cpp
View File

@ -804,22 +804,25 @@ void rom_load_manager::fill_rom_data(const rom_entry *romp)
int skip = ROM_GETSKIPCOUNT(romp);
UINT8 *base = m_region->base() + ROM_GETOFFSET(romp);
/* make sure we fill within the region space */
// make sure we fill within the region space
if (ROM_GETOFFSET(romp) + numbytes > m_region->bytes())
fatalerror("Error in RomModule definition: FILL out of memory region space\n");
/* make sure the length was valid */
// make sure the length was valid
if (numbytes == 0)
fatalerror("Error in RomModule definition: FILL has an invalid length\n");
/* fill the data (filling value is stored in place of the hashdata) */
// for fill bytes, the byte that gets filled is the first byte of the hashdata string
UINT8 fill_byte = (UINT8)atoi(ROM_GETHASHDATA(romp));
// fill the data (filling value is stored in place of the hashdata)
if(skip != 0)
{
for (int i = 0; i < numbytes; i+= skip + 1)
base[i] = (FPTR)ROM_GETHASHDATA(romp) & 0xff;
base[i] = fill_byte;
}
else
memset(base, (FPTR)ROM_GETHASHDATA(romp) & 0xff, numbytes);
memset(base, fill_byte, numbytes);
}

2
src/frontend/mame/luaengine.cpp
View File

@ -67,7 +67,7 @@ static void lstop(lua_State *L, lua_Debug *ar)
static void laction(int i)
{
signal(i, SIG_DFL); /* if another SIGINT happens before lstop,
terminate process (default action) */
terminate process (default action) */
lua_sethook(globalL, lstop, LUA_MASKCALL | LUA_MASKRET | LUA_MASKCOUNT, 1);
}

16
src/frontend/mame/ui/floppycntrl.cpp
View File

@ -42,16 +42,16 @@ void menu_control_floppy_image::do_load_create()
{
floppy_image_device *fd = static_cast<floppy_image_device *>(&m_image);
if(input_filename.compare("")==0) {
image_init_result err = fd->create(output_filename.c_str(), nullptr, nullptr);
image_init_result err = fd->create(output_filename, nullptr, nullptr);
if (err != image_init_result::PASS) {
machine().popmessage("Error: %s", fd->error());
return;
}
fd->setup_write(output_format);
} else {
image_init_result err = fd->load(input_filename.c_str());
image_init_result err = fd->load(input_filename);
if ((err == image_init_result::PASS) && (output_filename.compare("") != 0))
err = fd->reopen_for_write(output_filename.c_str()) ? image_init_result::FAIL : image_init_result::PASS;
err = fd->reopen_for_write(output_filename) ? image_init_result::FAIL : image_init_result::PASS;
if (err != image_init_result::PASS) {
machine().popmessage("Error: %s", fd->error());
return;
@ -61,16 +61,8 @@ void menu_control_floppy_image::do_load_create()
}
}
void menu_control_floppy_image::hook_load(std::string filename, bool softlist)
void menu_control_floppy_image::hook_load(const std::string &filename)
{
if (softlist)
{
machine().popmessage("When loaded from software list, the disk is Read-only.\n");
m_image.load_software(filename);
stack_pop();
return;
}
input_filename = filename;
input_format = static_cast<floppy_image_device &>(m_image).identify(filename);

2
src/frontend/mame/ui/floppycntrl.h
View File

@ -33,7 +33,7 @@ private:
virtual void handle() override;
void do_load_create();
virtual void hook_load(std::string filename, bool softlist) override;
virtual void hook_load(const std::string &filename) override;
};
} // namespace ui

15
src/frontend/mame/ui/imgcntrl.cpp
View File

@ -140,7 +140,10 @@ void menu_control_device_image::load_software_part()
media_auditor::summary summary = auditor.audit_software(m_sld->list_name(), (software_info *)m_swi, AUDIT_VALIDATE_FAST);
// if everything looks good, load software
if (summary == media_auditor::CORRECT || summary == media_auditor::BEST_AVAILABLE || summary == media_auditor::NONE_NEEDED)
hook_load(temp_name, true);
{
m_image.load_software(temp_name);
stack_pop();
}
else
{
machine().popmessage(_("The software selected is missing one or more required ROM or CHD images. Please select a different one."));
@ -153,10 +156,10 @@ void menu_control_device_image::load_software_part()
// hook_load
//-------------------------------------------------
void menu_control_device_image::hook_load(std::string name, bool softlist)
void menu_control_device_image::hook_load(const std::string &name)
{
if (m_image.is_reset_on_load()) m_image.set_init_phase();
m_image.load(name.c_str());
m_image.load(name);
stack_pop();
}
@ -276,7 +279,7 @@ void menu_control_device_image::handle()
break;
case menu_file_selector::result::FILE:
hook_load(m_current_file, false);
hook_load(m_current_file);
break;
case menu_file_selector::result::CREATE:
@ -324,8 +327,8 @@ void menu_control_device_image::handle()
break;
case DO_CREATE: {
auto path = util::zippath_combine(m_current_directory.c_str(), m_current_file.c_str());
image_init_result err = m_image.create(path.c_str(), nullptr, nullptr);
auto path = util::zippath_combine(m_current_directory, m_current_file);
image_init_result err = m_image.create(path, nullptr, nullptr);
if (err != image_init_result::PASS)
machine().popmessage("Error: %s", m_image.error());
stack_pop();

2
src/frontend/mame/ui/imgcntrl.h
View File

@ -53,7 +53,7 @@ protected:
bool m_create_ok;
// methods
virtual void hook_load(std::string filename, bool softlist);
virtual void hook_load(const std::string &filename);
virtual void handle() override;
private:

8
src/lib/netlist/documentation/doc.css
View File

@ -1,14 +1,14 @@
img[alt*="-50r."]
{
width: 30%;
{
width: 30%;
display: block;
float: right;
}
.fragment
{
{
clear: both;
}
.footer
{
{
clear: both;
}

2
src/lib/util/sha1.cpp
View File

@ -373,7 +373,7 @@ sha1_final(struct sha1_ctx *ctx)
if (words > (SHA1_DATA_LENGTH-2))
{ /* No room for length in this block. Process it and
* pad with another one */
* pad with another one */
for (i = words ; i < SHA1_DATA_LENGTH; i++)
data[i] = 0;
sha1_transform(ctx->digest, data);

18
src/lib/util/unicode.cpp
View File

@ -128,21 +128,21 @@ int uchar_from_utf16(unicode_char *uchar, const utf16_char *utf16char, size_t co
// validate parameters
if (utf16char == nullptr || count == 0)
return 0;
// handle the two-byte case
{
rc = 0;
}
if (utf16char[0] >= 0xd800 && utf16char[0] <= 0xdbff)
{
// handle the two-byte case
if (count > 1 && utf16char[1] >= 0xdc00 && utf16char[1] <= 0xdfff)
{
*uchar = 0x10000 + ((utf16char[0] & 0x3ff) * 0x400) + (utf16char[1] & 0x3ff);
rc = 2;
}
}
// handle the one-byte case
else if (utf16char[0] < 0xdc00 || utf16char[0] > 0xdfff)
{
// handle the one-byte case
*uchar = utf16char[0];
rc = 1;
}
@ -272,26 +272,28 @@ int utf16_from_uchar(utf16_char *utf16string, size_t count, unicode_char uchar)
if (!uchar_isvalid(uchar))
return -1;
// single word case
if (uchar < 0x10000)
{
// single word case
if (count < 1)
return -1;
utf16string[0] = (utf16_char) uchar;
rc = 1;
}
// double word case
else if (uchar < 0x100000)
{
// double word case
if (count < 2)
return -1;
uchar -= 0x10000;
utf16string[0] = ((uchar >> 10) & 0x03ff) | 0xd800;
utf16string[1] = ((uchar >> 0) & 0x03ff) | 0xdc00;
rc = 2;
}
else
{
return -1;
}
return rc;
}

2
src/mame/audio/beezer.cpp
View File

@ -84,7 +84,7 @@ beezer_sound_device::beezer_sound_device(const machine_config &mconfig, const ch
m_sh6840_noiselatch1(0),
m_sh6840_noiselatch3(0),
m_stream(nullptr)/*,
m_freq_to_step(0)*/
m_freq_to_step(0)*/
{
memset(m_sh6840_timer, 0, sizeof(m_sh6840_timer));
m_sh6840_volume[0] = 0;

2
src/mame/audio/mw8080bw.cpp
View File

@ -1489,7 +1489,7 @@ static DISCRETE_SOUND_START(dplay)
/************************************************ * Cheer
************************************************/ /* Noise clock was
breadboarded and measured at 7700Hz */ DISCRETE_LFSR_NOISE(DPLAY_NOISE, 1,
breadboarded and measured at 7700Hz */ DISCRETE_LFSR_NOISE(DPLAY_NOISE, 1,
1, 7700, 12.0, 0, 12.0/2, &dplay_lfsr)
DISCRETE_INTEGRATE(NODE_50, DPLAY_CHEER_EN, 0, &dplay_cheer_integrate_info)

2
src/mame/drivers/a7800.cpp
View File

@ -445,7 +445,7 @@ upon display type.
#define NTSC_ORANGE \
rgb_t(0x31,0x00,0x00), rgb_t(0x42,0x06,0x00), rgb_t(0x53,0x17,0x00), rgb_t(0x64,0x28,0x00), \
rgb_t(0x75,0x39,0x00), rgb_t(0x86,0X4A,0x00), rgb_t(0x97,0x5B,0x0A), rgb_t(0xA8,0x6C,0x1B), \
rgb_t(0x75,0x39,0x00), rgb_t(0x86,0x4A,0x00), rgb_t(0x97,0x5B,0x0A), rgb_t(0xA8,0x6C,0x1B), \
rgb_t(0xB9,0x7D,0x2C), rgb_t(0xCA,0x8E,0x3D), rgb_t(0xDB,0x9F,0x4E), rgb_t(0xEC,0xB0,0x5F), \
rgb_t(0xFD,0xC1,0x70), rgb_t(0xFF,0xD2,0x85), rgb_t(0xFF,0xE3,0x9C), rgb_t(0xFF,0xF4,0xB2 )

2
src/mame/drivers/alto2.cpp
View File

@ -158,7 +158,7 @@ static INPUT_PORTS_START( alto2 )
PORT_START("mousey") // Mouse - Y AXIS
PORT_BIT( 0xffff, 0x00, IPT_MOUSE_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(1) PORT_CHANGED_MEMBER( ":maincpu", alto2_cpu_device, mouse_motion_y, nullptr )
PORT_START("utilout") // Speaker connected to UTILOUT
PORT_START("utilout") // Speaker connected to UTILOUT
PORT_BIT( 0xff, 0x00, IPT_PORT ) PORT_WRITE_LINE_DEVICE_MEMBER(":speaker", speaker_sound_device, level_w)
PORT_START("CONFIG") /* Memory switch on AIM board */

4
src/mame/drivers/apexc.cpp
View File

@ -23,8 +23,8 @@ public:
m_screen(*this, "screen") { }
UINT32 m_panel_data_reg; /* value of a data register on the control panel which can
be edited - the existence of this register is a personnal
guess */
be edited - the existence of this register is a personnal
guess */
std::unique_ptr<bitmap_ind16> m_bitmap;

2
src/mame/drivers/argox.cpp
View File

@ -66,7 +66,7 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_START( os214, os214_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", H83002, XTAL_16MHz) /* X1 xtal value is correct,
but there can be some clock divider perhaps ? */
but there can be some clock divider perhaps ? */
MCFG_CPU_PROGRAM_MAP(os214_prg_map)
MCFG_CPU_IO_MAP(os214_io_map)
MACHINE_CONFIG_END

42
src/mame/drivers/aristmk4.cpp
View File

@ -1149,28 +1149,28 @@ static INPUT_PORTS_START(aristmk4)
PORT_START("5300")
PORT_DIPNAME( 0x01, 0x00, "5300-1")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:1")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:1")
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x00, "5300-2")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:2")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:2")
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x00, "5300-3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:3")
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x00, "5300-4")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:4")
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x00, "5300-5")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:5")
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, "5300-6")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:6") // bill validator d/c , U.S must be on
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:6") // bill validator d/c , U.S must be on
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x00, "5300-7")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:7")
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "5300-8")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:8") // mechanical meters, must be on
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5300:8") // mechanical meters, must be on
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("500d")
@ -1205,54 +1205,54 @@ static INPUT_PORTS_START(aristmk4)
PORT_START("5200")
PORT_DIPNAME( 0x01, 0x00, "5200-1")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:1")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:1")
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x00, "5200-2")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:2")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:2")
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x00, "5200-3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:3")
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x00, "5200-4")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:4")
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x00, "5200-5")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:5")
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "5200-6")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:6")
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x00, "5200-7")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:7")
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, "5200-8")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:8")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5200:8")
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("5201")
PORT_DIPNAME( 0x01, 0x00, "5201-1")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:1")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:1")
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x00, "5201-2")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:2")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:2")
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x00, "5201-3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:3")
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, "5201-4") // fixes link offline error
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:4")
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x00, "5201-5") // freeze switch? only affects fhunter(a) and cgold2
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:5")
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "5201-6")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:6")
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x00, "5201-7")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:7")
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, "5201-8")
PORT_DIPSETTING( 0X00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:8")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5201:8")
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("insertcoin")

2
src/mame/drivers/atari400.cpp
View File

@ -1015,7 +1015,7 @@ static const UINT8 atari_palette[256*3] =
0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
/* Orange */
0x31,0x00,0x00, 0x42,0x06,0x00, 0x53,0x17,0x00, 0x64,0x28,0x00,
0x75,0x39,0x00, 0x86,0X4A,0x00, 0x97,0x5B,0x0B, 0xA8,0x6C,0x1C,
0x75,0x39,0x00, 0x86,0x4A,0x00, 0x97,0x5B,0x0B, 0xA8,0x6C,0x1C,
0xB9,0x7D,0x2D, 0xCA,0x8E,0x3E, 0xDB,0x9F,0x4F, 0xEC,0xB0,0x60,
0xFD,0xC1,0x71, 0xFF,0xD2,0x86, 0xFF,0xE3,0x9D, 0xFF,0xF4,0xB3,
/* Red-Orange */

4
src/mame/drivers/bebox.cpp
View File

@ -61,8 +61,8 @@ static ADDRESS_MAP_START( bebox_mem, AS_PROGRAM, 64, bebox_state )
//AM_RANGE(0x800042E8, 0x800042EF) AM_DEVWRITE8("cirrus", cirrus_device, cirrus_42E8_w, U64(0xffffffffffffffff) )
AM_RANGE(0xBFFFFFF0, 0xBFFFFFFF) AM_READ(bebox_interrupt_ack_r )
AM_RANGE(0xC00A0000, 0XC00BFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_r, mem_w, U64(0xffffffffffffffff) )
AM_RANGE(0xC1000000, 0XC11FFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_linear_r, mem_linear_w, U64(0xffffffffffffffff) )
AM_RANGE(0xC00A0000, 0xC00BFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_r, mem_w, U64(0xffffffffffffffff) )
AM_RANGE(0xC1000000, 0xC11FFFFF) AM_DEVREADWRITE8("vga", cirrus_gd5428_device, mem_linear_r, mem_linear_w, U64(0xffffffffffffffff) )
AM_RANGE(0xFFF00000, 0xFFF03FFF) AM_ROMBANK("bank2")
AM_RANGE(0xFFF04000, 0xFFFFFFFF) AM_READWRITE8(bebox_flash_r, bebox_flash_w, U64(0xffffffffffffffff) )
ADDRESS_MAP_END

4
src/mame/drivers/bigevglf.cpp
View File

@ -490,8 +490,8 @@ static MACHINE_CONFIG_START( bigevglf, bigevglf_state )
MCFG_CPU_ADD("audiocpu", Z80,8000000/2) /* 4 MHz ? */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(bigevglf_state, irq0_line_hold, 2*60) /* IRQ generated by ???;
2 irqs/frame give good music tempo but also SOUND ERROR in test mode,
4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */
2 irqs/frame give good music tempo but also SOUND ERROR in test mode,
4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */
MCFG_CPU_ADD("mcu", M68705,2000000) /* ??? */
MCFG_CPU_PROGRAM_MAP(m68705_map)

4
src/mame/drivers/carpolo.cpp
View File

@ -235,8 +235,8 @@ static MACHINE_CONFIG_START( carpolo, carpolo_state )
MCFG_CPU_ADD("maincpu", M6502, XTAL_11_289MHz/12) /* 940.75 kHz */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", carpolo_state, carpolo_timer_interrupt) /* this not strictly VBLANK,
but it's supposed to happen 60
times a sec, so it's a good place */
but it's supposed to happen 60
times a sec, so it's a good place */
MCFG_DEVICE_ADD("pia0", PIA6821, 0)
MCFG_PIA_READPB_HANDLER(READ8(carpolo_state, pia_0_port_b_r))

24
src/mame/drivers/cbuster.cpp
View File

@ -59,21 +59,21 @@ WRITE16_MEMBER(cbuster_state::twocrude_control_w)
case 4: /* Protection, maybe this is a PAL on the board?
80046 is level number
stop at stage and enter.
see also 8216..
80046 is level number
stop at stage and enter.
see also 8216..
9a 00 = pf4 over pf3 (normal) (level 0)
9a f1 = (level 1 - water), pf3 over ALL sprites + pf4
9a 80 = pf3 over pf4 (Level 2 - copter)
9a 40 = pf3 over ALL sprites + pf4 (snow) level 3
9a c0 = doesn't matter?
9a ff = pf 3 over pf4
9a 00 = pf4 over pf3 (normal) (level 0)
9a f1 = (level 1 - water), pf3 over ALL sprites + pf4
9a 80 = pf3 over pf4 (Level 2 - copter)
9a 40 = pf3 over ALL sprites + pf4 (snow) level 3
9a c0 = doesn't matter?
9a ff = pf 3 over pf4
I can't find a priority register, I assume it's tied to the
protection?!
I can't find a priority register, I assume it's tied to the
protection?!
*/
*/
if ((data & 0xffff) == 0x9a00) m_prot = 0;
if ((data & 0xffff) == 0xaa) m_prot = 0x74;
if ((data & 0xffff) == 0x0200) m_prot = 0x63 << 8;

2
src/mame/drivers/chihiro.cpp
View File

@ -719,7 +719,7 @@ static const struct {
UINT8 write_byte;
} modify[16];
} hacks[HACK_ITEMS] = { { "chihiro", false, { { 0x6a79f/*3f79f*/, 0x01 }, { 0x6a7a0/*3f7a0*/, 0x00 }, { 0x6b575/*40575*/, 0x00 }, { 0x6b576/*40576*/, 0x00 }, { 0x6b5af/*405af*/, 0x75 }, { 0x6b78a/*4078a*/, 0x75 }, { 0x6b7ca/*407ca*/, 0x00 }, { 0x6b7b8/*407b8*/, 0x00 }, { 0x8f5b2, 0x75 }, { 0x79a9e/*2ea9e*/, 0x74 }, { 0x79b80/*2eb80*/, 0xeb }, { 0x79b97/*2eb97*/, 0x74 }, { 0, 0 } } },
{ "outr2", true, { { 0x12e4cf, 0x01 }, { 0x12e4d0, 0x00 }, { 0x4793e, 0x01 }, { 0x4793f, 0x00 }, { 0x47aa3, 0x01 }, { 0x47aa4, 0x00 }, { 0x14f2b6, 0x84 }, { 0x14f2d1, 0x75 }, { 0x8732f, 0x7d }, { 0x87384, 0x7d }, { 0x87388, 0xeb }, { 0, 0 } } },
{ "outr2", true, { { 0x12e4cf, 0x01 }, { 0x12e4d0, 0x00 }, { 0x4793e, 0x01 }, { 0x4793f, 0x00 }, { 0x47aa3, 0x01 }, { 0x47aa4, 0x00 }, { 0x14f2b6, 0x84 }, { 0x14f2d1, 0x75 }, { 0x8732f, 0x7d }, { 0x87384, 0x7d }, { 0x87388, 0xeb }, { 0, 0 } } },
{ "crtaxihr", false, { { 0x14ada5/*11fda5*/, 0x90 },{ 0x14ada6/*11fda6*/, 0x90 }, { 0, 0 } } },
{ "ghostsqu", false, { { 0x78833/*4d833*/, 0x90 },{ 0x78834/*4d834*/, 0x90 }, { 0, 0 } } },
};

18
src/mame/drivers/deco32.cpp
View File

@ -393,15 +393,15 @@ READ32_MEMBER(deco32_state::irq_controller_r)
case 3: /* Irq controller
Bit 0: 1 = Vblank active
Bit 1: ? (Hblank active? Captain America raster IRQ waits for this to go low)
Bit 2:
Bit 3:
Bit 4: VBL Irq
Bit 5: Raster IRQ
Bit 6: Lightgun IRQ (on Lock N Load only)
Bit 7:
*/
Bit 0: 1 = Vblank active
Bit 1: ? (Hblank active? Captain America raster IRQ waits for this to go low)
Bit 2:
Bit 3:
Bit 4: VBL Irq
Bit 5: Raster IRQ
Bit 6: Lightgun IRQ (on Lock N Load only)
Bit 7:
*/
/* ZV03082007 - video_screen_get_vblank() doesn't work for Captain America, as it expects
that this bit is NOT set in rows 0-7. */

2
src/mame/drivers/esq5505.cpp
View File

@ -273,7 +273,7 @@ void esq5505_state::machine_start()
// tell the pump about the OTIS & ESP chips
m_pump->set_otis(m_otis);
m_pump->set_esp(m_esp);
m_rom = (UINT16 *)(void *)memregion("osrom")->base();
m_ram = (UINT16 *)(void *)memshare("osram")->ptr();
}

14
src/mame/drivers/harddriv.cpp
View File

@ -1286,19 +1286,19 @@ static INPUT_PORTS_START( strtdriv )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("mainpcb:8BADC.3") /* b00000 - 8 bit ADC 3 - volume */
PORT_BIT( 0xff, 0X80, IPT_UNUSED )
PORT_BIT( 0xff, 0x80, IPT_UNUSED )
PORT_START("mainpcb:8BADC.4") /* b00000 - 8 bit ADC 4 - elevator */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_NAME("Elevator") PORT_REVERSE /* up/down */
PORT_START("mainpcb:8BADC.5") /* b00000 - 8 bit ADC 5 - canopy */
PORT_BIT( 0xff, 0X80, IPT_UNUSED )
PORT_BIT( 0xff, 0x80, IPT_UNUSED )
PORT_START("mainpcb:8BADC.6") /* b00000 - 8 bit ADC 6 - brake */
PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_SENSITIVITY(25) PORT_KEYDELTA(40) PORT_NAME("Brake") PORT_REVERSE
PORT_START("mainpcb:8BADC.7") /* b00000 - 8 bit ADC 7 - seat adjust */
PORT_BIT( 0xff, 0X80, IPT_UNUSED )
PORT_BIT( 0xff, 0x80, IPT_UNUSED )
PORT_START("mainpcb:12BADC.0") /* 400000 - steering wheel */
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(25) PORT_KEYDELTA(5) PORT_NAME("Steering Wheel")
@ -1376,19 +1376,19 @@ static INPUT_PORTS_START( hdrivair )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("mainpcb:8BADC.3") /* b00000 - 8 bit ADC 3 - volume */
PORT_BIT( 0xff, 0X80, IPT_UNUSED )
PORT_BIT( 0xff, 0x80, IPT_UNUSED )
PORT_START("mainpcb:8BADC.4") /* b00000 - 8 bit ADC 4 - elevator */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_REVERSE PORT_NAME("Elevator") /* up/down */
PORT_START("mainpcb:8BADC.5") /* b00000 - 8 bit ADC 5 - canopy */
PORT_BIT( 0xff, 0X80, IPT_UNUSED )
PORT_BIT( 0xff, 0x80, IPT_UNUSED )
PORT_START("mainpcb:8BADC.6") /* b00000 - 8 bit ADC 6 - brake */
PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_SENSITIVITY(25) PORT_KEYDELTA(40) PORT_REVERSE PORT_NAME("Brake")
PORT_START("mainpcb:8BADC.7") /* b00000 - 8 bit ADC 7 - seat adjust */
PORT_BIT( 0xff, 0X80, IPT_UNUSED )
PORT_BIT( 0xff, 0x80, IPT_UNUSED )
PORT_START("mainpcb:12BADC.0") /* 400000 - steering wheel */
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(25) PORT_KEYDELTA(5) PORT_REVERSE PORT_NAME("Steering Wheel")
@ -5176,7 +5176,7 @@ void harddriv_state::init_hdrivairp(void)
m_adsp->space(AS_DATA).install_read_handler(0x1f9a, 0x1f9a, read16_delegate(FUNC(harddriv_state::hdds3_speedup_r), this));
m_ds3_speedup_addr = &m_adsp_data_memory[0x1f9a];
m_ds3_speedup_pc = 0x2d9;
m_ds3_transfer_pc = 0X407da;
m_ds3_transfer_pc = 0x407da;
}

6
src/mame/drivers/mbc55x.cpp
View File

@ -57,11 +57,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(mbc55x_io, AS_IO, 8, mbc55x_state)
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE( 0X0000, 0X0003) AM_READWRITE(mbcpic8259_r, mbcpic8259_w)
AM_RANGE( 0x0000, 0x0003) AM_READWRITE(mbcpic8259_r, mbcpic8259_w)
AM_RANGE( 0x0008, 0x000F) AM_READWRITE(mbc55x_disk_r, mbc55x_disk_w)
AM_RANGE( 0X0010, 0X0010) AM_READWRITE( vram_page_r, vram_page_w)
AM_RANGE( 0x0010, 0x0010) AM_READWRITE( vram_page_r, vram_page_w)
AM_RANGE( 0x0018, 0x001F) AM_READWRITE( ppi8255_r, ppi8255_w)
AM_RANGE( 0X0020, 0X0027) AM_READWRITE(mbcpit8253_r, mbcpit8253_w)
AM_RANGE( 0x0020, 0x0027) AM_READWRITE(mbcpit8253_r, mbcpit8253_w)
AM_RANGE( 0x0028, 0x002B) AM_READWRITE( mbc55x_usart_r, mbc55x_usart_w)
AM_RANGE( 0x0030, 0x0031) AM_DEVREADWRITE(VID_MC6845_NAME, mc6845_device, status_r, address_w )
AM_RANGE( 0x0032, 0x0033) AM_DEVREADWRITE(VID_MC6845_NAME, mc6845_device, register_r, register_w )

2
src/mame/drivers/megaphx.cpp
View File

@ -314,7 +314,7 @@ WRITE8_MEMBER(megaphx_state::port_c_w)
if (m_pic_data == 0xfe) // get software version??
{
m_pic_result = (ioport("PIC1")->read()) | (0XFF << 8);
m_pic_result = (ioport("PIC1")->read()) | (0xFF << 8);
}
else if (m_pic_data == 0x82) // dsw1
{

18
src/mame/drivers/mpu4.cpp
View File

@ -531,7 +531,7 @@ WRITE8_MEMBER(mpu4_state::bankset_w)
WRITE8_MEMBER(mpu4_state::ic2_o1_callback)
{
m_6840ptm->set_c2(data); /* copy output value to IC2 c2
this output is the clock for timer2 */
this output is the clock for timer2 */
/* 1200Hz System interrupt timer */
}
@ -1022,14 +1022,14 @@ READ8_MEMBER(mpu4_state::pia_ic5_portb_r)
{
if (m_hopper == HOPPER_NONDUART_B)
{/*
if (hopper1_active)
{
m_aux2_input |= 0x08;
}
else
{
m_aux2_input &= ~0x08;
}*/
if (hopper1_active)
{
m_aux2_input |= 0x08;
}
else
{
m_aux2_input &= ~0x08;
}*/
}
LOG(("%s: IC5 PIA Read of Port B (coin input AUX2)\n",machine().describe_context()));

6
src/mame/drivers/pdp1.cpp
View File

@ -452,7 +452,7 @@ enum
static pdp1_reset_param_t pdp1_reset_param =
{
{ /* external iot handlers. NULL means that the iot is unimplemented, unless there are
parentheses around the iot name, in which case the iot is internal to the cpu core. */
parentheses around the iot name, in which case the iot is internal to the cpu core. */
/* I put a ? when the source is the handbook, since a) I have used the maintenance manual
as the primary source (as it goes more into details) b) the handbook and the maintenance
manual occasionnally contradict each other. */
@ -1821,8 +1821,8 @@ INTERRUPT_GEN_MEMBER(pdp1_state::pdp1_interrupt)
{
m_maincpu->set_state_int(PDP1_RUN, (UINT64)0);
m_maincpu->set_state_int(PDP1_RIM, (UINT64)0); /* bug : we stop after reading an even-numbered word
(i.e. data), whereas a real pdp-1 stops after reading
an odd-numbered word (i.e. dio instruciton) */
(i.e. data), whereas a real pdp-1 stops after reading
an odd-numbered word (i.e. dio instruciton) */
}
if (control_transitions & pdp1_continue)
{

636
src/mame/drivers/pokemini.cpp
View File

@ -527,22 +527,22 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
switch( offset )
{
case 0x00: /* start-up contrast
Bit 0-1 R/W Must be 1(?)
Bit 2-7 R/W Start up contrast (doesn't affect contrast until after reboot)
*/
Bit 0-1 R/W Must be 1(?)
Bit 2-7 R/W Start up contrast (doesn't affect contrast until after reboot)
*/
case 0x01: /* CPU related?
Bit 0-7 R/W Unknown
*/
Bit 0-7 R/W Unknown
*/
case 0x02: /* CPU related?
Bit 0-7 R/W Unknown
*/
Bit 0-7 R/W Unknown
*/
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x08: /* Seconds-timer control
Bit 0 R/W Timer enable
Bit 1 W Timer reset
Bit 2-7 Unused
*/
Bit 0 R/W Timer enable
Bit 1 W Timer reset
Bit 2-7 Unused
*/
if ( data & 0x02 )
{
m_pm_reg[0x09] = 0x00;
@ -552,38 +552,38 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x09: /* Seconds-timer (low), read only
Bit 0-7 R Seconds timer bit 0-7
*/
Bit 0-7 R Seconds timer bit 0-7
*/
return;
case 0x0A: /* Seconds-timer (mid), read only
Bit 0-7 R Seconds timer bit 8-15
*/
Bit 0-7 R Seconds timer bit 8-15
*/
return;
case 0x0B: /* Seconds-timer (high), read only
Bit 0-7 R Seconds timer bit 16-23
*/
Bit 0-7 R Seconds timer bit 16-23
*/
return;
case 0x10: /* Low power detector
Bit 0-4 R/W Unknown
Bit 5 R Battery status: 0 - battery OK, 1 - battery low
Bit 6-7 Unused
*/
Bit 0-4 R/W Unknown
Bit 5 R Battery status: 0 - battery OK, 1 - battery low
Bit 6-7 Unused
*/
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x18: /* Timer 1 pre-scale + enable
Bit 0-2 R/W low timer 1 prescaler select
000 - 2 or 128 cycles
001 - 8 or 256 cycles
010 - 32 or 512 cycles
011 - 64 or 1024 cycles
100 - 128 or 2048 cycles
101 - 256 or 4096 cycles
110 - 1024 or 8192 cycles
111 - 4096 or 16384 cycles
Bit 3 R/W Enable low counting
Bit 4-6 R/W high timer 1 prescaler select
Bit 7 R/W Enable high counting
*/
Bit 0-2 R/W low timer 1 prescaler select
000 - 2 or 128 cycles
001 - 8 or 256 cycles
010 - 32 or 512 cycles
011 - 64 or 1024 cycles
100 - 128 or 2048 cycles
101 - 256 or 4096 cycles
110 - 1024 or 8192 cycles
111 - 4096 or 16384 cycles
Bit 3 R/W Enable low counting
Bit 4-6 R/W high timer 1 prescaler select
Bit 7 R/W Enable high counting
*/
/* Check for prescaler change for the low counter */
if ( ( data & 0x07 ) != ( m_pm_reg[0x18] & 0x07 ) )
{
@ -627,13 +627,13 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x19: /* Timers 1 speed
Bit 0 R/W Select slow timer for timer 1 lo
Bit 1 R/W Select slow timer for timer 1 hi
Bit 2-3 Unused
Bit 4 R/W Enable slow timers
Bit 5 R/W Enable fast timers
Bit 6-7 Unused
*/
Bit 0 R/W Select slow timer for timer 1 lo
Bit 1 R/W Select slow timer for timer 1 hi
Bit 2-3 Unused
Bit 4 R/W Enable slow timers
Bit 5 R/W Enable fast timers
Bit 6-7 Unused
*/
/* Check for prescaler change for the high counter */
if ( ( data & 0x01 ) != ( m_pm_reg[0x19] & 0x01 ) )
{
@ -700,19 +700,19 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1A: /* Timer 2 pre-scale + enable
Bit 0-2 R/W low timer 2 prescaler select
000 - 2 or 128 cycles
001 - 8 or 256 cycles
010 - 32 or 512 cycles
011 - 64 or 1024 cycles
100 - 128 or 2048 cycles
101 - 256 or 4096 cycles
110 - 1024 or 8192 cycles
111 - 4096 or 16384 cycles
Bit 3 R/W Enable low counting
Bit 4-6 R/W high timer 2 prescaler select
Bit 7 R/W Enable high counting
*/
Bit 0-2 R/W low timer 2 prescaler select
000 - 2 or 128 cycles
001 - 8 or 256 cycles
010 - 32 or 512 cycles
011 - 64 or 1024 cycles
100 - 128 or 2048 cycles
101 - 256 or 4096 cycles
110 - 1024 or 8192 cycles
111 - 4096 or 16384 cycles
Bit 3 R/W Enable low counting
Bit 4-6 R/W high timer 2 prescaler select
Bit 7 R/W Enable high counting
*/
/* Check for prescaler change for the low counter */
if ( ( data & 0x07 ) != ( m_pm_reg[0x1A] & 0x07 ) )
{
@ -756,9 +756,9 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1B: /* Timer 2 speeds
Bit 0 R/W Select slow timer for timer 2 lo
Bit 1 R/W Select slow timer for timer 2 hi
*/
Bit 0 R/W Select slow timer for timer 2 lo
Bit 1 R/W Select slow timer for timer 2 hi
*/
/* Check for prescaler change for the high counter */
if ( ( data & 0x01 ) != ( m_pm_reg[0x1B] & 0x01 ) )
{
@ -800,19 +800,19 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1C: /* Timer 3 pre-scale + enable
Bit 0-2 R/W low timer 3 prescaler select
000 - 2 or 128 cycles
001 - 8 or 256 cycles
010 - 32 or 512 cycles
011 - 64 or 1024 cycles
100 - 128 or 2048 cycles
101 - 256 or 4096 cycles
110 - 1024 or 8192 cycles
111 - 4096 or 16384 cycles
Bit 3 R/W Enable low counting
Bit 4-6 R/W high timer 3 prescaler select
Bit 7 R/W Enable high counting
*/
Bit 0-2 R/W low timer 3 prescaler select
000 - 2 or 128 cycles
001 - 8 or 256 cycles
010 - 32 or 512 cycles
011 - 64 or 1024 cycles
100 - 128 or 2048 cycles
101 - 256 or 4096 cycles
110 - 1024 or 8192 cycles
111 - 4096 or 16384 cycles
Bit 3 R/W Enable low counting
Bit 4-6 R/W high timer 3 prescaler select
Bit 7 R/W Enable high counting
*/
/* Check for prescaler change for the low counter */
if ( ( data & 0x07 ) != ( m_pm_reg[0x1C] & 0x07 ) )
{
@ -856,9 +856,9 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x1D: /* Timer 3 speeds
Bit 0 R/W Select slow timer for timer 3 lo
Bit 1 R/W Select slow timer for timer 3 hi
*/
Bit 0 R/W Select slow timer for timer 3 lo
Bit 1 R/W Select slow timer for timer 3 hi
*/
/* Check for prescaler change for the high counter */
if ( ( data & 0x01 ) != ( m_pm_reg[0x1D] & 0x01 ) )
{
@ -900,125 +900,125 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x20: /* Event #1-#8 priority
Bit 0-1 R/W Timer 3 overflow Interrupt #7-#8
Bit 2-3 R/W Timer 1 overflow Interrupt #5-#6
Bit 4-5 R/W Timer 2 overflow Interrupt #3-#4
Bit 6-7 R/W VDraw/VBlank trigger Interrupt #1-#2
*/
Bit 0-1 R/W Timer 3 overflow Interrupt #7-#8
Bit 2-3 R/W Timer 1 overflow Interrupt #5-#6
Bit 4-5 R/W Timer 2 overflow Interrupt #3-#4
Bit 6-7 R/W VDraw/VBlank trigger Interrupt #1-#2
*/
m_pm_reg[0x20] = data;
check_irqs();
break;
case 0x21: /* Event #15-#22 priority
Bit 0-1 R/W Unknown
Bit 2-3 R/W All keypad interrupts - Interrupt #15-#22
Bit 4-7 R/W Unknown
*/
Bit 0-1 R/W Unknown
Bit 2-3 R/W All keypad interrupts - Interrupt #15-#22
Bit 4-7 R/W Unknown
*/
m_pm_reg[0x21] = data;
check_irqs();
break;
case 0x22: /* Event #9-#14 priority
Bit 0-1 R/W All #9 - #14 events - Interrupt #9-#14
Bit 2-7 Unused
*/
Bit 0-1 R/W All #9 - #14 events - Interrupt #9-#14
Bit 2-7 Unused
*/
m_pm_reg[0x22] = data;
check_irqs();
break;
case 0x23: /* Event #1-#8 enable
Bit 0 R/W Timer 3 overflow (mirror) - Enable Interrupt #8
Bit 1 R/W Timer 3 overflow - Enable Interrupt #7
Bit 2 R/W Not called... - Enable Interrupt #6
Bit 3 R/W Timer 1 overflow - Enable Interrupt #5
Bit 4 R/W Not called... - Enable Interrupt #4
Bit 5 R/W Timer 2 overflow - Enable Interrupt #3
Bit 6 R/W V-Draw trigger - Enable Interrupt #2
Bit 7 R/W V-Blank trigger - Enable Interrupt #1
*/
Bit 0 R/W Timer 3 overflow (mirror) - Enable Interrupt #8
Bit 1 R/W Timer 3 overflow - Enable Interrupt #7
Bit 2 R/W Not called... - Enable Interrupt #6
Bit 3 R/W Timer 1 overflow - Enable Interrupt #5
Bit 4 R/W Not called... - Enable Interrupt #4
Bit 5 R/W Timer 2 overflow - Enable Interrupt #3
Bit 6 R/W V-Draw trigger - Enable Interrupt #2
Bit 7 R/W V-Blank trigger - Enable Interrupt #1
*/
m_pm_reg[0x23] = data;
check_irqs();
break;
case 0x24: /* Event #9-#12 enable
Bit 0-5 R/W Unknown
Bit 6-7 Unused
*/
Bit 0-5 R/W Unknown
Bit 6-7 Unused
*/
m_pm_reg[0x24] = data;
check_irqs();
break;
case 0x25: /* Event #15-#22 enable
Bit 0 R/W Press key "A" event - Enable interrupt #22
Bit 1 R/W Press key "B" event - Enable interrupt #21
Bit 2 R/W Press key "C" event - Enable interrupt #20
Bit 3 R/W Press D-pad up key event - Enable interrupt #19
Bit 4 R/W Press D-pad down key event - Enable interrupt #18
Bit 5 R/W Press D-pad left key event - Enable interrupt #17
Bit 6 R/W Press D-pad right key event - Enable interrupt #16
Bit 7 R/W Press power button event - Enable interrupt #15
*/
Bit 0 R/W Press key "A" event - Enable interrupt #22
Bit 1 R/W Press key "B" event - Enable interrupt #21
Bit 2 R/W Press key "C" event - Enable interrupt #20
Bit 3 R/W Press D-pad up key event - Enable interrupt #19
Bit 4 R/W Press D-pad down key event - Enable interrupt #18
Bit 5 R/W Press D-pad left key event - Enable interrupt #17
Bit 6 R/W Press D-pad right key event - Enable interrupt #16
Bit 7 R/W Press power button event - Enable interrupt #15
*/
m_pm_reg[0x25] = data;
check_irqs();
break;
case 0x26: /* Event #13-#14 enable
Bit 0-2 R/W Unknown
Bit 3 Unused
Bit 4-5 R/W Unknown
Bit 6 R/W Shock detector trigger - Enable interrupt #14
Bit 7 R/W IR receiver - low to high trigger - Enable interrupt #13
*/
Bit 0-2 R/W Unknown
Bit 3 Unused
Bit 4-5 R/W Unknown
Bit 6 R/W Shock detector trigger - Enable interrupt #14
Bit 7 R/W IR receiver - low to high trigger - Enable interrupt #13
*/
m_pm_reg[0x26] = data;
check_irqs();
break;
case 0x27: /* Interrupt active flag #1-#8
Bit 0 Timer 3 overflow (mirror) / Clear interrupt #8
Bit 1 Timer 3 overflow / Clear interrupt #7
Bit 2 Not called ... / Clear interrupt #6
Bit 3 Timer 1 overflow / Clear interrupt #5
Bit 4 Not called ... / Clear interrupt #4
Bit 5 Timer 2 overflow / Clear interrupt #3
Bit 6 VDraw trigger / Clear interrupt #2
Bit 7 VBlank trigger / Clear interrupt #1
*/
Bit 0 Timer 3 overflow (mirror) / Clear interrupt #8
Bit 1 Timer 3 overflow / Clear interrupt #7
Bit 2 Not called ... / Clear interrupt #6
Bit 3 Timer 1 overflow / Clear interrupt #5
Bit 4 Not called ... / Clear interrupt #4
Bit 5 Timer 2 overflow / Clear interrupt #3
Bit 6 VDraw trigger / Clear interrupt #2
Bit 7 VBlank trigger / Clear interrupt #1
*/
m_pm_reg[0x27] &= ~data;
check_irqs();
return;
case 0x28: /* Interrupt active flag #9-#12
Bit 0-1 Unknown
Bit 2 Unknown / Clear interrupt #12
Bit 3 Unknown / Clear interrupt #11
Bit 4 Unknown / Clear interrupt #10
Bit 5 Unknown / Clear interrupt #9
Bit 6-7 Unknown
*/
Bit 0-1 Unknown
Bit 2 Unknown / Clear interrupt #12
Bit 3 Unknown / Clear interrupt #11
Bit 4 Unknown / Clear interrupt #10
Bit 5 Unknown / Clear interrupt #9
Bit 6-7 Unknown
*/
m_pm_reg[0x28] &= ~data;
check_irqs();
return;
case 0x29: /* Interrupt active flag #15-#22
Bit 0 Press key "A" event / Clear interrupt #22
Bit 1 Press key "B" event / Clear interrupt #21
Bit 2 Press key "C" event / Clear interrupt #20
Bit 3 Press D-pad up key event / Clear interrupt #19
Bit 4 Press D-pad down key event / Clear interrupt #18
Bit 5 Press D-pad left key event / Clear interrupt #17
Bit 6 Press D-pad right key event / Clear interrupt #16
Bit 7 Press power button event / Clear interrupt #15
*/
Bit 0 Press key "A" event / Clear interrupt #22
Bit 1 Press key "B" event / Clear interrupt #21
Bit 2 Press key "C" event / Clear interrupt #20
Bit 3 Press D-pad up key event / Clear interrupt #19
Bit 4 Press D-pad down key event / Clear interrupt #18
Bit 5 Press D-pad left key event / Clear interrupt #17
Bit 6 Press D-pad right key event / Clear interrupt #16
Bit 7 Press power button event / Clear interrupt #15
*/
m_pm_reg[0x29] &= ~data;
check_irqs();
return;
case 0x2A: /* Interrupt active flag #13-#14
Bit 0-5 Unknown
Bit 6 Shock detector trigger / Clear interrupt #14
Bit 7 Unknown / Clear interrupt #13
*/
Bit 0-5 Unknown
Bit 6 Shock detector trigger / Clear interrupt #14
Bit 7 Unknown / Clear interrupt #13
*/
m_pm_reg[0x2A] &= ~data;
check_irqs();
return;
case 0x30: /* Timer 1 control 1
Bit 0 R/W Unknown
Bit 1 W Reset low counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-6 Unused
Bit 7 R/W Enable 16bit mode
*/
Bit 0 R/W Unknown
Bit 1 W Reset low counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-6 Unused
Bit 7 R/W Enable 16bit mode
*/
if ( data & 0x02 )
{
m_pm_reg[0x36] = m_pm_reg[0x32];
@ -1048,12 +1048,12 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x31: /* Timer 1 control 2
Bit 0 R/W Unknown
Bit 1 W Reset hi counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-7 Unused
*/
Bit 0 R/W Unknown
Bit 1 W Reset hi counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-7 Unused
*/
if ( data & 0x02 )
{
m_pm_reg[0x37] = m_pm_reg[0x33];
@ -1072,33 +1072,33 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x32: /* Timer 1 preset value (low)
Bit 0-7 R/W Timer 1 preset value bit 0-7
*/
Bit 0-7 R/W Timer 1 preset value bit 0-7
*/
break;
case 0x33: /* Timer 1 preset value (high)
Bit 0-7 R/W Timer 1 preset value bit 8-15
*/
Bit 0-7 R/W Timer 1 preset value bit 8-15
*/
break;
case 0x34: /* Timer 1 sound-pivot (low, unused)
*/
*/
case 0x35: /* Timer 1 sound-pivot (high, unused)
*/
*/
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x36: /* Timer 1 counter (low), read only
*/
*/
return;
case 0x37: /* Timer 1 counter (high), read only
*/
*/
return;
case 0x38: /* Timer 2 control 1
Bit 0 R/W Unknown
Bit 1 W Reset low counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-6 Unused
Bit 7 R/W Enable 16bit mode
*/
Bit 0 R/W Unknown
Bit 1 W Reset low counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-6 Unused
Bit 7 R/W Enable 16bit mode
*/
if ( data & 0x02 )
{
m_pm_reg[0x3E] = m_pm_reg[0x3A];
@ -1127,12 +1127,12 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x39: /* Timer 2 control 2
Bit 0 R/W Unknown
Bit 1 W Reset hi counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-7 Unused
*/
Bit 0 R/W Unknown
Bit 1 W Reset hi counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-7 Unused
*/
if ( data & 0x02 )
{
m_pm_reg[0x3F] = m_pm_reg[0x3A];
@ -1151,32 +1151,32 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x3A: /* Timer 2 preset value (low)
Bit 0-7 R/W Timer 2 preset value bit 0-7
*/
Bit 0-7 R/W Timer 2 preset value bit 0-7
*/
break;
case 0x3B: /* Timer 2 preset value (high)
Bit 0-7 R/W Timer 2 preset value bit 8-15
*/
Bit 0-7 R/W Timer 2 preset value bit 8-15
*/
break;
case 0x3C: /* Timer 2 sound-pivot (low, unused)
*/
*/
case 0x3D: /* Timer 2 sound-pivot (high, unused)
*/
*/
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x3E: /* Timer 2 counter (low), read only
Bit 0-7 R/W Timer 2 counter value bit 0-7
*/
Bit 0-7 R/W Timer 2 counter value bit 0-7
*/
return;
case 0x3F: /* Timer 2 counter (high), read only
Bit 0-7 R/W Timer 2 counter value bit 8-15
*/
Bit 0-7 R/W Timer 2 counter value bit 8-15
*/
return;
case 0x40: /* 256Hz timer control
Bit 0 R/W Enable Timer
Bit 1 W Reset Timer
Bit 2-7 Unused
*/
Bit 0 R/W Enable Timer
Bit 1 W Reset Timer
Bit 2-7 Unused
*/
if ( data & 0x02 )
{
m_pm_reg[0x41] = 0;
@ -1184,17 +1184,17 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x41: /* 256Hz timer counter
Bit 0-7 R 256Hz timer counter
*/
Bit 0-7 R 256Hz timer counter
*/
return;
case 0x48: /* Timer 3 control 1
Bit 0 R/W Unknown
Bit 1 W Reset low counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-6 Unused
Bit 7 R/W Enable 16bit mode
*/
Bit 0 R/W Unknown
Bit 1 W Reset low counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-6 Unused
Bit 7 R/W Enable 16bit mode
*/
if ( data & 0x02 )
{
m_pm_reg[0x4E] = m_pm_reg[0x4A];
@ -1225,12 +1225,12 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
update_sound();
break;
case 0x49: /* Timer 3 control 2
Bit 0 R/W Unknown
Bit 1 W Reset hi counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-7 Unused
*/
Bit 0 R/W Unknown
Bit 1 W Reset hi counter
Bit 2 R/W Enable high counter
Bit 3 R/W Unknown
Bit 4-7 Unused
*/
if ( data & 0x02 )
{
m_pm_reg[0x4F] = m_pm_reg[0x4B];
@ -1251,74 +1251,74 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
update_sound();
break;
case 0x4A: /* Timer 3 preset value (low)
Bit 0-7 R/W Timer 3 preset value bit 0-7
*/
Bit 0-7 R/W Timer 3 preset value bit 0-7
*/
m_pm_reg[0x4A] = data;
update_sound();
break;
case 0x4B: /* Timer 3 preset value (high)
Bit 0-7 R/W Timer 3 preset value bit 8-15
*/
Bit 0-7 R/W Timer 3 preset value bit 8-15
*/
m_pm_reg[0x4B] = data;
update_sound();
break;
case 0x4C: /* Timer 3 sound-pivot (low)
Bit 0-7 R/W Timer 3 sound-pivot value bit 0-7
*/
Bit 0-7 R/W Timer 3 sound-pivot value bit 0-7
*/
m_pm_reg[0x4C] = data;
update_sound();
break;
case 0x4D: /* Timer 3 sound-pivot (high)
Bit 0-7 R/W Timer 3 sound-pivot value bit 8-15
Bit 0-7 R/W Timer 3 sound-pivot value bit 8-15
Sound-pivot location:
Pulse-Width of 0% = 0x0000
Pulse-Width of 50% = Half of preset-value
Pulse-Width of 100% = Same as preset-value
*/
Sound-pivot location:
Pulse-Width of 0% = 0x0000
Pulse-Width of 50% = Half of preset-value
Pulse-Width of 100% = Same as preset-value
*/
m_pm_reg[0x4D] = data;
update_sound();
break;
case 0x4E: /* Timer 3 counter (low), read only
Bit 0-7 R/W Timer 3 counter value bit 0-7
*/
Bit 0-7 R/W Timer 3 counter value bit 0-7
*/
return;
case 0x4F: /* Timer 3 counter (high), read only
Bit 0-7 R/W Timer 3 counter value bit 8-15
*/
Bit 0-7 R/W Timer 3 counter value bit 8-15
*/
return;
case 0x52: /* Keypad status
Bit 0 R Key "A"
Bit 1 R Key "B"
Bit 2 R Key "C"
Bit 3 R D-pad up
Bit 4 R D-pad down
Bit 5 R D-pad left
Bit 6 R D-pad right
Bit 7 R Power button
*/
Bit 0 R Key "A"
Bit 1 R Key "B"
Bit 2 R Key "C"
Bit 3 R D-pad up
Bit 4 R D-pad down
Bit 5 R D-pad left
Bit 6 R D-pad right
Bit 7 R Power button
*/
return;
case 0x60: /* I/O peripheral circuit select
Bit 0 R/W Unknown
bit 1 R/W IR receive / transmit
Bit 2 R/W EEPROM / RTC data
Bit 3 R/W EEPROM / RTC clock
Bit 4 R/W Rumble controller
Bit 5 R/W IR enable/disable
Bit 6 R/W Unknown
Bit 7 R/W Unknown
*/
Bit 0 R/W Unknown
bit 1 R/W IR receive / transmit
Bit 2 R/W EEPROM / RTC data
Bit 3 R/W EEPROM / RTC clock
Bit 4 R/W Rumble controller
Bit 5 R/W IR enable/disable
Bit 6 R/W Unknown
Bit 7 R/W Unknown
*/
break;
case 0x61: /* I/O peripheral status control
Bit 0 R/W IR received bit (if device not selected: 0)
Bit 1 R/W IR transmit (if device not selected: 0)
Bit 2 R/W EEPROM / RTC data (if device not selected: 1)
Bit 3 R/W EEPROM / RTC clock (if device not selected: 0)
Bit 4 R/W Rumble on/off (if device not selected: 0)
Bit 5 R/W IR disable (receive & transmit) (if device not selected: 1)
Bit 6 Always 1
Bit 7 R/W IR received bit (mirror, if device not selected: 0)
*/
Bit 0 R/W IR received bit (if device not selected: 0)
Bit 1 R/W IR transmit (if device not selected: 0)
Bit 2 R/W EEPROM / RTC data (if device not selected: 1)
Bit 3 R/W EEPROM / RTC clock (if device not selected: 0)
Bit 4 R/W Rumble on/off (if device not selected: 0)
Bit 5 R/W IR disable (receive & transmit) (if device not selected: 1)
Bit 6 Always 1
Bit 7 R/W IR received bit (mirror, if device not selected: 0)
*/
if ( m_pm_reg[0x60] & 0x04 )
m_i2cmem->write_sda( ( data & 0x04 ) ? 1 : 0 );
@ -1330,29 +1330,29 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
update_sound();
break;
case 0x71: /* Sound volume
Bit 0-1 R/W Sound volume
00 - 0%
01 - 50%
10 - 50%
11 - 100%
Bit 2 R/W Always set to 0
Bit 3-7 Unused
*/
Bit 0-1 R/W Sound volume
00 - 0%
01 - 50%
10 - 50%
11 - 100%
Bit 2 R/W Always set to 0
Bit 3-7 Unused
*/
m_pm_reg[0x71] = data;
update_sound();
break;
case 0x80: /* LCD control
Bit 0 R/W Invert colors; 0 - normal, 1 - inverted
Bit 1 R/W Enable rendering of background
Bit 2 R/W Enable rendering of sprites
Bit 3 R/W Enable copy to LCD ram
Bit 4-5 R/W Map size
00 - 12x16
01 - 16x12
10 - 24x8
11 - 24x8 (prohibited code)
Bit 6-7 Unused
*/
Bit 0 R/W Invert colors; 0 - normal, 1 - inverted
Bit 1 R/W Enable rendering of background
Bit 2 R/W Enable rendering of sprites
Bit 3 R/W Enable copy to LCD ram
Bit 4-5 R/W Map size
00 - 12x16
01 - 16x12
10 - 24x8
11 - 24x8 (prohibited code)
Bit 6-7 Unused
*/
m_prc.colors_inverted = ( data & 0x01 ) ? 1 : 0;
m_prc.background_enabled = ( data & 0x02 ) ? 1 : 0;
m_prc.sprites_enabled = ( data & 0x04 ) ? 1 : 0;
@ -1370,18 +1370,18 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x81: /* LCD render refresh rate
Bit 0 R/W Unknown
Bit 1-3 R/W LCD refresh rate divider
000 - 60Hz / 3 = 20Hz (0 - 2)
001 - 60Hz / 6 = 10Hz (0 - 5)
010 - 60Hz / 9 = 6,6Hz (0 - 8)
011 - 60Hz / 12 = 5Hz (0 - B)
100 - 60Hz / 2 = 30Hz (0 - 1)
101 - 60Hz / 4 = 15Hz (0 - 3)
110 - 60Hz / 6 = 10Hz (0 - 5)
111 - 60Hz / 8 = 7,5Hz (0 - 7)
Bit 4-7 R Divider position, when overflow the LCD is updated
*/
Bit 0 R/W Unknown
Bit 1-3 R/W LCD refresh rate divider
000 - 60Hz / 3 = 20Hz (0 - 2)
001 - 60Hz / 6 = 10Hz (0 - 5)
010 - 60Hz / 9 = 6,6Hz (0 - 8)
011 - 60Hz / 12 = 5Hz (0 - B)
100 - 60Hz / 2 = 30Hz (0 - 1)
101 - 60Hz / 4 = 15Hz (0 - 3)
110 - 60Hz / 6 = 10Hz (0 - 5)
111 - 60Hz / 8 = 7,5Hz (0 - 7)
Bit 4-7 R Divider position, when overflow the LCD is updated
*/
switch ( data & 0x0E )
{
case 0x00: m_prc.max_frame_count = 3; break;
@ -1395,76 +1395,76 @@ WRITE8_MEMBER(pokemini_state::hwreg_w)
}
break;
case 0x82: /* BG tile data memory offset (low)
Bit 0-2 Always "0"
Bit 3-7 R/W BG tile data memory offset bit 3-7
*/
Bit 0-2 Always "0"
Bit 3-7 R/W BG tile data memory offset bit 3-7
*/
data &= 0xF8;
m_prc.bg_tiles = ( m_prc.bg_tiles & 0xFFFF00 ) | data;
break;
case 0x83: /* BG tile data memory offset (mid)
Bit 0-7 R/W BG tile data memory offset bit 8-15
*/
Bit 0-7 R/W BG tile data memory offset bit 8-15
*/
m_prc.bg_tiles = ( m_prc.bg_tiles & 0xFF00FF ) | ( data << 8 );
break;
case 0x84: /* BG tile data memory offset (high)
Bit 0-4 R/W BG tile data memory offset bit 16-20
Bit 5-7 Unused
*/
Bit 0-4 R/W BG tile data memory offset bit 16-20
Bit 5-7 Unused
*/
data &= 0x1F;
m_prc.bg_tiles = ( m_prc.bg_tiles & 0x00FFFF ) | ( data << 16 );
break;
case 0x85: /* BG vertical move
Bit 0-6 R/W Move the background up, move range:
Map size 0: 0x00 to 0x40
Map size 1: 0x00 to 0x20
Map size 2: move ignored
Bit 7 Unused
*/
Bit 0-6 R/W Move the background up, move range:
Map size 0: 0x00 to 0x40
Map size 1: 0x00 to 0x20
Map size 2: move ignored
Bit 7 Unused
*/
case 0x86: /* BG horizontal move
Bit 0-6 R/W Move the background left, move range:
Map size 0: move ignored
Map size 1: 0x00 to 0x20
Map size 2: 0x00 to 0x60
Bit 7 Unused
*/
Bit 0-6 R/W Move the background left, move range:
Map size 0: move ignored
Map size 1: 0x00 to 0x20
Map size 2: 0x00 to 0x60
Bit 7 Unused
*/
logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", m_maincpu->pc(), offset, data );
break;
case 0x87: /* Sprite tile data memory offset (low)
Bit 0-5 Always "0"
Bit 6-7 R/W Sprite tile data memory offset bit 6-7
*/
Bit 0-5 Always "0"
Bit 6-7 R/W Sprite tile data memory offset bit 6-7
*/
data &= 0xC0;
m_prc.spr_tiles = ( m_prc.spr_tiles & 0xFFFF00 ) | data;
break;
case 0x88: /* Sprite tile data memory offset (med)
Bit 0-7 R/W Sprite tile data memory offset bit 8-15
*/
Bit 0-7 R/W Sprite tile data memory offset bit 8-15
*/
m_prc.spr_tiles = ( m_prc.spr_tiles & 0xFF00FF ) | ( data << 8 );
break;
case 0x89: /* Sprite tile data memory offset (high)
Bit 0-4 R/W Sprite tile data memory offset bit 16-20
Bit 5-7 Unused
*/
Bit 0-4 R/W Sprite tile data memory offset bit 16-20
Bit 5-7 Unused
*/
data &= 0x1F;
m_prc.spr_tiles = ( m_prc.spr_tiles & 0x00FFFF ) | ( data << 16 );
break;
case 0x8A: /* LCD status
Bit 0 R Unknown
Bit 1 R Unknown
Bit 2 R Unknown
Bit 3 R Unknown
Bit 4 R LCD during V-Sync / Rendering circuitry active or not ( 1 = not active)
Bit 5 R Unknown
Bit 6-7 Unused
*/
Bit 0 R Unknown
Bit 1 R Unknown
Bit 2 R Unknown
Bit 3 R Unknown
Bit 4 R LCD during V-Sync / Rendering circuitry active or not ( 1 = not active)
Bit 5 R Unknown
Bit 6-7 Unused
*/
case 0xFE: /* Direct LCD control / data
Bit 0-7 R/W Direct LCD command or data
*/
Bit 0-7 R/W Direct LCD command or data
*/
// lcd_command_w( data );
break;
case 0xFF: /* Direct LCD data
Bit 0-7 R/W Direct LCD data
*/
Bit 0-7 R/W Direct LCD data
*/
// lcd_data_w( data );
break;
default:

8
src/mame/drivers/ptcsol.cpp
View File

@ -435,11 +435,11 @@ WRITE8_MEMBER( sol20_state::sol20_fe_w )
static ADDRESS_MAP_START( sol20_mem, AS_PROGRAM, 8, sol20_state)
AM_RANGE(0x0000, 0x07ff) AM_RAMBANK("boot")
AM_RANGE(0X0800, 0Xbfff) AM_RAM // optional s100 ram
AM_RANGE(0x0800, 0xbfff) AM_RAM // optional s100 ram
AM_RANGE(0xc000, 0xc7ff) AM_ROM
AM_RANGE(0Xc800, 0Xcbff) AM_RAM // system ram
AM_RANGE(0Xcc00, 0Xcfff) AM_RAM AM_SHARE("videoram")
AM_RANGE(0Xd000, 0Xffff) AM_RAM // optional s100 ram
AM_RANGE(0xc800, 0xcbff) AM_RAM // system ram
AM_RANGE(0xcc00, 0xcfff) AM_RAM AM_SHARE("videoram")
AM_RANGE(0xd000, 0xffff) AM_RAM // optional s100 ram
ADDRESS_MAP_END
static ADDRESS_MAP_START( sol20_io, AS_IO, 8, sol20_state)

2
src/mame/drivers/rex6000.cpp
View File

@ -306,7 +306,7 @@ READ8_MEMBER( rex6000_state::touchscreen_r )
switch (offset)
{
case 0x08:
return ((ioport("INPUT")->read() & 0x40) ? 0x20 : 0x00) | 0X10;
return ((ioport("INPUT")->read() & 0x40) ? 0x20 : 0x00) | 0x10;
case 0x09:
if (m_touchscreen[4] & 0x80)
return (battery>>0) & 0xff;

4
src/mame/drivers/rmnimbus.cpp
View File

@ -46,8 +46,8 @@ static ADDRESS_MAP_START(nimbus_io, AS_IO, 16, rmnimbus_state )
AM_RANGE( 0x0080, 0x0081) AM_READWRITE8(nimbus_mcu_r, nimbus_mcu_w, 0x00FF)
AM_RANGE( 0x0092, 0x0093) AM_READWRITE8(nimbus_iou_r, nimbus_iou_w, 0x00FF)
AM_RANGE( 0x00A4, 0x00A5) AM_READWRITE8(nimbus_mouse_js_r, nimbus_mouse_js_w, 0x00FF)
AM_RANGE( 0X00c0, 0X00cf) AM_READWRITE8(nimbus_pc8031_r, nimbus_pc8031_w, 0x00FF)
AM_RANGE( 0X00e0, 0X00ef) AM_DEVREADWRITE8(AY8910_TAG, ay8910_device, data_r, address_data_w, 0x00FF)
AM_RANGE( 0x00c0, 0x00cf) AM_READWRITE8(nimbus_pc8031_r, nimbus_pc8031_w, 0x00FF)
AM_RANGE( 0x00e0, 0x00ef) AM_DEVREADWRITE8(AY8910_TAG, ay8910_device, data_r, address_data_w, 0x00FF)
AM_RANGE( 0x00f0, 0x00f7) AM_DEVREADWRITE8(Z80SIO_TAG, z80sio2_device, cd_ba_r, cd_ba_w, 0x00ff)
AM_RANGE( 0x0400, 0x0401) AM_WRITE8(fdc_ctl_w, 0x00ff)
AM_RANGE( 0x0408, 0x040f) AM_DEVREADWRITE8(FDC_TAG, wd2793_t, read, write, 0x00ff)

23
src/mame/drivers/segasp.cpp
View File

@ -75,6 +75,7 @@ G 171-8278G 315-6416 2x 512Mbit RMI
#include "cpu/sh4/sh4.h"
#include "debugger.h"
#include "includes/segasp.h"
#include "machine/naomim4.h"
READ64_MEMBER(segasp_state::sp_bank_r)
{
@ -301,7 +302,7 @@ static MACHINE_CONFIG_DERIVED_CLASS( segasp, naomi_aw_base, segasp_state )
// todo, not exactly NaomiM4 (see notes at top of driver) use custom board type here instead
MCFG_X76F100_ADD("naomibd_eeprom") // actually not present
MCFG_NAOMI_M4_BOARD_ADD("rom_board", "pic_readout", "naomibd_eeprom", "boardid", WRITE8(dc_state, g1_irq))
MCFG_NAOMI_M4_BOARD_ADD("rom_board", "pic_readout", "naomibd_eeprom", WRITE8(dc_state, g1_irq))
MACHINE_CONFIG_END
#define ROM_LOAD16_WORD_SWAP_BIOS(bios,name,offset,length,hash) \
@ -354,7 +355,7 @@ ROM_START( segasp )
SEGASPEE_EXP
ROM_REGION( 0x08000000, "rom_board", ROMREGION_ERASEFF)
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02))
ROM_PARAMETER( ":rom_board:id", "5502" )
ROM_REGION( 0x800, "pic_readout", ROMREGION_ERASE00 )
ROM_END
@ -370,7 +371,7 @@ ROM_START( brickppl )
ROM_LOAD( "ic64", 0x08000000, 0x4000000, CRC(383e90d9) SHA1(eeca4b1bd0cd1fed7b85f045d71e0c7258d4350b) )
ROM_LOAD( "ic65", 0x0c000000, 0x4000000, CRC(4c29b5ac) SHA1(9e6a79ad2d2498eed5b2590c8764222e7d6c0229) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5508" ) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0558-com.ic15", 0, 0x800, BAD_DUMP CRC(7592d004) SHA1(632373d807f54953d68c95a9f874ed3e8011f085) )
@ -392,7 +393,7 @@ ROM_START( dinoking )
ROM_LOAD( "ic69s", 0x07000000, 0x01000000, CRC(c78e46c2) SHA1(b8224c68face23010414d13ebb4cc05a2a9dce8a) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5502" ) // actually 8x 128Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) )
@ -413,7 +414,7 @@ ROM_START( dinokior )
ROM_LOAD( "ic68s", 0x06000000, 0x01000000, CRC(ff5ed2b8) SHA1(d8d86b3ed976c8c8fc51d225ae661e5f237b6e1d) )
ROM_LOAD( "ic69s", 0x07000000, 0x01000000, CRC(ab8ac4eb) SHA1(e6b3ce796ae4887011e2764261f3f437dc9939f9) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5502" ) // actually 8x 128Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) )
@ -429,7 +430,7 @@ ROM_START( lovebery )
ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(1bd80ed0) SHA1(d50307573389ebe71e381a75deb83811fa397b94) )
ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(d3870287) SHA1(efd3630d54068f5a8caf242a48db410bedf48e7a) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5508" ) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) )
@ -453,7 +454,7 @@ ROM_START( lovebero )
ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(0a23cea3) SHA1(1780d935b0d641769859b2022df8e4262e7bafd8) )
ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(d3870287) SHA1(efd3630d54068f5a8caf242a48db410bedf48e7a) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5508" ) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) )
@ -469,7 +470,7 @@ ROM_START( tetgiant )
ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(31ba1938) SHA1(9b5a05193b3df13cd7617a38913e0b0fbd61da44) )
ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(cb946213) SHA1(6195e33c44a1e8eb464dfc3558dc1c9b4d910ef3) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5502" ) // 2x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0604-com.ic15", 0, 0x800, BAD_DUMP CRC(e8dd2b86) SHA1(765ffd2e4a36302b1db0815e842c9656e29f2457) )
@ -487,7 +488,7 @@ ROM_START( dinoki25 )
DISK_REGION( "cflash" )
DISK_IMAGE( "mda-c0047", 0, SHA1(0f97291d9c5dbe3e66a5220da05aebdfaa78b35d) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5508" ) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) )
@ -511,7 +512,7 @@ ROM_START( loveber3 )
DISK_REGION( "cflash" )
DISK_IMAGE( "mda-c0042", 0, SHA1(9992d90dae8ce7636e4153e02b779c27931b3be6) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5508" ) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) )
@ -528,7 +529,7 @@ ROM_START( tetgiano )
DISK_REGION( "cflash" )
DISK_IMAGE( "mda-c0076", 0, SHA1(6987c888d2a3ada2d07f6396d47fdba507ca859d) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs
ROM_PARAMETER( ":rom_board:id", "5502" ) // 2x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0604-com.ic15", 0, 0x800, BAD_DUMP CRC(e8dd2b86) SHA1(765ffd2e4a36302b1db0815e842c9656e29f2457) )

4
src/mame/drivers/seta.cpp
View File

@ -7918,7 +7918,7 @@ static MACHINE_CONFIG_START( calibr50, seta_state )
MCFG_CPU_ADD("sub", M65C02, XTAL_16MHz/8) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(calibr50_sub_map)
MCFG_CPU_PERIODIC_INT_DRIVER(seta_state, irq0_line_hold, 4*60) /* IRQ: 4/frame
NMI: when the 68k writes the sound latch */
NMI: when the 68k writes the sound latch */
MCFG_MACHINE_RESET_OVERRIDE(seta_state,calibr50)
@ -9018,7 +9018,7 @@ static MACHINE_CONFIG_START( kiwame, seta_state )
MCFG_CPU_ADD("maincpu", M68000, 16000000) /* 16 MHz */
MCFG_CPU_PROGRAM_MAP(kiwame_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", seta_state, irq1_line_hold)/* lev 1-7 are the same. WARNING:
the interrupt table is written to. */
the interrupt table is written to. */
MCFG_DEVICE_ADD("spritegen", SETA001_SPRITE, 0)
MCFG_SETA001_SPRITE_GFXDECODE("gfxdecode")

30
src/mame/drivers/socrates.cpp
View File

@ -1000,22 +1000,22 @@ static ADDRESS_MAP_START(z80_io, AS_IO, 8, socrates_state )
AM_RANGE(0x00, 0x00) AM_READWRITE(socrates_rom_bank_r, socrates_rom_bank_w) AM_MIRROR(0x7) /* rom bank select - RW - 8 bits */
AM_RANGE(0x08, 0x08) AM_READWRITE(socrates_ram_bank_r, socrates_ram_bank_w) AM_MIRROR(0x7) /* ram banks select - RW - 4 low bits; Format: 0b****HHLL where LL controls whether window 0 points at ram area: 0b00: 0x0000-0x3fff; 0b01: 0x4000-0x7fff; 0b10: 0x8000-0xbfff; 0b11: 0xc000-0xffff. HH controls the same thing for window 1 */
AM_RANGE(0x10, 0x17) AM_READWRITE(read_f3, socrates_sound_w) AM_MIRROR (0x8) /* sound section:
0x10 - W - frequency control for channel 1 (louder channel) - 01=high pitch, ff=low; time between 1->0/0->1 transitions = (XTAL_21_4772MHz/(512+256) / (freq_reg+1)) (note that this is double the actual frequency since each full low and high squarewave pulse is two transitions)
0x11 - W - frequency control for channel 2 (softer channel) - 01=high pitch, ff=low; same equation as above
0x12 - W - 0b***EVVVV enable, volume control for channel 1
0x13 - W - 0b***EVVVV enable, volume control for channel 2
0x14-0x17 - 0bE??????? enable, unknown for channel 3; produces well defined dmc waves when bit 7 is set, and one or two other bits
This may be some sort of debug register for serial-dmc banging out some internal rom from the asic, maybe color data?
No writes to ram seem to change the waveforms produced, in my limited testing.
0x80 produces about a very very quiet 1/8 duty cycle wave at 60hz or so
0xC0 produces a DMC wave read from an unknown address at around 342hz
0x
*/
0x10 - W - frequency control for channel 1 (louder channel) - 01=high pitch, ff=low; time between 1->0/0->1 transitions = (XTAL_21_4772MHz/(512+256) / (freq_reg+1)) (note that this is double the actual frequency since each full low and high squarewave pulse is two transitions)
0x11 - W - frequency control for channel 2 (softer channel) - 01=high pitch, ff=low; same equation as above
0x12 - W - 0b***EVVVV enable, volume control for channel 1
0x13 - W - 0b***EVVVV enable, volume control for channel 2
0x14-0x17 - 0bE??????? enable, unknown for channel 3; produces well defined dmc waves when bit 7 is set, and one or two other bits
This may be some sort of debug register for serial-dmc banging out some internal rom from the asic, maybe color data?
No writes to ram seem to change the waveforms produced, in my limited testing.
0x80 produces about a very very quiet 1/8 duty cycle wave at 60hz or so
0xC0 produces a DMC wave read from an unknown address at around 342hz
0x
*/
AM_RANGE(0x20, 0x21) AM_READWRITE(read_f3, socrates_scroll_w) AM_MIRROR (0xe) /* graphics section:
0x20 - W - lsb offset of screen display
0x21 - W - msb offset of screen display
resulting screen line is one of 512 total offsets on 128-byte boundaries in the whole 64k ram
*/
0x20 - W - lsb offset of screen display
0x21 - W - msb offset of screen display
resulting screen line is one of 512 total offsets on 128-byte boundaries in the whole 64k ram
*/
AM_RANGE(0x30, 0x30) AM_READWRITE(read_f3, kbmcu_strobe) AM_MIRROR (0xf) /* resets the keyboard IR decoder MCU */
AM_RANGE(0x40, 0x40) AM_READWRITE(status_and_speech, speech_command ) AM_MIRROR(0xf) /* reads status register for vblank/hblank/speech, also reads and writes speech module */
AM_RANGE(0x50, 0x50) AM_READWRITE(socrates_keyboard_low_r, socrates_keyboard_clear) AM_MIRROR(0xE) /* Keyboard keycode low, latched on keypress, can be unlatched by writing anything here */

2
src/mame/drivers/sonson.cpp
View File

@ -166,7 +166,7 @@ static INPUT_PORTS_START( sonson )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_SERVICE( 0x40, IP_ACTIVE_LOW ) PORT_DIPLOCATION("SW1:7")
PORT_DIPNAME( 0X80, 0x80, DEF_STR( Flip_Screen )) PORT_DIPLOCATION("SW1:8")
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen )) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )

6
src/mame/drivers/splash.cpp
View File

@ -1006,7 +1006,7 @@ Ring & Ball (?)
Came from a dead board, silkscreen ring&ball/a by microhard
u87 & u111 program
u51
u51
u53 empty socket might be missing
u130 sound (z80)
@ -1018,13 +1018,13 @@ ROM_START( ringball )
ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code + gfx */
// TODO: encrypted, there's a device with scratched part between 68k and roms. u87 looks to have standard 68k vectors with scrambled bits.
ROM_LOAD( "u87.bin", 0x000000, 0x040000, CRC(f8f21cfd) SHA1(c258689fc79195945db21663d2df0a33a4412618) )
ROM_LOAD( "u111.bin", 0x040000, 0x040000, CRC(11e246b0) SHA1(b056bcaa52ab2898f470a29b0a5c2f3594e2522b) ) // actually "u101"?
ROM_LOAD( "u111.bin", 0x040000, 0x040000, CRC(11e246b0) SHA1(b056bcaa52ab2898f470a29b0a5c2f3594e2522b) ) // actually "u101"?
ROM_REGION( 0x080000, "audiocpu", 0 ) /* Z80 code + sound data */
ROM_LOAD( "u130.bin", 0x000000, 0x080000, CRC(892202ea) SHA1(10b5933b136a6595f739510d380d12c4cefd9f09) )
ROM_REGION( 0x100000, "gfx1", 0 )
ROM_LOAD( "u51.bin", 0x000000, 0x080000, CRC(32c01844) SHA1(ad461c47cd270414c442325751eca0d6c1ea9e2d) )
ROM_LOAD( "u51.bin", 0x000000, 0x080000, CRC(32c01844) SHA1(ad461c47cd270414c442325751eca0d6c1ea9e2d) )
ROM_LOAD( "u53.bin", 0x080000, 0x080000, NO_DUMP ) // empty on this PCB, GFXs doesn't seem enough for a complete game?
ROM_END

4
src/mame/drivers/taito_f2.cpp
View File

@ -4266,7 +4266,7 @@ ROM_START( qtorimon ) /* Quiz Torimonochou */
ROM_LOAD16_BYTE( "c41-04.bin", 0x00000, 0x20000, CRC(0fbf5223) SHA1(2aa8b3dd20ae922a3ff880db7b46e2bbb708698d) )
ROM_LOAD16_BYTE( "c41-05.bin", 0x00001, 0x20000, CRC(174bd5db) SHA1(f7a4b2ac91b3bcd886e2a1e1d0415a95f14c9de7) )
ROM_LOAD16_BYTE( "mask-51.bin", 0x40000, 0x20000, CRC(12e14aca) SHA1(8f7dc54f68984c82420abf96436743c0654a71ea) ) /* char defs, read by cpu */
ROM_LOAD16_BYTE( "mask-52.bin", 0x40001, 0X20000, CRC(b3ef66f3) SHA1(4766a1ed9b4adcc2f0d2857633ce95194eb80694) ) /* char defs, read by cpu */
ROM_LOAD16_BYTE( "mask-52.bin", 0x40001, 0x20000, CRC(b3ef66f3) SHA1(4766a1ed9b4adcc2f0d2857633ce95194eb80694) ) /* char defs, read by cpu */
ROM_REGION( 0x100000, "gfx1", ROMREGION_ERASEFF )
/* empty! */
@ -4362,7 +4362,7 @@ ROM_START( quizhq ) /* Quiz HQ */
ROM_LOAD16_BYTE( "c53-05.bin", 0x00000, 0x20000, CRC(c798fc20) SHA1(4467dde3620102f87cffb2f81f71d856c0df12f8) )
ROM_LOAD16_BYTE( "c53-01.bin", 0x00001, 0x20000, CRC(bf44c93e) SHA1(6fd871f50da4a668767b3096660689905663f697) )
ROM_LOAD16_BYTE( "c53-52.bin", 0x80000, 0x20000, CRC(12e14aca) SHA1(8f7dc54f68984c82420abf96436743c0654a71ea) ) /* char defs, read by cpu */
ROM_LOAD16_BYTE( "c53-51.bin", 0x80001, 0X20000, CRC(b3ef66f3) SHA1(4766a1ed9b4adcc2f0d2857633ce95194eb80694) ) /* char defs, read by cpu */
ROM_LOAD16_BYTE( "c53-51.bin", 0x80001, 0x20000, CRC(b3ef66f3) SHA1(4766a1ed9b4adcc2f0d2857633ce95194eb80694) ) /* char defs, read by cpu */
ROM_REGION( 0x100000, "gfx1", ROMREGION_ERASEFF )
/* empty */

2
src/mame/drivers/topspeed.cpp
View File

@ -391,7 +391,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( cpub_map, AS_PROGRAM, 16, topspeed_state )
AM_RANGE(0x000000, 0x01ffff) AM_ROM
AM_RANGE(0x400000, 0X40ffff) AM_RAM AM_SHARE("sharedram")
AM_RANGE(0x400000, 0x40ffff) AM_RAM AM_SHARE("sharedram")
AM_RANGE(0x880000, 0x880001) AM_READ8(input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0220ioc", tc0220ioc_device, portreg_w, 0x00ff)
AM_RANGE(0x880002, 0x880003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
AM_RANGE(0x900000, 0x9003ff) AM_READWRITE(motor_r, motor_w)

62
src/mame/drivers/tv950.cpp
View File

@ -8,13 +8,13 @@
TODO:
- Keyboard
- CRTC reset and drawing
Hardware:
6502 CPU
6545 CRTC
6522 VIA, wired to count HSYNCs and to enable the 6502 to pull RESET on the CRTC
3x 6551 ACIA 1 for the keyboard, 1 for the modem port, 1 for the printer port
VIA hookup (see schematics):
PA3 = beep?
PA5 = inverse video
@ -24,14 +24,14 @@
CA1 = reset CRTC in
CA2 = reset CRTC out
CB2 = blink timer
IRQ = ACIAs (all 3 ORed together)
NMI = 6522 VIA's IRQ line
http://www.bitsavers.org/pdf/televideo/950/Model_950_Terminal_Theory_of_Operation_26Jan1981.pdf
http://www.bitsavers.org/pdf/televideo/950/2002100_Model_950_Maintenance_Manual_Nov1983.pdf
http://www.bitsavers.org/pdf/televideo/950/B300002-001_Model_950_Operators_Manual_Feb81.pdf
http://www.bitsavers.org/pdf/televideo/950/2002100_Model_950_Maintenance_Manual_Nov1983.pdf
http://www.bitsavers.org/pdf/televideo/950/B300002-001_Model_950_Operators_Manual_Feb81.pdf
****************************************************************************/
#include "emu.h"
@ -41,13 +41,13 @@
#include "machine/mos6551.h"
#include "bus/rs232/rs232.h"
#define ACIA1_TAG "acia1"
#define ACIA2_TAG "acia2"
#define ACIA3_TAG "acia3"
#define CRTC_TAG "crtc"
#define VIA_TAG "via"
#define RS232A_TAG "rs232a"
#define RS232B_TAG "rs232b"
#define ACIA1_TAG "acia1"
#define ACIA2_TAG "acia2"
#define ACIA3_TAG "acia3"
#define CRTC_TAG "crtc"
#define VIA_TAG "via"
#define RS232A_TAG "rs232a"
#define RS232B_TAG "rs232b"
#define MASTER_CLOCK (23814000)
@ -64,7 +64,7 @@ public:
MC6845_UPDATE_ROW(crtc_update_row);
MC6845_ON_UPDATE_ADDR_CHANGED(crtc_update_addr);
DECLARE_WRITE8_MEMBER(row_addr_w);
DECLARE_WRITE_LINE_MEMBER(via_crtc_reset_w);
@ -74,14 +74,14 @@ private:
required_device<via6522_device> m_via;
required_device<r6545_1_device> m_crtc;
required_shared_ptr<UINT8> m_vram;
int m_row_addr;
};
static ADDRESS_MAP_START(tv950_mem, AS_PROGRAM, 8, tv950_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x07ff) AM_RAM
AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("vram") // VRAM
AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("vram") // VRAM
AM_RANGE(0x8000, 0x8100) AM_DEVREADWRITE(CRTC_TAG, r6545_1_device, status_r, address_w)
AM_RANGE(0x8001, 0x8101) AM_DEVREADWRITE(CRTC_TAG, r6545_1_device, register_r, register_w)
AM_RANGE(0x9000, 0x9000) AM_WRITE(row_addr_w)
@ -106,7 +106,7 @@ WRITE_LINE_MEMBER(tv950_state::via_crtc_reset_w)
{
//printf("via_crtc_reset_w: %d\n", state);
m_via->write_ca1(state);
if (!state)
{
//m_crtc->device_reset();
@ -130,11 +130,11 @@ static MACHINE_CONFIG_START( tv950, tv950_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK/14)
MCFG_CPU_PROGRAM_MAP(tv950_mem)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK, 882, 0, 720, 370, 0, 350 ) // not real values
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK, 882, 0, 720, 370, 0, 350 ) // not real values
MCFG_SCREEN_UPDATE_DEVICE( CRTC_TAG, r6545_1_device, screen_update )
// there are many 6845 CRTC submodels, the Theory of Operation manual references the Rockwell R6545-1 specificially.
MCFG_MC6845_ADD(CRTC_TAG, R6545_1, "screen", MASTER_CLOCK/14)
MCFG_MC6845_SHOW_BORDER_AREA(false)
@ -142,17 +142,17 @@ static MACHINE_CONFIG_START( tv950, tv950_state )
MCFG_MC6845_UPDATE_ROW_CB(tv950_state, crtc_update_row)
MCFG_MC6845_ADDR_CHANGED_CB(tv950_state, crtc_update_addr)
MCFG_MC6845_OUT_HSYNC_CB(DEVWRITELINE(VIA_TAG, via6522_device, write_pb6))
MCFG_DEVICE_ADD(VIA_TAG, VIA6522, MASTER_CLOCK/14)
MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6502_NMI_LINE))
MCFG_VIA6522_CA2_HANDLER(WRITELINE(tv950_state, via_crtc_reset_w))
MCFG_DEVICE_ADD(ACIA1_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
MCFG_DEVICE_ADD(ACIA2_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
MCFG_DEVICE_ADD(ACIA3_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
MACHINE_CONFIG_END
@ -160,15 +160,15 @@ MACHINE_CONFIG_END
/* ROM definition */
ROM_START( tv950 )
ROM_REGION(0x2000, "maincpu", 0)
ROM_LOAD( "180000-001a_a41_eb17.bin", 0x001000, 0x001000, CRC(b7187cc5) SHA1(41cc8fd51661314e03ee7e00cc1e206e9a694d92) )
ROM_LOAD( "180000-007a_a42_67d3.bin", 0x000000, 0x001000, CRC(3ef2e6fb) SHA1(21ccfd2b50c37b715eed67671b82faa4d75fc6bb) )
ROM_LOAD( "180000-001a_a41_eb17.bin", 0x001000, 0x001000, CRC(b7187cc5) SHA1(41cc8fd51661314e03ee7e00cc1e206e9a694d92) )
ROM_LOAD( "180000-007a_a42_67d3.bin", 0x000000, 0x001000, CRC(3ef2e6fb) SHA1(21ccfd2b50c37b715eed67671b82faa4d75fc6bb) )
ROM_REGION(0x2000, "graphics", 0)
ROM_LOAD16_BYTE( "180000-002a_a33_9294.bin", 0x000001, 0x001000, CRC(eaf4f346) SHA1(b4c531626846f3f055ddc086ac24fdb1b34f3f8e) )
ROM_LOAD16_BYTE( "180000-003a_a32_7ebf.bin", 0x000000, 0x001000, CRC(783ca0b6) SHA1(1cec9a9a56ef5795809f7ca7cd2e3f61b27e698d) )
ROM_LOAD16_BYTE( "180000-002a_a33_9294.bin", 0x000001, 0x001000, CRC(eaf4f346) SHA1(b4c531626846f3f055ddc086ac24fdb1b34f3f8e) )
ROM_LOAD16_BYTE( "180000-003a_a32_7ebf.bin", 0x000000, 0x001000, CRC(783ca0b6) SHA1(1cec9a9a56ef5795809f7ca7cd2e3f61b27e698d) )
ROM_REGION(0x1000, "kbd", 0)
ROM_LOAD( "950kbd_8748_pn52080723-02.bin", 0x000000, 0x000400, CRC(11c8f22c) SHA1(99e73e9c74b10055733e89b92adbc5bf7f4ff338) )
ROM_LOAD( "950kbd_8748_pn52080723-02.bin", 0x000000, 0x000400, CRC(11c8f22c) SHA1(99e73e9c74b10055733e89b92adbc5bf7f4ff338) )
ROM_END
/* Driver */

50
src/mame/drivers/tv990.cpp
View File

@ -3,10 +3,10 @@
/***************************************************************************
TeleVideo 990/995 terminal
Driver by Carl and R. Belmont
Thanks to Al Kossow.
H/W:
68000-P16 CPU (clock unknown, above 10 MHz it outruns the AT keyboard controller)
16C452 dual 16450 (PC/AT standard) UART + PC-compatible Centronics (integrated into
@ -14,7 +14,7 @@
AMI MEGA-KBD-H-Q PS/2 keyboard interface on 990, PS/2 8042 on 995
Televideo ASIC marked "134446-00 TVI1111-0 427"
3x AS7C256 (32K x 8 SRAM)
IRQs:
2 = PS/2 keyboard
3 = Centronics
@ -24,7 +24,7 @@
Video modes include 80 or 132 wide by 24, 25, 42, 43, 48, or 49 lines high plus an
optional status bar
Modes include TeleVideo 990, 950, and 955, Wyse WY-60, WY-150/120/50+/50, ANSI,
Modes include TeleVideo 990, 950, and 955, Wyse WY-60, WY-150/120/50+/50, ANSI,
DEC VT320/220, VT100/52, SCO Console, and PC TERM.
****************************************************************************/
@ -38,11 +38,11 @@
#include "machine/nvram.h"
#include "sound/beep.h"
#define UART0_TAG "ns16450_0"
#define UART1_TAG "ns16450_1"
#define UART0_TAG "ns16450_0"
#define UART1_TAG "ns16450_1"
#define RS232A_TAG "rs232a"
#define RS232B_TAG "rs232b"
#define LPT_TAG "lpt"
#define LPT_TAG "lpt"
class tv990_state : public driver_device
{
@ -74,14 +74,14 @@ public:
virtual void machine_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual void device_post_load() override;
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_READ16_MEMBER(tvi1111_r);
DECLARE_WRITE16_MEMBER(tvi1111_w);
DECLARE_READ8_MEMBER(kbdc_r);
DECLARE_WRITE8_MEMBER(kbdc_w);
DECLARE_WRITE_LINE_MEMBER(uart0_irq);
DECLARE_WRITE_LINE_MEMBER(uart1_irq);
DECLARE_WRITE_LINE_MEMBER(lpt_irq);
@ -104,7 +104,7 @@ INTERRUPT_GEN_MEMBER(tv990_state::vblank)
void tv990_state::machine_start()
{
m_rowtimer = timer_alloc();
save_item(NAME(tvi1111_regs));
save_item(NAME(m_rowh));
save_item(NAME(m_width));
@ -137,7 +137,7 @@ READ16_MEMBER(tv990_state::tvi1111_r)
{
if (offset == (0x32/2))
{
tvi1111_regs[offset] |= 8; // loop at 109ca wants this set
tvi1111_regs[offset] |= 8; // loop at 109ca wants this set
}
else if(offset == 0x1d)
{
@ -239,7 +239,7 @@ UINT32 tv990_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, c
attr ^= attrchg;
}
if (attr & 0x4) // inverse video?
if (attr & 0x4) // inverse video?
{
palette[1] = m_palette->pen(0);
palette[0] = (attr & 0x10) ? m_palette->pen(1) : m_palette->pen(2);
@ -304,14 +304,14 @@ WRITE8_MEMBER(tv990_state::kbdc_w)
static ADDRESS_MAP_START(tv990_mem, AS_PROGRAM, 16, tv990_state)
AM_RANGE(0x000000, 0x03ffff) AM_ROM AM_REGION("maincpu", 0)
AM_RANGE(0x060000, 0x06ffff) AM_RAM AM_SHARE("vram") // character/attribute RAM
AM_RANGE(0X080000, 0X087fff) AM_RAM AM_SHARE("fontram") // font RAM
AM_RANGE(0x060000, 0x06ffff) AM_RAM AM_SHARE("vram") // character/attribute RAM
AM_RANGE(0x080000, 0x087fff) AM_RAM AM_SHARE("fontram") // font RAM
AM_RANGE(0x090000, 0x0900ff) AM_READWRITE(tvi1111_r, tvi1111_w)
AM_RANGE(0x0a0000, 0x0a000f) AM_DEVREADWRITE8(UART0_TAG, ns16450_device, ins8250_r, ins8250_w, 0x00ff)
AM_RANGE(0x0a0010, 0x0a001f) AM_DEVREADWRITE8(UART1_TAG, ns16450_device, ins8250_r, ins8250_w, 0x00ff)
AM_RANGE(0x0a0028, 0x0a002d) AM_DEVREADWRITE8(LPT_TAG, pc_lpt_device, read, write, 0x00ff)
AM_RANGE(0x0b0000, 0x0b0003) AM_READWRITE8(kbdc_r, kbdc_w, 0x00ff)
AM_RANGE(0x0c0000, 0x0c7fff) AM_RAM AM_SHARE("nvram")// work RAM
AM_RANGE(0x0c0000, 0x0c7fff) AM_RAM AM_SHARE("nvram")// work RAM
ADDRESS_MAP_END
/* Input ports */
@ -349,7 +349,7 @@ INPUT_CHANGED_MEMBER(tv990_state::color)
void tv990_state::machine_reset()
{
m_rowtimer->adjust(m_screen->time_until_pos(0));
memset(tvi1111_regs, 0, sizeof(tvi1111_regs));
m_rowh = 16;
m_width = 80;
@ -363,10 +363,10 @@ void tv990_state::device_post_load()
static MACHINE_CONFIG_START( tv990, tv990_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, 14967500) // verified (59.86992/4)
MCFG_CPU_ADD("maincpu", M68000, 14967500) // verified (59.86992/4)
MCFG_CPU_PROGRAM_MAP(tv990_mem)
MCFG_CPU_VBLANK_INT_DRIVER("screen", tv990_state, vblank)
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green)
MCFG_SCREEN_UPDATE_DRIVER(tv990_state, screen_update)
MCFG_SCREEN_SIZE(132*16, 50*16)
@ -385,7 +385,7 @@ static MACHINE_CONFIG_START( tv990, tv990_state )
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE(RS232B_TAG, rs232_port_device, write_rts))
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE(RS232B_TAG, rs232_port_device, write_txd))
MCFG_INS8250_OUT_INT_CB(WRITELINE(tv990_state, uart1_irq))
MCFG_DEVICE_ADD(LPT_TAG, PC_LPT, 0)
MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(tv990_state, lpt_irq))
@ -398,7 +398,7 @@ static MACHINE_CONFIG_START( tv990, tv990_state )
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, rx_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, dcd_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE(UART1_TAG, ns16450_device, cts_w))
MCFG_DEVICE_ADD("pc_kbdc", KBDC8042, 0)
MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_AT386)
MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(INPUTLINE("maincpu", M68K_IRQ_2))
@ -413,14 +413,14 @@ MACHINE_CONFIG_END
/* ROM definition */
ROM_START( tv990 )
ROM_REGION( 0x40000, "maincpu", 0 )
ROM_LOAD16_BYTE( "180003-89_u3.bin", 0x000000, 0x010000, CRC(0465fc55) SHA1(b8874ce54bf2bf4f77664194d2f23c0e4e6ccbe9) )
ROM_LOAD16_BYTE( "180003-90_u4.bin", 0x000001, 0x010000, CRC(fad7d77d) SHA1(f1114a4a07c8b4ffa0323a2e7ce03d82a386f7d3) )
ROM_LOAD16_BYTE( "180003-89_u3.bin", 0x000000, 0x010000, CRC(0465fc55) SHA1(b8874ce54bf2bf4f77664194d2f23c0e4e6ccbe9) )
ROM_LOAD16_BYTE( "180003-90_u4.bin", 0x000001, 0x010000, CRC(fad7d77d) SHA1(f1114a4a07c8b4ffa0323a2e7ce03d82a386f7d3) )
ROM_END
ROM_START( tv995 )
ROM_REGION( 0x40000, "maincpu", 0 )
ROM_LOAD16_BYTE( "995-65_u3.bin", 0x000000, 0x020000, CRC(2d71b6fe) SHA1(a2a3406c19308eb9232db319ea8f151949b2ac74) )
ROM_LOAD16_BYTE( "995-65_u4.bin", 0x000001, 0x020000, CRC(dc002af2) SHA1(9608e7a729c5ac0fc58f673eaf441d2f4f591ec6) )
ROM_LOAD16_BYTE( "995-65_u3.bin", 0x000000, 0x020000, CRC(2d71b6fe) SHA1(a2a3406c19308eb9232db319ea8f151949b2ac74) )
ROM_LOAD16_BYTE( "995-65_u4.bin", 0x000001, 0x020000, CRC(dc002af2) SHA1(9608e7a729c5ac0fc58f673eaf441d2f4f591ec6) )
ROM_END
/* Driver */

2
src/mame/drivers/tx0.cpp
View File

@ -904,7 +904,7 @@ void tx0_state::magtape_callback()
if ((mar & 03) != 1)
{ /* unimplemented device: remain in unselected state and set rwc
flag? */
flag? */
m_maincpu->set_state_int(TX0_PF, m_maincpu->state_int(TX0_PF) | PF_RWC);
}
else

2
src/mame/drivers/vt100.cpp
View File

@ -333,7 +333,7 @@ UINT32 vt100_state::screen_update_vt100(screen_device &screen, bitmap_ind16 &bit
//Interrupts
// in latch A3 - keyboard
// A4 - receiver
// A5 - vertical fequency
// A5 - vertical frequency
// all other set to 1
IRQ_CALLBACK_MEMBER(vt100_state::vt100_irq_callback)
{

2
src/mame/drivers/zapcomputer.cpp
View File

@ -104,7 +104,7 @@ READ8_MEMBER( zapcomp_state::keyboard_r )
for (int i=0; i<16; i++)
if (hex_keys & (1 << i))
retval |= (0x80 | i); /* provide the key index in bits 3-0
as well as turning on the strobe bit */
as well as turning on the strobe bit */
return retval;
}

4
src/mame/includes/cvs.h
View File

@ -90,8 +90,8 @@ public:
UINT8 m_color_ram[0x400];
UINT8 m_palette_ram[0x10];
UINT8 m_character_ram[3 * 0x800]; /* only half is used, but
by allocating twice the amount,
we can use the same gfx_layout */
by allocating twice the amount,
we can use the same gfx_layout */
DECLARE_READ_LINE_MEMBER(speech_rom_read_bit);
DECLARE_WRITE_LINE_MEMBER(write_s2650_flag);
DECLARE_WRITE_LINE_MEMBER(cvs_slave_cpu_interrupt);

2
src/mame/layout/amiga.lay
View File

@ -29,4 +29,4 @@
</bezel>
</view>
</mamelayout>
</mamelayout>

2
src/mame/layout/armora.lay
View File

@ -183,4 +183,4 @@
<bounds x="0" y="0" width="1024" height="768" />
</screen>
</view>
</mamelayout>
</mamelayout>

2
src/mame/layout/bbc.lay
View File

@ -81,4 +81,4 @@
</bezel>
</view>
</mamelayout>
</mamelayout>

2
src/mame/layout/bfm_sc4.lay
View File

@ -1491,7 +1491,7 @@
</backdrop>
<!-- the rest of the elements tend to be used for 7-segs
so render them as both -->
so render them as both -->
<backdrop name="matrix160" element="matrixlamp" state="0">
<bounds y="0" x="280" width="3" height="3"/>
</backdrop>

2
src/mame/layout/bfm_sc5.lay
View File

@ -1491,7 +1491,7 @@
</backdrop>
<!-- the rest of the elements tend to be used for 7-segs
so render them as both -->
so render them as both -->
<backdrop name="matrix160" element="matrixlamp" state="0">
<bounds y="0" x="280" width="3" height="3"/>
</backdrop>

4
src/mame/layout/cherryb3.lay
View File

@ -1,8 +1,8 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Bonus III control panel
Written by Roberto Fresca.
Cherry Bonus III control panel
Written by Roberto Fresca.
-->
<!-- define button-lamps -->

4
src/mame/layout/chrygld.lay
View File

@ -1,8 +1,8 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Gold control panel
Written by Roberto Fresca.
Cherry Gold control panel
Written by Roberto Fresca.
-->
<!-- define button-lamps -->

6
src/mame/layout/chsuper.lay
View File

@ -2,10 +2,10 @@
<mamelayout version="2">
<!--
Champion Super realistic control panel
with clickable button.lamps + coin in.
Champion Super realistic control panel
with clickable button.lamps + coin in.
Written by Roberto Fresca.
Written by Roberto Fresca.
-->
<!-- define button-lamps -->

6
src/mame/layout/cmaster.lay
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
-->
<!-- define button-lamps -->

6
src/mame/layout/cmasterb.lay
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
-->
<!-- define button-lamps -->

6
src/mame/layout/cmasterc.lay
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
-->
<!-- define button-lamps -->

6
src/mame/layout/cmezspin.lay
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
-->
<!-- define button-lamps -->

6
src/mame/layout/cmpacman.lay
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
-->
<!-- define button-lamps -->

6
src/mame/layout/cmv4.lay
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
Cherry Master control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
-->
<!-- define button-lamps -->

6
src/mame/layout/crazybon.lay
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Crazy Bonus 2002 control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
Crazy Bonus 2002 control panel
May or may not match arrangement/colour of real control panel
Written by Vas Crabb.
-->
<!-- define button-lamps -->

4
src/mame/layout/dblcrown.lay
View File

@ -1,8 +1,8 @@
<?xml version="1.0"?>
<mamelayout version="2">
<!--
Double Crown control panel
Written by Roberto Fresca.
Double Crown control panel
Written by Roberto Fresca.
-->
<!-- define button-lamps -->

18
src/mame/layout/fb01.lay
View File

@ -75,20 +75,20 @@
</element>
<!--
System Inst Data Entry Data Entry
Setup Select -1/No +1/Yes
System Inst Data Entry Data Entry
Setup Select -1/No +1/Yes
Inst Inst Voice Voice
Assign Function Function Select
Inst Inst Voice Voice
Assign Function Function Select
-->
<!--
<element name="" defstate="0">
<text string="" state="0"
<text string="" state="1">
</text>
</element>
<element name="" defstate="0">
<text string="" state="0"
<text string="" state="1">
</text>
</element>
-->
<view name="View">

2
src/mame/layout/gamecom.lay
View File

@ -410,4 +410,4 @@
</screen>
</view>
</mamelayout>
</mamelayout>

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