fixed some spelling fixes (eg. layout break, uppercase)

This commit is contained in:
Michaël Banaan Ananas 2011-08-23 08:34:55 +00:00
parent a81f6afbe8
commit 736086d094
18 changed files with 42 additions and 42 deletions

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@ -61,7 +61,7 @@ static DISCRETE_SOUND_START(qix)
DISCRETE_INPUTX_DATA(QIX_DAC_DATA, 128, -128*128, 128)
DISCRETE_INPUT_DATA (QIX_VOL_DATA)
/* separate the two 4-bit channels. */
/* Separate the two 4-bit channels. */
DISCRETE_TRANSFORM3(QIX_VOL_DATA_L, QIX_VOL_DATA, 16, 0x0f, "01/2&")
DISCRETE_TRANSFORM2(QIX_VOL_DATA_R, QIX_VOL_DATA, 0x0f, "01&")

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@ -118,7 +118,7 @@ DISCRETE_SOUND_START(sprint2)
/* with the input frequency set by the MotorSND */
/* latch (4 bit). This freqency is then used to */
/* drive three counters, that are summed up */
/* and are output through a DAC */
/* and are output through a DAC */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
@ -241,7 +241,7 @@ DISCRETE_SOUND_START(sprint1)
/* with the input frequency set by the MotorSND */
/* latch (4 bit). This freqency is then used to */
/* drive three counters, that are summed up */
/* and are output through a DAC */
/* and are output through a DAC */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,

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@ -484,7 +484,7 @@ Stephh's notes on 'tetrsark' (based on the game Z80 code and some tests) :
so if you insert too many coins, it can be reset to 0 !
- Routines :
* 0x56e3 : Play sound (input : register A) - to be confirmed !
- addresses :
- Addresses :
* 0xc52b : credits
* 0xc541 : ~(IN5) - test for coins "buttons" (code at 0x0232)
* 0xc516 : ~(IN5)

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@ -121,17 +121,17 @@
JP9 - 64M O O-O 32M&16M
JP10 - 64M&32M O-O O 16M
JP11 - 64M O O-O 32M&16M
JP12 - through O-O O SP
JP13 - through O-O O SP
JP12 - through O-O O SP
JP13 - through O-O O SP
JP14 - WDT O O
JP15 - MONO O-O O SURR
JP16 - HIGH O O O MID (N/C LOW)
CN1 through CN3 - Multi-pin Flat Cable Connector
CN1 to CN3 - Multi-pin Flat Cable Connector
CN4 - Multi-pin Connector for Network PCB
CN5 - Multi-pin Flat Cable Connector
CN6 - 96-Pin To Lower PCB, Joining Connector
CN7 through CN8 - Not used
CN9 through CN11 - 6-Pin Power Connectors
CN7 to CN8 - Not used
CN9 to CN11 - 6-Pin Power Connectors
CN19 - USB Connector
CN21 - 5-Pin Analog Controls Connector (Tied to USB Connector via the Filter Board)
CN18 - RCA Mono Audio OUT

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@ -69,7 +69,7 @@ Notes:
LS-07 - 27C512 EPROM (DIP28)
LS-08 - 27C256 EPROM (DIP28)
LS-05/06 - 128kx8 mask ROM (DIP28)
LS-01 through 04 - 27C1000 EPROM (DIP32)
LS-01-04 - 27C1000 EPROM (DIP32)
Measurements -
VSync 57.4444Hz
HSync 15.1432kHz

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@ -861,7 +861,7 @@ DIP Switch-1 (4 Position DIP)
Ranking | Exciting | |off| |
Background | Tender | |on | |
--------------------------------------------------
Coin Slots | separate | |off|
Coin Slots | Separate | |off|
| Common | |on |
--------------------------------------------------
Settings Upon Shipping |off|off|off|off|

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@ -62,7 +62,7 @@ Stephh's notes (based on the game M68000 code and some tests) :
- 0xff7e16.b to 0xff7e19.b = ??? (range 0x30-0x33 * 3 + 0x00) - MSDigit first - see below
- 0xff7e21.b = difficulty (range 0x00-0x02) - see below
2) addresses notes
2) Addresses notes
- I can't tell what addresses 0xff7r12.l and 0xff7e16.l are supposed to be designed for :
they are written once at the beginning of each level (code at 0x1a9030) but I haven't found

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@ -132,7 +132,7 @@ Notes:
H - 12 pin connector for power input
J - 15 pin connector
G - 22-way edge connector
B31-12 through B31-17 - PALs
B31-12 to B31-17 - PALs
K9100162A
@ -174,8 +174,8 @@ OBJECT BOARD
| MB81461 MB81461 MB81461 MB81461 |
|--------------------------------------------------------------|
Notes:
B31-04 through 06 - 234000 mask ROM (DIP40)
B31-18 through 24 - PALs
B31-04 to 06 - 234000 mask ROM (DIP40)
B31-18 to 24 - PALs
MB81461 - 64kx4 dual-port DRAM (ZIP24)
TMM2064 - 8kx8 SRAM (DIP28)

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@ -116,18 +116,18 @@ Notes:
JP9 - 64M O O-O 32M&16M
JP10 - 64M&32M O-O O 16M
JP11 - 64M O O-O 32M&16M
JP12 - through O-O O SP
JP13 - through O-O O SP
JP12 - through O-O O SP
JP13 - through O-O O SP
JP14 - WDT O O
JP15 - MONO O-O O SURR
JP16 - HIGH O O O MID (N/C LOW)
CN1 through CN3 - D-SUB Connectors
CN1 to CN3 - D-SUB Connectors
CN4 - Multi-pin Connector for Network PCB
CN5 - DIN96 connector (pads only, not used)
CN6 - DIN96 joining connector to lower PCB
CN7 - Multi-pin connector (pads only, not used)
CN9 through CN13 - Power Connectors
CN14 through CN17 - RCA Stereo Audio OUT
CN9 to CN13 - Power Connectors
CN14 to CN17 - RCA Stereo Audio OUT
CN18 - RCA Mono Audio OUT
CN19 - USB Connector

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@ -135,7 +135,7 @@ Stephh's notes (based on the game M68000 code and some tests) :
- Game name : "RASTAN SAGA"
- Notice screen
- In "demo mode", you get no scrolling screen with what the various items do
- beginning screen when you start a new game
- Beginning screen when you start a new game
- Different messages between levels
- Message after beating level 6 boss
- Copyright message on scrolling credits screen

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@ -189,7 +189,7 @@ Model No. S2000C SALTIRE
+-+ | VGA | H3 |
+----------+-------+-------------------------------+
basically the same as the VCG-1 SALTIRE below, but the
Basically the same as the VCG-1 SALTIRE below, but the
XILINX chip is socketted and no H1 or H2 connector.
------------------------------------------------------------

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@ -67,7 +67,7 @@ Notes:
ROMs
----
32J1 through 32J8 - 16M mask ROM (DIP42)
32J1 to 32J8 - 16M mask ROM (DIP42)
32A12/13/14/J15 - 27C2001 EPROM (DIP32)
32J9 - 4M mask ROM (DIP32)
32J10 - 27C512 EPROM (DIP28)

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@ -384,15 +384,15 @@ Notes:
TD62003 : PNP 50V 0.5A Quad Darlinton Switch (for driving coin meters)
D633 : Si NPN POWER transistor used in 68k reset circuit (TIP122 compatible)
ROMs:
C09-12 through C09-14 - MB834100
C09-12 to C09-14 - MB834100
C09-07 - HN62404
C09-32 through C09-33 - AM27C512
C09-30 through C09-31 - TC571000
C09-32 to C09-33 - AM27C512
C09-30 to C09-31 - TC571000
C09-38 and C09-36 - TC571000
C09-23 - AM27S21
C09-22 and C09-26 - MMI PAL16L8B
C09-21 and
C09-24 through C09-25 - MMI PAL20L8B
C09-24 to C09-25 - MMI PAL20L8B
PINOUT CONNECTOR D (Note: All pinouts typed from an original Taito document)
------------------
@ -468,9 +468,9 @@ VIDEO PCB K1100491A J1100210A
Notes:
ROMs:
C09-01 through C09-05 - 234000
C09-01 to C09-05 - 234000
C09-06 - HN62404
C09-17 through C09-18 - MMI 63S441
C09-17 to C09-18 - MMI 63S441
C09-19 - MMI PAL16L8B
C09-20 - AM27S21

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@ -1400,7 +1400,7 @@ Also printed on the board near the ROMs is....
Notes:
CAT702 - protection chip labelled 'TW02' (DIP20)
JGUN1, JGUN2 - Connector for optional gun controllers
ROMs U14 through U17 - 27C040 EPROM
ROMs U14 to U17 - 27C040 EPROM
DS1232S - Dallas DS1232 (reset IC, SOIC16)
VT83C461 - VIA VT83C461 (IDE Hard Drive controller, QFP100)
EPM7160ELC84 - Altera MAX EPM7160ELC84-10 (PLCC84 CPLD, labelled 'PSX PiD 9-19-96 2FDA')
@ -1571,7 +1571,7 @@ Notes:
CAT702 - protection chip labelled 'ET02' (DIP20)
ROMs 217, 216 & 326 - surface mounted 32MBit MASK ROM (SOP44)
ROMs 042 & 046 - 27C2001 EPROM
ROMs 212 through 215 - 27C4001 EPROM
ROMs 212 to 215 - 27C4001 EPROM
MAIN_IF2 & SUB_IF2 - AMD Mach211 CPLD (PLCC44)
M628032 - 32K x8 SRAM, equivalent to 62256 SRAM (SOJ28)
68000 clock - 12MHz
@ -1930,10 +1930,10 @@ Notes:
U35, U36 - 27C080 DIP32 EPROM
U21, U22 - Unpopulated positions for DIP32 EPROM
U6, U20 - Unpopulated position for SOP44 MaskROM
U3 through U6 \
U17 through U19 | surface mounted 32MBit SOP44 MaskROM
U28 through U31 |
U41 through U44 /
U3 to U6 \
U17 to U19 | surface mounted 32MBit SOP44 MaskROM
U28 to U31 |
U41 to U44 /
Sound Board

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@ -411,7 +411,7 @@ READ16_HANDLER( scc68070_periphs_r )
switch(offset)
{
// interrupts: 80001001
// Interrupts: 80001001
case 0x1000/2: // LIR priority level
return scc68070->lir;
@ -703,7 +703,7 @@ WRITE16_HANDLER( scc68070_periphs_w )
switch(offset)
{
// interrupts: 80001001
// Interrupts: 80001001
case 0x1000/2: // LIR priority level
verboselog(space->machine(), 2, "scc68070_periphs_w: LIR: %04x & %04x\n", data, mem_mask);
COMBINE_DATA(&scc68070->lir);

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@ -12,7 +12,7 @@
Convert the color PROMs into a more useable format.
Break through has one 256x8 and one 256x4 palette PROMs.
Break Thru has one 256x8 and one 256x4 palette PROMs.
I don't know for sure how the palette PROMs are connected to the RGB
output, but it's probably the usual:

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@ -310,7 +310,7 @@ static void draw_sprites(running_machine &machine, bitmap_t *bitmap, const recta
pal&=0xf;
}
// accommodate for chaining and flipping
// Accommodate for chaining and flipping
if(xflip)
{
xinc=-(int)(16.0f*foomX);

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@ -4299,9 +4299,9 @@ void tc0150rod_draw( device_t *device, bitmap_t *bitmap, const rectangle *clipre
// ChaseHQ glitches on right when road rejoins:
// 0a6 and lower => 0x5ff 5fe etc.
// 35c => 575 right road edge wraps back onto other side of screen
// 5ff-54a through 5ff-331
// b6 through 2ce
// 2a6 through 0 through 5a7 ??
// 5ff-54a through 5ff-331
// b6 through 2ce
// 2a6 through 0 through 5a7 ??
left_edge = road_center - (roadb_clipl & 0x3ff); /* start pixel for left edge */
right_edge = road_center + 1 + (roadb_clipr & 0x3ff); /* start pixel for right edge */