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igs/pgm.cpp: Use logmacro.h for logging. (#10762)

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cam900 2022-12-31 22:32:11 +09:00 committed by GitHub
parent ba33a1666a
commit 73fcf8e58e
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5 changed files with 51 additions and 44 deletions
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23
src/mame/igs/pgm.cpp
View File

@ -205,8 +205,14 @@ Notes:
#include "screen.h"
#include "speaker.h"
#define PGMLOGERROR 0
#define LOG_Z80 (1U << 1)
#define LOG_ALL (LOG_Z80)
#define VERBOSE (0)
#include "logmacro.h"
#define LOGZ80(...) LOGMASKED(LOG_Z80, __VA_ARGS__)
u16 pgm_state::videoram_r(offs_t offset)
{
@ -248,14 +254,12 @@ void pgm_state::z80_ram_w(offs_t offset, u8 data)
m_z80_mainram[offset] = data;
if (pc != 0xf12 && pc != 0xde2 && pc != 0x100c50 && pc != 0x100b20)
if (PGMLOGERROR)
logerror("Z80: write %04x, %02x (%06x)\n", offset, data, m_maincpu->pc());
LOGZ80("Z80: write %04x, %02x (%06x)\n", offset, data, m_maincpu->pc());
}
void pgm_state::z80_reset_w(offs_t offset, u16 data, u16 mem_mask)
{
if (PGMLOGERROR)
logerror("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, m_maincpu->pc());
LOGZ80("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, m_maincpu->pc());
if (data == 0x5050)
{
@ -273,22 +277,19 @@ void pgm_state::z80_reset_w(offs_t offset, u16 data, u16 mem_mask)
void pgm_state::z80_ctrl_w(offs_t offset, u16 data, u16 mem_mask)
{
if (PGMLOGERROR)
logerror("Z80: ctrl %04x @ %04x (%06x)\n", data, mem_mask, m_maincpu->pc());
LOGZ80("Z80: ctrl %04x @ %04x (%06x)\n", data, mem_mask, m_maincpu->pc());
}
void pgm_state::m68k_l1_w(u8 data)
{
if (PGMLOGERROR)
logerror("SL 1 m68.w %02x (%06x) IRQ\n", data, m_maincpu->pc());
LOGZ80("SL 1 m68.w %02x (%06x) IRQ\n", data, m_maincpu->pc());
m_soundlatch->write(data);
m_soundcpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
void pgm_state::z80_l3_w(u8 data)
{
if (PGMLOGERROR)
logerror("SL 3 z80.w %02x (%04x)\n", data, m_soundcpu->pc());
LOGZ80("SL 3 z80.w %02x (%04x)\n", data, m_soundcpu->pc());
m_soundlatch3->write(data);
}

1
src/mame/igs/pgm.h
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@ -22,7 +22,6 @@
#include "emupal.h"
#include "tilemap.h"
#define PGMARM7LOGERROR 0
class pgm_state : public driver_device
{

19
src/mame/igs/pgmprot_igs027a_type1.cpp
View File

@ -62,6 +62,13 @@
#include "screen.h"
#define LOG_PROT (1U << 1)
#define LOG_ALL (LOG_PROT)
#define VERBOSE (0)
#include "logmacro.h"
#define LOGPROT(...) LOGMASKED(LOG_PROT, __VA_ARGS__)
/**************************** EMULATION *******************************/
/* used by photoy2k, kovsh */
@ -100,8 +107,7 @@ u16 pgm_arm_type1_state::arm7_type1_ram_r(offs_t offset, u16 mem_mask)
{
const u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
if (PGMARM7LOGERROR)
logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) %s\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, machine().describe_context());
LOGPROT("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) %s\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, machine().describe_context());
return share16[BYTE_XOR_LE(offset << 1)];
}
@ -109,8 +115,7 @@ void pgm_arm_type1_state::arm7_type1_ram_w(offs_t offset, u16 data, u16 mem_mask
{
u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
if (PGMARM7LOGERROR)
logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) %s\n", BYTE_XOR_LE(offset), data, mem_mask, machine().describe_context());
LOGPROT("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) %s\n", BYTE_XOR_LE(offset), data, mem_mask, machine().describe_context());
COMBINE_DATA(&share16[BYTE_XOR_LE(offset << 1)]);
}
@ -130,15 +135,13 @@ u32 pgm_arm_type1_state::arm7_type1_exrom_r()
u32 pgm_arm_type1_state::arm7_type1_shareram_r(offs_t offset, u32 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) %s\n", offset << 2, m_arm7_shareram[offset], mem_mask, machine().describe_context());
LOGPROT("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) %s\n", offset << 2, m_arm7_shareram[offset], mem_mask, machine().describe_context());
return m_arm7_shareram[offset];
}
void pgm_arm_type1_state::arm7_type1_shareram_w(offs_t offset, u32 data, u32 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) %s\n", offset << 2, data, mem_mask, machine().describe_context());
LOGPROT("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) %s\n", offset << 2, data, mem_mask, machine().describe_context());
COMBINE_DATA(&m_arm7_shareram[offset]);
}

32
src/mame/igs/pgmprot_igs027a_type2.cpp
View File

@ -36,49 +36,51 @@
#include "pgm.h"
#include "pgmprot_igs027a_type2.h"
#define LOG_PROT (1U << 1)
#define LOG_ALL (LOG_PROT)
#define VERBOSE (0)
#include "logmacro.h"
#define LOGPROT(...) LOGMASKED(LOG_PROT, __VA_ARGS__)
u32 pgm_arm_type2_state::arm7_latch_arm_r(offs_t offset, u32 mem_mask)
{
if (!machine().side_effects_disabled())
m_prot->set_input_line(ARM7_FIRQ_LINE, CLEAR_LINE ); // guess
if (PGMARM7LOGERROR)
logerror("%s ARM7: Latch read: %08x (%08x)\n", machine().describe_context(), m_kov2_latchdata_68k_w, mem_mask);
LOGPROT("%s ARM7: Latch read: %08x (%08x)\n", machine().describe_context(), m_kov2_latchdata_68k_w, mem_mask);
return m_kov2_latchdata_68k_w;
}
void pgm_arm_type2_state::arm7_latch_arm_w(offs_t offset, u32 data, u32 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("%s ARM7: Latch write: %08x (%08x)\n", machine().describe_context(), data, mem_mask);
LOGPROT("%s ARM7: Latch write: %08x (%08x)\n", machine().describe_context(), data, mem_mask);
COMBINE_DATA(&m_kov2_latchdata_arm_w);
}
u32 pgm_arm_type2_state::arm7_shareram_r(offs_t offset, u32 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("%s ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x)\n", machine().describe_context(), offset << 2, m_arm7_shareram[offset], mem_mask);
LOGPROT("%s ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x)\n", machine().describe_context(), offset << 2, m_arm7_shareram[offset], mem_mask);
return m_arm7_shareram[offset];
}
void pgm_arm_type2_state::arm7_shareram_w(offs_t offset, u32 data, u32 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("%s ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x)\n", machine().describe_context(), offset << 2, data, mem_mask);
LOGPROT("%s ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x)\n", machine().describe_context(), offset << 2, data, mem_mask);
COMBINE_DATA(&m_arm7_shareram[offset]);
}
u16 pgm_arm_type2_state::arm7_latch_68k_r(offs_t offset, u16 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("%s M68K: Latch read: %04x (%04x)\n", machine().describe_context(), m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask);
LOGPROT("%s M68K: Latch read: %04x (%04x)\n", machine().describe_context(), m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask);
return m_kov2_latchdata_arm_w;
}
void pgm_arm_type2_state::arm7_latch_68k_w(offs_t offset, u16 data, u16 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("%s M68K: Latch write: %04x (%04x)\n", machine().describe_context(), data & 0x0000ffff, mem_mask);
LOGPROT("%s M68K: Latch write: %04x (%04x)\n", machine().describe_context(), data & 0x0000ffff, mem_mask);
COMBINE_DATA(&m_kov2_latchdata_68k_w);
m_prot->set_input_line(ARM7_FIRQ_LINE, ASSERT_LINE ); // guess
@ -88,8 +90,7 @@ u16 pgm_arm_type2_state::arm7_ram_r(offs_t offset, u16 mem_mask)
{
const u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
if (PGMARM7LOGERROR)
logerror("%s M68K: ARM7 Shared RAM Read: %04x = %04x (%08x)\n", machine().describe_context(), BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask);
LOGPROT("%s M68K: ARM7 Shared RAM Read: %04x = %04x (%08x)\n", machine().describe_context(), BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask);
return share16[BYTE_XOR_LE(offset)];
}
@ -97,8 +98,7 @@ void pgm_arm_type2_state::arm7_ram_w(offs_t offset, u16 data, u16 mem_mask)
{
u16 *share16 = reinterpret_cast<u16 *>(m_arm7_shareram.target());
if (PGMARM7LOGERROR)
logerror("%s M68K: ARM7 Shared RAM Write: %04x = %04x (%04x)\n", machine().describe_context(), BYTE_XOR_LE(offset), data, mem_mask);
LOGPROT("%s M68K: ARM7 Shared RAM Write: %04x = %04x (%04x)\n", machine().describe_context(), BYTE_XOR_LE(offset), data, mem_mask);
COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
}

20
src/mame/igs/pgmprot_igs027a_type3.cpp
View File

@ -47,6 +47,14 @@
#include "pgm.h"
#include "pgmprot_igs027a_type3.h"
#define LOG_PROT (1U << 1)
#define LOG_ALL (LOG_PROT)
#define VERBOSE (0)
#include "logmacro.h"
#define LOGPROT(...) LOGMASKED(LOG_PROT, __VA_ARGS__)
void pgm_arm_type3_state::svg_arm7_ram_sel_w(u32 data)
{
// printf("svg_arm7_ram_sel_w %08x\n", data);
@ -95,31 +103,27 @@ void pgm_arm_type3_state::svg_68k_nmi_w(u16 data)
void pgm_arm_type3_state::svg_latch_68k_w(offs_t offset, u16 data, u16 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("M68K: Latch write: %04x (%04x) %s\n", data & 0x0000ffff, mem_mask, machine().describe_context());
LOGPROT("M68K: Latch write: %04x (%04x) %s\n", data & 0x0000ffff, mem_mask, machine().describe_context());
COMBINE_DATA(&m_svg_latchdata_68k_w);
}
u16 pgm_arm_type3_state::svg_latch_68k_r(offs_t offset, u16 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("M68K: Latch read: %04x (%04x) %s\n", m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, machine().describe_context());
LOGPROT("M68K: Latch read: %04x (%04x) %s\n", m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, machine().describe_context());
return m_svg_latchdata_arm_w;
}
u32 pgm_arm_type3_state::svg_latch_arm_r(offs_t offset, u32 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("ARM7: Latch read: %08x (%08x) %s\n", m_svg_latchdata_68k_w, mem_mask, machine().describe_context());
LOGPROT("ARM7: Latch read: %08x (%08x) %s\n", m_svg_latchdata_68k_w, mem_mask, machine().describe_context());
return m_svg_latchdata_68k_w;
}
void pgm_arm_type3_state::svg_latch_arm_w(offs_t offset, u32 data, u32 mem_mask)
{
if (PGMARM7LOGERROR)
logerror("ARM7: Latch write: %08x (%08x) %s\n", data, mem_mask, machine().describe_context());
LOGPROT("ARM7: Latch write: %08x (%08x) %s\n", data, mem_mask, machine().describe_context());
COMBINE_DATA(&m_svg_latchdata_arm_w);
}