mirror of
https://github.com/holub/mame
synced 2025-05-29 17:13:05 +03:00
r9751.cpp: Clean up firstcpu usage (nw)
This commit is contained in:
AJR
parent
84cdb0e5af
commit
74d56022ae
@ -228,7 +228,7 @@ READ32_MEMBER( r9751_state::r9751_mmio_5ff_r )
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if(TRACE_DEVICE)
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if(((offset << 2) & 0xFF) == TRACE_DEVICE * 4)
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logerror("(!) Device Read: 0x%02X - PC: %08X Register: %08X\n", TRACE_DEVICE, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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logerror("(!) Device Read: 0x%02X - PC: %08X Register: %08X\n", TRACE_DEVICE, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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switch(offset << 2)
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{
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@ -237,7 +237,7 @@ READ32_MEMBER( r9751_state::r9751_mmio_5ff_r )
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return 0x10;
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case 0x3024: /* HDD SCSI command completed successfully */
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data = 0x1;
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if(TRACE_HDC) logerror("SCSI HDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_HDC) logerror("SCSI HDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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return data;
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/* SMIOC region (0x98, device 26) */
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case 0x0898: /* Serial status or DMA status */
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@ -256,10 +256,10 @@ READ32_MEMBER( r9751_state::r9751_mmio_5ff_r )
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return 0;
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case 0x30B0: /* FDD command completion status */
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data = (m_pdc->reg_p5 << 8) + m_pdc->reg_p4;
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if(TRACE_FDC && data != 0) logerror("--- SCSI FDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_FDC && data != 0) logerror("--- SCSI FDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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return data;
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default:
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Unknown read address: %08X PC: %08X\n", offset << 2 | 0x5FF00000, machine().firstcpu->pc());
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Unknown read address: %08X PC: %08X\n", offset << 2 | 0x5FF00000, m_maincpu->pc());
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return 0;
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}
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}
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@ -268,36 +268,36 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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{
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uint8_t data_b0, data_b1;
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//logerror("(!!) 0x5ff Register Write - PC: %08X Register: %08X Data: %08X\n", machine().firstcpu->pc(), offset << 2 | 0x5FF00000, data);
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//logerror("(!!) 0x5ff Register Write - PC: %08X Register: %08X Data: %08X\n", m_maincpu->pc(), offset << 2 | 0x5FF00000, data);
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if(TRACE_DEVICE)
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if(((offset << 2) & 0xFF) == TRACE_DEVICE * 4)
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logerror("(!) Device Write: 0x%02X - PC: %08X Register: %08X Data: %08X\n", TRACE_DEVICE, machine().firstcpu->pc(), offset << 2 | 0x5FF00000, data);
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logerror("(!) Device Write: 0x%02X - PC: %08X Register: %08X Data: %08X\n", TRACE_DEVICE, m_maincpu->pc(), offset << 2 | 0x5FF00000, data);
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/* Unknown mask */
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if (mem_mask != 0xFFFFFFFF)
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0x5FF00000, machine().firstcpu->pc());
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0x5FF00000, m_maincpu->pc());
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switch(offset << 2)
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{
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/* PDC HDD region (0x24, device 9 */
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case 0x0224: /* HDD SCSI read command */
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if(TRACE_HDC) logerror("@@@ HDD Command: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_HDC) logerror("@@@ HDD Command: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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break;
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case 0x8024: /* HDD SCSI read command */
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if(TRACE_HDC) logerror("@@@ HDD Command: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_HDC) logerror("@@@ HDD Command: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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break;
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case 0xC024: /* HDD SCSI read command */
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if(TRACE_HDC) logerror("@@@ HDD Command: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_HDC) logerror("@@@ HDD Command: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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break;
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/* SMIOC region (0x98, device 26) - Output */
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case 0x0298:
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m_serial_status = data;
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if(TRACE_SMIOC) logerror("Serial status: %08X PC: %08X\n", data, machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial status: %08X PC: %08X\n", data, m_maincpu->pc());
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break;
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case 0x0270:
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m_serial_status2 = data;
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if(TRACE_SMIOC) logerror("Serial status2: %08X PC: %08X\n", data, machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial status2: %08X PC: %08X\n", data, m_maincpu->pc());
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break;
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case 0x4090:
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case 0x4098: /* Serial DMA Command */
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@ -306,19 +306,19 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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case 0x1000:
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m_serial_status = 0x0140;
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m_serial_status2 = 0x0140;
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if(TRACE_SMIOC) logerror("Serial DMA command 0x1000 PC: %08X\n", machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial DMA command 0x1000 PC: %08X\n", m_maincpu->pc());
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break;
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case 0x4100: /* Send byte to serial */
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for(int i = 0; i < smioc_dma_w_length; i++)
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{
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if(TRACE_SMIOC) logerror("Serial byte: %02X PC: %08X\n", m_mem->read_word(smioc_out_addr+i*2), machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial byte: %02X PC: %08X\n", m_mem->read_word(smioc_out_addr+i*2), m_maincpu->pc());
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m_terminal->write(space,0,m_mem->read_word(smioc_out_addr+i*2));
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}
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m_serial_status = 0x4140;
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break;
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case 0x4200: /* Write XON into serial DMA input register (0x5FF0809C) memory location */
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m_maincpu->space(AS_PROGRAM).write_byte(smioc_in_addr,0x11);
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if(TRACE_SMIOC) logerror("Serial DMA command 0x4200 (XON) PC: %08X\n", machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial DMA command 0x4200 (XON) PC: %08X\n", m_maincpu->pc());
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m_serial_status = 0x4440;
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break;
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default:
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@ -329,39 +329,39 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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case 0xC098: /* Serial DMA output address */
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//smioc_out_addr = data * 2;
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smioc_out_addr = (smioc_dma_bank & 0x7FFFF800) | ((data&0x3FF)<<1);
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if(TRACE_SMIOC) logerror("Serial output address: %08X PC: %08X\n", smioc_out_addr, machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial output address: %08X PC: %08X\n", smioc_out_addr, m_maincpu->pc());
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break;
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/* SMIOC region (0x9C, device 27) - Input */
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case 0x409C: /* Serial DMA write length */
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smioc_dma_w_length = (~data+1) & 0xFFFF;
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if(TRACE_SMIOC) logerror("Serial DMA write length: %08X PC: %08X\n", smioc_dma_w_length, machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial DMA write length: %08X PC: %08X\n", smioc_dma_w_length, m_maincpu->pc());
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if(smioc_dma_w_length > 0x400) smioc_dma_w_length = 0x400;
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break;
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case 0x809C: /* Serial DMA input address */
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smioc_in_addr = (smioc_dma_bank & 0x7FFFF800) | ((data&0x3FF)<<1);
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if(TRACE_SMIOC) logerror("Serial input address: %08X PC: %08X\n", smioc_out_addr, machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial input address: %08X PC: %08X\n", smioc_out_addr, m_maincpu->pc());
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break;
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case 0xC09C: /* Serial DMA read length */
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smioc_dma_r_length = (~data+1) & 0xFFFF;
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if(TRACE_SMIOC) logerror("Serial DMA read length: %08X PC: %08X\n", smioc_dma_r_length, machine().firstcpu->pc());
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if(TRACE_SMIOC) logerror("Serial DMA read length: %08X PC: %08X\n", smioc_dma_r_length, m_maincpu->pc());
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if(smioc_dma_r_length > 0x400) smioc_dma_r_length = 0x400;
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break;
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/* PDC FDD region (0xB0, device 44 */
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case 0x01B0: /* FDD SCSI read command */
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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break;
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case 0x02B0: /* FDD SCSI read command */
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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break;
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case 0x04B0: /* FDD RESET PDC */
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if(TRACE_FDC) logerror("PDC RESET, PC: %08X DATA: %08X\n", machine().firstcpu->pc(),data);
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if(TRACE_FDC) logerror("PDC RESET, PC: %08X DATA: %08X\n", m_maincpu->pc(), data);
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m_pdc->reset();
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break;
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case 0x08B0: /* FDD SCSI read command */
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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break;
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case 0x41B0: /* Unknown - Probably old style commands */
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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if(TRACE_FDC) logerror("--- FDD Command: %08X, From: %08X, Register: %08X\n", data, m_maincpu->pc(), offset << 2 | 0x5FF00000);
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/* Clear FDD Command completion status 0x5FF030B0 (PDC 0x4, 0x5) */
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m_pdc->reg_p4 = 0;
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@ -377,7 +377,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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case 0xC0B0:
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case 0xC1B0: /* fdd_dest_address register */
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fdd_dest_address = data << 1;
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if(TRACE_FDC) logerror("--- FDD destination address: %08X PC: %08X Register: %08X (A6+4): %08X\n", (fdd_dma_bank & 0x7FFFF800) + (fdd_dest_address&0x3FFFF), machine().firstcpu->pc(), offset << 2 | 0x5FF00000, debug_a6());
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if(TRACE_FDC) logerror("--- FDD destination address: %08X PC: %08X Register: %08X (A6+4): %08X\n", (fdd_dma_bank & 0x7FFFF800) + (fdd_dest_address&0x3FFFF), m_maincpu->pc(), offset << 2 | 0x5FF00000, debug_a6());
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data_b0 = data & 0xFF;
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data_b1 = (data & 0xFF00) >> 8;
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m_pdc->reg_p6 = data_b0;
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@ -396,7 +396,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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m_pdc->reg_p5 = 0;
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/* Send FDD SCSI command location address to PDC 0x2, 0x3 */
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if(TRACE_FDC) logerror("--- FDD command address: %08X PC: %08X Register: %08X (A6+4): %08X A4: %08X (A5): %08X (A5+20): %08X\n", (fdd_dma_bank & 0x7FFFF800) + ((data << 1)&0x3FFFF), machine().firstcpu->pc(), offset << 2 | 0x5FF00000, debug_a6(), ptr_m68000->state_int(M68K_A4), debug_a5(), debug_a5_20());
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if(TRACE_FDC) logerror("--- FDD command address: %08X PC: %08X Register: %08X (A6+4): %08X A4: %08X (A5): %08X (A5+20): %08X\n", (fdd_dma_bank & 0x7FFFF800) + ((data << 1)&0x3FFFF), m_maincpu->pc(), offset << 2 | 0x5FF00000, debug_a6(), ptr_m68000->state_int(M68K_A4), debug_a5(), debug_a5_20());
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data_b0 = data & 0xFF;
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data_b1 = (data & 0xFF00) >> 8;
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m_pdc->reg_p2 = data_b0;
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@ -422,7 +422,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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break;
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default:
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Unknown write address: %08X Data: %08X PC: %08X\n", offset << 2 | 0x5FF00000, data, machine().firstcpu->pc());
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Unknown write address: %08X Data: %08X PC: %08X\n", offset << 2 | 0x5FF00000, data, m_maincpu->pc());
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}
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}
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@ -445,20 +445,20 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_ff01_w )
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{
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/* Unknown mask */
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if (mem_mask != 0xFFFFFFFF)
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0xFF010000, machine().firstcpu->pc());
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0xFF010000, m_maincpu->pc());
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switch(offset << 2)
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{
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case 0x000C: /* FDD DMA Offset */
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fdd_dma_bank = data;
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if(TRACE_DMA) logerror("Banking register(FDD): %08X PC: %08X Data: %08X\n", offset << 2 | 0xFF010000, machine().firstcpu->pc(), data);
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if(TRACE_DMA) logerror("Banking register(FDD): %08X PC: %08X Data: %08X\n", offset << 2 | 0xFF010000, m_maincpu->pc(), data);
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return;
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case 0x0010: /* SMIOC DMA Offset */
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smioc_dma_bank = data;
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if(TRACE_DMA) logerror("Banking register(SMIOC): %08X PC: %08X Data: %08X\n", offset << 2 | 0xFF010000, machine().firstcpu->pc(), data);
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if(TRACE_DMA) logerror("Banking register(SMIOC): %08X PC: %08X Data: %08X\n", offset << 2 | 0xFF010000, m_maincpu->pc(), data);
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return;
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default:
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if(TRACE_DMA) logerror("Banking register(Unknown): %08X PC: %08X Data: %08X\n", offset << 2 | 0xFF010000, machine().firstcpu->pc(), data);
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if(TRACE_DMA) logerror("Banking register(Unknown): %08X PC: %08X Data: %08X\n", offset << 2 | 0xFF010000, m_maincpu->pc(), data);
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return;
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}
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}
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@ -483,7 +483,7 @@ READ32_MEMBER( r9751_state::r9751_mmio_ff05_r )
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return 0x80;
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default:
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data = 0;
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if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", machine().firstcpu->pc(), offset << 2 | 0xFF050000, data, mem_mask);
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if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", m_maincpu->pc(), offset << 2 | 0xFF050000, data, mem_mask);
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return data;
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}
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}
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@ -492,7 +492,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_ff05_w )
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{
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/* Unknown mask */
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if (mem_mask != 0xFFFFFFFF)
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0xFF050000, machine().firstcpu->pc());
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0xFF050000, m_maincpu->pc());
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switch(offset << 2)
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{
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@ -500,13 +500,13 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_ff05_w )
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reg_ff050004 = data;
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return;
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case 0x000C: /* CPU LED hex display indicator */
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if(TRACE_LED) logerror("\n*** LED: %02x, Instruction: %08x ***\n\n", data, machine().firstcpu->pc());
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if(TRACE_LED) logerror("\n*** LED: %02x, Instruction: %08x ***\n\n", data, m_maincpu->pc());
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return;
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case 0x0320:
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timer_32khz_last = machine().time();
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return;
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default:
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if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", machine().firstcpu->pc(), offset << 2 | 0xFF050000, data, mem_mask);
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if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", m_maincpu->pc(), offset << 2 | 0xFF050000, data, mem_mask);
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return;
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}
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}
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@ -521,7 +521,7 @@ READ32_MEMBER( r9751_state::r9751_mmio_fff8_r )
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return reg_fff80040;
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default:
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data = 0;
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if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", machine().firstcpu->pc(), offset << 2 | 0xFFF80000, data, mem_mask);
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if(TRACE_CPU_REG) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", m_maincpu->pc(), offset << 2 | 0xFFF80000, data, mem_mask);
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return data;
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}
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}
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@ -530,7 +530,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_fff8_w )
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{
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/* Unknown mask */
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if (mem_mask != 0xFFFFFFFF)
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0xFFF80000, machine().firstcpu->pc());
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logerror("Mask found: %08X Register: %08X PC: %08X\n", mem_mask, offset << 2 | 0xFFF80000, m_maincpu->pc());
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switch(offset << 2)
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{
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@ -538,7 +538,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_fff8_w )
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reg_fff80040 = data;
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return;
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default:
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if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", machine().firstcpu->pc(), offset << 2 | 0xFFF80000, data, mem_mask);
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if(TRACE_CPU_REG) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", m_maincpu->pc(), offset << 2 | 0xFFF80000, data, mem_mask);
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}
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}
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||||
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Reference in New Issue
Block a user