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https://github.com/holub/mame
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video/pc_vga_oak: add segment, aperture and basic SVGA pixel modes
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angelosa
parent
db8707f6cb
commit
74fb5a80c4
@ -4,10 +4,15 @@
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#include "emu.h"
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#include "pc_vga_oak.h"
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#define LOG_BANK (1U << 2) // extended segment regs
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#define VERBOSE (LOG_GENERAL)
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#include "logmacro.h"
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#define LOGBANK(...) LOGMASKED(LOG_BANK, __VA_ARGS__)
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DEFINE_DEVICE_TYPE(OTI111, oak_oti111_vga_device, "oti111_vga", "Oak Technologies Spitfire 64111")
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oak_oti111_vga_device::oak_oti111_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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@ -44,6 +49,9 @@ void oak_oti111_vga_device::device_reset()
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// Spitfire BIOS doesn't explicitly set IOAS at boot
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m_ioas = true;
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m_memory_size = 0x0a;
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m_oti_map_select = false;
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m_oti_aperture_mask = 0x3ffff;
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m_oak_gfx_mode = false;
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}
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void oak_oti111_vga_device::io_3bx_3dx_map(address_map &map)
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@ -127,10 +135,29 @@ void oak_oti111_vga_device::oak_map(address_map &map)
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//map(0x0f, 0x0f) Power Management Control
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//map(0x10, 0x10) Local Bus Control
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//map(0x11, 0x11) (backward-)Compatible Segment
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map(0x11, 0x11).lrw8(
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NAME([this] (offs_t offset) {
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return (svga.bank_w << 4) | (svga.bank_r & 0xf);
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOGBANK("OAK11: (backward-)Compatible Segment %02x\n", data);
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svga.bank_r = data & 0xf;
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svga.bank_w = data >> 4;
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})
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);
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//map(0x13, 0x13) ISA Bus Control
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//map(0x14, 0x14) Video Memory Mapping
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//(bit 0 -> enable linear segment)
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map(0x14, 0x14).lrw8(
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NAME([this] (offs_t offset) {
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return (m_oti_map_select << 0) | (m_oti_aperture_select << 2);
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}),
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NAME([this] (offs_t offset, u8 data) {
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// TODO: what this really selects?
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m_oti_map_select = bool(BIT(data, 0));
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m_oti_aperture_select = (data & 0x18) >> 2;
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m_oti_aperture_mask = (1 << (m_oti_aperture_select + 18)) - 1;
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LOG("OAK14: Video Memory Mapping %02x (aperture mask %08x)\n", data, m_oti_aperture_mask);
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})
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);
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//map(0x15, 0x15) Memory & MMIO Enable
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//(bit 7 -> enable MMIO)
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@ -138,18 +165,43 @@ void oak_oti111_vga_device::oak_map(address_map &map)
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//map(0x20, 0x20) Display FIFO Depth
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map(0x21, 0x21).lrw8(
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NAME([this] (offs_t offset) {
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return svga.rgb8_en << 2;
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return m_oak_gfx_mode << 2;
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOG("OAK21: Mode Select %02x\n", data);
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svga.rgb8_en = BIT(data, 2);
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m_oak_gfx_mode = BIT(data, 2);
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recompute_params();
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})
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);
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//map(0x22, 0x22) Feature Select
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//map(0x23, 0x23) Extended Read Segment
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//map(0x24, 0x24) Extended Write Segment
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//map(0x25, 0x25) Extended Common R/W Segment
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map(0x23, 0x23).lrw8(
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NAME([this] (offs_t offset) {
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return svga.bank_r & 0x7f;
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOGBANK("OAK23: Extended Read Segment %02x\n", data);
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svga.bank_r = data & 0x7f;
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})
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);
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map(0x24, 0x24).lrw8(
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NAME([this] (offs_t offset) {
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return svga.bank_w & 0x7f;
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOGBANK("OAK24: Extended Read Segment %02x\n", data);
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svga.bank_w = data & 0x7f;
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})
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);
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map(0x25, 0x25).lrw8(
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NAME([this] (offs_t offset) {
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return svga.bank_w & 0x7f;
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOGBANK("OAK25: Extended Common R/W Segment %02x\n", data);
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svga.bank_r = data & 0x7f;
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svga.bank_w = data & 0x7f;
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})
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);
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//map(0x26, 0x26) RASn Control
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//map(0x27, 0x27) CASn Control
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//map(0x28, 0x28) Refresh Control
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@ -167,7 +219,19 @@ void oak_oti111_vga_device::oak_map(address_map &map)
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vga.crtc.no_wrap = BIT(data, 0);
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})
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);
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//map(0x38, 0x38) Pixel i/f
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map(0x38, 0x38).lrw8(
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NAME([this] (offs_t offset) {
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return (m_pixel_mode & 0xf) | (m_color_swap << 4) | (m_bpp << 5);
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}),
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NAME([this] (offs_t offset, u8 data) {
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LOG("OAK38: Pixel i/f %02x\n", data);
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m_pixel_mode = data & 0xf;
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// TODO: swaps R and B guns in 16bpp / 24bpp modes
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m_color_swap = bool(BIT(data, 4));
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m_bpp = (data >> 5) & 3;
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recompute_params();
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})
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);
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//map(0x39, 0x3a) Extended Overscan Color
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//HC = Hardware Cursor
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@ -233,9 +297,80 @@ uint16_t oak_oti111_vga_device::offset()
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{
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uint16_t off = svga_device::offset();
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if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb32_en)
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return vga.crtc.offset << 4; // TODO: there must a register to control this
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if (m_oak_gfx_mode)
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return vga.crtc.offset << 4;
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else
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return off;
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}
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u8 oak_oti111_vga_device::mem_r(offs_t offset)
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{
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if (((offset & 0x10000) == 0) && m_oak_gfx_mode)
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return svga_device::mem_linear_r((offset + svga.bank_r * 0x10000) & m_oti_aperture_mask);
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return svga_device::mem_r(offset);
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}
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void oak_oti111_vga_device::mem_w(offs_t offset, uint8_t data)
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{
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if (((offset & 0x10000) == 0) && m_oak_gfx_mode)
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{
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svga_device::mem_linear_w((offset + svga.bank_w * 0x10000) & m_oti_aperture_mask, data);
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return;
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}
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svga_device::mem_w(offset, data);
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}
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void oak_oti111_vga_device::recompute_params()
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{
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u8 xtal_select = (vga.miscellaneous_output & 0x0c) >> 2;
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int xtal;
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svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb24_en = 0;
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if (m_oak_gfx_mode)
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{
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switch(m_pixel_mode)
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{
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case 0:
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// VGA mode
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break;
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case 2:
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case 4:
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svga.rgb8_en = 1;
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break;
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case 3:
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svga.rgb24_en = 1;
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break;
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case 5:
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// TODO: SciTech uses this in both 15 and 16bpp
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svga.rgb16_en = 1;
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break;
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case 7:
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svga.rgb24_en = 1;
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break;
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default:
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popmessage("pc_vga_oak: unhandled pixel mode %02x", m_pixel_mode);
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break;
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}
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}
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switch(xtal_select & 3)
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{
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case 0: xtal = XTAL(25'174'800).value(); break;
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case 1: xtal = XTAL(28'636'363).value(); break;
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// TODO: to external PLL (OTI-088 or ATT20C409 / ATT20C499)
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// gs471 seems to use former
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case 2:
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// TODO: Video Clock Reg 2 / Set C
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xtal = XTAL(25'174'800).value();
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//xtal = XTAL(50'144'xxx)
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break;
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case 3:
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// TODO: Video Clock Reg 3 / Set D
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xtal = XTAL(28'636'363).value();
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//xtal = XTAL(75'170'xxx)
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break;
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}
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recompute_params_clock(1, xtal);
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}
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@ -20,11 +20,15 @@ public:
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void ramdac_mmio_map(address_map &map);
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void oak_map(address_map &map);
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virtual uint8_t mem_r(offs_t offset) override;
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virtual void mem_w(offs_t offset, uint8_t data) override;
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protected:
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virtual void device_add_mconfig(machine_config &config) override;
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual uint16_t offset() override;
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virtual void recompute_params() override;
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virtual void io_3bx_3dx_map(address_map &map) override;
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private:
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@ -39,6 +43,13 @@ private:
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u8 m_memory_size = 0;
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u8 m_i2c_data = 0;
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u8 m_scratchpad[8]{};
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bool m_oak_gfx_mode = false;
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bool m_oti_map_select = false;
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u8 m_oti_aperture_select = 0;
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u32 m_oti_aperture_mask = 0x3ffff;
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u8 m_pixel_mode = 0;
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bool m_color_swap = false;
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u8 m_bpp = 0;
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};
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DECLARE_DEVICE_TYPE(OTI111, oak_oti111_vga_device)
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