mirror of
https://github.com/holub/mame
synced 2025-04-20 15:32:45 +03:00
i82586: functional, ~90% complete (#2498)
* i82586: functional, ~90% complete * added dumping of 82586 configuration * i82586: state save * Changed address handling and filtering.
This commit is contained in:
Patrick Mackinlay
Vas Crabb
parent
3e60ab4a04
commit
754240e3b7
File diff suppressed because it is too large
Load Diff
@ -15,22 +15,236 @@ class i82586_base_device :
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public device_network_interface
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{
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public:
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enum scb_mask
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{
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T = 0x00000008, // throttle timers loaded
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RUS = 0x000000f0, // ru status
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CUS = 0x00000700, // cu status
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RNR = 0x00001000, // ru left ready state
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CNA = 0x00002000, // cu left active state
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FR = 0x00004000, // ru finished receiving a frame
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CX = 0x00008000, // cu finished executing a command with its interrupt bit set
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RUC = 0x00700000, // ru command
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RESET = 0x00800000, // reset chip (same as hardware reset)
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CUC = 0x07000000, // cu command
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ACK_RNR = 0x10000000, // acknowledge ru became became not ready
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ACK_CNA = 0x20000000, // acknowledge cu became not active
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ACK_FR = 0x40000000, // acknowledge ru received a frame
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ACK_CX = 0x80000000 // acknowledge cu completed an action command
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};
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enum scb_cu_command
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{
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CUC_NOP = 0x00000000, // no operation
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CUC_START = 0x01000000, // start execution of first command on cbl
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CUC_RESUME = 0x02000000, // resume execution of cu
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CUC_SUSPEND = 0x03000000, // suspend execution after current command
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CUC_ABORT = 0x04000000, // abort current command immediately
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CUC_THROTTLE_D = 0x05000000, // load throttle timers after next terminal count
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CUC_THROTTLE_I = 0x06000000 // load and restart throttle timers immediately
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};
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enum cu_state : u8
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{
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CU_IDLE = 0x0, // not executing, not associated with command, initial state
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CU_SUSPENDED = 0x1, // not executing, associated with command
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CU_ACTIVE = 0x2 // executing, associated with command
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};
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enum scb_ru_command
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{
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RUC_NOP = 0x00000000, // no operation
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RUC_START = 0x00100000, // start reception of frames
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RUC_RESUME = 0x00200000, // resume frame reception
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RUC_SUSPEND = 0x00300000, // suspend frame reception
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RUC_ABORT = 0x00400000 // abort receiver operation immediately
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};
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enum ru_state : u8
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{
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RU_IDLE = 0x0, // no resources, discarding frames, initial state
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RU_SUSPENDED = 0x1, // has resources, discarding frames
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RU_NR = 0x2, // no resources, discarding frames, accumulating statistics
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RU_READY = 0x4, // has resources, storing frames
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RU_NR_RFD = 0xa, // no receive frame descriptor resources (not 82586 mode)
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RU_NR_RBD = 0xc // no receive block descriptor resources (not 82586 mode)
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};
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enum cu_cb_cs_mask
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{
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CB_MAXCOL = 0x00000007, // number of collisions (82596 only)
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CB_A = 0x00001000, // command aborted
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CB_OK = 0x00002000, // error free completion
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CB_B = 0x00004000, // busy executing command
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CB_C = 0x00008000, // command completed
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CB_CMD = 0x00070000, // command operation code
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CB_NC = 0x00100000, // no crc insertion (82596 only)
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CB_SF = 0x00080000, // simplified mode (82596 only)
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CB_I = 0x20000000, // interrupt after completion
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CB_S = 0x40000000, // suspend after completion
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CB_EL = 0x80000000 // end of command list
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};
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enum cu_cb_command
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{
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CB_NOP = 0x00000000, // no operation
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CB_IASETUP = 0x00010000, // individual address setup
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CB_CONFIGURE = 0x00020000, // configure
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CB_MCSETUP = 0x00030000, // multicast setup
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CB_TRANSMIT = 0x00040000, // transmit
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CB_TDREFLECT = 0x00050000, // time domain reflectometer
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CB_DUMP = 0x00060000, // dump
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CB_DIAGNOSE = 0x00070000 // diagnose
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};
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enum cu_transmit_count_mask
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{
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TB_COUNT = 0x3fff,
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TB_EOF = 0x8000
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};
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enum cu_tdreflect_mask
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{
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TDR_TIME = 0x07ff, // time until echo
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TDR_ET_SRT = 0x1000, // short circuit
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TDR_ET_OPN = 0x2000, // no termination
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TDR_XCVR_PRB = 0x4000, // transceiver problem
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TDR_LNK_OK = 0x8000 // no link problem
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};
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enum ru_rfd_cs_mask
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{
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RFD_S_COLLISION = 0x00000001, // receive collision
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RFD_S_MULTICAST = 0x00000002, // multicast address
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RFD_S_TRUNCATED = 0x00000020, // frame truncated
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RFD_S_EOP = 0x00000040, // no eop
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RFD_S_SHORT = 0x00000080, // frame too short
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RFD_S_OVERRUN = 0x00000100, // dma overrun
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RFD_S_BUFFER = 0x00000200, // no buffer
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RFD_S_ALIGN = 0x00000400, // alignment error
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RFD_S_CRC = 0x00000800, // crc error
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RFD_S_LENGTH = 0x00001000, // length error
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RFD_ERROR_82586 = 0x00000fc0, // 82586 error bits
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RFD_ERROR = 0x00001fe1, // everything except multicast
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RFD_OK = 0x00002000, // frame received successfully
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RFD_B = 0x00004000, // busy receiving frame
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RFD_C = 0x00008000, // frame reception completed
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RFD_SF = 0x00080000, // simplified/flexible mode
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RFD_S = 0x40000000, // suspend after receive
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RFD_EL = 0x80000000 // end of receive frame list
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};
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enum ru_receive_count_mask
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{
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RB_COUNT = 0x3fff, // actual count
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RB_F = 0x4000, // buffer used
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RB_EOF = 0x8000 // end of frame
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};
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enum ru_receive_size_mask
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{
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RB_SIZE = 0x3fff, // receive buffer size
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RB_P = 0x4000, // rbd prefetched (82596 only)
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RB_EL = 0x8000 // end of rbd list
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};
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static const u32 SCP_ADDRESS = 0x00fffff4; // the default value of the system configuration pointer
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static const u32 TBD_EMPTY = 0x0000ffff; // FIXME: datasheet says this field should be "all 1's", but InterPro sets only lower 16 bits (in linear mode)
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static const u32 RBD_EMPTY = 0x0000ffff;
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static const u32 FCS_RESIDUE = 0xdebb20e3; // the residue after computing the fcs over a complete frame (including fcs)
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template <class Object> static devcb_base &static_set_out_irq_callback(device_t &device, Object &&cb) { return downcast<i82586_base_device &>(device).m_out_irq.set_callback(std::forward<Object>(cb)); }
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DECLARE_WRITE_LINE_MEMBER(ca);
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virtual void recv_cb(u8 *buf, int length) override;
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protected:
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i82586_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, u8 datawidth, u8 addrwidth);
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i82586_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian, u8 datawidth, u8 addrwidth);
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// standard device_* overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
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virtual space_config_vector memory_space_config() const override;
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// setup and scb
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virtual void initialise() = 0;
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virtual void process_scb();
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virtual void update_scb();
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// command unit
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virtual void cu_execute();
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virtual bool cu_iasetup() = 0;
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virtual bool cu_configure() = 0;
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virtual bool cu_mcsetup() = 0;
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virtual bool cu_transmit(u32 command) = 0;
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virtual bool cu_tdreflect() = 0;
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virtual bool cu_dump() = 0;
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// receive unit
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virtual bool address_filter(u8 *mac);
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virtual void ru_execute(u8 *buf, int length) = 0;
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// helpers
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void set_irq(bool irq);
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virtual u32 address(u32 base, int offset, int address) = 0;
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virtual u32 address(u32 base, int offset, int address, u16 empty) = 0;
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static u32 compute_crc(u8 *buf, int length, bool crc32);
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static u64 address_hash(u8 *buf, int length);
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int fetch_bytes(u8 *buf, u32 src, int length);
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int store_bytes(u32 dst, u8 *buf, int length);
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void dump_bytes(u8 *buf, int length);
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// device_* members
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const address_space_config m_space_config;
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address_space *m_space;
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devcb_write_line m_out_irq;
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static const device_timer_id CU_TIMER = 0;
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static const device_timer_id RU_TIMER = 1;
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emu_timer *m_cu_timer;
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emu_timer *m_ru_timer;
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// interrupt state
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bool m_cx; // command executed (with interrupt)
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bool m_fr; // frame received
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bool m_cna; // command unit became inactive
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bool m_rnr; // receive unit became not ready
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bool m_irq_state;
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bool m_initialised;
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// receive/command unit state
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cu_state m_cu_state; // command unit state
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ru_state m_ru_state; // receive unit state
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u32 m_scp_address; // system configuration pointer
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u32 m_scb_base; // system control block base (segmented modes)
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u32 m_scb_address; // system control block address (linear mode)
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u32 m_scb_cs; // current scb command and status
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u32 m_cba; // current command block address
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u32 m_rfd; // current receive frame descriptor address
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u64 m_mac_multi; // multicast address hash table
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u8 m_lb_buf[1528]; // storage for loopback frames
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int m_lb_length; // length of loopback frame
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// configure parameters
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enum lb_mode
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{
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LOOPBACK_NONE = 0x00,
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LOOPBACK_INTERNAL = 0x40,
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LOOPBACK_EXTERNAL = 0x80,
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LOOPBACK_BOTH = 0xc0 // internal loopback for 82586, external loopback for 82596
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};
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virtual u8 cfg_get(int offset) const = 0;
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virtual void cfg_set(int offset, u8 data) = 0;
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bool cfg_save_bad_frames() const { return BIT(cfg_get(2), 7); }
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u8 cfg_address_length() const { return (cfg_get(3) & 0x7) % 7; } // "NOTE: 7 is interpreted as 0"
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bool cfg_no_src_add_ins() const { return BIT(cfg_get(3), 3); }
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lb_mode cfg_loopback_mode() const { return (lb_mode)(cfg_get(3) & LOOPBACK_BOTH); }
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bool cfg_promiscuous_mode() const { return BIT(cfg_get(8), 0); }
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bool cfg_broadcast_disable() const { return BIT(cfg_get(8), 1); }
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bool cfg_no_crc_insertion() const { return BIT(cfg_get(8), 4); }
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bool cfg_crc16() const { return BIT(cfg_get(8), 5); }
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u8 cfg_min_frame_length() const { return cfg_get(10); }
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};
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class i82586_device : public i82586_base_device
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@ -38,49 +252,137 @@ class i82586_device : public i82586_base_device
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public:
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i82586_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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static const int CFG_SIZE = 12;
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static const int DUMP_SIZE = 170;
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protected:
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// standard device_* overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// setup and scb
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virtual void initialise() override;
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// command unit
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virtual bool cu_iasetup() override;
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virtual bool cu_configure() override;
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virtual bool cu_mcsetup() override;
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virtual bool cu_transmit(u32 command) override;
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virtual bool cu_tdreflect() override;
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virtual bool cu_dump() override;
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// receive unit
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virtual bool address_filter(u8 *mac) override;
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virtual void ru_execute(u8 *buf, int length) override;
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// helpers
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virtual u32 address(u32 base, int offset, int address) override { return m_scb_base + m_space->read_word(base + offset); }
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virtual u32 address(u32 base, int offset, int address, u16 empty) override;
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private:
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// configure parameters
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virtual u8 cfg_get(int offset) const override { return m_cfg_bytes[offset]; }
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virtual void cfg_set(int offset, u8 data) override { m_cfg_bytes[offset] = data; }
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u8 m_cfg_bytes[CFG_SIZE];
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};
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class i82596_base_device : public i82586_base_device
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class i82596_device : public i82586_base_device
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{
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public:
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enum sysbus_mask
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{
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SYSBUS_M = 0x06,
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SYSBUS_TRG = 0x08,
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SYSBUS_LOCK = 0x10,
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SYSBUS_INT = 0x20,
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SYSBUS_BE = 0x80
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};
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enum sysbus_mode
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{
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MODE_82586 = 0x0,
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MODE_32SEGMENTED = 0x2,
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MODE_LINEAR = 0x4
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};
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static const int CFG_SIZE = 14;
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static const int DUMP_SIZE = 304;
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void port(u32 data); // cpu access interface
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protected:
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i82596_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, u8 datawidth, u8 addrwidth);
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i82596_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian, u8 datawidth);
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// standard device_* overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// setup and scb
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virtual void initialise() override;
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// command unit
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virtual bool cu_iasetup() override;
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virtual bool cu_configure() override;
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virtual bool cu_mcsetup() override;
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virtual bool cu_transmit(u32 command) override;
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virtual bool cu_tdreflect() override;
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virtual bool cu_dump() override;
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// receive unit
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virtual bool address_filter(u8 *mac) override;
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virtual void ru_execute(u8 *buf, int length) override;
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// helpers
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virtual u32 address(u32 base, int offset, int address) override { return (mode() == MODE_LINEAR) ? m_space->read_dword(base + address) : m_scb_base + m_space->read_word(base + offset); }
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virtual u32 address(u32 base, int offset, int address, u16 empty) override;
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private:
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// configure parameters
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virtual u8 cfg_get(int offset) const override { return m_cfg_bytes[offset]; }
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virtual void cfg_set(int offset, u8 data) override { m_cfg_bytes[offset] = data; }
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bool cfg_crc_in_memory() const { return BIT(cfg_get(11), 2); }
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bool cfg_mc_all() const { return BIT(cfg_get(11), 5); }
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bool cfg_multi_ia() const { return BIT(cfg_get(13), 6); }
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// initialisation, configuration and sysbus
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inline sysbus_mode mode() const { return (sysbus_mode)(m_sysbus & SYSBUS_M); }
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u8 m_cfg_bytes[CFG_SIZE];
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u8 m_sysbus;
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u32 m_iscp_address;
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u64 m_mac_multi_ia; // multi-ia address hash table
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};
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class i82596sx_device : public i82596_base_device
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class i82596_le16_device : public i82596_device
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{
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public:
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i82596sx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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protected:
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private:
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i82596_le16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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};
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class i82596dx_device : public i82596_base_device
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class i82596_be16_device : public i82596_device
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{
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public:
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i82596dx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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i82596_be16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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};
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protected:
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class i82596_le32_device : public i82596_device
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{
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public:
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i82596_le32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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};
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private:
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class i82596_be32_device : public i82596_device
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{
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public:
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i82596_be32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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};
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DECLARE_DEVICE_TYPE(I82586, i82586_device)
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DECLARE_DEVICE_TYPE(I82596SX, i82596sx_device)
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DECLARE_DEVICE_TYPE(I82596DX, i82596dx_device)
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DECLARE_DEVICE_TYPE(I82596_LE16, i82596_le16_device)
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DECLARE_DEVICE_TYPE(I82596_BE16, i82596_be16_device)
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DECLARE_DEVICE_TYPE(I82596_LE32, i82596_le32_device)
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DECLARE_DEVICE_TYPE(I82596_BE32, i82596_be32_device)
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#endif // MAME_MACHINE_I82586_H
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