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vax: Use unsigned format for character operands of string instructions

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This commit is contained in:
AJR 2024-01-31 11:54:06 -05:00
parent b3795f8213
commit 75b2cff4d6
1 changed files with 9 additions and 9 deletions
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18
src/devices/cpu/vax/vaxdasm.cpp
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@ -380,12 +380,12 @@ static const vax_disassembler::opdef s_nonprefix_ops[0x100 - 3] =
{ "DIVP"sv, { mode::rw, mode::ab, mode::rw, mode::ab, mode::rw, mode::ab }, 0 },
{ "MOVC3"sv, { mode::rw, mode::ab, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "CMPC3"sv, { mode::rw, mode::ab, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "SCANC"sv, { mode::rw, mode::ab, mode::ab, mode::rb, mode::none, mode::none }, 0 },
{ "SPANC"sv, { mode::rw, mode::ab, mode::ab, mode::rb, mode::none, mode::none }, 0 },
{ "MOVC5"sv, { mode::rw, mode::ab, mode::rb, mode::rw, mode::ab, mode::none }, 0 },
{ "CMPC5"sv, { mode::rw, mode::ab, mode::rb, mode::rw, mode::ab, mode::none }, 0 },
{ "MOVTC"sv, { mode::rw, mode::ab, mode::rb, mode::ab, mode::rw, mode::ab }, 0 },
{ "MOVTUC"sv, { mode::rw, mode::ab, mode::rb, mode::ab, mode::rw, mode::ab }, 0 },
{ "SCANC"sv, { mode::rw, mode::ab, mode::ab, mode::urb, mode::none, mode::none }, 0 },
{ "SPANC"sv, { mode::rw, mode::ab, mode::ab, mode::urb, mode::none, mode::none }, 0 },
{ "MOVC5"sv, { mode::rw, mode::ab, mode::urb, mode::rw, mode::ab, mode::none }, 0 },
{ "CMPC5"sv, { mode::rw, mode::ab, mode::urb, mode::rw, mode::ab, mode::none }, 0 },
{ "MOVTC"sv, { mode::rw, mode::ab, mode::urb, mode::ab, mode::rw, mode::ab }, 0 },
{ "MOVTUC"sv, { mode::rw, mode::ab, mode::urb, mode::ab, mode::rw, mode::ab }, 0 },
{ "BSBW"sv, { mode::bw, mode::none, mode::none, mode::none, mode::none, mode::none }, vax_disassembler::STEP_OVER },
{ "BRW"sv, { mode::bw, mode::none, mode::none, mode::none, mode::none, mode::none }, 0 },
@ -397,8 +397,8 @@ static const vax_disassembler::opdef s_nonprefix_ops[0x100 - 3] =
{ "CMPP4"sv, { mode::rw, mode::ab, mode::rw, mode::ab, mode::none, mode::none }, 0 },
{ "EDITPC"sv, { mode::rw, mode::ab, mode::ab, mode::ab, mode::none, mode::none }, 0 },
{ "MATCHC"sv, { mode::rw, mode::ab, mode::rw, mode::ab, mode::none, mode::none }, 0 },
{ "LOCC"sv, { mode::rb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "SKPC"sv, { mode::rb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "LOCC"sv, { mode::urb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "SKPC"sv, { mode::urb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "MOVZWL"sv, { mode::rw, mode::wl, mode::none, mode::none, mode::none, mode::none }, 0 },
{ "ACBW"sv, { mode::srw, mode::srw, mode::mw, mode::bw, mode::none, mode::none }, vax_disassembler::STEP_COND },
{ "MOVAW"sv, { mode::aw, mode::wl, mode::none, mode::none, mode::none, mode::none }, 0 },
@ -954,6 +954,7 @@ offs_t vax_disassembler::disassemble_inst(std::ostream &stream, const vax_disass
else switch (inst.operand[n])
{
case mode::rb:
case mode::ab: // Immediate bytes may be used as MOVCn sources, at least with a length of 0
format_immediate(stream, opcodes.r8(pc++));
break;
@ -963,7 +964,6 @@ offs_t vax_disassembler::disassemble_inst(std::ostream &stream, const vax_disass
break;
case mode::urb:
case mode::ab: // Immediate bytes may be used as MOVCn sources
util::stream_format(stream, "#^X%02X", opcodes.r8(pc++));
break;