mirror of
https://github.com/holub/mame
synced 2025-04-20 23:42:22 +03:00
This reverts commit 200f9461a0
.
There's serious issues with the coding style, inconsistent with what's required for MAME. Please try again.
This commit is contained in:
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fc4c36d638
commit
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@ -94,10 +94,6 @@
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* NBA Showtime
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* NBA Showtime / NFL Blitz 2000 Gold
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* Cart Fury
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DCS2 pinball 2000 driver
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* Revenge from Mars
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* Star Wars Episode 1
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*****************************************************************************
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@ -360,11 +356,6 @@ void dcs_audio_device::dcs2_2104_program_map(address_map &map)
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map(0x0000, 0x01ff).ram().share("dcsint");
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}
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void dcs_audio_device::dcs2_2104_pin2k_program_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0x01ff).ram().share("dcsint");
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}
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void dcs_audio_device::dcs2_2115_data_map(address_map &map)
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{
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@ -392,20 +383,6 @@ void dcs_audio_device::dcs2_2104_data_map(address_map &map)
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map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w));
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}
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void dcs_audio_device::dcs2_2104_pin2k_data_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x0400, 0x0400).rw(FUNC(dcs_audio_device::input_latch_r), FUNC(dcs_audio_device::input_latch_ack_w));
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map(0x0401, 0x0401).rw(FUNC(dcs_audio_device::output_latch_r), FUNC(dcs_audio_device::output_latch_w));
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map(0x0402, 0x0402).rw(FUNC(dcs_audio_device::output_control_r), FUNC(dcs_audio_device::output_control_w));
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map(0x0403, 0x0403).r(FUNC(dcs_audio_device::latch_status_r));
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map(0x0404, 0x0407).r(FUNC(dcs_audio_device::fifo_input_r));
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map(0x0413, 0x0413).r(FUNC(dcs_audio_device::pin2000_status_r));
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map(0x0480, 0x0483).rw(FUNC(dcs_audio_device::sdrc_r), FUNC(dcs_audio_device::sdrc_w));
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map(0x3800, 0x3fff).ram().share("iram");
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map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w));
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}
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/*************************************
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@ -606,10 +583,6 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset )
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/* initialize the comm bits */
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SET_INPUT_EMPTY();
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SET_OUTPUT_EMPTY();
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// for pin2k
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m_scriptmodeactive = 0;
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m_pin2k_state = 0;
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// --
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if (!m_last_input_empty && !m_input_empty_cb.isnull())
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m_input_empty_cb(m_last_input_empty = 1);
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if (m_last_output_full && !m_output_full_cb.isnull())
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@ -1539,11 +1512,7 @@ uint16_t dcs_audio_device::fifo_input_r()
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else
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return 0xffff;
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}
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// for showing the data to de debugger ;)
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uint16_t dcs_audio_device::output_latch_r()
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{
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return m_output_data;
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}
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/***************************************************************************
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@ -1591,32 +1560,6 @@ void dcs_audio_device::data_w(uint16_t data)
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dcs_delayed_data_w(data);
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}
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void dcs_audio_device::data_w_pin2k(uint16_t data)
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{
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/* preprocess the write */
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// ADSP2181 variants use IDMA to transfer data
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if (data == 0xace1)
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{
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m_scriptmodeactive = 1;
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logerror("script mode is now 1\n");
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}
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if (data == 0xacef)
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{
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m_scriptmodeactive = 0;
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//logerror("script mode is now 0\n");
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}
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if (m_rev <= REV_DCS2 && preprocess_write_pin2k(data))
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return;
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m_pin2k_state = 0; // command has been sent
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/* if we are DCS1, set a timer to latch the data */
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if (!m_sport0_timer)
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machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::dcs_delayed_data_w_callback),this), data);
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else
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dcs_delayed_data_w(data);
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}
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void dcs_audio_device::input_latch_ack_w(uint16_t data)
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{
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@ -1657,19 +1600,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::latch_delayed_w )
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{
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if (!m_last_output_full && !m_output_full_cb.isnull())
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m_output_full_cb(m_last_output_full = 1);
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// for pin2k
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if (m_pre_output_data == 0x0c && m_scriptmodeactive == 1)
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{
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m_scriptmodeactive = 2;
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//logerror("script mode is now 2\n");
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}
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if (m_scriptmodeactive == 2)
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SET_INPUT_FULL();
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else
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SET_OUTPUT_FULL();
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m_pin2k_state = 1;
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SET_OUTPUT_FULL();
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m_output_data = m_pre_output_data;
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}
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@ -1730,49 +1661,8 @@ uint16_t dcs_audio_device::data_r()
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return m_output_data;
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}
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uint16_t dcs_audio_device::data_r_pin2k()
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{
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// If the cpu is reading empty data it is probably polling so eat some cyles
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if IS_OUTPUT_EMPTY()
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m_maincpu->eat_cycles(4444);
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/* data is actually only 8 bit (read from d8-d15, which is d0-d7 from the data access instructions POV) on early dcs, but goes 16 on later (seattle) */
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if (m_last_output_full && !m_output_full_cb.isnull())
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m_output_full_cb(m_last_output_full = 0);
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SET_OUTPUT_EMPTY();
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m_pin2k_state = 2;
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if (LOG_DCS_IO)
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logerror("%s:dcs_data_r(%04X)\n", machine().describe_context(), m_output_data);
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return m_output_data;
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}
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uint16_t dcs_audio_device::pin2000_status_r()
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{
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int result = 0;
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if (m_scriptmodeactive == 2)
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{
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if (IS_INPUT_FULL())
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result |= 0x80;
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if (IS_OUTPUT_EMPTY())
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result |= 0x40;
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}
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else
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switch (m_pin2k_state)
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{
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case 1:
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result = 0x80;
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break;
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case 2:
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result = 0x40;
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break;
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default:
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result = 0;
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break;
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}
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return result;
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}
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/***************************************************************************
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OUTPUT CONTROL BITS (has 3 additional lines to the host)
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****************************************************************************/
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@ -2157,7 +2047,7 @@ void dcs_audio_device::recompute_sample_rate()
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/* frequency the time per each bit sent */
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attotime sample_period;
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if (m_control_regs[S1_CONTROL_REG] & 0x4000 && m_dcs_pin2k == 0) { // pin2k needs fix freq of 31250!
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if (m_control_regs[S1_CONTROL_REG] & 0x4000) {
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// Use internal clock for SPORT1 Tx timing
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sample_period = attotime::from_hz(m_cpu->unscaled_clock()) * (2 * (m_control_regs[S1_SCLKDIV_REG] + 1));
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/* now put it down to samples, so we know what the channel frequency has to be */
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@ -2460,121 +2350,7 @@ int dcs_audio_device::preprocess_stage_1(uint16_t data)
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}
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return 0;
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}
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int dcs_audio_device::preprocess_stage_1_pin2k(uint16_t data)
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{
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hle_transfer_state &transfer = m_transfer;
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switch (transfer.state)
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{
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case 0:
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if (data == 0x000e) // 77 PM words of loading data
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{
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transfer.start_command = data;
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transfer.start = 0;
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transfer.stop = ((data + 1) * 8) - 1;
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if (LOG_DCS_TRANSFERS)
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logerror("Stop address = %04X\n", transfer.stop);
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logerror("script mode %02x\n", m_scriptmodeactive);
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transfer.state++;
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transfer.writes_left = transfer.stop - transfer.start + 1;
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if (transfer.hle_enabled)
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return 1;
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}
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else
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{
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if (LOG_DCS_TRANSFERS)
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logerror("Command: %04X\n", data);
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}
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break;
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case 1:
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if ((data & 0xff00) > 0) {
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dcs_delayed_data_w(transfer.start_command);
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transfer.state = 0;
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return 0;
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}
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if (m_scriptmodeactive == 2) {
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m_scriptmodeactive = 0;
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logerror("stop script mode\n");
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//dcs_delayed_data_w(0xacef); // stop script mode after reloading data
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m_cpu->set_input_line(ADSP2105_IRQ2, ASSERT_LINE);
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/* indicate we are no longer empty */
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if (m_last_input_empty && !m_input_empty_cb.isnull())
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m_input_empty_cb(m_last_input_empty = 0);
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SET_INPUT_FULL();
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/* set the data */
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m_input_data = 0xacef;
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}
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transfer.sum += data;
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switch (transfer.word_counter)
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{
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case 0:
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transfer.temp = (data << 16) & 0xff0000;
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break;
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case 1:
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transfer.temp |= data & 0xff;
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break;
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case 2:
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transfer.temp |= (data << 8) & 0xff00;
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transfer.transfer_data[transfer.writes_left - 1] = transfer.temp;
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//m_program->write_dword(transfer.stop, transfer.temp);
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if (LOG_DCS_TRANSFERS)
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logerror("transfer: %06x\n", transfer.temp);
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break;
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}
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transfer.word_counter++;
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if (transfer.word_counter > 2)
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{
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transfer.word_counter = 0;
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if (--transfer.writes_left == 0)
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{
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if (LOG_DCS_TRANSFERS) logerror("Transfer done, sum = %04X\n", transfer.sum);
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transfer.state = 2;
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}
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}
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return 1;
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break;
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case 2:
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/* wait for command 0xe */
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if (data == transfer.start_command) {
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if (LOG_DCS_TRANSFERS) logerror("transfer done, writing data\n"); // trigger irq??
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for (int32_t i = transfer.stop; i >= 0; i--)
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{
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if (LOG_DCS_TRANSFERS) logerror("address: %04x data %06x\n", i, transfer.transfer_data[i]);
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m_program->write_dword(i, transfer.transfer_data[i]);
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}
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if (LOG_DCS_TRANSFERS) logerror("transfer done, writing data finished\n"); // trigger irq??
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transfer.state = 0;
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transfer.sum = 0;
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}
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return 1;
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break;
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}
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return 0;
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}
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TIMER_CALLBACK_MEMBER( dcs_audio_device::s2_ack_callback )
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{
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@ -2717,31 +2493,6 @@ int dcs_audio_device::preprocess_write(uint16_t data)
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return result;
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}
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int dcs_audio_device::preprocess_write_pin2k(uint16_t data)
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{
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hle_transfer_state &transfer = m_transfer;
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int result;
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/* if we're not DCS2, skip */
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if (!m_sport0_timer)
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return 0;
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/* state 0 - initialization phase */
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if (transfer.dcs_state == 0)
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result = preprocess_stage_1_pin2k(data);
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else
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result = preprocess_stage_2(data);
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/* if we did the write, toggle the full/not full state so interrupts are generated */
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if (result && !m_input_empty_cb.isnull())
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{
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if (m_last_input_empty)
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m_input_empty_cb(m_last_input_empty = 0);
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if (!m_last_input_empty)
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m_input_empty_cb(m_last_input_empty = 1);
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}
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return result;
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}
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/* Basic DCS system with ADSP-2105 and 2k of SRAM (T-unit, V-unit, Killer Instinct) */
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void dcs_audio_device::add_mconfig_dcs(machine_config &config)
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@ -2900,28 +2651,6 @@ void dcs2_audio_2104_device::device_add_mconfig(machine_config &config)
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dcs2.set_addrmap(AS_DATA, &dcs2_audio_2104_device::dcs2_2104_data_map);
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}
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DEFINE_DEVICE_TYPE(DCS2_AUDIO_2104_PIN2K, dcs2_audio_2104_pin2k_device, "dcs2_audio_2104_pin2k", "DCS2 Audio 2104 Pin2K")
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//-------------------------------------------------
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// dcs2_audio_2104__pin2k_device - constructor
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//-------------------------------------------------
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dcs2_audio_2104_pin2k_device::dcs2_audio_2104_pin2k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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dcs2_audio_device(mconfig, DCS2_AUDIO_2104_PIN2K, tag, owner, clock)
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{
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}
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void dcs2_audio_2104_pin2k_device::device_add_mconfig(machine_config &config)
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{
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dcs2_audio_device::add_mconfig_dcs2(config);
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m_dcs_pin2k = 1;
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adsp2104_device &dcs2(ADSP2104(config.replace(), "dcs2", XTAL(16'000'000)));
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dcs2.sport_tx().set(FUNC(dcs_audio_device::sound_tx_callback)); /* callback for serial transmit */
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dcs2.timer_fired().set(FUNC(dcs_audio_device::timer_enable_callback)); /* callback for timer fired */
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dcs2.set_addrmap(AS_PROGRAM, &dcs2_audio_2104_pin2k_device::dcs2_2104_pin2k_program_map);
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dcs2.set_addrmap(AS_DATA, &dcs2_audio_2104_pin2k_device::dcs2_2104_pin2k_data_map);
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}
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DEFINE_DEVICE_TYPE(DCS2_AUDIO_DSIO, dcs2_audio_dsio_device, "dcs2_audio_dsio", "DCS2 Audio DSIO")
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//-------------------------------------------------
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@ -76,7 +76,6 @@ public:
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uint32_t input_latch32_r();
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TIMER_CALLBACK_MEMBER( latch_delayed_w );
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void output_latch_w(uint16_t data);
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uint16_t output_latch_r();
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void output_latch32_w(uint32_t data);
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void delayed_ack_w();
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TIMER_CALLBACK_MEMBER( delayed_ack_w_callback );
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@ -107,8 +106,6 @@ public:
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void dcs2_2104_data_map(address_map &map);
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void dcs2_2104_program_map(address_map &map);
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void dcs2_2104_pin2k_data_map(address_map &map);
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void dcs2_2104_pin2k_program_map(address_map &map);
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void dcs2_2115_data_map(address_map &map);
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void dcs2_2115_program_map(address_map &map);
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void dcs_2k_data_map(address_map &map);
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@ -130,16 +127,6 @@ public:
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cpu_device *get_cpu() { return m_cpu; } // TODO(RH): Same.
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enum { REV_DCS1, REV_DCS1P5, REV_DCS2, REV_DSIO, REV_DENV };
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// for pin2k
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uint16_t pin2000_status_r();
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uint16_t data_r_pin2k();
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void data_w_pin2k(uint16_t data);
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int m_pin2k_state;
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int m_scriptmodeactive;
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int m_dcs_pin2k;
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int preprocess_write_pin2k(uint16_t data);
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int preprocess_stage_1_pin2k(uint16_t data);
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protected:
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// construction/destruction
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@ -180,10 +167,6 @@ protected:
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int32_t writes_left;
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uint16_t sum;
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int32_t fifo_entries;
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// added for pin2k
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uint8_t word_counter;
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uint8_t start_command;
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uint32_t transfer_data[200];
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timer_device *watchdog;
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};
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@ -379,22 +362,6 @@ protected:
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// device type definition
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DECLARE_DEVICE_TYPE(DCS2_AUDIO_2104, dcs2_audio_2104_device)
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// pin 2k 2104 device
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class dcs2_audio_2104_pin2k_device : public dcs2_audio_device
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{
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public:
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// construction/destruction
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dcs2_audio_2104_pin2k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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protected:
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// optional information overrides
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virtual void device_add_mconfig(machine_config &config) override;
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};
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// device type definition
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DECLARE_DEVICE_TYPE(DCS2_AUDIO_2104_PIN2K, dcs2_audio_2104_pin2k_device)
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// dcs2_audio_dsio_device
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class dcs2_audio_dsio_device : public dcs2_audio_device
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