mirror of
https://github.com/holub/mame
synced 2025-07-01 00:09:18 +03:00
finished modernising i2cmem [smf]
This commit is contained in:
smf-
parent
a179f1be7f
commit
76139c1ebb
@ -1,3 +1,5 @@
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// license:MAME
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// copyright-holders:smf
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/***************************************************************************
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I2C Memory
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@ -76,6 +78,9 @@ i2cmem_device::i2cmem_device( const machine_config &mconfig, const char *tag, de
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: device_t(mconfig, I2CMEM, "I2CMEM", tag, owner, clock, "i2cmem", __FILE__),
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device_memory_interface(mconfig, *this),
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device_nvram_interface(mconfig, *this),
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m_slave_address( I2CMEM_SLAVE_ADDRESS ),
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m_page_size( 0 ),
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m_data_size( 0 ),
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m_scl( 0 ),
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m_sdaw( 0 ),
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m_e0( 0 ),
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@ -96,29 +101,16 @@ i2cmem_device::i2cmem_device( const machine_config &mconfig, const char *tag, de
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void i2cmem_device::device_config_complete()
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{
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// inherit a copy of the static data
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const i2cmem_interface *intf = reinterpret_cast<const i2cmem_interface *>(static_config());
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if (intf != NULL)
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{
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*static_cast<i2cmem_interface *>(this) = *intf;
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}
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else
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{
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m_slave_address = 0;
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m_page_size = 0;
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m_data_size = 0;
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}
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m_address_bits = 0;
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int address_bits = 0;
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int i = m_data_size - 1;
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while( i > 0 )
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{
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m_address_bits++;
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address_bits++;
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i >>= 1;
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}
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m_space_config = address_space_config( "i2cmem", ENDIANNESS_BIG, 8, m_address_bits, 0, *ADDRESS_MAP_NAME( i2cmem_map8 ) );
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m_space_config = address_space_config( "i2cmem", ENDIANNESS_BIG, 8, address_bits, 0, *ADDRESS_MAP_NAME( i2cmem_map8 ) );
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}
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@ -251,12 +243,7 @@ void i2cmem_device::nvram_write( emu_file &file )
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// READ/WRITE HANDLERS
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//**************************************************************************
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e0_write )
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{
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downcast<i2cmem_device *>( device )->set_e0_line( state );
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}
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void i2cmem_device::set_e0_line( int state )
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WRITE_LINE_MEMBER( i2cmem_device::write_e0 )
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{
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state &= 1;
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if( m_e0 != state )
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@ -267,12 +254,7 @@ void i2cmem_device::set_e0_line( int state )
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e1_write )
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{
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downcast<i2cmem_device *>( device )->set_e1_line( state );
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}
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void i2cmem_device::set_e1_line( int state )
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WRITE_LINE_MEMBER( i2cmem_device::write_e1 )
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{
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state &= 1;
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if( m_e1 != state )
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@ -283,12 +265,7 @@ void i2cmem_device::set_e1_line( int state )
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e2_write )
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{
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downcast<i2cmem_device *>( device )->set_e2_line( state );
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}
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void i2cmem_device::set_e2_line( int state )
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WRITE_LINE_MEMBER( i2cmem_device::write_e2 )
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{
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state &= 1;
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if( m_e2 != state )
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@ -299,12 +276,7 @@ void i2cmem_device::set_e2_line( int state )
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_sda_write )
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{
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downcast<i2cmem_device *>( device )->set_sda_line( state );
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}
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void i2cmem_device::set_sda_line( int state )
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WRITE_LINE_MEMBER( i2cmem_device::write_sda )
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{
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state &= 1;
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if( m_sdaw != state )
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@ -331,12 +303,7 @@ void i2cmem_device::set_sda_line( int state )
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}
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_scl_write )
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{
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downcast<i2cmem_device *>( device )->set_scl_line( state );
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}
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void i2cmem_device::set_scl_line( int state )
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WRITE_LINE_MEMBER( i2cmem_device::write_scl )
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{
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if( m_scl != state )
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{
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@ -497,12 +464,7 @@ void i2cmem_device::set_scl_line( int state )
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_wc_write )
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{
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downcast<i2cmem_device *>( device )->set_wc_line( state );
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}
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void i2cmem_device::set_wc_line( int state )
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WRITE_LINE_MEMBER( i2cmem_device::write_wc )
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{
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state &= 1;
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if( m_wc != state )
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@ -513,12 +475,7 @@ void i2cmem_device::set_wc_line( int state )
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}
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READ_LINE_DEVICE_HANDLER( i2cmem_sda_read )
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{
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return downcast<i2cmem_device *>( device )->read_sda_line();
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}
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int i2cmem_device::read_sda_line()
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READ_LINE_MEMBER( i2cmem_device::read_sda )
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{
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int res = m_sdar & 1;
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@ -24,45 +24,88 @@
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// INTERFACE CONFIGURATION MACROS
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//**************************************************************************
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#define MCFG_I2CMEM_ADD( _tag, _config ) \
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MCFG_DEVICE_ADD( _tag, I2CMEM, 0 ) \
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MCFG_DEVICE_CONFIG( _config )
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#define MCFG_I2CMEM_ADD( _tag ) \
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MCFG_DEVICE_ADD( _tag, I2CMEM, 0 )
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#define MCFG_I2CMEM_ADDRESS( address ) \
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i2cmem_device::set_address(*device, address);
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#define MCFG_I2CMEM_PAGE_SIZE( page_size ) \
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i2cmem_device::set_page_size(*device, page_size);
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#define MCFG_I2CMEM_DATA_SIZE(data_size) \
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i2cmem_device::set_data_size(*device, data_size);
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#define MCFG_I2CMEM_E0(e0) \
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i2cmem_device::set_e0(*device, e0);
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#define MCFG_I2CMEM_E1(e1) \
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i2cmem_device::set_e1(*device, e1);
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#define MCFG_I2CMEM_E2(e2) \
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i2cmem_device::set_e2(*device, e2);
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#define MCFG_I2CMEM_WC(wc) \
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i2cmem_device::set_wc(*device, wc);
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#define MCFG_X2404P_ADD( _tag ) \
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MCFG_I2CMEM_ADD( _tag ) \
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MCFG_I2CMEM_PAGE_SIZE(8) \
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MCFG_I2CMEM_DATA_SIZE(0x200)
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#define MCFG_24C01_ADD( _tag ) \
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MCFG_I2CMEM_ADD( _tag ) \
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MCFG_I2CMEM_PAGE_SIZE(4) \
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MCFG_I2CMEM_DATA_SIZE(0x80)
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#define MCFG_24C02_ADD( _tag ) \
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MCFG_I2CMEM_ADD( _tag ) \
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MCFG_I2CMEM_PAGE_SIZE(4) \
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MCFG_I2CMEM_DATA_SIZE(0x100)
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#define MCFG_24C08_ADD( _tag ) \
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MCFG_I2CMEM_ADD( _tag ) \
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MCFG_I2CMEM_DATA_SIZE(0x400)
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#define MCFG_24C16_ADD( _tag ) \
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MCFG_I2CMEM_ADD( _tag ) \
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MCFG_I2CMEM_PAGE_SIZE(8) \
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MCFG_I2CMEM_DATA_SIZE(0x800)
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#define MCFG_24C16A_ADD( _tag ) \
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MCFG_I2CMEM_ADD( _tag ) \
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MCFG_I2CMEM_DATA_SIZE(0x800)
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#define MCFG_24C64_ADD( _tag ) \
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MCFG_I2CMEM_ADD( _tag ) \
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MCFG_I2CMEM_PAGE_SIZE(8) \
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MCFG_I2CMEM_DATA_SIZE(0x2000)
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> i2cmem_interface
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struct i2cmem_interface
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{
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int m_slave_address;
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int m_page_size;
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int m_data_size;
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};
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// ======================> i2cmem_device
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class i2cmem_device :
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public device_t,
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public device_memory_interface,
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public device_nvram_interface,
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public i2cmem_interface
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public device_nvram_interface
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{
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public:
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// construction/destruction
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i2cmem_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock );
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static void set_address(device_t &device, int address) { downcast<i2cmem_device &>(device).m_slave_address = address; }
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static void set_page_size(device_t &device, int page_size) { downcast<i2cmem_device &>(device).m_page_size = page_size; }
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static void set_data_size(device_t &device, int data_size) { downcast<i2cmem_device &>(device).m_data_size = data_size; }
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static void set_e0(device_t &device, int e0) { downcast<i2cmem_device &>(device).m_e0 = e0; }
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static void set_e1(device_t &device, int e1) { downcast<i2cmem_device &>(device).m_e1 = e1; }
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static void set_e2(device_t &device, int e2) { downcast<i2cmem_device &>(device).m_e2 = e2; }
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static void set_wc(device_t &device, int wc) { downcast<i2cmem_device &>(device).m_wc = wc; }
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// I/O operations
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void set_e0_line( int state );
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void set_e1_line( int state );
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void set_e2_line( int state );
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void set_sda_line( int state );
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void set_scl_line( int state );
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void set_wc_line( int state );
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int read_sda_line();
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DECLARE_WRITE_LINE_MEMBER( write_e0 );
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DECLARE_WRITE_LINE_MEMBER( write_e1 );
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DECLARE_WRITE_LINE_MEMBER( write_e2 );
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DECLARE_WRITE_LINE_MEMBER( write_sda );
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DECLARE_WRITE_LINE_MEMBER( write_scl );
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DECLARE_WRITE_LINE_MEMBER( write_wc );
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DECLARE_READ_LINE_MEMBER( read_sda );
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protected:
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// device-level overrides
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@ -85,9 +128,11 @@ protected:
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// device-specific configuration
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address_space_config m_space_config;
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int m_address_bits;
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// internal state
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int m_slave_address;
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int m_page_size;
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int m_data_size;
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int m_scl;
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int m_sdaw;
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int m_e0;
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@ -108,17 +153,4 @@ protected:
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// device type definition
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extern const device_type I2CMEM;
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//**************************************************************************
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// READ/WRITE HANDLERS
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//**************************************************************************
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e0_write );
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e1_write );
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e2_write );
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WRITE_LINE_DEVICE_HANDLER( i2cmem_sda_write );
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WRITE_LINE_DEVICE_HANDLER( i2cmem_scl_write );
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WRITE_LINE_DEVICE_HANDLER( i2cmem_wc_write );
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READ_LINE_DEVICE_HANDLER( i2cmem_sda_read );
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#endif /* __I2CMEM_H__ */
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@ -412,11 +412,6 @@ void aristmk5_state::machine_reset()
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#if 0
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#define NVRAM_SIZE 256
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#define NVRAM_PAGE_SIZE 0 /* max size of one write request */
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static const i2cmem_interface i2cmem_interface =
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{
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I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
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};
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#endif
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/* TODO: this isn't supposed to access a keyboard ... */
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@ -431,7 +426,9 @@ static MACHINE_CONFIG_START( aristmk5, aristmk5_state )
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MCFG_CPU_PROGRAM_MAP(aristmk5_drame_map)
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MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */
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// MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
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// MCFG_I2CMEM_ADD("i2cmem")
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// MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
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// MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
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MCFG_AAKART_ADD("kart", 12000000/128, kart_interface) // TODO: frequency
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -475,7 +472,9 @@ static MACHINE_CONFIG_START( aristmk5_usa, aristmk5_state )
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MCFG_CPU_PROGRAM_MAP(aristmk5_map)
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MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */
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// MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
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// MCFG_I2CMEM_ADD("i2cmem")
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// MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
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// MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
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MCFG_AAKART_ADD("kart", 12000000/128, kart_interface) // TODO: frequency
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -31,7 +31,6 @@
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#include "cpu/m68000/m68000.h"
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#include "sound/cdda.h"
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#include "machine/6526cia.h"
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#include "machine/i2cmem.h"
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#include "includes/cd32.h"
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#include "imagedev/chd_cd.h"
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#include "machine/amigafdc.h"
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@ -764,11 +763,6 @@ static const legacy_mos6526_interface cia_1_intf =
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#define NVRAM_SIZE 1024
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#define NVRAM_PAGE_SIZE 16 /* max size of one write request */
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static const i2cmem_interface i2cmem_interface =
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{
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I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
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};
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static MACHINE_CONFIG_START( cd32base, cd32_state )
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/* basic machine hardware */
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@ -779,7 +773,9 @@ static MACHINE_CONFIG_START( cd32base, cd32_state )
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MCFG_MACHINE_START_OVERRIDE(amiga_state, amiga )
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MCFG_MACHINE_RESET_OVERRIDE(amiga_state,amiga)
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MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
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MCFG_I2CMEM_ADD("i2cmem")
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MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
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MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
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/* video hardware */
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MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
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@ -221,18 +221,15 @@ INTERRUPT_GEN_MEMBER(ertictac_state::ertictac_podule_irq)
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#define NVRAM_SIZE 256
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#define NVRAM_PAGE_SIZE 0 /* max size of one write request */
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static const i2cmem_interface i2cmem_interface =
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{
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I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
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};
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static MACHINE_CONFIG_START( ertictac, ertictac_state )
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MCFG_CPU_ADD("maincpu", ARM, XTAL_24MHz/3) /* guess, 12MHz 8MHz or 6MHz, what's the correct divider 2, 3 or 4? */
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MCFG_CPU_PROGRAM_MAP(ertictac_map)
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MCFG_CPU_PERIODIC_INT_DRIVER(ertictac_state, ertictac_podule_irq, 60) // FIXME: timing of this
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MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
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MCFG_I2CMEM_ADD("i2cmem")
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MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
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MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
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// MCFG_AAKART_ADD("kart", XTAL_24MHz/3) // TODO: frequency
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -346,13 +346,13 @@ WRITE8_MEMBER(ghosteo_state::s3c2410_nand_data_w )
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WRITE_LINE_MEMBER(ghosteo_state::s3c2410_i2c_scl_w )
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{
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// logerror( "s3c2410_i2c_scl_w %d\n", state ? 1 : 0);
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i2cmem_scl_write( m_i2cmem, state);
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m_i2cmem->write_scl(state);
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}
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READ_LINE_MEMBER(ghosteo_state::s3c2410_i2c_sda_r )
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{
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int state;
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state = i2cmem_sda_read( m_i2cmem );
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state = m_i2cmem->read_sda();
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// logerror( "s3c2410_i2c_sda_r %d\n", state ? 1 : 0);
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return state;
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}
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@ -360,7 +360,7 @@ READ_LINE_MEMBER(ghosteo_state::s3c2410_i2c_sda_r )
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WRITE_LINE_MEMBER(ghosteo_state::s3c2410_i2c_sda_w )
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{
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// logerror( "s3c2410_i2c_sda_w %d\n", state ? 1 : 0);
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i2cmem_sda_write( m_i2cmem, state);
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m_i2cmem->write_sda(state);
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}
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WRITE32_MEMBER(ghosteo_state::sound_w)
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@ -556,16 +556,6 @@ static const s3c2410_interface bballoon_s3c2410_intf =
|
||||
{ DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_command_w), DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_address_w), DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_data_r), DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_data_w) }
|
||||
};
|
||||
|
||||
static const i2cmem_interface bballoon_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 256
|
||||
};
|
||||
|
||||
static const i2cmem_interface touryuu_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 1024
|
||||
};
|
||||
|
||||
|
||||
|
||||
READ32_MEMBER(ghosteo_state::bballoon_speedup_r)
|
||||
@ -630,13 +620,15 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_DERIVED( bballoon, ghosteo )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(bballoon_map)
|
||||
MCFG_I2CMEM_ADD("i2cmem", bballoon_i2cmem_interface)
|
||||
MCFG_I2CMEM_ADD("i2cmem")
|
||||
MCFG_I2CMEM_DATA_SIZE(256)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( touryuu, ghosteo )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(touryuu_map)
|
||||
MCFG_I2CMEM_ADD("i2cmem", touryuu_i2cmem_interface)
|
||||
MCFG_I2CMEM_ADD("i2cmem")
|
||||
MCFG_I2CMEM_DATA_SIZE(1024)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
@ -197,7 +197,10 @@ public:
|
||||
m_sd000_ram(*this, "sd000_ram"),
|
||||
m_sf000_ram(*this, "sf000_ram"),
|
||||
m_io_port(*this, "io_port"),
|
||||
m_maincpu(*this, "maincpu") { }
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_i2cmem(*this, "i2cmem")
|
||||
{
|
||||
}
|
||||
|
||||
required_shared_ptr<UINT8> m_cmos_ram;
|
||||
required_shared_ptr<UINT8> m_program_ram;
|
||||
@ -277,6 +280,7 @@ public:
|
||||
void peplus_load_superdata(const char *bank_name);
|
||||
void peplus_init();
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<i2cmem_device> m_i2cmem;
|
||||
|
||||
protected:
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
@ -291,14 +295,6 @@ static const UINT16 id_023[8] = { 0x4a6c, 0x4a7b, 0x4a4b, 0x4a5a, 0x4a2b, 0x4a0a
|
||||
#define SOUND_CLOCK ((MASTER_CLOCK)/12)
|
||||
|
||||
|
||||
#define eeprom_NVRAM_SIZE 0x200 // 4k Bit
|
||||
|
||||
/* EEPROM is a X2404P 4K-bit Serial I2C Bus */
|
||||
static const i2cmem_interface i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 8, eeprom_NVRAM_SIZE
|
||||
};
|
||||
|
||||
/* prototypes */
|
||||
|
||||
static MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr);
|
||||
@ -529,10 +525,9 @@ WRITE8_MEMBER(peplus_state::peplus_output_bank_c_w)
|
||||
|
||||
WRITE8_MEMBER(peplus_state::i2c_nvram_w)
|
||||
{
|
||||
device_t *device = machine().device("i2cmem");
|
||||
i2cmem_scl_write(device,BIT(data, 2));
|
||||
m_i2cmem->write_scl(BIT(data, 2));
|
||||
m_sda_dir = BIT(data, 1);
|
||||
i2cmem_sda_write(device,BIT(data, 0));
|
||||
m_i2cmem->write_sda(BIT(data, 0));
|
||||
}
|
||||
|
||||
|
||||
@ -855,7 +850,6 @@ READ8_MEMBER(peplus_state::peplus_input0_r)
|
||||
|
||||
READ8_MEMBER(peplus_state::peplus_input_bank_a_r)
|
||||
{
|
||||
device_t *device = machine().device("i2cmem");
|
||||
/*
|
||||
Bit 0 = COIN DETECTOR A
|
||||
Bit 1 = COIN DETECTOR B
|
||||
@ -875,7 +869,7 @@ READ8_MEMBER(peplus_state::peplus_input_bank_a_r)
|
||||
UINT8 sda = 0;
|
||||
if(!m_sda_dir)
|
||||
{
|
||||
sda = i2cmem_sda_read(device);
|
||||
sda = m_i2cmem->read_sda();
|
||||
}
|
||||
|
||||
if ((ioport("SENSOR")->read_safe(0x00) & 0x01) == 0x01 && m_coin_state == 0) {
|
||||
@ -1346,7 +1340,7 @@ static MACHINE_CONFIG_START( peplus, peplus_state )
|
||||
MCFG_PALETTE_LENGTH(16*16*2)
|
||||
|
||||
MCFG_MC6845_ADD("crtc", R6545_1, "screen", MC6845_CLOCK, mc6845_intf)
|
||||
MCFG_I2CMEM_ADD("i2cmem", i2cmem_interface)
|
||||
MCFG_X2404P_ADD("i2cmem")
|
||||
|
||||
|
||||
// sound hardware
|
||||
|
||||
@ -38,7 +38,9 @@ public:
|
||||
m_program_ram(*this, "program_ram"),
|
||||
m_reel_ram(*this, "reel_ram"),
|
||||
m_io_port(*this, "io_port"),
|
||||
m_maincpu(*this, "maincpu") {
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_i2cmem(*this, "i2cmem")
|
||||
{
|
||||
m_sda_dir = 0;
|
||||
m_coin_state = 0;
|
||||
m_last_cycles = 0;
|
||||
@ -103,6 +105,7 @@ public:
|
||||
DECLARE_READ8_MEMBER(splus_reel_optics_r);
|
||||
DECLARE_DRIVER_INIT(splus);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<i2cmem_device> m_i2cmem;
|
||||
};
|
||||
|
||||
/* Static Variables */
|
||||
@ -126,14 +129,6 @@ static const UINT8 optics[200] = {
|
||||
#define CPU_CLOCK ((MASTER_CLOCK)/2) /* divided by 2 - 7474 */
|
||||
#define SOUND_CLOCK ((MASTER_CLOCK)/12)
|
||||
|
||||
/* Static Variables */
|
||||
#define EEPROM_NVRAM_SIZE 0x200 // 4k Bit
|
||||
|
||||
/* EEPROM is a X2404P 4K-bit Serial I2C Bus */
|
||||
static const i2cmem_interface i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 8, EEPROM_NVRAM_SIZE
|
||||
};
|
||||
|
||||
/*****************
|
||||
* Write Handlers *
|
||||
@ -357,10 +352,9 @@ WRITE8_MEMBER(splus_state::splus_duart_w)
|
||||
|
||||
WRITE8_MEMBER(splus_state::i2c_nvram_w)
|
||||
{
|
||||
device_t *device = machine().device("i2cmem");
|
||||
i2cmem_scl_write(device,BIT(data, 2));
|
||||
m_i2cmem->write_scl(BIT(data, 2));
|
||||
m_sda_dir = BIT(data, 1);
|
||||
i2cmem_sda_write(device,BIT(data, 0));
|
||||
m_i2cmem->write_sda(BIT(data, 0));
|
||||
}
|
||||
|
||||
/****************
|
||||
@ -539,8 +533,6 @@ READ8_MEMBER(splus_state::splus_registers_r)
|
||||
|
||||
READ8_MEMBER(splus_state::splus_reel_optics_r)
|
||||
{
|
||||
device_t *device = machine().device("i2cmem");
|
||||
|
||||
/*
|
||||
Bit 0 = REEL #1
|
||||
Bit 1 = REEL #2
|
||||
@ -559,7 +551,7 @@ READ8_MEMBER(splus_state::splus_reel_optics_r)
|
||||
|
||||
if(!m_sda_dir)
|
||||
{
|
||||
sda = i2cmem_sda_read(device);
|
||||
sda = m_i2cmem->read_sda();
|
||||
}
|
||||
|
||||
reel_optics = reel_optics | 0x40 | (sda<<7);
|
||||
@ -694,7 +686,7 @@ static MACHINE_CONFIG_START( splus, splus_state ) // basic machine hardware
|
||||
MCFG_SCREEN_SIZE((52+1)*8, (31+1)*8)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 25*8-1)
|
||||
|
||||
MCFG_I2CMEM_ADD("i2cmem", i2cmem_interface)
|
||||
MCFG_X2404P_ADD("i2cmem")
|
||||
|
||||
// sound hardware
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
@ -273,7 +273,6 @@ public:
|
||||
DECLARE_READ16_MEMBER(shared_68k_r);
|
||||
DECLARE_WRITE16_MEMBER(shared_68k_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
|
||||
DECLARE_DRIVER_INIT(twinklei);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
|
||||
@ -854,20 +853,6 @@ static void scsi_dma_write( twinkle_state *state, UINT32 *p_n_psxram, UINT32 n_a
|
||||
}
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(twinkle_state,twinklei)
|
||||
{
|
||||
device_t *i2cmem = machine().device("security");
|
||||
i2cmem_e0_write( i2cmem, 0 );
|
||||
i2cmem_e1_write( i2cmem, 0 );
|
||||
i2cmem_e2_write( i2cmem, 0 );
|
||||
i2cmem_wc_write( i2cmem, 0 );
|
||||
}
|
||||
|
||||
static const i2cmem_interface i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 0x100
|
||||
};
|
||||
|
||||
static const rtc65271_interface twinkle_rtc =
|
||||
{
|
||||
DEVCB_NULL
|
||||
@ -919,7 +904,8 @@ static MACHINE_CONFIG_START( twinkle, twinkle_state )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( twinklei, twinkle )
|
||||
MCFG_I2CMEM_ADD("security",i2cmem_interface)
|
||||
MCFG_I2CMEM_ADD("security")
|
||||
MCFG_I2CMEM_DATA_SIZE(0x100)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static INPUT_PORTS_START( twinkle )
|
||||
@ -976,11 +962,11 @@ static INPUT_PORTS_START( twinklei )
|
||||
PORT_INCLUDE( twinkle )
|
||||
|
||||
PORT_MODIFY("OUTSEC")
|
||||
PORT_BIT( 0x00000010, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("security", i2cmem_scl_write)
|
||||
PORT_BIT( 0x00000008, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("security", i2cmem_sda_write)
|
||||
PORT_BIT( 0x00000010, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("security", i2cmem_device, write_scl)
|
||||
PORT_BIT( 0x00000008, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("security", i2cmem_device, write_sda)
|
||||
|
||||
PORT_MODIFY("INSEC")
|
||||
PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_READ_LINE_DEVICE("security", i2cmem_sda_read)
|
||||
PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_READ_LINE_DEVICE_MEMBER("security", i2cmem_device, read_sda)
|
||||
INPUT_PORTS_END
|
||||
|
||||
#define TWINKLE_BIOS \
|
||||
@ -1244,12 +1230,12 @@ GAME( 1999, bmiidxc, gq863, twinkle, twinkle, driver_device, 0, ROT0
|
||||
GAME( 1999, bmiidxca, bmiidxc, twinkle, twinkle, driver_device, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 1999, bmiidxs, gq863, twinkle, twinkle, driver_device, 0, ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 1999, bmiidxc2, gq863, twinkle, twinkle, driver_device, 0, ROT0, "Konami", "Beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 1999, bmiidx2, gq863, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2000, bmiidx3, gq863, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2000, bmiidx4, gq863, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2001, bmiidx5, gq863, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2001, bmiidx6, gq863, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2002, bmiidx7, gq863, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2002, bmiidx8, gq863, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 1999, bmiidx2, gq863, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2000, bmiidx3, gq863, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2000, bmiidx4, gq863, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2001, bmiidx5, gq863, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2001, bmiidx6, gq863, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2002, bmiidx7, gq863, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
GAME( 2002, bmiidx8, gq863, twinklei, twinklei, driver_device, 0, ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
|
||||
|
||||
@ -88,7 +88,7 @@ public:
|
||||
|
||||
protected:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
optional_device<device_t> m_i2cmem;
|
||||
optional_device<i2cmem_device> m_i2cmem;
|
||||
optional_device<device_t> m_wd1772;
|
||||
required_memory_region m_region_maincpu;
|
||||
required_memory_region m_region_vram;
|
||||
|
||||
@ -10,6 +10,7 @@ CuboCD32 definitions
|
||||
#include "includes/amiga.h"
|
||||
#include "machine/microtch.h"
|
||||
#include "sound/cdda.h"
|
||||
#include "machine/i2cmem.h"
|
||||
|
||||
class cd32_state : public amiga_state
|
||||
{
|
||||
@ -105,7 +106,7 @@ private:
|
||||
UINT8 * m_cdrom_toc;
|
||||
emu_timer *m_dma_timer;
|
||||
emu_timer *m_frame_timer;
|
||||
device_t *m_i2cmem;
|
||||
i2cmem_device *m_i2cmem;
|
||||
|
||||
int m_cdrom_is_device;
|
||||
|
||||
|
||||
@ -469,7 +469,7 @@ READ32_MEMBER( archimedes_state::ioc_ctrl_r )
|
||||
|
||||
if ( m_i2cmem )
|
||||
{
|
||||
i2c_data = (i2cmem_sda_read(m_i2cmem) & 1);
|
||||
i2c_data = (m_i2cmem->read_sda() & 1);
|
||||
}
|
||||
|
||||
return (flyback) | (m_ioc_regs[CONTROL] & 0x7c) | (m_i2c_clk<<1) | i2c_data;
|
||||
@ -537,8 +537,8 @@ WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
|
||||
//logerror("IOC I2C: CLK %d DAT %d\n", (data>>1)&1, data&1);
|
||||
if ( m_i2cmem )
|
||||
{
|
||||
i2cmem_sda_write(m_i2cmem, data & 0x01);
|
||||
i2cmem_scl_write(m_i2cmem, (data & 0x02) >> 1);
|
||||
m_i2cmem->write_sda(data & 0x01);
|
||||
m_i2cmem->write_scl((data & 0x02) >> 1);
|
||||
}
|
||||
m_i2c_clk = (data & 2) >> 1;
|
||||
break;
|
||||
|
||||
@ -2,7 +2,6 @@
|
||||
#include "cdrom.h"
|
||||
#include "coreutil.h"
|
||||
#include "sound/cdda.h"
|
||||
#include "machine/i2cmem.h"
|
||||
#include "imagedev/chd_cd.h"
|
||||
#include "includes/cd32.h"
|
||||
|
||||
@ -213,8 +212,8 @@ void akiko_device::nvram_write(UINT32 data)
|
||||
m_i2c_scl_dir = BIT(data,15);
|
||||
m_i2c_sda_dir = BIT(data,14);
|
||||
|
||||
i2cmem_scl_write( m_i2cmem, m_i2c_scl_out );
|
||||
i2cmem_sda_write( m_i2cmem, m_i2c_sda_out );
|
||||
m_i2cmem->write_scl( m_i2c_scl_out );
|
||||
m_i2cmem->write_sda( m_i2c_sda_out );
|
||||
}
|
||||
|
||||
UINT32 akiko_device::nvram_read()
|
||||
@ -236,7 +235,7 @@ UINT32 akiko_device::nvram_read()
|
||||
}
|
||||
else
|
||||
{
|
||||
v |= i2cmem_sda_read( m_i2cmem ) << 30;
|
||||
v |= m_i2cmem->read_sda() << 30;
|
||||
}
|
||||
|
||||
v |= m_i2c_scl_dir << 15;
|
||||
|
||||
@ -270,11 +270,6 @@ static const wd17xx_interface a310_wd17xx_interface =
|
||||
{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
|
||||
};
|
||||
|
||||
static const i2cmem_interface i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 0x100
|
||||
};
|
||||
|
||||
WRITE_LINE_MEMBER( archimedes_state::a310_kart_tx_w )
|
||||
{
|
||||
if(state)
|
||||
@ -303,7 +298,8 @@ static MACHINE_CONFIG_START( a310, a310_state )
|
||||
MCFG_CPU_PROGRAM_MAP(a310_mem)
|
||||
|
||||
MCFG_AAKART_ADD("kart", 8000000/128, kart_interface) // TODO: frequency
|
||||
MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
|
||||
MCFG_I2CMEM_ADD("i2cmem")
|
||||
MCFG_I2CMEM_DATA_SIZE(0x100)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
|
||||
@ -624,52 +624,52 @@ WRITE32_MEMBER( cxhumax_state::cx_i2c0_w )
|
||||
COMBINE_DATA(&m_i2c0_regs[offset]);
|
||||
}
|
||||
|
||||
static UINT8 i2cmem_read_byte( device_t *machine, int last)
|
||||
UINT8 cxhumax_state::i2cmem_read_byte(int last)
|
||||
{
|
||||
UINT8 data = 0;
|
||||
int i;
|
||||
i2cmem_sda_write(machine, 1);
|
||||
m_i2cmem->write_sda(1);
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
i2cmem_scl_write(machine, 1);
|
||||
data = (data << 1) + (i2cmem_sda_read( machine ) ? 1 : 0);
|
||||
i2cmem_scl_write(machine, 0);
|
||||
m_i2cmem->write_scl(1);
|
||||
data = (data << 1) + (m_i2cmem->read_sda() ? 1 : 0);
|
||||
m_i2cmem->write_scl(0);
|
||||
}
|
||||
i2cmem_sda_write(machine, last);
|
||||
i2cmem_scl_write(machine, 1);
|
||||
i2cmem_scl_write(machine, 0);
|
||||
m_i2cmem->write_sda(last);
|
||||
m_i2cmem->write_scl(1);
|
||||
m_i2cmem->write_scl(0);
|
||||
return data;
|
||||
}
|
||||
|
||||
static void i2cmem_write_byte( device_t *machine, UINT8 data)
|
||||
void cxhumax_state::i2cmem_write_byte(UINT8 data)
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
i2cmem_sda_write(machine, (data & 0x80) ? 1 : 0);
|
||||
m_i2cmem->write_sda((data & 0x80) ? 1 : 0);
|
||||
data = data << 1;
|
||||
i2cmem_scl_write(machine, 1);
|
||||
i2cmem_scl_write(machine, 0);
|
||||
m_i2cmem->write_scl(1);
|
||||
m_i2cmem->write_scl(0);
|
||||
}
|
||||
i2cmem_sda_write(machine, 1); // ack bit
|
||||
i2cmem_scl_write(machine, 1);
|
||||
i2cmem_scl_write(machine, 0);
|
||||
m_i2cmem->write_sda(1); // ack bit
|
||||
m_i2cmem->write_scl(1);
|
||||
m_i2cmem->write_scl(0);
|
||||
}
|
||||
|
||||
static void i2cmem_start( device_t *machine )
|
||||
void cxhumax_state::i2cmem_start()
|
||||
{
|
||||
i2cmem_sda_write(machine, 1);
|
||||
i2cmem_scl_write(machine, 1);
|
||||
i2cmem_sda_write(machine, 0);
|
||||
i2cmem_scl_write(machine, 0);
|
||||
m_i2cmem->write_sda(1);
|
||||
m_i2cmem->write_scl(1);
|
||||
m_i2cmem->write_sda(0);
|
||||
m_i2cmem->write_scl(0);
|
||||
}
|
||||
|
||||
static void i2cmem_stop( device_t *machine )
|
||||
void cxhumax_state::i2cmem_stop()
|
||||
{
|
||||
i2cmem_sda_write(machine, 0);
|
||||
i2cmem_scl_write(machine, 1);
|
||||
i2cmem_sda_write(machine, 1);
|
||||
i2cmem_scl_write(machine, 0);
|
||||
m_i2cmem->write_sda(0);
|
||||
m_i2cmem->write_scl(1);
|
||||
m_i2cmem->write_sda(1);
|
||||
m_i2cmem->write_scl(0);
|
||||
}
|
||||
|
||||
READ32_MEMBER( cxhumax_state::cx_i2c1_r )
|
||||
@ -677,7 +677,7 @@ READ32_MEMBER( cxhumax_state::cx_i2c1_r )
|
||||
UINT32 data=0;
|
||||
switch(offset) {
|
||||
case I2C_STAT_REG:
|
||||
data |= i2cmem_sda_read(machine().device("eeprom"))<<3;
|
||||
data |= m_i2cmem->read_sda()<<3;
|
||||
// fall
|
||||
default:
|
||||
data |= m_i2c1_regs[offset]; break;
|
||||
@ -692,36 +692,36 @@ WRITE32_MEMBER( cxhumax_state::cx_i2c1_w )
|
||||
switch(offset) {
|
||||
case I2C_CTRL_REG:
|
||||
if(data&0x10) {// START
|
||||
i2cmem_start(machine().device("eeprom"));
|
||||
i2cmem_start();
|
||||
}
|
||||
if((data&0x4) || ((data&3)==3)) // I2C READ
|
||||
{
|
||||
m_i2c1_regs[I2C_RDATA_REG] = 0;
|
||||
if(data&0x10) i2cmem_write_byte(machine().device("eeprom"),(data>>24)&0xFF);
|
||||
if(data&0x10) i2cmem_write_byte((data>>24)&0xFF);
|
||||
if(m_i2c1_regs[I2C_MODE_REG]&(1<<5)) // BYTE_ORDER
|
||||
{
|
||||
for(int i=0; i<(data&3); i++) {
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),0) << (i*8);
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(0) << (i*8);
|
||||
}
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),(data&0x20)?1:0) << ((data&3)*8);
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte((data&0x20)?1:0) << ((data&3)*8);
|
||||
}
|
||||
else
|
||||
{
|
||||
for(int i=0; i<(data&3); i++) {
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),0);
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(0);
|
||||
m_i2c1_regs[I2C_RDATA_REG] <<= 8;
|
||||
}
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),(data&0x20)?1:0);
|
||||
m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte((data&0x20)?1:0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for(int i=0; i<=(data&3); i++) {
|
||||
i2cmem_write_byte(machine().device("eeprom"),(data>>(24-(i*8))&0xFF));
|
||||
i2cmem_write_byte((data>>(24-(i*8))&0xFF));
|
||||
}
|
||||
}
|
||||
if(data&0x20) {// STOP
|
||||
i2cmem_stop(machine().device("eeprom"));
|
||||
i2cmem_stop();
|
||||
}
|
||||
|
||||
/* The interrupt status bit is set at the end of an I2C read or write operation. */
|
||||
@ -978,7 +978,6 @@ INPUT_PORTS_END
|
||||
|
||||
void cxhumax_state::machine_start()
|
||||
{
|
||||
m_i2cmem = machine().device("eeprom");
|
||||
int index = 0;
|
||||
for(index = 0; index < MAX_CX_TIMERS; index++)
|
||||
{
|
||||
@ -1054,18 +1053,14 @@ static GENERIC_TERMINAL_INTERFACE( terminal_intf )
|
||||
DEVCB_NULL
|
||||
};
|
||||
|
||||
static const i2cmem_interface i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 0x2000
|
||||
};
|
||||
|
||||
static MACHINE_CONFIG_START( cxhumax, cxhumax_state )
|
||||
MCFG_CPU_ADD("maincpu", ARM920T, 180000000) // CX24175 (RevC up?)
|
||||
MCFG_CPU_PROGRAM_MAP(cxhumax_map)
|
||||
|
||||
|
||||
MCFG_INTEL_28F320J3D_ADD("flash")
|
||||
MCFG_I2CMEM_ADD("eeprom",i2cmem_interface)
|
||||
MCFG_I2CMEM_ADD("eeprom")
|
||||
MCFG_I2CMEM_DATA_SIZE(0x2000)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
|
||||
@ -1316,10 +1316,10 @@ WRITE8_MEMBER(pokemini_state::pokemini_hwreg_w)
|
||||
Bit 7 R/W IR received bit (mirror, if device not selected: 0)
|
||||
*/
|
||||
if ( m_pm_reg[0x60] & 0x04 )
|
||||
m_i2cmem->set_sda_line( ( data & 0x04 ) ? 1 : 0 );
|
||||
m_i2cmem->write_sda( ( data & 0x04 ) ? 1 : 0 );
|
||||
|
||||
if ( m_pm_reg[0x60] & 0x08 )
|
||||
m_i2cmem->set_scl_line( ( data & 0x08 ) ? 1 : 0 );
|
||||
m_i2cmem->write_scl( ( data & 0x08 ) ? 1 : 0 );
|
||||
break;
|
||||
case 0x70: /* Sound related */
|
||||
m_pm_reg[0x70] = data;
|
||||
@ -1480,7 +1480,7 @@ READ8_MEMBER(pokemini_state::pokemini_hwreg_r)
|
||||
case 0x61:
|
||||
if ( ! ( m_pm_reg[0x60] & 0x04 ) )
|
||||
{
|
||||
data = ( data & ~ 0x04 ) | ( m_i2cmem->read_sda_line() ? 0x04 : 0x00 );
|
||||
data = ( data & ~ 0x04 ) | ( m_i2cmem->read_sda() ? 0x04 : 0x00 );
|
||||
}
|
||||
|
||||
if ( ! ( m_pm_reg[0x60] & 0x08 ) )
|
||||
@ -1758,12 +1758,6 @@ static const speaker_interface pokemini_speaker_interface =
|
||||
};
|
||||
|
||||
|
||||
static const i2cmem_interface i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 0x2000
|
||||
};
|
||||
|
||||
|
||||
void pokemini_state::video_start()
|
||||
{
|
||||
machine().primary_screen->register_screen_bitmap(m_bitmap);
|
||||
@ -1784,7 +1778,8 @@ static MACHINE_CONFIG_START( pokemini, pokemini_state )
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
||||
|
||||
MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
|
||||
MCFG_I2CMEM_ADD("i2cmem")
|
||||
MCFG_I2CMEM_DATA_SIZE(0x2000)
|
||||
|
||||
/* This still needs to be improved to actually match the hardware */
|
||||
MCFG_SCREEN_ADD("screen", LCD)
|
||||
|
||||
@ -1154,11 +1154,6 @@ static MACHINE_CONFIG_START( vsmile, vii_state )
|
||||
MCFG_SOFTWARE_LIST_ADD("cart_list","vsmile_cart")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static const i2cmem_interface i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 0x200
|
||||
};
|
||||
|
||||
static MACHINE_CONFIG_START( batman, vii_state )
|
||||
|
||||
MCFG_CPU_ADD( "maincpu", UNSP, XTAL_27MHz)
|
||||
@ -1166,7 +1161,8 @@ static MACHINE_CONFIG_START( batman, vii_state )
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", vii_state, vii_vblank)
|
||||
|
||||
|
||||
MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
|
||||
MCFG_I2CMEM_ADD("i2cmem")
|
||||
MCFG_I2CMEM_DATA_SIZE(0x200)
|
||||
|
||||
MCFG_SCREEN_ADD( "screen", RASTER )
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
|
||||
@ -32,7 +32,10 @@ public:
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_flash(*this, "flash"),
|
||||
m_ram(*this, "ram"),
|
||||
m_terminal(*this, TERMINAL_TAG) { }
|
||||
m_terminal(*this, TERMINAL_TAG),
|
||||
m_i2cmem(*this, "eeprom")
|
||||
{
|
||||
}
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<intel_28f320j3d_device> m_flash;
|
||||
@ -135,9 +138,14 @@ public:
|
||||
|
||||
UINT32 m_i2c0_regs[0x20/4];
|
||||
UINT32 m_i2c1_regs[0x20/4];
|
||||
device_t *m_i2cmem;
|
||||
required_device<i2cmem_device> m_i2cmem;
|
||||
UINT32 m_i2c2_regs[0x20/4];
|
||||
|
||||
void i2cmem_start();
|
||||
void i2cmem_stop();
|
||||
UINT8 i2cmem_read_byte(int last);
|
||||
void i2cmem_write_byte(UINT8 data);
|
||||
|
||||
UINT32 m_mccfg_regs[0x0C/4];
|
||||
|
||||
UINT32 m_chipcontrol_regs[0x74/4];
|
||||
|
||||
@ -107,48 +107,25 @@ md_eeprom_blara_device::md_eeprom_blara_device(const machine_config &mconfig, co
|
||||
// SERIAL I2C DEVICE
|
||||
//-------------------------------------------------
|
||||
|
||||
static const i2cmem_interface md_24c01_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 4, 0x80
|
||||
};
|
||||
|
||||
|
||||
static const i2cmem_interface md_24c02_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 4, 0x100
|
||||
};
|
||||
|
||||
|
||||
static const i2cmem_interface md_24c16_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 8, 0x800
|
||||
};
|
||||
|
||||
|
||||
static const i2cmem_interface md_24c64_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 8, 0x2000
|
||||
};
|
||||
|
||||
|
||||
// MD_STD_EEPROM & MD_EEPROM_NHLPA
|
||||
MACHINE_CONFIG_FRAGMENT( md_i2c_24c01 )
|
||||
MCFG_I2CMEM_ADD("i2cmem", md_24c01_i2cmem_interface)
|
||||
MCFG_24C01_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
// MD_EEPROM_NBAJAM & MD_EEPROM_NBAJAMTE
|
||||
MACHINE_CONFIG_FRAGMENT( md_i2c_24c02 )
|
||||
MCFG_I2CMEM_ADD("i2cmem", md_24c02_i2cmem_interface)
|
||||
MCFG_24C02_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
// MD_EEPROM_NFLQB
|
||||
MACHINE_CONFIG_FRAGMENT( md_i2c_24c16 )
|
||||
MCFG_I2CMEM_ADD("i2cmem", md_24c16_i2cmem_interface)
|
||||
MCFG_24C16_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
// MD_EEPROM_CSLAM & MD_EEPROM_BLARA
|
||||
MACHINE_CONFIG_FRAGMENT( md_i2c_24c64 )
|
||||
MCFG_I2CMEM_ADD("i2cmem", md_24c64_i2cmem_interface)
|
||||
MCFG_24C64_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -217,7 +194,7 @@ READ16_MEMBER(md_std_eeprom_device::read)
|
||||
{
|
||||
if (offset == 0x200000/2)
|
||||
{
|
||||
return i2cmem_sda_read(m_i2cmem);
|
||||
return m_i2cmem->read_sda();
|
||||
}
|
||||
if (offset < 0x400000/2)
|
||||
return m_rom[MD_ADDR(offset)];
|
||||
@ -231,8 +208,8 @@ WRITE16_MEMBER(md_std_eeprom_device::write)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 1);
|
||||
m_i2c_mem = BIT(data, 0);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
}
|
||||
|
||||
@ -240,8 +217,8 @@ READ16_MEMBER(md_eeprom_nbajam_device::read)
|
||||
{
|
||||
if (offset == 0x200000/2)
|
||||
{
|
||||
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
|
||||
return i2cmem_sda_read(m_i2cmem);
|
||||
// m_i2c_mem = m_i2cmem->read_sda();
|
||||
return m_i2cmem->read_sda();
|
||||
}
|
||||
if (offset < 0x400000/2)
|
||||
return m_rom[MD_ADDR(offset)];
|
||||
@ -255,8 +232,8 @@ WRITE16_MEMBER(md_eeprom_nbajam_device::write)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 1);
|
||||
m_i2c_mem = BIT(data, 0);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
}
|
||||
|
||||
@ -264,8 +241,8 @@ READ16_MEMBER(md_eeprom_nbajamte_device::read)
|
||||
{
|
||||
if (offset == 0x200000/2)
|
||||
{
|
||||
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
|
||||
return i2cmem_sda_read(m_i2cmem);
|
||||
// m_i2c_mem = m_i2cmem->read_sda();
|
||||
return m_i2cmem->read_sda();
|
||||
}
|
||||
if (offset < 0x400000/2)
|
||||
return m_rom[MD_ADDR(offset)];
|
||||
@ -280,13 +257,13 @@ WRITE16_MEMBER(md_eeprom_nbajamte_device::write)
|
||||
if(ACCESSING_BITS_8_15)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 8);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
}
|
||||
|
||||
if(ACCESSING_BITS_0_7)
|
||||
{
|
||||
m_i2c_mem = BIT(data, 0);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -296,8 +273,8 @@ READ16_MEMBER(md_eeprom_cslam_device::read)
|
||||
{
|
||||
if (offset == 0x200000/2)
|
||||
{
|
||||
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
|
||||
return i2cmem_sda_read(m_i2cmem);
|
||||
// m_i2c_mem = m_i2cmem->read_sda();
|
||||
return m_i2cmem->read_sda();
|
||||
}
|
||||
if (offset < 0x400000/2)
|
||||
return m_rom[MD_ADDR(offset)];
|
||||
@ -312,13 +289,13 @@ WRITE16_MEMBER(md_eeprom_cslam_device::write)
|
||||
if(ACCESSING_BITS_8_15)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 8);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
}
|
||||
|
||||
if(ACCESSING_BITS_0_7)
|
||||
{
|
||||
m_i2c_mem = BIT(data, 0);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -329,7 +306,7 @@ READ16_MEMBER(md_eeprom_nflqb_device::read)
|
||||
if (offset == 0x200000/2)
|
||||
{
|
||||
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
|
||||
return i2cmem_sda_read(m_i2cmem);
|
||||
return m_i2cmem->read_sda();
|
||||
}
|
||||
if (offset < 0x400000/2)
|
||||
return m_rom[MD_ADDR(offset)];
|
||||
@ -343,8 +320,8 @@ WRITE16_MEMBER(md_eeprom_nflqb_device::write)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 8);
|
||||
m_i2c_mem = BIT(data, 0);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
}
|
||||
|
||||
@ -352,8 +329,8 @@ READ16_MEMBER(md_eeprom_nhlpa_device::read)
|
||||
{
|
||||
if (offset == 0x200000/2)
|
||||
{
|
||||
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
|
||||
return (i2cmem_sda_read(m_i2cmem) & 1) << 7;
|
||||
// m_i2c_mem = m_i2cmem->read_sda();
|
||||
return (m_i2cmem->read_sda() & 1) << 7;
|
||||
}
|
||||
if (offset < 0x400000/2)
|
||||
return m_rom[MD_ADDR(offset)];
|
||||
@ -367,8 +344,8 @@ WRITE16_MEMBER(md_eeprom_nhlpa_device::write)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 6);
|
||||
m_i2c_mem = BIT(data, 7);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
}
|
||||
|
||||
@ -376,8 +353,8 @@ READ16_MEMBER(md_eeprom_blara_device::read)
|
||||
{
|
||||
if (offset == 0x380000/2)
|
||||
{
|
||||
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
|
||||
return (i2cmem_sda_read(m_i2cmem) & 1) << 7;
|
||||
// m_i2c_mem = m_i2cmem->read_sda();
|
||||
return (m_i2cmem->read_sda() & 1) << 7;
|
||||
}
|
||||
if (offset < 0x400000/2)
|
||||
return m_rom[MD_ADDR(offset)];
|
||||
@ -391,7 +368,7 @@ WRITE16_MEMBER(md_eeprom_blara_device::write)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 9);
|
||||
m_i2c_mem = BIT(data, 8);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
}
|
||||
|
||||
@ -75,24 +75,14 @@ md_seprom_mm96_device::md_seprom_mm96_device(const machine_config &mconfig, cons
|
||||
// SERIAL I2C DEVICE
|
||||
//-------------------------------------------------
|
||||
|
||||
static const i2cmem_interface md_24c08_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 0x400
|
||||
};
|
||||
|
||||
static const i2cmem_interface md_24c16a_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 0, 0x800
|
||||
};
|
||||
|
||||
// MD_SEPROM_CODEMAST
|
||||
MACHINE_CONFIG_FRAGMENT( md_i2c_24c08 )
|
||||
MCFG_I2CMEM_ADD("i2cmem", md_24c08_i2cmem_interface)
|
||||
MCFG_24C08_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
// MD_SEPROM_MM96
|
||||
MACHINE_CONFIG_FRAGMENT( md_i2c_24c16a )
|
||||
MCFG_I2CMEM_ADD("i2cmem", md_24c16a_i2cmem_interface)
|
||||
MCFG_24C16A_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -219,7 +209,7 @@ READ16_MEMBER(md_seprom_codemast_device::read)
|
||||
{
|
||||
if (offset == 0x380000/2)
|
||||
{
|
||||
m_i2c_mem = i2cmem_sda_read(m_i2cmem);
|
||||
m_i2c_mem = m_i2cmem->read_sda();
|
||||
return (m_i2c_mem & 1) << 7;
|
||||
}
|
||||
if (offset == 0x38fffe/2)
|
||||
@ -251,8 +241,8 @@ WRITE16_MEMBER(md_seprom_codemast_device::write)
|
||||
{
|
||||
m_i2c_clk = BIT(data, 9);
|
||||
m_i2c_mem = BIT(data, 8);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
}
|
||||
if (offset == 0x38fffe/2)
|
||||
{
|
||||
|
||||
@ -408,8 +408,8 @@ WRITE8_MEMBER(nes_lz93d50_24c01_device::write_h)
|
||||
case 0x0d:
|
||||
m_i2c_clk = BIT(data, 5);
|
||||
m_i2c_mem = BIT(data, 6);
|
||||
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
|
||||
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
|
||||
m_i2cmem->write_scl(m_i2c_clk);
|
||||
m_i2cmem->write_sda(m_i2c_mem);
|
||||
break;
|
||||
default:
|
||||
lz93d50_write(space, offset & 0x0f, data, mem_mask);
|
||||
@ -420,20 +420,15 @@ WRITE8_MEMBER(nes_lz93d50_24c01_device::write_h)
|
||||
READ8_MEMBER(nes_lz93d50_24c01_device::read_m)
|
||||
{
|
||||
LOG_MMC(("lz93d50 EEPROM read, offset: %04x\n", offset));
|
||||
return (i2cmem_sda_read(m_i2cmem) & 1) << 4;
|
||||
return (m_i2cmem->read_sda() & 1) << 4;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// SERIAL I2C DEVICE
|
||||
//-------------------------------------------------
|
||||
|
||||
static const i2cmem_interface bandai_24c01_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 4, 0x80
|
||||
};
|
||||
|
||||
MACHINE_CONFIG_FRAGMENT( bandai_i2c_24c01 )
|
||||
MCFG_I2CMEM_ADD("i2cmem", bandai_24c01_i2cmem_interface)
|
||||
MCFG_24C01_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
machine_config_constructor nes_lz93d50_24c01_device::device_mconfig_additions() const
|
||||
@ -443,14 +438,8 @@ machine_config_constructor nes_lz93d50_24c01_device::device_mconfig_additions()
|
||||
|
||||
|
||||
|
||||
static const i2cmem_interface bandai_24c02_i2cmem_interface =
|
||||
{
|
||||
I2CMEM_SLAVE_ADDRESS, 4, 0x100
|
||||
};
|
||||
|
||||
|
||||
MACHINE_CONFIG_FRAGMENT( bandai_i2c_24c02 )
|
||||
MCFG_I2CMEM_ADD("i2cmem", bandai_24c02_i2cmem_interface)
|
||||
MCFG_24C02_ADD("i2cmem")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
machine_config_constructor nes_lz93d50_24c02_device::device_mconfig_additions() const
|
||||
|
||||
Loading…
Reference in New Issue
Block a user