Spacing cleanups.

This commit is contained in:
Aaron Giles 2007-12-24 04:03:00 +00:00
parent 2d19847752
commit 76278ddf02
14 changed files with 306 additions and 306 deletions

View File

@ -409,7 +409,7 @@ static void update_stereo(void *param, stream_sample_t **inputs, stream_sample_t
// Sign + magnitude format
if ((v->mode & 0x01) && (lastdt & 0x80))
lastdt = -(lastdt & 0x7f);
// Sign flip
if (v->mode & 0x40)
lastdt = -lastdt;

View File

@ -941,7 +941,7 @@ void dcs2_init(int dram_in_mb, offs_t polling_offset)
dcs.rev = 4;
}
dcs.channels = 2;
/* always boot from the base of REGION_SOUND1 */
dcs.bootrom = (UINT16 *)memory_region(REGION_SOUND1);
dcs.bootrom_words = memory_region_length(REGION_SOUND1) / 2;
@ -2097,17 +2097,17 @@ static int preprocess_stage_1(UINT16 data)
/* look for command 0x001a to transfer chunks of data */
if (data == 0x001a)
{
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("%08X:DCS Transfer command %04X\n", activecpu_get_pc(), data);
transfer.state++;
if (transfer.hle_enabled)
if (transfer.hle_enabled)
return 1;
}
/* look for command 0x002a to start booting the uploaded program */
else if (data == 0x002a)
{
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("%08X:DCS State change %04X\n", activecpu_get_pc(), data);
transfer.dcs_state = 1;
}
@ -2115,7 +2115,7 @@ static int preprocess_stage_1(UINT16 data)
/* anything else is ignored */
else
{
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("Command: %04X\n", data);
}
break;
@ -2124,9 +2124,9 @@ static int preprocess_stage_1(UINT16 data)
/* first word is the start address */
transfer.start = data;
transfer.state++;
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("Start address = %04X\n", transfer.start);
if (transfer.hle_enabled)
if (transfer.hle_enabled)
return 1;
break;
@ -2134,9 +2134,9 @@ static int preprocess_stage_1(UINT16 data)
/* second word is the stop address */
transfer.stop = data;
transfer.state++;
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("Stop address = %04X\n", transfer.stop);
if (transfer.hle_enabled)
if (transfer.hle_enabled)
return 1;
break;
@ -2243,7 +2243,7 @@ static int preprocess_stage_2(UINT16 data)
/* anything else is ignored */
else
{
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("%08X:Command: %04X\n", activecpu_get_pc(), data);
}
break;
@ -2278,7 +2278,7 @@ static int preprocess_stage_2(UINT16 data)
/* fourth word is the lower bits of the stop address */
transfer.stop |= data;
transfer.state++;
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("Stop address = %08X\n", transfer.stop);
/* at this point, we can compute how many words to expect for the transfer */
@ -2300,7 +2300,7 @@ static int preprocess_stage_2(UINT16 data)
/* if we're out, stop the transfer */
if (--transfer.writes_left == 0)
{
if (LOG_DCS_TRANSFERS)
if (LOG_DCS_TRANSFERS)
logerror("Transfer done, sum = %04X\n", transfer.sum);
transfer.state = 0;
}

View File

@ -56,7 +56,7 @@ static const double bb_engine_gains[16] =
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2 + BUGGYBOY_R3 + BUGGYBOY_R4S) + 1.0/100E3)/100E3,
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2 + BUGGYBOY_R3S + BUGGYBOY_R4 ) + 1.0/100E3)/100E3,
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2 + BUGGYBOY_R3S + BUGGYBOY_R4S) + 1.0/100E3)/100E3,
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2S + BUGGYBOY_R3 + BUGGYBOY_R4 ) + 1.0/100E3)/100E3,
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2S + BUGGYBOY_R3 + BUGGYBOY_R4 ) + 1.0/100E3)/100E3,
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2S + BUGGYBOY_R3 + BUGGYBOY_R4S) + 1.0/100E3)/100E3,
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2S + BUGGYBOY_R3S + BUGGYBOY_R4 ) + 1.0/100E3)/100E3,
-1.0/(1.0/(BUGGYBOY_R1 + BUGGYBOY_R2S + BUGGYBOY_R3S + BUGGYBOY_R4S) + 1.0/100E3)/100E3,
@ -72,7 +72,7 @@ static const double bb_engine_gains[16] =
/*
8253 Programmable Interval Timer
8253 Programmable Interval Timer
*/
static struct
{
@ -90,35 +90,35 @@ static struct
} pit8253;
/*
Port A Port B
====== ======
Port A Port B
====== ======
0: Engine 1 gain (FR) #0 0: Coin Counter 1
1: Engine 1 gain (FR) #1 1: Coin Counter 2
2: Engine 1 gain (FR) #2 2: Coin Counter 3 (Unused)
3: Engine 1 gain (FR) #3 3: Engine 0 gain
4: Engine 1 gain (FL) #0 4: Noise EN1
5: Engine 1 gain (FL) #1 5: Noise EN2
6: Engine 1 gain (FL) #2 6: Enable YM IC24 output on RR
7: Engine 1 gain (FL) #3 7: Enable YM IC19 output on RL
0: Engine 1 gain (FR) #0 0: Coin Counter 1
1: Engine 1 gain (FR) #1 1: Coin Counter 2
2: Engine 1 gain (FR) #2 2: Coin Counter 3 (Unused)
3: Engine 1 gain (FR) #3 3: Engine 0 gain
4: Engine 1 gain (FL) #0 4: Noise EN1
5: Engine 1 gain (FL) #1 5: Noise EN2
6: Engine 1 gain (FL) #2 6: Enable YM IC24 output on RR
7: Engine 1 gain (FL) #3 7: Enable YM IC19 output on RL
The engine sounds are generated by an 8253. There are two channels.
The engine sounds are generated by an 8253. There are two channels.
#0 is the player's buggy
#1 is the opponents' buggies
#0 is the player's buggy
#1 is the opponents' buggies
+------------> GAIN[1] +--> FL
| +--> FR
8255 #0 --+--> BL
+--> BR
+------------> GAIN[1] +--> FL
| +--> FR
8255 #0 --+--> BL
+--> BR
8255 #1 --+--> GAIN[2] ---> FL
+--> GAIN[3] ---> FR
8255 #1 --+--> GAIN[2] ---> FL
+--> GAIN[3] ---> FR
[1] is used to amplify sound during tunnel.
[2] and [3] are stereo fades
[2] and [3] are stereo fades
*/
@ -201,7 +201,7 @@ static void tx1_stream_update(void *param, stream_sample_t **inputs, stream_samp
}
/*
This is admittedly a bit of a hack job...
This is admittedly a bit of a hack job...
*/
static void buggyboy_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffer, int length)
{
@ -230,7 +230,7 @@ static void buggyboy_stream_update(void *param, stream_sample_t **inputs, stream
while (length--)
{
int i;
stream_sample_t pit0, pit1, n1, n2;
stream_sample_t pit0, pit1, n1, n2;
pit0 = buggyboy_eng_voltages[(step0 >> 24) & 0xf];
pit1 = buggyboy_eng_voltages[(step1 >> 24) & 0xf];
@ -308,12 +308,12 @@ void *buggyboy_sh_start(int clock, const struct CustomSound_interface *config)
void buggyboy_sh_reset(void *token)
{
step0 = step1 = 0;
/* Reset noise LFSR */
noise_lfsra = 0;
noise_lfsrb = 1;
noise_lfsrc = 0;
noise_lfsrd = 0;
noise_lfsrd = 0;
}
void *tx1_sh_start(int clock, const struct CustomSound_interface *config)

View File

@ -362,7 +362,7 @@ static MACHINE_DRIVER_START( ashnojoe )
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
MDRV_CPU_IO_MAP(sound_readport,sound_writeport)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_VBLANK_TIME(DEFAULT_60HZ_VBLANK_DURATION)
/* video hardware */

View File

@ -65,7 +65,7 @@ static MACHINE_RESET( midzeus )
gun_timer[0] = timer_alloc(invasn_gun_callback, NULL);
gun_timer[1] = timer_alloc(invasn_gun_callback, NULL);
cmos_protected = TRUE;
}
@ -100,7 +100,7 @@ static READ32_HANDLER( cmos_r )
static WRITE32_HANDLER( zpram_w )
{
/* ZPRAM seems to use the same protection control as CMOS */
// if (!cmos_protected)
// if (!cmos_protected)
COMBINE_DATA(zpram + offset);
cmos_protected = TRUE;
}
@ -279,12 +279,12 @@ static READ32_HANDLER( unknown_8d0000_r )
}
static WRITE32_HANDLER( unknown_8d0000_w )
{
// logerror("%06X:write to %06X = %08X\n", activecpu_get_pc(), 0x8d0000 + offset, data);
// logerror("%06X:write to %06X = %08X\n", activecpu_get_pc(), 0x8d0000 + offset, data);
COMBINE_DATA(&unknown_8d0000[offset]);
}
static WRITE32_HANDLER( unknown_9d0000_w )
{
// logerror("%06X:write to %06X = %08X\n", activecpu_get_pc(), 0x9d0000 + offset, data);
// logerror("%06X:write to %06X = %08X\n", activecpu_get_pc(), 0x9d0000 + offset, data);
COMBINE_DATA(&unknown_8d0000[offset]);
}
@ -794,7 +794,7 @@ static MACHINE_DRIVER_START( midzeus )
/* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
MDRV_PALETTE_LENGTH(32768)
MDRV_SCREEN_ADD("main", 0)
MDRV_SCREEN_RAW_PARAMS(MIDZEUS_VIDEO_CLOCK/8, 529, 0, 400, 278, 0, 256)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)

View File

@ -480,7 +480,7 @@ static ADDRESS_MAP_START( tharrier_writemem, ADDRESS_SPACE_PROGRAM, 16 )
// AM_RANGE(0x080018, 0x080019) AM_WRITE(nmk_tilebank_w)
AM_RANGE(0x08001e, 0x08001f) AM_WRITE(soundlatch_word_w)
AM_RANGE(0x088000, 0x0883ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
// AM_RANGE(0x08c000, 0x08c007) AM_WRITE(nmk_scroll_w)
// AM_RANGE(0x08c000, 0x08c007) AM_WRITE(nmk_scroll_w)
AM_RANGE(0x090000, 0x093fff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
AM_RANGE(0x09c000, 0x09c7ff) AM_WRITE(MWA16_NOP) /* Unused txvideoram area? */
AM_RANGE(0x09d000, 0x09d7ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
@ -635,7 +635,7 @@ anything to compare,infact
/*
static READ16_HANDLER( mcu_shared_r )
{
return nmk16_mcu_shared_ram[offset];
return nmk16_mcu_shared_ram[offset];
}
*/
@ -840,11 +840,11 @@ static WRITE16_HANDLER( tdragon_mainram_w )
static ADDRESS_MAP_START( tdragon_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_READ(MRA16_ROM)
AM_RANGE(0x044022, 0x044023) AM_READ(MRA16_NOP) /* No Idea */
// AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(MRA16_RAM) /* Work RAM */
// AM_RANGE(0x0b8000, 0x0b8fff) AM_READ(MRA16_RAM) /* Sprite RAM */
// AM_RANGE(0x0b9000, 0x0bdfff) AM_READ(MRA16_RAM) /* Work RAM */
// AM_RANGE(0x0be000, 0x0befff) AM_READ(MRA16_RAM) /* Work RAM */
// AM_RANGE(0x0bf000, 0x0bffff) AM_READ(MRA16_RAM) /* Work RAM */
// AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(MRA16_RAM) /* Work RAM */
// AM_RANGE(0x0b8000, 0x0b8fff) AM_READ(MRA16_RAM) /* Sprite RAM */
// AM_RANGE(0x0b9000, 0x0bdfff) AM_READ(MRA16_RAM) /* Work RAM */
// AM_RANGE(0x0be000, 0x0befff) AM_READ(MRA16_RAM) /* Work RAM */
// AM_RANGE(0x0bf000, 0x0bffff) AM_READ(MRA16_RAM) /* Work RAM */
AM_RANGE(0x0b0000, 0x0bffff) AM_RAM AM_WRITE( tdragon_mainram_w ) AM_BASE(&nmk16_mainram)
@ -860,11 +860,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( tdragon_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(MWA16_ROM)
// AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(MWA16_RAM) /* Work RAM */
// AM_RANGE(0x0b8000, 0x0b8fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) /* Sprite RAM */
// AM_RANGE(0x0b9000, 0x0bdfff) AM_WRITE(MWA16_RAM) AM_BASE(&nmk16_mcu_work_ram) /* Work RAM */
// AM_RANGE(0x0be000, 0x0befff) AM_RAM AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_BASE(&nmk16_mcu_shared_ram) /* Work RAM */
// AM_RANGE(0x0bf000, 0x0bffff) AM_WRITE(MWA16_RAM) /* Work RAM */
// AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(MWA16_RAM) /* Work RAM */
// AM_RANGE(0x0b8000, 0x0b8fff) AM_WRITE(MWA16_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) /* Sprite RAM */
// AM_RANGE(0x0b9000, 0x0bdfff) AM_WRITE(MWA16_RAM) AM_BASE(&nmk16_mcu_work_ram) /* Work RAM */
// AM_RANGE(0x0be000, 0x0befff) AM_RAM AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_BASE(&nmk16_mcu_shared_ram) /* Work RAM */
// AM_RANGE(0x0bf000, 0x0bffff) AM_WRITE(MWA16_RAM) /* Work RAM */
AM_RANGE(0x0c0014, 0x0c0015) AM_WRITE(nmk_flipscreen_w) /* Maybe */
AM_RANGE(0x0c0018, 0x0c0019) AM_WRITE(nmk_tilebank_w) /* Tile Bank ? */
AM_RANGE(0x0c001e, 0x0c001f) AM_WRITE(NMK004_w)

View File

@ -7,27 +7,27 @@
Games supported:
* TX-1 (1983) [2 sets]
* Buggy Boy (1985)
* Buggy Boy Junior (1986)
* Buggy Boy Junior (1986)
Notes:
* 'buggyboy' and 'tx1' are preliminary
* 'buggyboy' set is using ROMs from 'buggybjr' for testing purposes
until the original set can be dumped.
Notes:
* 'buggyboy' and 'tx1' are preliminary
* 'buggyboy' set is using ROMs from 'buggybjr' for testing purposes
until the original set can be dumped.
****************************************************************************
Buggy Boy Error Codes TX-1 Error Codes
===================== ================
Buggy Boy Error Codes TX-1 Error Codes
===================== ================
1 Main CPU RAM 1 Main microprocessor RAM
2 Video (character) RAM 2 Video RAM
3 Road/common RAM 3 Common RAM
4 Sound RAM 4 Sound RAM
5 Main CPU ROM 5 Main microprocessor ROM
6 Sound ROM 6 Sound ROM
8 Auxillary ROM 10 Interface ROM (time-out error)
12 Arithmetic unit 11 Common RAM (access for arithmetic CPU)
22 Main 8086-Z80 timeout 12 Common RAM (access for arithmetic CPU)
1 Main CPU RAM 1 Main microprocessor RAM
2 Video (character) RAM 2 Video RAM
3 Road/common RAM 3 Common RAM
4 Sound RAM 4 Sound RAM
5 Main CPU ROM 5 Main microprocessor ROM
6 Sound ROM 6 Sound ROM
8 Auxillary ROM 10 Interface ROM (time-out error)
12 Arithmetic unit 11 Common RAM (access for arithmetic CPU)
22 Main 8086-Z80 timeout 12 Common RAM (access for arithmetic CPU)
13 Arithmetic RAM
14 Common RAM (access for arithmetic CPU)
15 Object RAM
@ -59,7 +59,7 @@ static UINT32 ts;
/* Main CPU and Z80 synchronisation */
static WRITE16_HANDLER( z80_busreq_w )
{
cpunum_set_input_line(2, INPUT_LINE_HALT, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
cpunum_set_input_line(2, INPUT_LINE_HALT, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
}
static WRITE16_HANDLER( resume_math_w )
@ -352,19 +352,19 @@ static READ16_HANDLER( dipswitches_r )
return (readinputport(0) & 0xfffe) | ts;
}
/*
(TODO) TS: Connected in place of dipswitch A bit 0
Accessed on startup as some sort of acknowledgement
/*
(TODO) TS: Connected in place of dipswitch A bit 0
Accessed on startup as some sort of acknowledgement
*/
static WRITE8_HANDLER( ts_w )
{
// TS = 1;
// TS = 1;
z80_ram[offset] = data;
}
static READ8_HANDLER( ts_r )
{
// TS = 1;
// TS = 1;
return z80_ram[offset];
}
@ -524,7 +524,7 @@ static ADDRESS_MAP_START( buggyboy_sound_prg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6800, 0x6803) AM_READWRITE(ppi8255_0_r, ppi8255_0_w)
AM_RANGE(0x7000, 0x7003) AM_RAM
AM_RANGE(0x7800, 0x7800) AM_WRITE(z80_intreq_w)
AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(ts_r, ts_w)
AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(ts_r, ts_w)
ADDRESS_MAP_END
/* Buggy Boy Jr Sound PCB TC043 */
@ -532,7 +532,7 @@ static ADDRESS_MAP_START( buggybjr_sound_prg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&z80_ram)
AM_RANGE(0x5000, 0x5003) AM_READWRITE(pit8253_r, pit8253_w)
AM_RANGE(0x6000, 0x6001) AM_READ(bbjr_analog_r)
AM_RANGE(0x6000, 0x6001) AM_READ(bbjr_analog_r)
AM_RANGE(0x7000, 0x7000) AM_WRITE(z80_intreq_w)
AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(ts_r, ts_w)
ADDRESS_MAP_END
@ -659,7 +659,7 @@ static struct CustomSound_interface bb_custom_interface =
static MACHINE_DRIVER_START( tx1 )
MDRV_CPU_ADD(I8086, 5000000)
MDRV_CPU_PROGRAM_MAP(tx1_main, 0)
// MDRV_WATCHDOG_TIME_INIT(5)
// MDRV_WATCHDOG_TIME_INIT(5)
MDRV_CPU_ADD(I8086,5000000)
MDRV_CPU_PROGRAM_MAP(tx1_math, 0)
@ -699,7 +699,7 @@ static MACHINE_DRIVER_START( tx1 )
MDRV_VIDEO_UPDATE(tx1)
MDRV_SPEAKER_STANDARD_STEREO("Front Left", "Front Right")
// MDRV_SPEAKER_STANDARD_STEREO("Rear Left", "Rear Right")
// MDRV_SPEAKER_STANDARD_STEREO("Rear Left", "Rear Right")
MDRV_SOUND_ADD(AY8910, TX1_PIXEL_CLOCK / 8)
MDRV_SOUND_CONFIG(tx1_ay8910_interface)
@ -716,7 +716,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( buggyboy )
MDRV_CPU_ADD(BUGGYBOY_CPU_TYPE, 5000000)
MDRV_CPU_PROGRAM_MAP(buggyboy_main, 0)
// MDRV_WATCHDOG_TIME_INIT(5)
// MDRV_WATCHDOG_TIME_INIT(5)
MDRV_CPU_ADD(BUGGYBOY_CPU_TYPE, 5000000)
MDRV_CPU_PROGRAM_MAP(buggyboy_math, 0)
@ -753,7 +753,7 @@ static MACHINE_DRIVER_START( buggyboy )
MDRV_VIDEO_UPDATE(buggyboy)
MDRV_SPEAKER_STANDARD_STEREO("Front Left", "Front Right")
// MDRV_SPEAKER_STANDARD_STEREO("Rear Left", "Rear Right")
// MDRV_SPEAKER_STANDARD_STEREO("Rear Left", "Rear Right")
MDRV_SOUND_ADD(YM2149, BUGGYBOY_ZCLK / 4)
MDRV_SOUND_CONFIG(buggyboy_ym2149_interface_1)
@ -773,7 +773,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( buggybjr )
MDRV_CPU_ADD(BUGGYBOY_CPU_TYPE, 5000000)
MDRV_CPU_PROGRAM_MAP(buggybjr_main, 0)
// MDRV_WATCHDOG_TIME_INIT(5)
// MDRV_WATCHDOG_TIME_INIT(5)
MDRV_CPU_ADD(BUGGYBOY_CPU_TYPE, 5000000)
MDRV_CPU_PROGRAM_MAP(buggyboy_math, 0)
@ -789,7 +789,7 @@ static MACHINE_DRIVER_START( buggybjr )
MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
#if 0
MDRV_SCREEN_RAW_PARAMS(BB_PIXEL_CLOCK, BB_HTOTAL, BB_HBEND, BB_HBSTART, BB_VTOTAL, BB_VBEND, BB_VBSTART)
#else
@ -807,7 +807,7 @@ static MACHINE_DRIVER_START( buggybjr )
MDRV_VIDEO_EOF(buggyboy)
MDRV_SPEAKER_STANDARD_STEREO("Front Left", "Front Right")
// MDRV_SPEAKER_STANDARD_STEREO("Rear Left", "Rear Right")
// MDRV_SPEAKER_STANDARD_STEREO("Rear Left", "Rear Right")
MDRV_SOUND_ADD(YM2149, BUGGYBOY_ZCLK / 4)
MDRV_SOUND_CONFIG(buggyboy_ym2149_interface_1)
@ -854,7 +854,7 @@ ROM_START( tx1 )
/* 8x8 characters */
ROM_REGION( 0x20000, REGION_GFX1, ROMREGION_DISPOSE )
ROM_LOAD( "tx1_21a.ic204", 0x0000, 0x4000, CRC(cd3441ad) SHA1(8e6597b3177b8aaa34ed3373d85fc4b6231e1333) )
ROM_LOAD( "tx1_20a.ic174", 0x4000, 0x4000, CRC(dbe595fc) SHA1(1ed2f775f0a1b46a2ffbc056eb4ef732ed546d3c) )
ROM_LOAD( "tx1_20a.ic174", 0x4000, 0x4000, CRC(dbe595fc) SHA1(1ed2f775f0a1b46a2ffbc056eb4ef732ed546d3c) )
/* 8x8 object chunks */
ROM_REGION( 0x40000, REGION_GFX2, 0 )
@ -905,7 +905,7 @@ ROM_START( tx1 )
ROM_LOAD( "xb05a.ic8", 0x0600, 0x100, CRC(3b387d01) SHA1(1229548e3052ad34eeee9598743091d19f6b8f88) )
ROM_LOAD( "xb06a.ic9", 0x0700, 0x100, CRC(f6f4d7d9) SHA1(866024b76b26d6942bd4e1d2494686299414f6be) )
ROM_LOAD( "xb07a.ic10", 0x0800, 0x100, CRC(824e7532) SHA1(917ce74d2bae6af90f2c4e41d12a69f884320915) )
/* Character colour tables (L, C, R) */
ROM_LOAD( "xb08.ic85", 0x0900, 0x100, CRC(5aeef5cc) SHA1(e123bf01d556178b0cf9d495bcce445f3f8421cd) )
ROM_LOAD( "xb08.ic116", 0x0a00, 0x100, CRC(5aeef5cc) SHA1(e123bf01d556178b0cf9d495bcce445f3f8421cd) )
@ -928,7 +928,7 @@ ROM_START( tx1 )
/* Arithmetic unit instructions */
ROM_LOAD16_BYTE( "xb02b.ic223", 0x1800, 0x200, CRC(22c77af6) SHA1(1be8585b95316b4fc5712cdaef699e676320cd4d) )
ROM_LOAD16_BYTE( "xb01b.ic213", 0x1801, 0x200, CRC(f6b8b70b) SHA1(b79374acf11d71db1e4ad3c494ac5f500a52677b) )
ROM_LOAD16_BYTE( "xb01b.ic213", 0x1801, 0x200, CRC(f6b8b70b) SHA1(b79374acf11d71db1e4ad3c494ac5f500a52677b) )
ROM_END
ROM_START( tx1a )
@ -955,7 +955,7 @@ ROM_START( tx1a )
/* 8x8 characters */
ROM_REGION( 0x20000, REGION_GFX1, ROMREGION_DISPOSE )
ROM_LOAD( "8411-136027-156.204", 0x0000, 0x4000, CRC(60f3c616) SHA1(59c4361891e4274e27e6279c919e8fd6803af7cf) )
ROM_LOAD( "8411-136027-155.174", 0x4000, 0x4000, CRC(e59a6b72) SHA1(c10efa77ab421ac60b97227a8d547f50f8415670) )
ROM_LOAD( "8411-136027-155.174", 0x4000, 0x4000, CRC(e59a6b72) SHA1(c10efa77ab421ac60b97227a8d547f50f8415670) )
/* 8x8 object chunks */
ROM_REGION( 0x40000, REGION_GFX2, 0 )
@ -1001,7 +1001,7 @@ ROM_START( tx1a )
ROM_LOAD( "xb05a.ic8", 0x0600, 0x100, CRC(3b387d01) SHA1(1229548e3052ad34eeee9598743091d19f6b8f88) )
ROM_LOAD( "xb06a.ic9", 0x0700, 0x100, CRC(f6f4d7d9) SHA1(866024b76b26d6942bd4e1d2494686299414f6be) )
ROM_LOAD( "xb07a.ic10", 0x0800, 0x100, CRC(824e7532) SHA1(917ce74d2bae6af90f2c4e41d12a69f884320915) )
/* Character colour tables (L, C, R) */
ROM_LOAD( "xb08.ic85", 0x0900, 0x100, CRC(5aeef5cc) SHA1(e123bf01d556178b0cf9d495bcce445f3f8421cd) )
ROM_LOAD( "xb08.ic116", 0x0a00, 0x100, CRC(5aeef5cc) SHA1(e123bf01d556178b0cf9d495bcce445f3f8421cd) )
@ -1076,7 +1076,7 @@ ROM_START( buggybjr )
ROM_LOAD16_BYTE( "bb2.162", 0x8001, 0x0200, CRC(71d47de1) SHA1(2da9aeb3f2ebb1114631c8042a37c4f4c18e741b) )
/* Object chunk sequence LUT */
ROM_REGION( 0x100000, REGION_USER2, 0 )
ROM_REGION( 0x100000, REGION_USER2, 0 )
ROM_LOAD( "bug16s.139", 0x0000, 0x8000, CRC(1903a9ad) SHA1(526c404c15e3f04b4afb27dee66e9deb0a6b9704) )
ROM_LOAD( "bug17s.140", 0x8000, 0x8000, CRC(82cabdd4) SHA1(94324fcf83c373621fc40553473ae3cb552ab704) )

View File

@ -9,17 +9,17 @@
#include "tx1.h"
/*
6845 cursor output is connected to the main CPU interrupt pin.
The CRTC is programmed to provide a rudimentary VBLANK interrupt.
6845 cursor output is connected to the main CPU interrupt pin.
The CRTC is programmed to provide a rudimentary VBLANK interrupt.
TODO: Calc TX-1 values...
TODO: Calc TX-1 values...
*/
#define CURSOR_YPOS 239
#define CURSOR_XPOS 168
/*
Globals
Globals
*/
static UINT16 *prom;
@ -41,7 +41,7 @@ static struct
} math;
/*
Helper functions
Helper functions
*/
#define INC_PROM_ADDR ( math.promaddr = (math.promaddr + 1) & 0x1ff )
#define ROR16(val, shift) ( ((UINT16)val >> shift) | ((UINT16)val << (16 - shift)) )
@ -59,7 +59,7 @@ INLINE UINT8 reverse_nibble(UINT8 nibble)
/*
TODO: Check interrupt timing from CRT config. Probably different between games.
TODO: Check interrupt timing from CRT config. Probably different between games.
*/
static TIMER_CALLBACK( interrupt_callback )
{
@ -68,7 +68,7 @@ static TIMER_CALLBACK( interrupt_callback )
}
/*
SN74S516 16x16 Multiplier/Divider
SN74S516 16x16 Multiplier/Divider
*/
static struct
{
@ -91,11 +91,11 @@ static struct
} SN74S516;
/*
State transition table
State transition table
A little different to the real thing in that
there are no states between final input and
multiplication/division.
A little different to the real thing in that
there are no states between final input and
multiplication/division.
*/
static const UINT8 state_table[16][8] =
{
@ -167,7 +167,7 @@ static void sn_multiply(void)
break;
}
case 0x662:
{
{
SN74S516.ZW.ZW32 = (-SN74S516.X * SN74S516.Y) + (SN74S516.ZW.ZW32 & 0xffff0000);
break;
}
@ -259,15 +259,15 @@ static void kick_sn74s516(UINT16 *data, const int ins)
#define CLEAR_SEQUENCE (SN74S516.code = 0)
/*
Remember to change the Z/W flag.
*/
Remember to change the Z/W flag.
*/
switch (SN74S516.state)
{
case 0:
{
CLEAR_SEQUENCE;
UPDATE_SEQUENCE;
if (ins < 4)
{
LOAD_Y;
@ -400,7 +400,7 @@ static void kick_sn74s516(UINT16 *data, const int ins)
{
// CHECK: Incomplete state
sn74s516_update(ins);
}
}
else if (ins == 7)
{
/* 6667 = Load X, Load Z, Load W, Clear Z */
@ -477,11 +477,11 @@ static void tx1_update_state(void)
go = 1;
}
/*
Example:
120 /GO /LHIEN
121 /GO /LLOEN
Both 120 and 121 are used.
*/
Example:
120 /GO /LHIEN
121 /GO /LLOEN
Both 120 and 121 are used.
*/
else if ( (GO_EN(math.inslatch) && GO_EN(prom[math.promaddr])) && (LHIEN(math.inslatch) && LLOEN(prom[math.promaddr])) )
{
go = 1;
@ -511,9 +511,9 @@ static void tx1_update_state(void)
{
UINT16 data;
int dsel = (math.inslatch >> 8) & TX1_DSEL;
// int tfad = (math.inslatch & 0x1c00);
// int ps = math.ppshift & 0x78;
// int tfad = (math.inslatch & 0x1c00);
// int ps = math.ppshift & 0x78;
if ( (dsel & 1) == 0 )
@ -530,7 +530,7 @@ static void tx1_update_state(void)
UINT16 *romdata = (UINT16*)memory_region(REGION_USER1);
UINT16 addr = get_tx1_datarom_addr();
data = romdata[addr];
}
}
else if ( dsel == 2 )
data = ROL16(math.muxlatch, 4);
else if ( dsel == 3 )
@ -539,9 +539,9 @@ static void tx1_update_state(void)
kick_sn74s516(&data, ins);
}
/*
TODO: Changed ppshift to muxlatch for TX-1
Changed masks.
*/
TODO: Changed ppshift to muxlatch for TX-1
Changed masks.
*/
else if ( LHIEN(math.inslatch) || LLOEN(math.inslatch) )
{
UINT16 data;
@ -580,7 +580,7 @@ static void tx1_update_state(void)
}
}
else
{
{
if ( math.mux == TX1_SEL_PPSEN )
{
kick_sn74s516(&math.ppshift, ins);
@ -612,7 +612,7 @@ READ16_HANDLER( tx1_math_r )
int ins;
if ( offset & 0x200 )
{
{
ins = math.inslatch & 7;
TX1_SET_INS0_BIT;
}
@ -635,29 +635,29 @@ READ16_HANDLER( tx1_math_r )
{
/* TODO
SEL0 = 1 (DSEL = 0 or ???????)
DSEL1 = 0
*/
SEL0 = 1 (DSEL = 0 or ???????)
DSEL1 = 0
*/
int dsel = (math.inslatch >> 8) & TX1_DSEL;
// int tfad = (math.inslatch & 0x1c00);
// int ps = math.ppshift & 0x78;
// int tfad = (math.inslatch & 0x1c00);
// int ps = math.ppshift & 0x78;
/*
Actual MUX selects
00 Straight from DLATCH
01 Straight from ROM
10 << 4
11 Halves swapped, << 3
Actual MUX selects
00 Straight from DLATCH
01 Straight from ROM
10 << 4
11 Halves swapped, << 3
If DSEL = x0, MUX = x1
If DSEL = x0, MUX = x1
00 -> 01
00 -> 01
10 -> 11
10 -> 11
10 = 11
00 = 01
*/
10 = 11
00 = 01
*/
// TEST!
if ( (dsel & 1) == 0 )
@ -672,17 +672,17 @@ READ16_HANDLER( tx1_math_r )
else if ( dsel == 1 )
{
/*
TODO make this constant somewhere
e.g. math.retval = math.romptr[ get_tx1_datarom_addr() ];
*/
TODO make this constant somewhere
e.g. math.retval = math.romptr[ get_tx1_datarom_addr() ];
*/
UINT16 *romdata = (UINT16*)memory_region(REGION_USER1);
UINT16 addr = get_tx1_datarom_addr();
math.retval = romdata[addr];
}
}
else if ( dsel == 2 )
math.retval = ROL16(math.muxlatch, 4);
else if ( dsel == 3 )
math.retval = ROL16(SWAP16(math.muxlatch), 3);
math.retval = ROL16(SWAP16(math.muxlatch), 3);
/* TODO for TX-1: This is /SPCS region? */
if ( offset < 0xe00 )
@ -736,7 +736,7 @@ WRITE16_HANDLER( tx1_math_w )
math.cpulatch = data;
offset <<= 1;
// printf("W %x: %x\n", 0x3000 + offset, data);
// printf("W %x: %x\n", 0x3000 + offset, data);
/* /MLPCS */
if ( offset < 0x400 )
@ -868,7 +868,7 @@ READ16_HANDLER( tx1_spcs_rom_r )
if ( math.mux != TX1_SEL_ILDEN )
{
INC_PROM_ADDR;
tx1_update_state();
tx1_update_state();
}
return math.cpulatch;
@ -939,7 +939,7 @@ READ16_HANDLER( tx1_spcs_ram_r )
WRITE16_HANDLER( tx1_spcs_ram_w )
{
mame_printf_debug("Write to /SPCS RAM?");
COMBINE_DATA(&tx1_math_ram[offset]);
COMBINE_DATA(&tx1_math_ram[offset]);
}
@ -1016,12 +1016,12 @@ static void buggyboy_update_state(void)
int ins = math.inslatch & 7;
BB_SET_INS0_BIT;
if ( math.mux == BB_MUX_DPROE )
{
UINT16 *romdata = (UINT16*)memory_region(REGION_USER1);
UINT16 addr = get_bb_datarom_addr();
kick_sn74s516(&romdata[addr], ins);
kick_sn74s516(&romdata[addr], ins);
}
else if ( math.mux == BB_MUX_PPOE )
{
@ -1068,7 +1068,7 @@ static void buggyboy_update_state(void)
}
}
else
{
{
if ( math.mux == BB_MUX_PPSEN )
{
kick_sn74s516(&math.ppshift, ins);
@ -1101,7 +1101,7 @@ static void buggyboy_update_state(void)
}
READ16_HANDLER( buggyboy_math_r )
{
{
offset = offset << 1;
/* /MLPCS */
@ -1110,7 +1110,7 @@ READ16_HANDLER( buggyboy_math_r )
int ins;
if ( offset & 0x200 )
{
{
ins = math.inslatch & 7;
BB_SET_INS0_BIT;
}
@ -1124,7 +1124,7 @@ READ16_HANDLER( buggyboy_math_r )
/* TODO */
//if (math.mux == BB_MUX_PPSEN)
// math.ppshift = math.retval;
// math.ppshift = math.retval;
}
/* /PPSEN */
else if ( offset < 0x800 )
@ -1142,7 +1142,7 @@ READ16_HANDLER( buggyboy_math_r )
/* This is necessary */
if ( math.mux == BB_MUX_PPSEN )
math.ppshift = romdata[addr];
/* This is /SPCS region? Necessary anyway */
if ( offset < 0xe00 )
{
@ -1237,7 +1237,7 @@ WRITE16_HANDLER( buggyboy_math_w )
math.ppshift = val;
}
else
{
{
mame_printf_debug("BB_DSEL was not 3 for P->S load!\n");
DEBUGGER_BREAK;
}
@ -1261,10 +1261,10 @@ WRITE16_HANDLER( buggyboy_math_w )
}
/*
This is for ROM range 0x5000-0x7fff
This is for ROM range 0x5000-0x7fff
*/
READ16_HANDLER( buggyboy_spcs_rom_r )
{
{
math.cpulatch = *(UINT16*)((UINT8*)memory_region(REGION_CPU2) + 0xfc000 + 0x1000 + offset*2);
if ( math.mux == BB_MUX_ILDEN )
@ -1311,14 +1311,14 @@ READ16_HANDLER( buggyboy_spcs_rom_r )
shift >>= 1;
}
}
math.ppshift = val;
math.ppshift = val;
}
}
if ( math.mux != BB_MUX_ILDEN )
{
INC_PROM_ADDR;
buggyboy_update_state();
buggyboy_update_state();
}
return math.cpulatch;
@ -1330,7 +1330,7 @@ WRITE16_HANDLER( buggyboy_spcs_ram_w )
}
READ16_HANDLER( buggyboy_spcs_ram_r )
{
{
math.cpulatch = tx1_math_ram[offset];
offset <<= 1;
@ -1379,14 +1379,14 @@ READ16_HANDLER( buggyboy_spcs_ram_r )
shift >>= 1;
}
}
math.ppshift = val;
math.ppshift = val;
}
}
if ( math.mux != BB_MUX_ILDEN )
{
INC_PROM_ADDR;
buggyboy_update_state();
buggyboy_update_state();
}
return math.cpulatch;

View File

@ -769,7 +769,7 @@ static int zeus_fifo_process(const UINT32 *data, int numwords)
/* 0x1C: write matrix and translation vector */
case 0x1c:
/* single matrix form */
if ((data[0] & 0xffff) != 0x7fff)
{
@ -798,13 +798,13 @@ static int zeus_fifo_process(const UINT32 *data, int numwords)
zeus_point[1] = data[6];
zeus_point[2] = data[7];
}
/* double matrix form */
else
{
INT16 matrix1[3][3];
INT16 matrix2[3][3];
/* requires 13 words total */
if (numwords < 13)
return FALSE;
@ -827,7 +827,7 @@ static int zeus_fifo_process(const UINT32 *data, int numwords)
matrix1[0][0] = data[4]; matrix1[0][1] = data[4] >> 16; matrix1[0][2] = data[5] >> 16;
matrix1[1][0] = data[8]; matrix1[1][1] = data[8] >> 16; matrix1[1][2] = data[6] >> 16;
matrix1[2][0] = data[9]; matrix1[2][1] = data[9] >> 16; matrix1[2][2] = data[7] >> 16;
/* extract the second matrix from the raw data */
matrix2[0][0] = data[1]; matrix2[0][1] = data[2]; matrix2[0][2] = data[3];
matrix2[1][0] = data[1] >> 16; matrix2[1][1] = data[2] >> 16; matrix2[1][2] = data[3] >> 16;
@ -861,7 +861,7 @@ static int zeus_fifo_process(const UINT32 *data, int numwords)
{
log_fifo_command(data, numwords, "");
logerror(" -- additional xyz = %d,%d,%d\n", (INT16)data[0], (INT16)(data[1] >> 16), (INT16)data[1]);
/* guessing this might be a light source? */
zeus_light[0] = (INT16)data[0];
zeus_light[1] = (INT16)(data[1] >> 16);
@ -1045,10 +1045,10 @@ if (
1)
printf("zeus_draw_quad: databuffer[1] = %08X\n", databuffer[1]);
/* do a simple backface cull; not sure if the hardware does it, but I see no other
reason for a polygon normal here */
reason for a polygon normal here */
/* extract the polygon normal */
normal[0] = (INT8)(databuffer[0] >> 0);
normal[1] = (INT8)(databuffer[0] >> 8);
@ -1062,8 +1062,8 @@ if (
{
if (logit)
logerror("quad (culled %08X)\n", rotnormal[2]);
// if (input_code_pressed(KEYCODE_COMMA))
// return;
// if (input_code_pressed(KEYCODE_COMMA))
// return;
}
if (logit)
@ -1110,7 +1110,7 @@ if (
UINT8 v = iuvz >> 24;
INT32 dotnormal;
INT64 x, y, z;
x = (INT64)(xo * zeus_matrix[0][0]) + (INT64)(yo * zeus_matrix[0][1]) + (INT64)(zo * zeus_matrix[0][2]) + zeus_point[0];
y = (INT64)(xo * zeus_matrix[1][0]) + (INT64)(yo * zeus_matrix[1][1]) + (INT64)(zo * zeus_matrix[1][2]) + zeus_point[1];
z = (INT64)(xo * zeus_matrix[2][0]) + (INT64)(yo * zeus_matrix[2][1]) + (INT64)(zo * zeus_matrix[2][2]) + zeus_point[2];
@ -1151,7 +1151,7 @@ if (
clipvert[i].y *= ooz;
clipvert[i].x += 200.5f;
clipvert[i].y += 128.5f;
maxx = MAX(maxx, clipvert[i].x);
maxy = MAX(maxy, clipvert[i].y);
if (logit)
@ -1342,8 +1342,8 @@ static void render_poly_solid(void *dest, INT32 scanline, const poly_extent *ext
if (depth > 0x7fff) depth = 0x7fff;
if (depth >= 0)
{
// UINT32 finalcolor = (((color & 0x7c00) * curv) & 0x7c000000) | (((color & 0x03e0) * curv) & 0x03e00000) | (((color & 0x001f) * curv) & 0x001f0000);
// waveram_plot_check_depth(scanline, x, finalcolor >> 16, depth);
// UINT32 finalcolor = (((color & 0x7c00) * curv) & 0x7c000000) | (((color & 0x03e0) * curv) & 0x03e00000) | (((color & 0x001f) * curv) & 0x001f0000);
// waveram_plot_check_depth(scanline, x, finalcolor >> 16, depth);
waveram_plot_check_depth(scanline, x, color, depth);
}
curz += dzdx;

View File

@ -328,13 +328,13 @@ READ32_HANDLER( zeus2_r )
if (logit)
logerror("%06X:zeus2_r(%02X)\n", activecpu_get_pc(), offset);
switch (offset)
{
case 0x00:
result = 0x20;
break;
case 0x01:
/* bit $000C0070 are tested in a loop until 0 */
/* bits $00080000 is tested in a loop until 0 */
@ -343,7 +343,7 @@ READ32_HANDLER( zeus2_r )
if (video_screen_get_vblank(0))
result |= 0x04;
break;
case 0x07:
/* this is needed to pass the self-test in thegrid */
result = 0x10451998;
@ -354,7 +354,7 @@ READ32_HANDLER( zeus2_r )
result = video_screen_get_vpos(0) << 16;
break;
}
return result;
}
@ -386,10 +386,10 @@ WRITE32_HANDLER( zeus2_w )
static void zeus_register32_w(offs_t offset, UINT32 data, int logit)
{
UINT32 oldval = zeusbase[offset];
/* writes to register $CC need to force a partial update */
// if ((offset & ~1) == 0xcc)
// video_screen_update_partial(0, video_screen_get_vpos(0));
// if ((offset & ~1) == 0xcc)
// video_screen_update_partial(0, video_screen_get_vpos(0));
/* always write to low word? */
zeusbase[offset] = data;
@ -420,15 +420,15 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
if (zeus_fifo_process(zeus_fifo, zeus_fifo_words))
zeus_fifo_words = 0;
break;
case 0x20:
/* toggles between two values based on the page:
Page # zeusbase[0x20] zeusbase[0x38]
------ -------------- --------------
0 $04000190 $00000000
1 $04000000 $01900000
*/
Page # zeusbase[0x20] zeusbase[0x38]
------ -------------- --------------
0 $04000190 $00000000
1 $04000000 $01900000
*/
break;
case 0x33:
@ -455,7 +455,7 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
}
}
break;
case 0x38:
{
UINT32 temp = zeusbase[0x38];
@ -464,7 +464,7 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
zeusbase[0x38] = temp;
}
break;
case 0x41:
/* this is the address, except in read mode, where it latches values */
if (zeusbase[0x4e] & 0x10)
@ -482,19 +482,19 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
}
}
break;
case 0x48:
case 0x49:
/* if we're in write mode, process it */
if (zeusbase[0x40] == 0x00890000)
{
/*
zeusbase[0x4e]:
bit 0-1: which register triggers write through
bit 3: enable write through via these registers
bit 4: seems to be set during reads, when 0x41 is used for latching
bit 6: enable autoincrement on write through
*/
zeusbase[0x4e]:
bit 0-1: which register triggers write through
bit 3: enable write through via these registers
bit 4: seems to be set during reads, when 0x41 is used for latching
bit 6: enable autoincrement on write through
*/
if ((zeusbase[0x4e] & 0x08) && (offset & 3) == (zeusbase[0x4e] & 3))
{
void *dest = waveram_ptr_from_expanded_addr(0, zeusbase[0x41]);
@ -502,7 +502,7 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
WAVERAM_WRITE32(dest, 1, zeusbase[0x49]);
max_waveram[0][0] = MAX(max_waveram[0][0], zeusbase[0x41] & 0xffff);
max_waveram[0][1] = MAX(max_waveram[0][1], zeusbase[0x41] >> 16);
if (zeusbase[0x4e] & 0x40)
{
zeusbase[0x41]++;
@ -511,14 +511,14 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
}
}
}
/* make sure we log anything else */
else if (logit)
logerror("\t[40]=%08X [4E]=%08X\n", zeusbase[0x40], zeusbase[0x4e]);
break;
case 0x51:
/* in this mode, crusnexo expects the reads to immediately latch */
if (zeusbase[0x50] == 0x00a20000)
oldval = zeusbase[0x51];
@ -540,7 +540,7 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
}
}
break;
case 0x57:
/* thegrid uses this to write either left or right halves of pixels */
if (zeusbase[0x50] == 0x00e90000)
@ -553,12 +553,12 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
max_waveram[1][0] = MAX(max_waveram[1][0], zeusbase[0x51] & 0xffff);
max_waveram[1][1] = MAX(max_waveram[1][1], zeusbase[0x51] >> 16);
}
/* make sure we log anything else */
else if (logit)
logerror("\t[50]=%08X [5E]=%08X\n", zeusbase[0x50], zeusbase[0x5e]);
break;
case 0x58:
case 0x59:
case 0x5a:
@ -566,13 +566,13 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
if (zeusbase[0x50] == 0x00890000)
{
/*
zeusbase[0x5e]:
bit 0-1: which register triggers write through
bit 3: enable write through via these registers
bit 4: seems to be set during reads, when 0x51 is used for latching
bit 5: unknown, currently used to specify ordering, but this is suspect
bit 6: enable autoincrement on write through
*/
zeusbase[0x5e]:
bit 0-1: which register triggers write through
bit 3: enable write through via these registers
bit 4: seems to be set during reads, when 0x51 is used for latching
bit 5: unknown, currently used to specify ordering, but this is suspect
bit 6: enable autoincrement on write through
*/
if ((zeusbase[0x5e] & 0x08) && (offset & 3) == (zeusbase[0x5e] & 3))
{
void *dest = waveram_ptr_from_expanded_addr(1, zeusbase[0x51]);
@ -586,7 +586,7 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
}
max_waveram[1][0] = MAX(max_waveram[1][0], zeusbase[0x51] & 0xffff);
max_waveram[1][1] = MAX(max_waveram[1][1], zeusbase[0x51] >> 16);
if (zeusbase[0x5e] & 0x40)
{
zeusbase[0x51]++;
@ -595,7 +595,7 @@ static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
}
}
}
/* make sure we log anything else */
else if (logit)
logerror("\t[50]=%08X [5E]=%08X\n", zeusbase[0x50], zeusbase[0x5e]);

View File

@ -846,12 +846,12 @@ VIDEO_UPDATE( bjtwin )
VIDEO_EOF( nmk )
{
/* sprites are DMA'd from Main RAM to a private buffer automatically
(or at least this is how I interpret the datasheet) */
(or at least this is how I interpret the datasheet) */
/* -- I actually see little evidence to support this, sprite lag
in some games should be checked on real boards */
in some games should be checked on real boards */
// memcpy(spriteram_old2,spriteram_old,0x1000);
// memcpy(spriteram_old2,spriteram_old,0x1000);
memcpy(spriteram_old2,nmk16_mainram+0x8000/2,0x1000);
}

View File

@ -1,7 +1,7 @@
/***************************************************************************
Tatsumi TX-1/Buggy Boy video hardware
****************************************************************************/
#include "driver.h"
#include "profiler.h"
@ -12,7 +12,7 @@
#define PRINT_CRTC_DATA 1
/*
HD46505S-2 CRT Controller
HD46505S-2 CRT Controller
*/
READ16_HANDLER( tx1_crtc_r )
{
@ -61,7 +61,7 @@ WRITE16_HANDLER( tx1_crtc_w )
***************************************************************************/
static struct
{
{
UINT16 scol; /* Road colours */
UINT32 slock; /* Scroll lock */
UINT8 flags; /* Road flags */
@ -195,7 +195,7 @@ WRITE16_HANDLER( tx1_bankcs_w )
tx1_vregs.h_inc = data;
if ( !(offset & 2) )
tx1_vregs.h_val = 0;
tx1_vregs.h_val = 0;
}
if ( !(offset & 0x40) )
{
@ -242,7 +242,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
const UINT8 *const ic25 = (UINT8*)memory_region(REGION_PROMS) + 0x1000;
const UINT8 *const ic106 = (UINT8*)memory_region(REGION_USER2);
const UINT8 *const ic73 = (UINT8*)memory_region(REGION_USER2) + 0x4000;
const UINT8 *const ic73 = (UINT8*)memory_region(REGION_USER2) + 0x4000;
const UINT8 *const ic190 = (UINT8*)memory_region(REGION_PROMS) + 0xc00;
const UINT8 *const ic162 = (UINT8*)memory_region(REGION_PROMS) + 0xe00;
@ -273,7 +273,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
/* TODO: Confirm against hardware? */
if ( x_scale == 0 )
continue;
/* 16-bit y-scale accumulator */
y_scale = tx1_objram[offs + 1];
y_step = tx1_objram[offs + 3];
@ -286,7 +286,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
/* Global x-flip */
gxflip = (pctmp0_7 & 0x80) >> 7;
/* Add 1 to account for line buffering */
y = (tx1_objram[offs] >> 8) + 1;
@ -330,7 +330,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
/* psa8_11 */
rom_addr = (psa0_11 & ~0xff) << 2;
/* Prepare the x-scaling */
x_step = (128 << FRAC) / x_scale;
x_acc = (psa0_11 & 0xff) << (FRAC + 5);
@ -364,7 +364,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
rom_addr2 = rom_addr + low_addr;
ic106_data = ic106[rom_addr2 & 0x3fff];
if ( (ic106_data & 0x40) && dataend )
lasttile = 1;
@ -376,7 +376,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
{
UINT32 psbb0_12;
UINT32 pscb0_14;
UINT32 pscb11;
UINT32 pscb11;
UINT8 *romptr;
UINT32 ic281_addr;
UINT32 grom_addr;
@ -399,14 +399,14 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
if ( BIT(psbb0_12, 12) )
pscb0_14 |= psbb0_12 & 0x3c0;
else
pscb0_14 |= (pctmp0_7 & 0xf) << 6;
pscb0_14 |= (pctmp0_7 & 0xf) << 6;
// This is the important one!
if ( BIT(lut_data, 13) ) // PSBB13
pscb0_14 |= BIT(psbb0_12, 10) << 12;
pscb0_14 |= BIT(psbb0_12, 10) << 12;
else
pscb0_14 |= ((pctmp0_7 & 0x70) << 8);
// 1 = Bit 12 is Bit 10 duplicated.
@ -415,7 +415,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
pscb0_14 &= ~(1 << 12);
pscb0_14 |= BIT(psbb0_12, 10) << 12;
#endif
pscb11 = BIT(pscb0_14, 11);
/* TODO: Remove this - it's constant. */
@ -443,9 +443,9 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
{
UINT8 pix;
UINT8 bit;
bit = (x_acc >> FRAC) & 7;
if ( xflip )
bit ^= 7;
@ -478,7 +478,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
newtile = 1;
if ( lasttile )
break;
break;
}
// TODO!
@ -488,7 +488,7 @@ static void tx1_draw_objects(mame_bitmap *bitmap, const rectangle *cliprect)
}
}// if (yscale)
y_scale += y_step;
} /* for (y) */
} /* for (y) */
}/* for (offs) */
}
@ -519,9 +519,9 @@ VIDEO_UPDATE( tx1 )
{
rectangle rect = { 0, 768 - 1, 0, 240 - 1 };
// tilemap_set_scrollx(tx1_tilemap, 0, scroll);
// tilemap_set_scrollx(tx1_tilemap, 0, scroll);
tilemap_draw(tx1_bitmap, &rect, tx1_tilemap, 0, 0);
// tx1_draw_road(tx1_bitmap, &rect);
// tx1_draw_road(tx1_bitmap, &rect);
tx1_draw_objects(tx1_bitmap, &rect);
}
@ -749,7 +749,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
const UINT8 *prom0 = rom + 0x4000;
const UINT8 *prom1 = rom + 0x4200;
const UINT8 *prom2 = rom + 0x4400;
const UINT8 *vprom = rom + 0x4600;
const UINT8 *vprom = rom + 0x4600;
/* Extract constant values */
tcmd = ((vregs.scol & 0xc000) >> 12) | ((vregs.scol & 0x00c0) >> 6);
@ -767,7 +767,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
for (y = 0; y < 240; ++y)
{
UINT8 rva0_6;
UINT8 ram_addr;
UINT8 ram_addr;
UINT16 rcrdb0_15;
UINT16 rcrs10;
UINT16 ls161_156_a;
@ -907,7 +907,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
UINT32 cprom_addr;
UINT8 px0, px1, px2, px3;
UINT8 px0, px1, px2, px3;
/* Counter Q10-7 are added to 384 */
ls283_159_co = (ls283_159 = (ls161 & 0x780) + X_ADJUST) & 0x800;
@ -916,7 +916,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
/* Strip pixel number */
pix = (ls161 & 7) ^ 7;
/* Horizotnal position counter enables - also used as PAL inputs */
hp0_en = !(hp0_cy || hps02);
hp1_en = !(hp1_cy || hps12);
@ -929,7 +929,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
if ( (ls161 & 7) == 0 )
{
UINT8 d0 = 0;
UINT8 d1 = 0;
UINT8 d1 = 0;
/* TODO: ROM data is 0xff if not enabled. */
if (rom_en)
@ -961,9 +961,9 @@ static void buggybjr_draw_road(UINT8 *bitmap)
else
{
/*
TODO: When ROM is not enabled, data = 0xff
But does anybody care?
*/
TODO: When ROM is not enabled, data = 0xff
But does anybody care?
*/
rc0 = rc1 = rc2 = rc3 = 0;
}
@ -1008,8 +1008,8 @@ static void buggybjr_draw_road(UINT8 *bitmap)
px3 = BIT(rc3, pix);
/*
Uh oh...
*/
Uh oh...
*/
if (vp2)
ic4_o18 = (hps00 && hps01 && hp3_en && !hps30) ||
(!hp0_en && hps01 && hp3_en && !hps30) ||
@ -1018,7 +1018,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
vp7;
else
ic4_o18 = !vp1;
if (tnlf)
ic3_o15 = (vp4 && !vp6 && !hp2_en && hps21) ||
@ -1112,14 +1112,14 @@ static void buggybjr_draw_road(UINT8 *bitmap)
cprom_addr |= (ic149_o16 ? 0x8 : 0) |
(ic150_o18 ? 0x4 : 0) |
(ic150_o17 ? 0x2 : 0) |
(ic150_o16 ? 0x1 : 0);
(ic150_o16 ? 0x1 : 0);
/* Lower four bits of colour output come from PROM BB7 @ 188 */
rcsd0_3 = rcols[cprom_addr] & 0xf;
{
UINT32 lfsr = vregs.wave_lfsr;
UINT32 wave =
UINT32 wave =
(wave0 ^ BIT(lfsr, 0)) &&
(wave1 ^ BIT(lfsr, 3)) &&
BIT(lfsr, 5) &&
@ -1133,7 +1133,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
}
else
roadpix = 0;
/* Horizontal position counters */
if (x >= 0)
@ -1144,7 +1144,7 @@ static void buggybjr_draw_road(UINT8 *bitmap)
UPDATE_HPOS(1);
UPDATE_HPOS(2);
UPDATE_HPOS(3);
/* Update the LFSR */
vregs.wave_lfsr = (vregs.wave_lfsr << 1) | (BIT(vregs.wave_lfsr, 6) ^ !BIT(vregs.wave_lfsr, 15));
@ -1195,11 +1195,11 @@ static void buggybjr_draw_road(UINT8 *bitmap)
if ((sf & 0x08) == 0)
vregs.shift |= BIT(vregs.h_val, 15);
}
if ((sf & 0x08) && !(vregs.shift & 0x08))
vregs.h_inc = vregs.gas;
}
/* Finally, increment the banking accumulator */
vregs.ba_val = (vregs.ba_val + vregs.ba_inc) & 0x00ffffff;
}
@ -1210,24 +1210,24 @@ static void buggybjr_draw_road(UINT8 *bitmap)
/***************************************************************************
Buggy Boy Object Drawing
Buggy Boy Object Drawing
X-scaling isn't quite right but you wouldn't notice...
X-scaling isn't quite right but you wouldn't notice...
-------- xxxxxxxx Object number
xxxxxxxx -------- Y position
-------- xxxxxxxx Object number
xxxxxxxx -------- Y position
xxxxxxxx xxxxxxxx Y scale value
xxxxxxxx xxxxxxxx Y scale value
-------- xxxxxxxx X scale
00 = Invisible?
80 = 1:1
FF = Double size
xxxxxxxx -------- Attributes
xxxxxxxx xxxxxxxx Y scale delta
-------- xxxxxxxx X scale
00 = Invisible?
80 = 1:1
FF = Double size
xxxxxxxx -------- Attributes
------xx xxxxxxxx X position
xxxxxxxx xxxxxxxx Y scale delta
------xx xxxxxxxx X position
**************************************************************************/
static void buggyboy_draw_objs(UINT8 *bitmap)
@ -1275,7 +1275,7 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
/* TODO: Confirm against hardware? */
if ( x_scale == 0 )
continue;
/* 16-bit y-scale accumulator */
y_scale = buggyboy_objram[offs + 1];
y_step = buggyboy_objram[offs + 3];
@ -1288,7 +1288,7 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
/* Global x-flip */
gxflip = (pctmp0_7 & 0x80) >> 7;
/* Add 1 to account for line buffering */
y = (buggyboy_objram[offs] >> 8) + 1;
@ -1337,7 +1337,7 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
/* Static part of the BUG17S/BUG16S ROM address */
rom_addr = (psa0_12 & ~0xff) << 2;
/* Prepare the x-scaling */
x_step = (128 << FRAC) / x_scale;
x_acc = (psa0_12 & 0xff) << (FRAC + 5);
@ -1358,14 +1358,14 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
UINT32 rombank;
UINT8 *romptr;
UINT32 bug18s_data;
UINT32 low_addr = ((x_acc >> (FRAC + 3)) & MASK);
UINT32 low_addr = ((x_acc >> (FRAC + 3)) & MASK);
/*
Objects are grouped by width (either 16, 8 or 4 tiles) in
the LUT ROMs. The ROM address lines therefore indicate
width and are used to determine the correct scan order
when x-flip is set.
*/
Objects are grouped by width (either 16, 8 or 4 tiles) in
the LUT ROMs. The ROM address lines therefore indicate
width and are used to determine the correct scan order
when x-flip is set.
*/
if (gxflip)
{
UINT32 xor_mask;
@ -1383,7 +1383,7 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
rom_addr2 = rom_addr + low_addr;
bug17s_data = bug17s[rom_addr2 & 0x7fff];
if ((bug17s_data & 0x40) && dataend)
lasttile = 1;
@ -1396,8 +1396,8 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
/* Form the tile ROM address */
pscb0_11 = ((((psbb0_15 & ~0xc0) | psbb6_7) << 3) | ((y_scale >> 8) & 7)) & 0x7fff;
/* Choose from one of three banks */
/* Choose from one of three banks */
rombank = ((BIT(pctmp0_7, 4) << 1) | BIT(psbb0_15, 13)) & 3;
/* TODO: Remember to put all the data into one GFX region */
@ -1428,9 +1428,9 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
{
UINT8 pix;
UINT8 bit;
bit = (x_acc >> FRAC) & 7;
if (xflip)
bit ^= 7;
@ -1450,10 +1450,10 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
color = ~(color | bb9o[bb9_addr]) & 0x3f;
else
color = ~(color | bb9e[bb9_addr]) & 0x3f;
*(bitmap + 256*y + x) = 0x40 | color;
}
}
}
/* Check if we've stepped into a new 8x8 tile */
if ( (((x_acc + x_step) >> (FRAC + 3)) & MASK) != ((x_acc >> (FRAC + 3)) & MASK) )
@ -1469,7 +1469,7 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
}
}// if (yscale)
y_scale += y_step;
} /* for (y) */
} /* for (y) */
}/* for (offs) */
profiler_mark(PROFILER_END);
@ -1477,16 +1477,16 @@ static void buggyboy_draw_objs(UINT8 *bitmap)
/*
2400-24FF is road control (R/W)
2400-24FF is road control (R/W)
/GAS = 24XX:
/BASET0 = 2400-F, 2410-F
/BASET1 = 2420-F, 2430-F
/BSET = 2440-F, 2450-F
/HASET = 2460-F, 2470-F
/HSET = 2480-F, 2490-F
/WASET = 24A0-F, 24B0-F
/FLAGS = 24E0-F, 24F0-F
/GAS = 24XX:
/BASET0 = 2400-F, 2410-F
/BASET1 = 2420-F, 2430-F
/BSET = 2440-F, 2450-F
/HASET = 2460-F, 2470-F
/HSET = 2480-F, 2490-F
/WASET = 24A0-F, 24B0-F
/FLAGS = 24E0-F, 24F0-F
*/
WRITE16_HANDLER( buggyboy_gas_w )
{
@ -1528,7 +1528,7 @@ WRITE16_HANDLER( buggyboy_gas_w )
break;
}
case 0x60:
{
{
vregs.h_inc = data;
vregs.shift = 0;
@ -1597,7 +1597,7 @@ VIDEO_UPDATE( buggyboy )
int xscrollamount = screen * 256;
tilemap_set_scrollx(buggyboy_tilemap, 0, xscrollamount);
tilemap_draw(bitmap, cliprect, buggyboy_tilemap, TILEMAP_DRAW_OPAQUE, 0);
tilemap_draw(bitmap, cliprect, buggyboy_tilemap, TILEMAP_DRAW_OPAQUE, 0);
return 0;
}
@ -1621,7 +1621,7 @@ VIDEO_START( buggybjr )
}
/*
Draw the tilemap with scrolling
Draw the tilemap with scrolling
*/
static void buggyboy_draw_char(UINT8 *bitmap)
{
@ -1646,7 +1646,7 @@ static void buggyboy_draw_char(UINT8 *bitmap)
UINT32 y_offs;
UINT32 x_offs;
UINT32 y_gran;
/* There's no y-scrolling between scanlines 0 and 1 */
if (y < 64)
y_offs = y;
@ -1664,7 +1664,7 @@ static void buggyboy_draw_char(UINT8 *bitmap)
else
x_offs = 0;
y_gran = y_offs & 7;
if (x_offs & 7)
@ -1683,14 +1683,14 @@ static void buggyboy_draw_char(UINT8 *bitmap)
UINT32 x_gran = x_offs & 7;
if (!x_gran)
{
{
UINT32 tilenum;
UINT16 ram_val = buggybjr_vram[((y_offs << 3) & 0x7c0) + ((x_offs >> 3) & 0x3f)];
tilenum = (ram_val & 0x03ff) | ((ram_val & 0x8000) >> 5);
colour = (ram_val & 0xfc00) >> 8;
d0 = *(gfx2 + (tilenum << 3) + y_gran);
d1 = *(gfx1 + (tilenum << 3) + y_gran);
d1 = *(gfx1 + (tilenum << 3) + y_gran);
}
*bitmap++ = colour |
@ -1742,7 +1742,7 @@ VIDEO_UPDATE( buggybjr )
UINT32 chr = !(BIT(char_val, 7) && (char_val & 3) );
UINT32 sel =
UINT32 sel =
(
( BIT(obj_val, 6) && chr) ||
( sky_en && !(char_val & 3) && (!obj6 && !rod6) )

View File

@ -266,7 +266,7 @@ void osd_wait_for_debugger(void)
// make sure the debug windows are visible
waiting_for_debugger = TRUE;
smart_show_all(TRUE);
// run input polling to ensure that our status is in sync
wininput_poll();

View File

@ -9,4 +9,4 @@
***************************************************************************/
const char build_version[] = "0.122 ("__DATE__")";
const char build_version[] = "0.122u1 ("__DATE__")";