added MB8421 device (16KBIT dual port SRAM with 2 interrupt pins)

.gitattributes

@@ -2782,6 +2782,8 @@ src/emu/machine/mb14241.c svneol=native#text/plain
 src/emu/machine/mb14241.h svneol=native#text/plain
 src/emu/machine/mb3773.c svneol=native#text/plain
 src/emu/machine/mb3773.h svneol=native#text/plain
+src/emu/machine/mb8421.c svneol=native#text/plain
+src/emu/machine/mb8421.h svneol=native#text/plain
 src/emu/machine/mb87078.c svneol=native#text/plain
 src/emu/machine/mb87078.h svneol=native#text/plain
 src/emu/machine/mb8795.c svneol=native#text/plain

src/emu/machine/7200fifo.c

@@ -10,8 +10,6 @@
 
 **********************************************************************/
 
-#include "emu.h"
-
 #include "machine/7200fifo.h"
 
 

src/emu/machine/machine.mak

@@ -888,6 +888,15 @@ ifneq ($(filter MB3773,$(MACHINES)),)
 MACHINEOBJS += $(MACHINEOBJ)/mb3773.o
 endif
 
+#-------------------------------------------------
+#
+#@src/emu/machine/mb8421.h,MACHINES += MB8421
+#-------------------------------------------------
+
+ifneq ($(filter MB8421,$(MACHINES)),)
+MACHINEOBJS += $(MACHINEOBJ)/mb8421.o
+endif
+
 #-------------------------------------------------
 #
 #@src/emu/machine/mb87078.h,MACHINES += MB87078

src/emu/machine/mb8421.c

@@ -0,0 +1,96 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+/**********************************************************************
+
+    Fujitsu MB8421/22/31/32-90/-90L/-90LL/-12/-12L/-12LL
+    CMOS 16K-bit (2KB) dual-port SRAM
+
+    TODO:
+    - retransmit (RT pin)
+    - cascaded width expansion mode (when needed)
+
+**********************************************************************/
+
+#include "machine/mb8421.h"
+
+
+const device_type MB8421 = &device_creator<mb8421_device>;
+
+//-------------------------------------------------
+//  mb8421_device - constructor
+//-------------------------------------------------
+
+mb8421_device::mb8421_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+	: device_t(mconfig, MB8421, "MB8421 DPSRAM", tag, owner, clock, "mb8421", __FILE__),
+		m_intl_handler(*this),
+		m_intr_handler(*this)
+{
+}
+
+//-------------------------------------------------
+//  device_start - device-specific startup
+//-------------------------------------------------
+
+void mb8421_device::device_start()
+{
+	memset(m_ram, 0, 0x800);
+
+	// resolve callbacks
+	m_intl_handler.resolve_safe();
+	m_intr_handler.resolve_safe();
+
+	// state save
+	save_item(NAME(m_ram));
+}
+
+//-------------------------------------------------
+//  device_reset - device-specific reset
+//-------------------------------------------------
+
+void mb8421_device::device_reset()
+{
+	m_intl_handler(0);
+	m_intr_handler(0);
+}
+
+
+
+WRITE8_MEMBER(mb8421_device::left_w)
+{
+	offset &= 0x7ff;
+
+	if (offset == 0x7ff)
+		m_intr_handler(1);
+
+	m_ram[offset] = data;
+}
+
+READ8_MEMBER(mb8421_device::left_r)
+{
+	offset &= 0x7ff;
+
+	if (offset == 0x7fe)
+		m_intl_handler(0);
+	
+	return m_ram[offset];
+}
+
+WRITE8_MEMBER(mb8421_device::right_w)
+{
+	offset &= 0x7ff;
+
+	if (offset == 0x7fe)
+		m_intl_handler(1);
+
+	m_ram[offset] = data;
+}
+
+READ8_MEMBER(mb8421_device::right_r)
+{
+	offset &= 0x7ff;
+
+	if (offset == 0x7ff)
+		m_intr_handler(0);
+	
+	return m_ram[offset];
+}

src/emu/machine/mb8421.h

@@ -0,0 +1,73 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+/**********************************************************************
+
+    Fujitsu MB8421/22/31/32-90/-90L/-90LL/-12/-12L/-12LL
+    CMOS 16K-bit (2KB) dual-port SRAM
+
+    Copyright MAME Team.
+    Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef _MB8421_H
+#define _MB8421_H
+
+#include "emu.h"
+
+
+//**************************************************************************
+//  INTERFACE CONFIGURATION MACROS
+//**************************************************************************
+
+// note: INT pins are only available on MB84x1
+// INTL is for the CPU on the left side, INTR for the one on the right
+#define MCFG_MB8421_INTL_HANDLER(_devcb) \
+	devcb = &mb8421_device::set_intl_handler(*device, DEVCB_##_devcb);
+
+#define MCFG_MB8421_INTR_HANDLER(_devcb) \
+	devcb = &mb8421_device::set_intr_handler(*device, DEVCB_##_devcb);
+
+
+
+//**************************************************************************
+//  TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> mb8421_device
+
+class mb8421_device : public device_t
+{
+public:
+	mb8421_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+	// static configuration helpers
+	template<class _Object> static devcb_base &set_intl_handler(device_t &device, _Object object) { return downcast<mb8421_device &>(device).m_intl_handler.set_callback(object); }
+	template<class _Object> static devcb_base &set_intr_handler(device_t &device, _Object object) { return downcast<mb8421_device &>(device).m_intr_handler.set_callback(object); }
+
+	DECLARE_READ_LINE_MEMBER( busy_r ) { return 0; } // _BUSY pin - not emulated
+
+	DECLARE_WRITE8_MEMBER( left_w );
+	DECLARE_READ8_MEMBER( left_r );
+	DECLARE_WRITE8_MEMBER( right_w );
+	DECLARE_READ8_MEMBER( right_r );
+
+protected:
+	// device-level overrides
+	virtual void device_start();
+	virtual void device_reset();
+
+private:
+	UINT8 m_ram[0x800];
+
+	devcb_write_line m_intl_handler;
+	devcb_write_line m_intr_handler;
+};
+
+// device type definition
+extern const device_type MB8421;
+
+
+#endif /* _MB8421_H */

src/mame/mame.mak

@@ -441,6 +441,7 @@ MACHINES += M6M80011AP
 MACHINES += MATSUCD
 MACHINES += MB14241
 MACHINES += MB3773
+MACHINES += MB8421
 MACHINES += MB87078
 #MACHINES += MB8795
 #MACHINES += MB89352

src/mess/mess.mak

@@ -431,6 +431,7 @@ MACHINES += M6M80011AP
 MACHINES += MATSUCD
 MACHINES += MB14241
 MACHINES += MB3773
+#MACHINES += MB8421
 MACHINES += MB87078
 MACHINES += MB8795
 MACHINES += MB89352