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arm7: Implement BLX Rn instruction for ARM9. NDS ARM9 BIOS gets to the first checkpoint. [R. Belmont]

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This commit is contained in:
arbee 2017-11-16 21:06:48 -05:00
parent 1fb897055a
commit 768750ee2a
3 changed files with 22 additions and 2 deletions
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10
src/devices/cpu/arm7/arm7dasm.cpp
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@ -212,7 +212,7 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
if( (opcode&0xfe000000)==0xfa000000 ) //bits 31-25 == 1111 101 (BLX - v5)
{
/* BLX */
/* BLX(1) */
util::stream_format( stream, "BLX" );
dasmflags = DASMFLAG_STEP_OVER;
@ -220,6 +220,14 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
WriteBranchAddress( stream, pc, opcode, true );
}
else if( (opcode&0x0ff000f0)==0x01200030 ) // (BLX - v5)
{
/* BLX(2) */
util::stream_format( stream, "BLX" );
dasmflags = DASMFLAG_STEP_OVER;
WritePadding(stream, start_position);
util::stream_format( stream, "R%d",(opcode&0xf));
}
else if( (opcode&0x0ffffff0)==0x012fff10 ) //bits 27-4 == 000100101111111111110001
{
/* Branch and Exchange (BX) */

12
src/devices/cpu/arm7/arm7ops.cpp
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@ -1660,6 +1660,18 @@ void arm7_cpu_device::arm7ops_0123(uint32_t insn)
R15--;
}
}
else if ((insn & 0x0ff000f0) == 0x01200030) // BLX Rn - v5
{
// save link address
SetRegister(14, R15 + 4);
R15 = GetRegister(insn & 0x0f);
// If new PC address has A0 set, switch to Thumb mode
if (R15 & 1) {
set_cpsr(GET_CPSR|T_MASK);
R15--;
}
}
else if ((insn & 0x0ff000f0) == 0x01600010) // CLZ - v5
{
uint32_t rm = insn&0xf;

2
src/mame/drivers/nds.cpp
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@ -113,7 +113,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( nds_arm9_map, AS_PROGRAM, 32, nds_state )
AM_RANGE(0x00000000, 0x00007fff) AM_RAM // Instruction TCM
AM_RANGE(0x02000000, 0x023fffff) AM_RAM AM_SHARE("mainram")
AM_RANGE(0x02000000, 0x023fffff) AM_RAM AM_MIRROR(0x00400000) AM_SHARE("mainram")
AM_RANGE(0x04000000, 0x0400ffff) AM_READWRITE(arm9_io_r, arm9_io_w)
AM_RANGE(0xffff0000, 0xffff0fff) AM_ROM AM_MIRROR(0x1000) AM_REGION("arm9", 0)
ADDRESS_MAP_END