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synced 2025-04-23 00:39:36 +03:00
(MESS) superslv: Fixed regression. (nw)
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parent
3f5f8a0bbb
commit
779d07a706
@ -484,15 +484,17 @@ z80dart_channel::z80dart_channel(const machine_config &mconfig, const char *tag,
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m_rts(0),
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m_sync(0)
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{
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memset(&m_in_rxd_func, 0, sizeof(m_in_rxd_func));
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memset(&m_out_txd_func, 0, sizeof(m_out_txd_func));
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memset(&m_out_dtr_func, 0, sizeof(m_out_dtr_func));
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memset(&m_out_rts_func, 0, sizeof(m_out_rts_func));
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memset(&m_out_wrdy_func, 0, sizeof(m_out_wrdy_func));
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memset(&m_rr, 0, sizeof(m_rr));
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memset(&m_wr, 0, sizeof(m_wr));
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memset(&m_rx_data_fifo, 0, sizeof(m_rx_data_fifo));
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memset(&m_rx_error_fifo, 0, sizeof(m_rx_error_fifo));
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for (int i = 0; i < 3; i++)
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m_rr[i] = 0;
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for (int i = 0; i < 6; i++)
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m_wr[i] = 0;
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for (int i = 0; i < 3; i++)
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{
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m_rx_data_fifo[i] = 0;
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m_rx_error_fifo[i] = 0;
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}
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}
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@ -573,14 +575,24 @@ void z80dart_channel::tra_callback()
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{
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if (!(m_wr[5] & WR5_TX_ENABLE))
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{
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if (!(m_out_txd_func.isnull()))
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m_out_txd_func(1);
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return;
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// transmit mark
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m_out_txd_func(1);
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set_out_data_bit(1);
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}
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else if (m_wr[5] & WR5_SEND_BREAK)
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{
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// transmit break
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m_out_txd_func(0);
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set_out_data_bit(0);
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}
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else if (!is_transmit_register_empty())
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{
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// transmit data
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if (m_out_txd_func.isnull())
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transmit_register_send_bit();
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else
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m_out_txd_func(transmit_register_get_data_bit());
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}
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if (m_out_txd_func.isnull())
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transmit_register_send_bit();
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else
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m_out_txd_func(transmit_register_get_data_bit());
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}
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@ -590,8 +602,10 @@ void z80dart_channel::tra_callback()
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void z80dart_channel::tra_complete()
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{
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if ((m_wr[5] & WR5_TX_ENABLE) && !(m_rr[0] & RR0_TX_BUFFER_EMPTY))
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if ((m_wr[5] & WR5_TX_ENABLE) && !(m_wr[5] & WR5_SEND_BREAK) && !(m_rr[0] & RR0_TX_BUFFER_EMPTY))
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{
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LOG(("Z80DART \"%s\" Channel %c : Transmit Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, m_tx_data));
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transmit_register_setup(m_tx_data);
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// empty transmit buffer
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@ -603,11 +617,13 @@ void z80dart_channel::tra_complete()
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else if (m_wr[5] & WR5_SEND_BREAK)
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{
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// transmit break
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m_out_txd_func(0);
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set_out_data_bit(0);
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}
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else
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{
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// transmit marking line
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// transmit mark
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m_out_txd_func(1);
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set_out_data_bit(1);
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}
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@ -777,7 +793,7 @@ UINT8 z80dart_channel::control_read()
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break;
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}
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LOG(("Z80DART \"%s\" Channel %c : Control Register Read '%02x'\n", m_owner->tag(), 'A' + m_index, data));
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//LOG(("Z80DART \"%s\" Channel %c : Control Register Read '%02x'\n", m_owner->tag(), 'A' + m_index, data));
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return data;
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}
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@ -997,6 +1013,8 @@ void z80dart_channel::data_write(UINT8 data)
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if ((m_wr[5] & WR5_TX_ENABLE) && is_transmit_register_empty())
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{
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LOG(("Z80DART \"%s\" Channel %c : Transmit Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, m_tx_data));
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transmit_register_setup(m_tx_data);
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// empty transmit buffer
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@ -1205,7 +1223,7 @@ WRITE_LINE_MEMBER( z80dart_channel::rxc_w )
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if (!state) return;
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LOG(("Z80DART \"%s\" Channel %c : Receiver Clock Pulse\n", m_owner->tag(), m_index + 'A'));
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//LOG(("Z80DART \"%s\" Channel %c : Receiver Clock Pulse\n", m_owner->tag(), m_index + 'A'));
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if (++m_rx_clock == clocks)
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{
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@ -1225,7 +1243,7 @@ WRITE_LINE_MEMBER( z80dart_channel::txc_w )
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if (!state) return;
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LOG(("Z80DART \"%s\" Channel %c : Transmitter Clock Pulse\n", m_owner->tag(), m_index + 'A'));
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//LOG(("Z80DART \"%s\" Channel %c : Transmitter Clock Pulse\n", m_owner->tag(), m_index + 'A'));
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if (++m_tx_clock == clocks)
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{
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@ -456,16 +456,16 @@ void superslave_state::machine_reset()
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static MACHINE_CONFIG_START( superslave, superslave_state )
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// basic machine hardware
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MCFG_CPU_ADD(Z80_TAG, Z80, 4000000)
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MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_8MHz/2)
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MCFG_CPU_PROGRAM_MAP(superslave_mem)
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MCFG_CPU_IO_MAP(superslave_io)
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MCFG_CPU_CONFIG(superslave_daisy_chain)
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// devices
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MCFG_PIC8259_ADD(AM9519_TAG, INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0), VCC, NULL)
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MCFG_Z80DART_ADD(Z80DART_0_TAG, 4000000, dart0_intf)
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MCFG_Z80DART_ADD(Z80DART_1_TAG, 4000000, dart1_intf)
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MCFG_Z80PIO_ADD(Z80PIO_TAG, 4000000, pio_intf)
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MCFG_Z80DART_ADD(Z80DART_0_TAG, XTAL_8MHz/2, dart0_intf)
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MCFG_Z80DART_ADD(Z80DART_1_TAG, XTAL_8MHz/2, dart1_intf)
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MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_8MHz/2, pio_intf)
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MCFG_COM8116_ADD(BR1941_TAG, XTAL_5_0688MHz, dbrg_intf)
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MCFG_RS232_PORT_ADD(RS232_A_TAG, rs232a_intf, default_rs232_devices, "serial_terminal")
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MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("serial_terminal", terminal)
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@ -41,7 +41,7 @@ public:
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virtual ~serial_port_device();
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DECLARE_WRITE_LINE_MEMBER( tx ) { if(m_dev) m_dev->tx(state); }
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DECLARE_READ_LINE_MEMBER( rx ) { return (m_dev) ? m_dev->rx() : 0; }
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DECLARE_READ_LINE_MEMBER( rx ) { return (m_dev) ? m_dev->rx() : 1; }
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void out_rx(UINT8 param) { m_out_rx_func(param); }
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protected:
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