(MESS) superslv: Fixed regression. (nw)

This commit is contained in:
Curt Coder 2013-06-02 20:07:23 +00:00
parent 3f5f8a0bbb
commit 779d07a706
3 changed files with 44 additions and 26 deletions

View File

@ -484,15 +484,17 @@ z80dart_channel::z80dart_channel(const machine_config &mconfig, const char *tag,
m_rts(0),
m_sync(0)
{
memset(&m_in_rxd_func, 0, sizeof(m_in_rxd_func));
memset(&m_out_txd_func, 0, sizeof(m_out_txd_func));
memset(&m_out_dtr_func, 0, sizeof(m_out_dtr_func));
memset(&m_out_rts_func, 0, sizeof(m_out_rts_func));
memset(&m_out_wrdy_func, 0, sizeof(m_out_wrdy_func));
memset(&m_rr, 0, sizeof(m_rr));
memset(&m_wr, 0, sizeof(m_wr));
memset(&m_rx_data_fifo, 0, sizeof(m_rx_data_fifo));
memset(&m_rx_error_fifo, 0, sizeof(m_rx_error_fifo));
for (int i = 0; i < 3; i++)
m_rr[i] = 0;
for (int i = 0; i < 6; i++)
m_wr[i] = 0;
for (int i = 0; i < 3; i++)
{
m_rx_data_fifo[i] = 0;
m_rx_error_fifo[i] = 0;
}
}
@ -573,14 +575,24 @@ void z80dart_channel::tra_callback()
{
if (!(m_wr[5] & WR5_TX_ENABLE))
{
if (!(m_out_txd_func.isnull()))
m_out_txd_func(1);
return;
// transmit mark
m_out_txd_func(1);
set_out_data_bit(1);
}
else if (m_wr[5] & WR5_SEND_BREAK)
{
// transmit break
m_out_txd_func(0);
set_out_data_bit(0);
}
else if (!is_transmit_register_empty())
{
// transmit data
if (m_out_txd_func.isnull())
transmit_register_send_bit();
else
m_out_txd_func(transmit_register_get_data_bit());
}
if (m_out_txd_func.isnull())
transmit_register_send_bit();
else
m_out_txd_func(transmit_register_get_data_bit());
}
@ -590,8 +602,10 @@ void z80dart_channel::tra_callback()
void z80dart_channel::tra_complete()
{
if ((m_wr[5] & WR5_TX_ENABLE) && !(m_rr[0] & RR0_TX_BUFFER_EMPTY))
if ((m_wr[5] & WR5_TX_ENABLE) && !(m_wr[5] & WR5_SEND_BREAK) && !(m_rr[0] & RR0_TX_BUFFER_EMPTY))
{
LOG(("Z80DART \"%s\" Channel %c : Transmit Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, m_tx_data));
transmit_register_setup(m_tx_data);
// empty transmit buffer
@ -603,11 +617,13 @@ void z80dart_channel::tra_complete()
else if (m_wr[5] & WR5_SEND_BREAK)
{
// transmit break
m_out_txd_func(0);
set_out_data_bit(0);
}
else
{
// transmit marking line
// transmit mark
m_out_txd_func(1);
set_out_data_bit(1);
}
@ -777,7 +793,7 @@ UINT8 z80dart_channel::control_read()
break;
}
LOG(("Z80DART \"%s\" Channel %c : Control Register Read '%02x'\n", m_owner->tag(), 'A' + m_index, data));
//LOG(("Z80DART \"%s\" Channel %c : Control Register Read '%02x'\n", m_owner->tag(), 'A' + m_index, data));
return data;
}
@ -997,6 +1013,8 @@ void z80dart_channel::data_write(UINT8 data)
if ((m_wr[5] & WR5_TX_ENABLE) && is_transmit_register_empty())
{
LOG(("Z80DART \"%s\" Channel %c : Transmit Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, m_tx_data));
transmit_register_setup(m_tx_data);
// empty transmit buffer
@ -1205,7 +1223,7 @@ WRITE_LINE_MEMBER( z80dart_channel::rxc_w )
if (!state) return;
LOG(("Z80DART \"%s\" Channel %c : Receiver Clock Pulse\n", m_owner->tag(), m_index + 'A'));
//LOG(("Z80DART \"%s\" Channel %c : Receiver Clock Pulse\n", m_owner->tag(), m_index + 'A'));
if (++m_rx_clock == clocks)
{
@ -1225,7 +1243,7 @@ WRITE_LINE_MEMBER( z80dart_channel::txc_w )
if (!state) return;
LOG(("Z80DART \"%s\" Channel %c : Transmitter Clock Pulse\n", m_owner->tag(), m_index + 'A'));
//LOG(("Z80DART \"%s\" Channel %c : Transmitter Clock Pulse\n", m_owner->tag(), m_index + 'A'));
if (++m_tx_clock == clocks)
{

View File

@ -456,16 +456,16 @@ void superslave_state::machine_reset()
static MACHINE_CONFIG_START( superslave, superslave_state )
// basic machine hardware
MCFG_CPU_ADD(Z80_TAG, Z80, 4000000)
MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_8MHz/2)
MCFG_CPU_PROGRAM_MAP(superslave_mem)
MCFG_CPU_IO_MAP(superslave_io)
MCFG_CPU_CONFIG(superslave_daisy_chain)
// devices
MCFG_PIC8259_ADD(AM9519_TAG, INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_Z80DART_ADD(Z80DART_0_TAG, 4000000, dart0_intf)
MCFG_Z80DART_ADD(Z80DART_1_TAG, 4000000, dart1_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, 4000000, pio_intf)
MCFG_Z80DART_ADD(Z80DART_0_TAG, XTAL_8MHz/2, dart0_intf)
MCFG_Z80DART_ADD(Z80DART_1_TAG, XTAL_8MHz/2, dart1_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_8MHz/2, pio_intf)
MCFG_COM8116_ADD(BR1941_TAG, XTAL_5_0688MHz, dbrg_intf)
MCFG_RS232_PORT_ADD(RS232_A_TAG, rs232a_intf, default_rs232_devices, "serial_terminal")
MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("serial_terminal", terminal)

View File

@ -41,7 +41,7 @@ public:
virtual ~serial_port_device();
DECLARE_WRITE_LINE_MEMBER( tx ) { if(m_dev) m_dev->tx(state); }
DECLARE_READ_LINE_MEMBER( rx ) { return (m_dev) ? m_dev->rx() : 0; }
DECLARE_READ_LINE_MEMBER( rx ) { return (m_dev) ? m_dev->rx() : 1; }
void out_rx(UINT8 param) { m_out_rx_func(param); }
protected: