mirror of
https://github.com/holub/mame
synced 2025-05-03 13:06:47 +03:00
cpu/jaguar/*.cpp : Updates
Add notes, Reduce defines, Simplify handlers, Use shorter / correct type values, Reduce unnecessary lines, Remove register_postload jaguar.cpp : Fix metadata, Correct XTAL frequency
This commit is contained in:
cam900
parent
6deb0d35e3
commit
77f9bccb44
@ -2,7 +2,7 @@
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// copyright-holders:Aaron Giles
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/***************************************************************************
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jagdasm.c
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jagdasm.cpp
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Disassembler for the portable Jaguar DSP emulator.
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Written by Aaron Giles
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@ -15,7 +15,7 @@
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STATIC VARIABLES
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***************************************************************************/
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const uint8_t jaguar_disassembler::convert_zero[32] =
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const u8 jaguar_disassembler::convert_zero[32] =
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{ 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
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const char *const jaguar_disassembler::condition[32] =
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@ -71,10 +71,10 @@ std::string jaguar_disassembler::signed_16bit(int16_t val)
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offs_t jaguar_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
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{
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uint32_t flags = 0;
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int op = opcodes.r16(pc);
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int reg1 = (op >> 5) & 31;
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int reg2 = op & 31;
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u32 flags = 0;
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const u16 op = opcodes.r16(pc);
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const u8 reg1 = (op >> 5) & 31;
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const u8 reg2 = op & 31;
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int size = 2;
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pc += 2;
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@ -150,7 +150,7 @@ offs_t jaguar_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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case 50: util::stream_format(stream, "store r%d,(r15+$%x)", reg2, convert_zero[reg1]*4);break;
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case 51: util::stream_format(stream, "move pc,r%d", reg2); break;
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case 52: util::stream_format(stream, "jump %s(r%d)", condition[reg2], reg1); break;
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case 53: util::stream_format(stream, "jr %s%08X", condition[reg2], pc + ((int8_t)(reg1 << 3) >> 2)); break;
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case 53: util::stream_format(stream, "jr %s%08X", condition[reg2], pc + ((s8)(reg1 << 3) >> 2)); break;
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case 54: util::stream_format(stream, "mmult r%d,r%d", reg1, reg2); break;
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case 55: util::stream_format(stream, "mtoi r%d,r%d", reg1, reg2); break;
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case 56: util::stream_format(stream, "normi r%d,r%d", reg1, reg2); break;
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@ -180,7 +180,7 @@ jaguar_disassembler::jaguar_disassembler(variant var) : m_variant(var)
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{
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}
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uint32_t jaguar_disassembler::opcode_alignment() const
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u32 jaguar_disassembler::opcode_alignment() const
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{
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return 2;
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}
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@ -29,7 +29,7 @@ public:
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virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
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private:
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static const uint8_t convert_zero[32];
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static const u8 convert_zero[32];
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static const char *const condition[32];
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const variant m_variant;
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File diff suppressed because it is too large
Load Diff
@ -90,20 +90,21 @@ public:
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// configuration helpers
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auto irq() { return m_cpu_interrupt.bind(); }
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virtual DECLARE_WRITE32_MEMBER(ctrl_w) = 0;
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virtual DECLARE_READ32_MEMBER(ctrl_r) = 0;
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virtual void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) = 0;
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virtual u32 ctrl_r(offs_t offset) = 0;
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protected:
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jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool isdsp);
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jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 version, bool isdsp);
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_post_load() override;
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// device_execute_interface overrides
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virtual uint32_t execute_min_cycles() const override { return 1; }
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virtual uint32_t execute_max_cycles() const override { return 1; }
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virtual uint32_t execute_input_lines() const override { return 5; }
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virtual u32 execute_min_cycles() const override { return 1; }
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virtual u32 execute_max_cycles() const override { return 1; }
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virtual u32 execute_input_lines() const override { return 5; }
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virtual void execute_set_input(int inputnum, int state) override;
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// device_memory_interface overrides
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@ -112,20 +113,45 @@ protected:
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// device_state_interface overrides
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virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
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// defines
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inline void CLR_Z();
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inline void CLR_ZN();
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inline void CLR_ZNC();
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inline void SET_Z(u32 r);
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inline void SET_C_ADD(u32 a, u32 b);
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inline void SET_C_SUB(u32 a, u32 b);
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inline void SET_N(u32 r);
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inline void SET_ZN(u32 r);
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inline void SET_ZNC_ADD(u32 a, u32 b, u32 r);
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inline void SET_ZNC_SUB(u32 a, u32 b, u32 r);
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inline u8 CONDITION(u8 x);
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inline u8 READBYTE(offs_t a);
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inline u16 READWORD(offs_t a);
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inline u32 READLONG(offs_t a);
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inline void WRITEBYTE(offs_t a, u8 v);
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inline void WRITEWORD(offs_t a, u16 v);
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inline void WRITELONG(offs_t a, u32 v);
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inline u16 ROPCODE(offs_t pc);
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address_space_config m_program_config;
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/* core registers */
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uint32_t m_r[32];
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uint32_t m_a[32];
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uint32_t * m_b0;
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uint32_t * m_b1;
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u32 m_r[32];
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u32 m_a[32];
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u32 * m_b0;
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u32 * m_b1;
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/* control registers */
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uint32_t m_ctrl[G_CTRLMAX];
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uint32_t m_ppc;
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uint64_t m_accum;
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u32 m_ctrl[G_CTRLMAX];
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u32 m_ppc;
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u64 m_accum;
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/* internal stuff */
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u8 m_version;
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bool m_isdsp;
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int m_icount;
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int m_bankswitch_icount;
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@ -133,96 +159,95 @@ protected:
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address_space *m_program;
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memory_access_cache<2, 0, ENDIANNESS_BIG> *m_cache;
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uint32_t m_internal_ram_start;
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uint32_t m_internal_ram_end;
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u32 m_internal_ram_start;
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u32 m_internal_ram_end;
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typedef void (jaguar_cpu_device::*op_func)(uint16_t op);
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typedef void (jaguar_cpu_device::*op_func)(u16 op);
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static const op_func gpu_op_table[64];
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static const op_func dsp_op_table[64];
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static const uint32_t convert_zero[32];
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static const u32 convert_zero[32];
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bool m_tables_referenced;
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uint32_t table_refcount;
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std::unique_ptr<uint16_t[]> mirror_table;
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std::unique_ptr<uint8_t[]> condition_table;
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u32 table_refcount;
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std::unique_ptr<u16[]> mirror_table;
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std::unique_ptr<u8[]> condition_table;
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const op_func *m_table;
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void abs_rn(uint16_t op);
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void add_rn_rn(uint16_t op);
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void addc_rn_rn(uint16_t op);
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void addq_n_rn(uint16_t op);
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void addqmod_n_rn(uint16_t op); /* DSP only */
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void addqt_n_rn(uint16_t op);
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void and_rn_rn(uint16_t op);
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void bclr_n_rn(uint16_t op);
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void bset_n_rn(uint16_t op);
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void btst_n_rn(uint16_t op);
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void cmp_rn_rn(uint16_t op);
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void cmpq_n_rn(uint16_t op);
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void div_rn_rn(uint16_t op);
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void illegal(uint16_t op);
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void imacn_rn_rn(uint16_t op);
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void imult_rn_rn(uint16_t op);
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void imultn_rn_rn(uint16_t op);
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void jr_cc_n(uint16_t op);
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void jump_cc_rn(uint16_t op);
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void load_rn_rn(uint16_t op);
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void load_r14n_rn(uint16_t op);
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void load_r15n_rn(uint16_t op);
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void load_r14rn_rn(uint16_t op);
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void load_r15rn_rn(uint16_t op);
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void loadb_rn_rn(uint16_t op);
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void loadw_rn_rn(uint16_t op);
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void loadp_rn_rn(uint16_t op); /* GPU only */
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void mirror_rn(uint16_t op); /* DSP only */
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void mmult_rn_rn(uint16_t op);
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void move_rn_rn(uint16_t op);
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void move_pc_rn(uint16_t op);
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void movefa_rn_rn(uint16_t op);
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void movei_n_rn(uint16_t op);
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void moveq_n_rn(uint16_t op);
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void moveta_rn_rn(uint16_t op);
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void mtoi_rn_rn(uint16_t op);
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void mult_rn_rn(uint16_t op);
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void neg_rn(uint16_t op);
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void nop(uint16_t op);
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void normi_rn_rn(uint16_t op);
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void not_rn(uint16_t op);
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void or_rn_rn(uint16_t op);
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void pack_rn(uint16_t op); /* GPU only */
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void resmac_rn(uint16_t op);
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void ror_rn_rn(uint16_t op);
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void rorq_n_rn(uint16_t op);
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void sat8_rn(uint16_t op); /* GPU only */
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void sat16_rn(uint16_t op); /* GPU only */
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void sat16s_rn(uint16_t op); /* DSP only */
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void sat24_rn(uint16_t op); /* GPU only */
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void sat32s_rn(uint16_t op); /* DSP only */
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void sh_rn_rn(uint16_t op);
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void sha_rn_rn(uint16_t op);
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void sharq_n_rn(uint16_t op);
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void shlq_n_rn(uint16_t op);
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void shrq_n_rn(uint16_t op);
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void store_rn_rn(uint16_t op);
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void store_rn_r14n(uint16_t op);
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void store_rn_r15n(uint16_t op);
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void store_rn_r14rn(uint16_t op);
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void store_rn_r15rn(uint16_t op);
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void storeb_rn_rn(uint16_t op);
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void storew_rn_rn(uint16_t op);
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void storep_rn_rn(uint16_t op); /* GPU only */
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void sub_rn_rn(uint16_t op);
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void subc_rn_rn(uint16_t op);
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void subq_n_rn(uint16_t op);
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void subqmod_n_rn(uint16_t op); /* DSP only */
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void subqt_n_rn(uint16_t op);
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void xor_rn_rn(uint16_t op);
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void abs_rn(u16 op);
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void add_rn_rn(u16 op);
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void addc_rn_rn(u16 op);
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void addq_n_rn(u16 op);
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void addqmod_n_rn(u16 op); /* DSP only */
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void addqt_n_rn(u16 op);
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void and_rn_rn(u16 op);
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void bclr_n_rn(u16 op);
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void bset_n_rn(u16 op);
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void btst_n_rn(u16 op);
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void cmp_rn_rn(u16 op);
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void cmpq_n_rn(u16 op);
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void div_rn_rn(u16 op);
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void illegal(u16 op);
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void imacn_rn_rn(u16 op);
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void imult_rn_rn(u16 op);
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void imultn_rn_rn(u16 op);
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void jr_cc_n(u16 op);
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void jump_cc_rn(u16 op);
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void load_rn_rn(u16 op);
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void load_r14n_rn(u16 op);
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void load_r15n_rn(u16 op);
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void load_r14rn_rn(u16 op);
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void load_r15rn_rn(u16 op);
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void loadb_rn_rn(u16 op);
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void loadw_rn_rn(u16 op);
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void loadp_rn_rn(u16 op); /* GPU only */
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void mirror_rn(u16 op); /* DSP only */
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void mmult_rn_rn(u16 op);
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void move_rn_rn(u16 op);
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void move_pc_rn(u16 op);
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void movefa_rn_rn(u16 op);
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void movei_n_rn(u16 op);
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void moveq_n_rn(u16 op);
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void moveta_rn_rn(u16 op);
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void mtoi_rn_rn(u16 op);
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void mult_rn_rn(u16 op);
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void neg_rn(u16 op);
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void nop(u16 op);
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void normi_rn_rn(u16 op);
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void not_rn(u16 op);
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void or_rn_rn(u16 op);
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void pack_rn(u16 op); /* GPU only */
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void resmac_rn(u16 op);
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void ror_rn_rn(u16 op);
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void rorq_n_rn(u16 op);
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void sat8_rn(u16 op); /* GPU only */
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void sat16_rn(u16 op); /* GPU only */
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void sat16s_rn(u16 op); /* DSP only */
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void sat24_rn(u16 op); /* GPU only */
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void sat32s_rn(u16 op); /* DSP only */
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void sh_rn_rn(u16 op);
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void sha_rn_rn(u16 op);
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void sharq_n_rn(u16 op);
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void shlq_n_rn(u16 op);
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void shrq_n_rn(u16 op);
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void store_rn_rn(u16 op);
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void store_rn_r14n(u16 op);
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void store_rn_r15n(u16 op);
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void store_rn_r14rn(u16 op);
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void store_rn_r15rn(u16 op);
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void storeb_rn_rn(u16 op);
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void storew_rn_rn(u16 op);
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void storep_rn_rn(u16 op); /* GPU only */
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void sub_rn_rn(u16 op);
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void subc_rn_rn(u16 op);
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void subq_n_rn(u16 op);
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void subqmod_n_rn(u16 op); /* DSP only */
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void subqt_n_rn(u16 op);
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void xor_rn_rn(u16 op);
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void update_register_banks();
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void check_irqs();
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void init_tables();
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void jaguar_postload();
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};
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@ -230,10 +255,10 @@ class jaguargpu_cpu_device : public jaguar_cpu_device
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{
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public:
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// construction/destruction
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jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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DECLARE_WRITE32_MEMBER(ctrl_w) override;
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DECLARE_READ32_MEMBER(ctrl_r) override;
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void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) override;
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u32 ctrl_r(offs_t offset) override;
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protected:
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virtual void execute_run() override;
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@ -245,13 +270,13 @@ class jaguardsp_cpu_device : public jaguar_cpu_device
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{
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public:
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// construction/destruction
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jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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DECLARE_WRITE32_MEMBER(ctrl_w) override;
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DECLARE_READ32_MEMBER(ctrl_r) override;
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void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) override;
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u32 ctrl_r(offs_t offset) override;
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protected:
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virtual uint32_t execute_input_lines() const override { return 6; }
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virtual u32 execute_input_lines() const override { return 6; }
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virtual void execute_run() override;
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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@ -297,13 +297,13 @@ const double XTAL::known_xtals[] = {
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25'398'360, /* 25.39836_MHz_XTAL Tandberg TDV 2324 */
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25'400'000, /* 25.4_MHz_XTAL PC9801-86 PCM base clock */
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25'447'000, /* 25.447_MHz_XTAL Namco EVA3A (Funcube2) */
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25'590'906, /* 25.590906_MHz_XTAL Atari Jaguar NTSC */
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25'593'900, /* 25.5939_MHz_XTAL Atari Jaguar PAL */
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25'771'500, /* 25.7715_MHz_XTAL HP-2622A */
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25'920'000, /* 25.92_MHz_XTAL ADDS Viewpoint 60 */
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26'000'000, /* 26_MHz_XTAL Gaelco PCBs */
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26'366'000, /* 26.366_MHz_XTAL DEC VT320 */
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26'580'000, /* 26.58_MHz_XTAL Wyse WY-60 80-column display clock */
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26'590'906, /* 26.590906_MHz_XTAL Atari Jaguar NTSC */
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26'593'900, /* 26.5939_MHz_XTAL Atari Jaguar PAL */
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26'601'712, /* 26.601712_MHz_XTAL Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */
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26'666'000, /* 26.666_MHz_XTAL Imagetek I4100/I4220/I4300 */
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26'666'666, /* 26.666666_MHz_XTAL Irem M92 but most use 27MHz */
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@ -261,7 +261,7 @@ WRITE16_MEMBER( jaguar_state::jerry_regs_w )
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WRITE32_MEMBER( jaguar_state::dsp_flags_w )
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{
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/* write the data through */
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m_dsp->ctrl_w(space, offset, data, mem_mask);
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m_dsp->ctrl_w(offset, data, mem_mask);
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/* if they were clearing the A2S interrupt, see if we are headed for the spin */
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/* loop with R22 != 0; if we are, just start spinning again */
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@ -461,8 +461,8 @@ void jaguar_state::machine_reset()
|
||||
dsp_resume();
|
||||
|
||||
/* halt the CPUs */
|
||||
m_gpu->ctrl_w(m_gpu->space(AS_PROGRAM), G_CTRL, 0, 0xffffffff);
|
||||
m_dsp->ctrl_w(m_dsp->space(AS_PROGRAM), D_CTRL, 0, 0xffffffff);
|
||||
m_gpu->ctrl_w(G_CTRL, 0);
|
||||
m_dsp->ctrl_w(D_CTRL, 0);
|
||||
|
||||
/* set blitter idle flag */
|
||||
m_blitter_status = 1;
|
||||
@ -631,8 +631,8 @@ WRITE32_MEMBER(jaguar_state::misc_control_w)
|
||||
dsp_resume();
|
||||
|
||||
/* halt the CPUs */
|
||||
m_gpu->ctrl_w(space, G_CTRL, 0, 0xffffffff);
|
||||
m_dsp->ctrl_w(space, D_CTRL, 0, 0xffffffff);
|
||||
m_gpu->ctrl_w(G_CTRL, 0);
|
||||
m_dsp->ctrl_w(D_CTRL, 0);
|
||||
}
|
||||
|
||||
/* adjust banking */
|
||||
@ -654,13 +654,13 @@ WRITE32_MEMBER(jaguar_state::misc_control_w)
|
||||
|
||||
READ32_MEMBER(jaguar_state::gpuctrl_r)
|
||||
{
|
||||
return m_gpu->ctrl_r(space, offset);
|
||||
return m_gpu->ctrl_r(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE32_MEMBER(jaguar_state::gpuctrl_w)
|
||||
{
|
||||
m_gpu->ctrl_w(space, offset, data, mem_mask);
|
||||
m_gpu->ctrl_w(offset, data, mem_mask);
|
||||
}
|
||||
|
||||
|
||||
@ -673,13 +673,13 @@ WRITE32_MEMBER(jaguar_state::gpuctrl_w)
|
||||
|
||||
READ32_MEMBER(jaguar_state::dspctrl_r)
|
||||
{
|
||||
return m_dsp->ctrl_r(space, offset);
|
||||
return m_dsp->ctrl_r(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE32_MEMBER(jaguar_state::dspctrl_w)
|
||||
{
|
||||
m_dsp->ctrl_w(space, offset, data, mem_mask);
|
||||
m_dsp->ctrl_w(offset, data, mem_mask);
|
||||
}
|
||||
|
||||
|
||||
@ -1886,7 +1886,7 @@ void jaguar_state::cojag68k(machine_config &config)
|
||||
void jaguar_state::jaguar(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
M68000(config, m_maincpu, JAGUAR_CLOCK/2);
|
||||
M68000(config, m_maincpu, JAGUAR_CLOCK/2); // MC68000FN12F 16 MHz
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::jaguar_map);
|
||||
m_maincpu->set_addrmap(m68000_device::AS_CPU_SPACE, &jaguar_state::cpu_space_map);
|
||||
|
||||
@ -2740,8 +2740,8 @@ void jaguar_state::init_vcircle()
|
||||
*************************************/
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
|
||||
CONS( 1993, jaguar, 0, 0, jaguar, jaguar, jaguar_state, init_jaguar, "Atari", "Jaguar", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
CONS( 1995, jaguarcd, jaguar, 0, jaguarcd, jaguar, jaguar_state, init_jaguarcd, "Atari", "Jaguar CD", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
CONS( 1993, jaguar, 0, 0, jaguar, jaguar, jaguar_state, init_jaguar, "Atari", "Jaguar (NTSC)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
CONS( 1995, jaguarcd, jaguar, 0, jaguarcd, jaguar, jaguar_state, init_jaguarcd, "Atari", "Jaguar CD (NTSC)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
|
||||
|
||||
/* YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME */
|
||||
GAME( 1996, area51, 0, cojagr3k, area51, jaguar_state, init_area51, ROT0, "Atari Games", "Area 51 (R3000)", 0 )
|
||||
|
||||
@ -23,8 +23,8 @@
|
||||
|
||||
/* CoJag and Jaguar have completely different XTALs, pixel clock in Jaguar is the same as the GPU one */
|
||||
#define COJAG_PIXEL_CLOCK XTAL(14'318'181)
|
||||
#define JAGUAR_CLOCK XTAL(25'590'906) // NTSC
|
||||
// XTAL(25'593'900) PAL, TODO
|
||||
#define JAGUAR_CLOCK XTAL(26'590'906) // NTSC
|
||||
// XTAL(26'593'900) PAL, TODO
|
||||
|
||||
class jaguar_state : public driver_device
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user